drivers/i2c/busses/i2c-piix4.c

   1 /*
   2     Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl> and
   3     Philip Edelbrock <phil@netroedge.com>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 2 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program; if not, write to the Free Software
  17     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18 */
  19
  20 /*
  21    Supports:
  22         Intel PIIX4, 440MX
  23         Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100
  24         ATI IXP200, IXP300, IXP400, SB600, SB700, SB800
  25         AMD Hudson-2
  26         SMSC Victory66
  27
  28    Note: we assume there can only be one device, with one SMBus interface.
  29 */
  30
  31 #include <linux/module.h>
  32 #include <linux/moduleparam.h>
  33 #include <linux/pci.h>
  34 #include <linux/kernel.h>
  35 #include <linux/delay.h>
  36 #include <linux/stddef.h>
  37 #include <linux/ioport.h>
  38 #include <linux/i2c.h>
  39 #include <linux/init.h>
  40 #include <linux/dmi.h>
  41 #include <linux/acpi.h>
  42 #include <linux/io.h>
  43
  44
  45 /* PIIX4 SMBus address offsets */
  46 #define SMBHSTSTS       (0 + piix4_smba)
  47 #define SMBHSLVSTS      (1 + piix4_smba)
  48 #define SMBHSTCNT       (2 + piix4_smba)
  49 #define SMBHSTCMD       (3 + piix4_smba)
  50 #define SMBHSTADD       (4 + piix4_smba)
  51 #define SMBHSTDAT0      (5 + piix4_smba)
  52 #define SMBHSTDAT1      (6 + piix4_smba)
  53 #define SMBBLKDAT       (7 + piix4_smba)
  54 #define SMBSLVCNT       (8 + piix4_smba)
  55 #define SMBSHDWCMD      (9 + piix4_smba)
  56 #define SMBSLVEVT       (0xA + piix4_smba)
  57 #define SMBSLVDAT       (0xC + piix4_smba)
  58
  59 /* count for request_region */
  60 #define SMBIOSIZE       8
  61
  62 /* PCI Address Constants */
  63 #define SMBBA           0x090
  64 #define SMBHSTCFG       0x0D2
  65 #define SMBSLVC         0x0D3
  66 #define SMBSHDW1        0x0D4
  67 #define SMBSHDW2        0x0D5
  68 #define SMBREV          0x0D6
  69
  70 /* Other settings */
  71 #define MAX_TIMEOUT     500
  72 #define  ENABLE_INT9    0
  73
  74 /* PIIX4 constants */
  75 #define PIIX4_QUICK             0x00
  76 #define PIIX4_BYTE              0x04
  77 #define PIIX4_BYTE_DATA         0x08
  78 #define PIIX4_WORD_DATA         0x0C
  79 #define PIIX4_BLOCK_DATA        0x14
  80
  81 /* insmod parameters */
  82
  83 /* If force is set to anything different from 0, we forcibly enable the
  84    PIIX4. DANGEROUS! */
  85 static int force;
  86 module_param (force, int, 0);
  87 MODULE_PARM_DESC(force, "Forcibly enable the PIIX4. DANGEROUS!");
  88
  89 /* If force_addr is set to anything different from 0, we forcibly enable
  90    the PIIX4 at the given address. VERY DANGEROUS! */
  91 static int force_addr;
  92 module_param (force_addr, int, 0);
  93 MODULE_PARM_DESC(force_addr,
  94                  "Forcibly enable the PIIX4 at the given address. "
  95                  "EXTREMELY DANGEROUS!");
  96
  97 static int srvrworks_csb5_delay;
  98 static struct pci_driver piix4_driver;
  99
 100 static struct dmi_system_id __devinitdata piix4_dmi_blacklist[] = {
 101         {
 102                 .ident = "Sapphire AM2RD790",
 103                 .matches = {
 104                         DMI_MATCH(DMI_BOARD_VENDOR, "SAPPHIRE Inc."),
 105                         DMI_MATCH(DMI_BOARD_NAME, "PC-AM2RD790"),
 106                 },
 107         },
 108         {
 109                 .ident = "DFI Lanparty UT 790FX",
 110                 .matches = {
 111                         DMI_MATCH(DMI_BOARD_VENDOR, "DFI Inc."),
 112                         DMI_MATCH(DMI_BOARD_NAME, "LP UT 790FX"),
 113                 },
 114         },
 115         { }
 116 };
 117
 118 /* The IBM entry is in a separate table because we only check it
 119    on Intel-based systems */
 120 static struct dmi_system_id __devinitdata piix4_dmi_ibm[] = {
 121         {
 122                 .ident = "IBM",
 123                 .matches = { DMI_MATCH(DMI_SYS_VENDOR, "IBM"), },
 124         },
 125         { },
 126 };
 127
 128 struct i2c_piix4_adapdata {
 129         unsigned short smba;
 130 };
 131
 132 static int __devinit piix4_setup(struct pci_dev *PIIX4_dev,
 133                                 const struct pci_device_id *id)
 134 {
 135         unsigned char temp;
 136         unsigned short piix4_smba;
 137
 138         if ((PIIX4_dev->vendor == PCI_VENDOR_ID_SERVERWORKS) &&
 139             (PIIX4_dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5))
 140                 srvrworks_csb5_delay = 1;
 141
 142         /* On some motherboards, it was reported that accessing the SMBus
 143            caused severe hardware problems */
 144         if (dmi_check_system(piix4_dmi_blacklist)) {
 145                 dev_err(&PIIX4_dev->dev,
 146                         "Accessing the SMBus on this system is unsafe!\n");
 147                 return -EPERM;
 148         }
 149
 150         /* Don't access SMBus on IBM systems which get corrupted eeproms */
 151         if (dmi_check_system(piix4_dmi_ibm) &&
 152                         PIIX4_dev->vendor == PCI_VENDOR_ID_INTEL) {
 153                 dev_err(&PIIX4_dev->dev, "IBM system detected; this module "
 154                         "may corrupt your serial eeprom! Refusing to load "
 155                         "module!\n");
 156                 return -EPERM;
 157         }
 158
 159         /* Determine the address of the SMBus areas */
 160         if (force_addr) {
 161                 piix4_smba = force_addr & 0xfff0;
 162                 force = 0;
 163         } else {
 164                 pci_read_config_word(PIIX4_dev, SMBBA, &piix4_smba);
 165                 piix4_smba &= 0xfff0;
 166                 if(piix4_smba == 0) {
 167                         dev_err(&PIIX4_dev->dev, "SMBus base address "
 168                                 "uninitialized - upgrade BIOS or use "
 169                                 "force_addr=0xaddr\n");
 170                         return -ENODEV;
 171                 }
 172         }
 173
 174         if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
 175                 return -ENODEV;
 176
 177         if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
 178                 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
 179                         piix4_smba);
 180                 return -EBUSY;
 181         }
 182
 183         pci_read_config_byte(PIIX4_dev, SMBHSTCFG, &temp);
 184
 185         /* If force_addr is set, we program the new address here. Just to make
 186            sure, we disable the PIIX4 first. */
 187         if (force_addr) {
 188                 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp & 0xfe);
 189                 pci_write_config_word(PIIX4_dev, SMBBA, piix4_smba);
 190                 pci_write_config_byte(PIIX4_dev, SMBHSTCFG, temp | 0x01);
 191                 dev_info(&PIIX4_dev->dev, "WARNING: SMBus interface set to "
 192                         "new address %04x!\n", piix4_smba);
 193         } else if ((temp & 1) == 0) {
 194                 if (force) {
 195                         /* This should never need to be done, but has been
 196                          * noted that many Dell machines have the SMBus
 197                          * interface on the PIIX4 disabled!? NOTE: This assumes
 198                          * I/O space and other allocations WERE done by the
 199                          * Bios!  Don't complain if your hardware does weird
 200                          * things after enabling this. :') Check for Bios
 201                          * updates before resorting to this.
 202                          */
 203                         pci_write_config_byte(PIIX4_dev, SMBHSTCFG,
 204                                               temp | 1);
 205                         dev_printk(KERN_NOTICE, &PIIX4_dev->dev,
 206                                 "WARNING: SMBus interface has been "
 207                                 "FORCEFULLY ENABLED!\n");
 208                 } else {
 209                         dev_err(&PIIX4_dev->dev,
 210                                 "Host SMBus controller not enabled!\n");
 211                         release_region(piix4_smba, SMBIOSIZE);
 212                         return -ENODEV;
 213                 }
 214         }
 215
 216         if (((temp & 0x0E) == 8) || ((temp & 0x0E) == 2))
 217                 dev_dbg(&PIIX4_dev->dev, "Using Interrupt 9 for SMBus.\n");
 218         else if ((temp & 0x0E) == 0)
 219                 dev_dbg(&PIIX4_dev->dev, "Using Interrupt SMI# for SMBus.\n");
 220         else
 221                 dev_err(&PIIX4_dev->dev, "Illegal Interrupt configuration "
 222                         "(or code out of date)!\n");
 223
 224         pci_read_config_byte(PIIX4_dev, SMBREV, &temp);
 225         dev_info(&PIIX4_dev->dev,
 226                  "SMBus Host Controller at 0x%x, revision %d\n",
 227                  piix4_smba, temp);
 228
 229         return piix4_smba;
 230 }
 231
 232 static int __devinit piix4_setup_sb800(struct pci_dev *PIIX4_dev,
 233                                 const struct pci_device_id *id)
 234 {
 235         unsigned short piix4_smba;
 236         unsigned short smba_idx = 0xcd6;
 237         u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c;
 238
 239         /* SB800 and later SMBus does not support forcing address */
 240         if (force || force_addr) {
 241                 dev_err(&PIIX4_dev->dev, "SMBus does not support "
 242                         "forcing address!\n");
 243                 return -EINVAL;
 244         }
 245
 246         /* Determine the address of the SMBus areas */
 247         if (!request_region(smba_idx, 2, "smba_idx")) {
 248                 dev_err(&PIIX4_dev->dev, "SMBus base address index region "
 249                         "0x%x already in use!\n", smba_idx);
 250                 return -EBUSY;
 251         }
 252         outb_p(smb_en, smba_idx);
 253         smba_en_lo = inb_p(smba_idx + 1);
 254         outb_p(smb_en + 1, smba_idx);
 255         smba_en_hi = inb_p(smba_idx + 1);
 256         release_region(smba_idx, 2);
 257
 258         if ((smba_en_lo & 1) == 0) {
 259                 dev_err(&PIIX4_dev->dev,
 260                         "Host SMBus controller not enabled!\n");
 261                 return -ENODEV;
 262         }
 263
 264         piix4_smba = ((smba_en_hi << 8) | smba_en_lo) & 0xffe0;
 265         if (acpi_check_region(piix4_smba, SMBIOSIZE, piix4_driver.name))
 266                 return -ENODEV;
 267
 268         if (!request_region(piix4_smba, SMBIOSIZE, piix4_driver.name)) {
 269                 dev_err(&PIIX4_dev->dev, "SMBus region 0x%x already in use!\n",
 270                         piix4_smba);
 271                 return -EBUSY;
 272         }
 273
 274         /* Request the SMBus I2C bus config region */
 275         if (!request_region(piix4_smba + i2ccfg_offset, 1, "i2ccfg")) {
 276                 dev_err(&PIIX4_dev->dev, "SMBus I2C bus config region "
 277                         "0x%x already in use!\n", piix4_smba + i2ccfg_offset);
 278                 release_region(piix4_smba, SMBIOSIZE);
 279                 return -EBUSY;
 280         }
 281         i2ccfg = inb_p(piix4_smba + i2ccfg_offset);
 282         release_region(piix4_smba + i2ccfg_offset, 1);
 283
 284         if (i2ccfg & 1)
 285                 dev_dbg(&PIIX4_dev->dev, "Using IRQ for SMBus.\n");
 286         else
 287                 dev_dbg(&PIIX4_dev->dev, "Using SMI# for SMBus.\n");
 288
 289         dev_info(&PIIX4_dev->dev,
 290                  "SMBus Host Controller at 0x%x, revision %d\n",
 291                  piix4_smba, i2ccfg >> 4);
 292
 293         return piix4_smba;
 294 }
 295
 296 static int piix4_transaction(struct i2c_adapter *piix4_adapter)
 297 {
 298         struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(piix4_adapter);
 299         unsigned short piix4_smba = adapdata->smba;
 300         int temp;
 301         int result = 0;
 302         int timeout = 0;
 303
 304         dev_dbg(&piix4_adapter->dev, "Transaction (pre): CNT=%02x, CMD=%02x, "
 305                 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
 306                 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
 307                 inb_p(SMBHSTDAT1));
 308
 309         /* Make sure the SMBus host is ready to start transmitting */
 310         if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
 311                 dev_dbg(&piix4_adapter->dev, "SMBus busy (%02x). "
 312                         "Resetting...\n", temp);
 313                 outb_p(temp, SMBHSTSTS);
 314                 if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
 315                         dev_err(&piix4_adapter->dev, "Failed! (%02x)\n", temp);
 316                         return -EBUSY;
 317                 } else {
 318                         dev_dbg(&piix4_adapter->dev, "Successful!\n");
 319                 }
 320         }
 321
 322         /* start the transaction by setting bit 6 */
 323         outb_p(inb(SMBHSTCNT) | 0x040, SMBHSTCNT);
 324
 325         /* We will always wait for a fraction of a second! (See PIIX4 docs errata) */
 326         if (srvrworks_csb5_delay) /* Extra delay for SERVERWORKS_CSB5 */
 327                 msleep(2);
 328         else
 329                 msleep(1);
 330
 331         while ((++timeout < MAX_TIMEOUT) &&
 332                ((temp = inb_p(SMBHSTSTS)) & 0x01))
 333                 msleep(1);
 334
 335         /* If the SMBus is still busy, we give up */
 336         if (timeout == MAX_TIMEOUT) {
 337                 dev_err(&piix4_adapter->dev, "SMBus Timeout!\n");
 338                 result = -ETIMEDOUT;
 339         }
 340
 341         if (temp & 0x10) {
 342                 result = -EIO;
 343                 dev_err(&piix4_adapter->dev, "Error: Failed bus transaction\n");
 344         }
 345
 346         if (temp & 0x08) {
 347                 result = -EIO;
 348                 dev_dbg(&piix4_adapter->dev, "Bus collision! SMBus may be "
 349                         "locked until next hard reset. (sorry!)\n");
 350                 /* Clock stops and slave is stuck in mid-transmission */
 351         }
 352
 353         if (temp & 0x04) {
 354                 result = -ENXIO;
 355                 dev_dbg(&piix4_adapter->dev, "Error: no response!\n");
 356         }
 357
 358         if (inb_p(SMBHSTSTS) != 0x00)
 359                 outb_p(inb(SMBHSTSTS), SMBHSTSTS);
 360
 361         if ((temp = inb_p(SMBHSTSTS)) != 0x00) {
 362                 dev_err(&piix4_adapter->dev, "Failed reset at end of "
 363                         "transaction (%02x)\n", temp);
 364         }
 365         dev_dbg(&piix4_adapter->dev, "Transaction (post): CNT=%02x, CMD=%02x, "
 366                 "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTCNT),
 367                 inb_p(SMBHSTCMD), inb_p(SMBHSTADD), inb_p(SMBHSTDAT0),
 368                 inb_p(SMBHSTDAT1));
 369         return result;
 370 }
 371
 372 /* Return negative errno on error. */
 373 static s32 piix4_access(struct i2c_adapter * adap, u16 addr,
 374                  unsigned short flags, char read_write,
 375                  u8 command, int size, union i2c_smbus_data * data)
 376 {
 377         struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
 378         unsigned short piix4_smba = adapdata->smba;
 379         int i, len;
 380         int status;
 381
 382         switch (size) {
 383         case I2C_SMBUS_QUICK:
 384                 outb_p((addr << 1) | read_write,
 385                        SMBHSTADD);
 386                 size = PIIX4_QUICK;
 387                 break;
 388         case I2C_SMBUS_BYTE:
 389                 outb_p((addr << 1) | read_write,
 390                        SMBHSTADD);
 391                 if (read_write == I2C_SMBUS_WRITE)
 392                         outb_p(command, SMBHSTCMD);
 393                 size = PIIX4_BYTE;
 394                 break;
 395         case I2C_SMBUS_BYTE_DATA:
 396                 outb_p((addr << 1) | read_write,
 397                        SMBHSTADD);
 398                 outb_p(command, SMBHSTCMD);
 399                 if (read_write == I2C_SMBUS_WRITE)
 400                         outb_p(data->byte, SMBHSTDAT0);
 401                 size = PIIX4_BYTE_DATA;
 402                 break;
 403         case I2C_SMBUS_WORD_DATA:
 404                 outb_p((addr << 1) | read_write,
 405                        SMBHSTADD);
 406                 outb_p(command, SMBHSTCMD);
 407                 if (read_write == I2C_SMBUS_WRITE) {
 408                         outb_p(data->word & 0xff, SMBHSTDAT0);
 409                         outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
 410                 }
 411                 size = PIIX4_WORD_DATA;
 412                 break;
 413         case I2C_SMBUS_BLOCK_DATA:
 414                 outb_p((addr << 1) | read_write,
 415                        SMBHSTADD);
 416                 outb_p(command, SMBHSTCMD);
 417                 if (read_write == I2C_SMBUS_WRITE) {
 418                         len = data->block[0];
 419                         if (len == 0 || len > I2C_SMBUS_BLOCK_MAX)
 420                                 return -EINVAL;
 421                         outb_p(len, SMBHSTDAT0);
 422                         i = inb_p(SMBHSTCNT);   /* Reset SMBBLKDAT */
 423                         for (i = 1; i <= len; i++)
 424                                 outb_p(data->block[i], SMBBLKDAT);
 425                 }
 426                 size = PIIX4_BLOCK_DATA;
 427                 break;
 428         default:
 429                 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
 430                 return -EOPNOTSUPP;
 431         }
 432
 433         outb_p((size & 0x1C) + (ENABLE_INT9 & 1), SMBHSTCNT);
 434
 435         status = piix4_transaction(adap);
 436         if (status)
 437                 return status;
 438
 439         if ((read_write == I2C_SMBUS_WRITE) || (size == PIIX4_QUICK))
 440                 return 0;
 441
 442
 443         switch (size) {
 444         case PIIX4_BYTE:
 445         case PIIX4_BYTE_DATA:
 446                 data->byte = inb_p(SMBHSTDAT0);
 447                 break;
 448         case PIIX4_WORD_DATA:
 449                 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
 450                 break;
 451         case PIIX4_BLOCK_DATA:
 452                 data->block[0] = inb_p(SMBHSTDAT0);
 453                 if (data->block[0] == 0 || data->block[0] > I2C_SMBUS_BLOCK_MAX)
 454                         return -EPROTO;
 455                 i = inb_p(SMBHSTCNT);   /* Reset SMBBLKDAT */
 456                 for (i = 1; i <= data->block[0]; i++)
 457                         data->block[i] = inb_p(SMBBLKDAT);
 458                 break;
 459         }
 460         return 0;
 461 }
 462
 463 static u32 piix4_func(struct i2c_adapter *adapter)
 464 {
 465         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
 466             I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
 467             I2C_FUNC_SMBUS_BLOCK_DATA;
 468 }
 469
 470 static const struct i2c_algorithm smbus_algorithm = {
 471         .smbus_xfer     = piix4_access,
 472         .functionality  = piix4_func,
 473 };
 474
 475 static DEFINE_PCI_DEVICE_TABLE(piix4_ids) = {
 476         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3) },
 477         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443MX_3) },
 478         { PCI_DEVICE(PCI_VENDOR_ID_EFAR, PCI_DEVICE_ID_EFAR_SLC90E66_3) },
 479         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_SMBUS) },
 480         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
 481         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
 482         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
 483         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) },
 484         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 485                      PCI_DEVICE_ID_SERVERWORKS_OSB4) },
 486         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 487                      PCI_DEVICE_ID_SERVERWORKS_CSB5) },
 488         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 489                      PCI_DEVICE_ID_SERVERWORKS_CSB6) },
 490         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 491                      PCI_DEVICE_ID_SERVERWORKS_HT1000SB) },
 492         { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
 493                      PCI_DEVICE_ID_SERVERWORKS_HT1100LD) },
 494         { 0, }
 495 };
 496
 497 MODULE_DEVICE_TABLE (pci, piix4_ids);
 498
 499 static struct i2c_adapter *piix4_main_adapter;
 500
 501 static int __devinit piix4_add_adapter(struct pci_dev *dev,
 502                                         unsigned short smba,
 503                                         struct i2c_adapter **padap)
 504 {
 505         struct i2c_adapter *adap;
 506         struct i2c_piix4_adapdata *adapdata;
 507         int retval;
 508
 509         adap = kzalloc(sizeof(*adap), GFP_KERNEL);
 510         if (adap == NULL) {
 511                 release_region(smba, SMBIOSIZE);
 512                 return -ENOMEM;
 513         }
 514
 515         adap->owner = THIS_MODULE;
 516         adap->class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
 517         adap->algo = &smbus_algorithm;
 518
 519         adapdata = kzalloc(sizeof(*adapdata), GFP_KERNEL);
 520         if (adapdata == NULL) {
 521                 kfree(adap);
 522                 release_region(smba, SMBIOSIZE);
 523                 return -ENOMEM;
 524         }
 525
 526         adapdata->smba = smba;
 527
 528         /* set up the sysfs linkage to our parent device */
 529         adap->dev.parent = &dev->dev;
 530
 531         snprintf(adap->name, sizeof(adap->name),
 532                 "SMBus PIIX4 adapter at %04x", smba);
 533
 534         i2c_set_adapdata(adap, adapdata);
 535
 536         retval = i2c_add_adapter(adap);
 537         if (retval) {
 538                 dev_err(&dev->dev, "Couldn't register adapter!\n");
 539                 kfree(adapdata);
 540                 kfree(adap);
 541                 release_region(smba, SMBIOSIZE);
 542                 return retval;
 543         }
 544
 545         *padap = adap;
 546         return 0;
 547 }
 548
 549 static int __devinit piix4_probe(struct pci_dev *dev,
 550                                 const struct pci_device_id *id)
 551 {
 552         int retval;
 553
 554         if ((dev->vendor == PCI_VENDOR_ID_ATI &&
 555              dev->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
 556              dev->revision >= 0x40) ||
 557             dev->vendor == PCI_VENDOR_ID_AMD)
 558                 /* base address location etc changed in SB800 */
 559                 retval = piix4_setup_sb800(dev, id);
 560         else
 561                 retval = piix4_setup(dev, id);
 562
 563         if (retval < 0)
 564                 return retval;
 565
 566         return piix4_add_adapter(dev, retval, &piix4_main_adapter);
 567 }
 568
 569 static void __devexit piix4_adap_remove(struct i2c_adapter *adap)
 570 {
 571         struct i2c_piix4_adapdata *adapdata = i2c_get_adapdata(adap);
 572
 573         if (adapdata->smba) {
 574                 i2c_del_adapter(adap);
 575                 release_region(adapdata->smba, SMBIOSIZE);
 576                 kfree(adapdata);
 577                 kfree(adap);
 578         }
 579 }
 580
 581 static void __devexit piix4_remove(struct pci_dev *dev)
 582 {
 583         if (piix4_main_adapter) {
 584                 piix4_adap_remove(piix4_main_adapter);
 585                 piix4_main_adapter = NULL;
 586         }
 587 }
 588
 589 static struct pci_driver piix4_driver = {
 590         .name           = "piix4_smbus",
 591         .id_table       = piix4_ids,
 592         .probe          = piix4_probe,
 593         .remove         = __devexit_p(piix4_remove),
 594 };
 595
 596 module_pci_driver(piix4_driver);
 597
 598 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl> and "
 599                 "Philip Edelbrock <phil@netroedge.com>");
 600 MODULE_DESCRIPTION("PIIX4 SMBus driver");
 601 MODULE_LICENSE("GPL");