i2c: New driver for the SuperH Mobile I2C bus controller
[deliverable/linux.git] / drivers / i2c / busses / i2c-sh_mobile.c
1 /*
2 * SuperH Mobile I2C Controller
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * Portions of the code based on out-of-tree driver i2c-sh7343.c
7 * Copyright (c) 2006 Carlos Munoz <carlos@kenati.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/platform_device.h>
28 #include <linux/interrupt.h>
29 #include <linux/i2c.h>
30 #include <linux/err.h>
31 #include <linux/clk.h>
32 #include <linux/io.h>
33
34 enum sh_mobile_i2c_op {
35 OP_START = 0,
36 OP_TX_ONLY,
37 OP_TX_STOP,
38 OP_TX_TO_RX,
39 OP_RX_ONLY,
40 OP_RX_STOP,
41 };
42
43 struct sh_mobile_i2c_data {
44 struct device *dev;
45 void __iomem *reg;
46 struct i2c_adapter adap;
47
48 struct clk *clk;
49 u_int8_t iccl;
50 u_int8_t icch;
51
52 spinlock_t lock;
53 wait_queue_head_t wait;
54 struct i2c_msg *msg;
55 int pos;
56 int sr;
57 };
58
59 #define NORMAL_SPEED 100000 /* FAST_SPEED 400000 */
60
61 /* Register offsets */
62 #define ICDR(pd) (pd->reg + 0x00)
63 #define ICCR(pd) (pd->reg + 0x04)
64 #define ICSR(pd) (pd->reg + 0x08)
65 #define ICIC(pd) (pd->reg + 0x0c)
66 #define ICCL(pd) (pd->reg + 0x10)
67 #define ICCH(pd) (pd->reg + 0x14)
68
69 /* Register bits */
70 #define ICCR_ICE 0x80
71 #define ICCR_RACK 0x40
72 #define ICCR_TRS 0x10
73 #define ICCR_BBSY 0x04
74 #define ICCR_SCP 0x01
75
76 #define ICSR_SCLM 0x80
77 #define ICSR_SDAM 0x40
78 #define SW_DONE 0x20
79 #define ICSR_BUSY 0x10
80 #define ICSR_AL 0x08
81 #define ICSR_TACK 0x04
82 #define ICSR_WAIT 0x02
83 #define ICSR_DTE 0x01
84
85 #define ICIC_ALE 0x08
86 #define ICIC_TACKE 0x04
87 #define ICIC_WAITE 0x02
88 #define ICIC_DTEE 0x01
89
90 static void activate_ch(struct sh_mobile_i2c_data *pd)
91 {
92 /* Make sure the clock is enabled */
93 clk_enable(pd->clk);
94
95 /* Enable channel and configure rx ack */
96 iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
97
98 /* Mask all interrupts */
99 iowrite8(0, ICIC(pd));
100
101 /* Set the clock */
102 iowrite8(pd->iccl, ICCL(pd));
103 iowrite8(pd->icch, ICCH(pd));
104 }
105
106 static void deactivate_ch(struct sh_mobile_i2c_data *pd)
107 {
108 /* Clear/disable interrupts */
109 iowrite8(0, ICSR(pd));
110 iowrite8(0, ICIC(pd));
111
112 /* Disable channel */
113 iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
114
115 /* Disable clock */
116 clk_disable(pd->clk);
117 }
118
119 static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
120 enum sh_mobile_i2c_op op, unsigned char data)
121 {
122 unsigned char ret = 0;
123 unsigned long flags;
124
125 dev_dbg(pd->dev, "op %d, data in 0x%02x\n", op, data);
126
127 spin_lock_irqsave(&pd->lock, flags);
128
129 switch (op) {
130 case OP_START:
131 iowrite8(0x94, ICCR(pd));
132 break;
133 case OP_TX_ONLY:
134 iowrite8(data, ICDR(pd));
135 break;
136 case OP_TX_STOP:
137 iowrite8(data, ICDR(pd));
138 iowrite8(0x90, ICCR(pd));
139 iowrite8(ICIC_ALE | ICIC_TACKE, ICIC(pd));
140 break;
141 case OP_TX_TO_RX:
142 iowrite8(data, ICDR(pd));
143 iowrite8(0x81, ICCR(pd));
144 break;
145 case OP_RX_ONLY:
146 ret = ioread8(ICDR(pd));
147 break;
148 case OP_RX_STOP:
149 ret = ioread8(ICDR(pd));
150 iowrite8(0xc0, ICCR(pd));
151 break;
152 }
153
154 spin_unlock_irqrestore(&pd->lock, flags);
155
156 dev_dbg(pd->dev, "op %d, data out 0x%02x\n", op, ret);
157 return ret;
158 }
159
160 static irqreturn_t sh_mobile_i2c_isr(int irq, void *dev_id)
161 {
162 struct platform_device *dev = dev_id;
163 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
164 struct i2c_msg *msg = pd->msg;
165 unsigned char data, sr;
166 int wakeup = 0;
167
168 sr = ioread8(ICSR(pd));
169 pd->sr |= sr;
170
171 dev_dbg(pd->dev, "i2c_isr 0x%02x 0x%02x %s %d %d!\n", sr, pd->sr,
172 (msg->flags & I2C_M_RD) ? "read" : "write",
173 pd->pos, msg->len);
174
175 if (sr & (ICSR_AL | ICSR_TACK)) {
176 iowrite8(0, ICIC(pd)); /* disable interrupts */
177 wakeup = 1;
178 goto do_wakeup;
179 }
180
181 if (pd->pos == msg->len) {
182 i2c_op(pd, OP_RX_ONLY, 0);
183 wakeup = 1;
184 goto do_wakeup;
185 }
186
187 if (pd->pos == -1) {
188 data = (msg->addr & 0x7f) << 1;
189 data |= (msg->flags & I2C_M_RD) ? 1 : 0;
190 } else
191 data = msg->buf[pd->pos];
192
193 if ((pd->pos == -1) || !(msg->flags & I2C_M_RD)) {
194 if (msg->flags & I2C_M_RD)
195 i2c_op(pd, OP_TX_TO_RX, data);
196 else if (pd->pos == (msg->len - 1)) {
197 i2c_op(pd, OP_TX_STOP, data);
198 wakeup = 1;
199 } else
200 i2c_op(pd, OP_TX_ONLY, data);
201 } else {
202 if (pd->pos == (msg->len - 1))
203 data = i2c_op(pd, OP_RX_STOP, 0);
204 else
205 data = i2c_op(pd, OP_RX_ONLY, 0);
206
207 msg->buf[pd->pos] = data;
208 }
209 pd->pos++;
210
211 do_wakeup:
212 if (wakeup) {
213 pd->sr |= SW_DONE;
214 wake_up(&pd->wait);
215 }
216
217 return IRQ_HANDLED;
218 }
219
220 static int start_ch(struct sh_mobile_i2c_data *pd, struct i2c_msg *usr_msg)
221 {
222 /* Initialize channel registers */
223 iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
224
225 /* Enable channel and configure rx ack */
226 iowrite8(ioread8(ICCR(pd)) | ICCR_ICE, ICCR(pd));
227
228 /* Set the clock */
229 iowrite8(pd->iccl, ICCL(pd));
230 iowrite8(pd->icch, ICCH(pd));
231
232 pd->msg = usr_msg;
233 pd->pos = -1;
234 pd->sr = 0;
235
236 /* Enable all interrupts except wait */
237 iowrite8(ioread8(ICIC(pd)) | ICIC_ALE | ICIC_TACKE | ICIC_DTEE,
238 ICIC(pd));
239 return 0;
240 }
241
242 static int sh_mobile_i2c_xfer(struct i2c_adapter *adapter,
243 struct i2c_msg *msgs,
244 int num)
245 {
246 struct sh_mobile_i2c_data *pd = i2c_get_adapdata(adapter);
247 struct i2c_msg *msg;
248 int err = 0;
249 u_int8_t val;
250 int i, k, retry_count;
251
252 activate_ch(pd);
253
254 /* Process all messages */
255 for (i = 0; i < num; i++) {
256 msg = &msgs[i];
257
258 err = start_ch(pd, msg);
259 if (err)
260 break;
261
262 i2c_op(pd, OP_START, 0);
263
264 /* The interrupt handler takes care of the rest... */
265 k = wait_event_timeout(pd->wait,
266 pd->sr & (ICSR_TACK | SW_DONE),
267 5 * HZ);
268 if (!k)
269 dev_err(pd->dev, "Transfer request timed out\n");
270
271 retry_count = 10;
272 again:
273 val = ioread8(ICSR(pd));
274
275 dev_dbg(pd->dev, "val 0x%02x pd->sr 0x%02x\n", val, pd->sr);
276
277 if ((val | pd->sr) & (ICSR_TACK | ICSR_AL)) {
278 err = -EIO;
279 break;
280 }
281
282 /* the interrupt handler may wake us up before the
283 * transfer is finished, so poll the hardware
284 * until we're done.
285 */
286
287 if (!(!(val & ICSR_BUSY) && (val & ICSR_SCLM) &&
288 (val & ICSR_SDAM))) {
289 msleep(1);
290 if (retry_count--)
291 goto again;
292
293 err = -EIO;
294 dev_err(pd->dev, "Polling timed out\n");
295 break;
296 }
297 }
298
299 deactivate_ch(pd);
300
301 if (!err)
302 err = num;
303 return err;
304 }
305
306 static u32 sh_mobile_i2c_func(struct i2c_adapter *adapter)
307 {
308 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
309 }
310
311 static struct i2c_algorithm sh_mobile_i2c_algorithm = {
312 .functionality = sh_mobile_i2c_func,
313 .master_xfer = sh_mobile_i2c_xfer,
314 };
315
316 static void sh_mobile_i2c_setup_channel(struct platform_device *dev)
317 {
318 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
319 unsigned long peripheral_clk = clk_get_rate(pd->clk);
320 u_int32_t num;
321 u_int32_t denom;
322 u_int32_t tmp;
323
324 spin_lock_init(&pd->lock);
325 init_waitqueue_head(&pd->wait);
326
327 /* Calculate the value for iccl. From the data sheet:
328 * iccl = (p clock / transfer rate) * (L / (L + H))
329 * where L and H are the SCL low/high ratio (5/4 in this case).
330 * We also round off the result.
331 */
332 num = peripheral_clk * 5;
333 denom = NORMAL_SPEED * 9;
334 tmp = num * 10 / denom;
335 if (tmp % 10 >= 5)
336 pd->iccl = (u_int8_t)((num/denom) + 1);
337 else
338 pd->iccl = (u_int8_t)(num/denom);
339
340 /* Calculate the value for icch. From the data sheet:
341 icch = (p clock / transfer rate) * (H / (L + H)) */
342 num = peripheral_clk * 4;
343 tmp = num * 10 / denom;
344 if (tmp % 10 >= 5)
345 pd->icch = (u_int8_t)((num/denom) + 1);
346 else
347 pd->icch = (u_int8_t)(num/denom);
348 }
349
350 static int sh_mobile_i2c_hook_irqs(struct platform_device *dev, int hook)
351 {
352 struct resource *res;
353 int ret = -ENXIO;
354 int q, m;
355 int k = 0;
356 int n = 0;
357
358 while ((res = platform_get_resource(dev, IORESOURCE_IRQ, k))) {
359 for (n = res->start; hook && n <= res->end; n++) {
360 if (request_irq(n, sh_mobile_i2c_isr, IRQF_DISABLED,
361 dev->dev.bus_id, dev))
362 goto rollback;
363 }
364 k++;
365 }
366
367 if (hook)
368 return k > 0 ? 0 : -ENOENT;
369
370 k--;
371 ret = 0;
372
373 rollback:
374 for (q = k; k >= 0; k--) {
375 for (m = n; m >= res->start; m--)
376 free_irq(m, dev);
377
378 res = platform_get_resource(dev, IORESOURCE_IRQ, k - 1);
379 m = res->end;
380 }
381
382 return ret;
383 }
384
385 static int sh_mobile_i2c_probe(struct platform_device *dev)
386 {
387 struct sh_mobile_i2c_data *pd;
388 struct i2c_adapter *adap;
389 struct resource *res;
390 int size;
391 int ret;
392
393 pd = kzalloc(sizeof(struct sh_mobile_i2c_data), GFP_KERNEL);
394 if (pd == NULL) {
395 dev_err(&dev->dev, "cannot allocate private data\n");
396 return -ENOMEM;
397 }
398
399 pd->clk = clk_get(&dev->dev, "peripheral_clk");
400 if (IS_ERR(pd->clk)) {
401 dev_err(&dev->dev, "cannot get peripheral clock\n");
402 ret = PTR_ERR(pd->clk);
403 goto err;
404 }
405
406 ret = sh_mobile_i2c_hook_irqs(dev, 1);
407 if (ret) {
408 dev_err(&dev->dev, "cannot request IRQ\n");
409 goto err_clk;
410 }
411
412 pd->dev = &dev->dev;
413 platform_set_drvdata(dev, pd);
414
415 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
416 if (res == NULL) {
417 dev_err(&dev->dev, "cannot find IO resource\n");
418 ret = -ENOENT;
419 goto err_irq;
420 }
421
422 size = (res->end - res->start) + 1;
423
424 pd->reg = ioremap(res->start, size);
425 if (pd->reg == NULL) {
426 dev_err(&dev->dev, "cannot map IO\n");
427 ret = -ENXIO;
428 goto err_irq;
429 }
430
431 /* setup the private data */
432 adap = &pd->adap;
433 i2c_set_adapdata(adap, pd);
434
435 adap->owner = THIS_MODULE;
436 adap->algo = &sh_mobile_i2c_algorithm;
437 adap->dev.parent = &dev->dev;
438 adap->retries = 5;
439 adap->nr = dev->id;
440
441 strlcpy(adap->name, dev->name, sizeof(adap->name));
442
443 sh_mobile_i2c_setup_channel(dev);
444
445 ret = i2c_add_numbered_adapter(adap);
446 if (ret < 0) {
447 dev_err(&dev->dev, "cannot add numbered adapter\n");
448 goto err_all;
449 }
450
451 return 0;
452
453 err_all:
454 iounmap(pd->reg);
455 err_irq:
456 sh_mobile_i2c_hook_irqs(dev, 0);
457 err_clk:
458 clk_put(pd->clk);
459 err:
460 kfree(pd);
461 return ret;
462 }
463
464 static int sh_mobile_i2c_remove(struct platform_device *dev)
465 {
466 struct sh_mobile_i2c_data *pd = platform_get_drvdata(dev);
467
468 i2c_del_adapter(&pd->adap);
469 iounmap(pd->reg);
470 sh_mobile_i2c_hook_irqs(dev, 0);
471 clk_put(pd->clk);
472 kfree(pd);
473 return 0;
474 }
475
476 static struct platform_driver sh_mobile_i2c_driver = {
477 .driver = {
478 .name = "i2c-sh_mobile",
479 .owner = THIS_MODULE,
480 },
481 .probe = sh_mobile_i2c_probe,
482 .remove = sh_mobile_i2c_remove,
483 };
484
485 static int __init sh_mobile_i2c_adap_init(void)
486 {
487 return platform_driver_register(&sh_mobile_i2c_driver);
488 }
489
490 static void __exit sh_mobile_i2c_adap_exit(void)
491 {
492 platform_driver_unregister(&sh_mobile_i2c_driver);
493 }
494
495 module_init(sh_mobile_i2c_adap_init);
496 module_exit(sh_mobile_i2c_adap_exit);
497
498 MODULE_DESCRIPTION("SuperH Mobile I2C Bus Controller driver");
499 MODULE_AUTHOR("Magnus Damm");
500 MODULE_LICENSE("GPL v2");
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