drivers/ide/alim15x3.c

   1 /*
   2  *  Copyright (C) 1998-2000 Michel Aubry, Maintainer
   3  *  Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
   4  *  Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
   5  *
   6  *  Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
   7  *  May be copied or modified under the terms of the GNU General Public License
   8  *  Copyright (C) 2002 Alan Cox
   9  *  ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
  10  *  Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
  11  *  Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
  12  *
  13  *  (U)DMA capable version of ali 1533/1543(C), 1535(D)
  14  *
  15  **********************************************************************
  16  *  9/7/99 --Parts from the above author are included and need to be
  17  *  converted into standard interface, once I finish the thought.
  18  *
  19  *  Recent changes
  20  *      Don't use LBA48 mode on ALi <= 0xC4
  21  *      Don't poke 0x79 with a non ALi northbridge
  22  *      Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang)
  23  *      Allow UDMA6 on revisions > 0xC4
  24  *
  25  *  Documentation
  26  *      Chipset documentation available under NDA only
  27  *
  28  */
  29
  30 #include <linux/module.h>
  31 #include <linux/types.h>
  32 #include <linux/kernel.h>
  33 #include <linux/pci.h>
  34 #include <linux/ide.h>
  35 #include <linux/init.h>
  36 #include <linux/dmi.h>
  37
  38 #include <asm/io.h>
  39
  40 #define DRV_NAME "alim15x3"
  41
  42 /*
  43  *      ALi devices are not plug in. Otherwise these static values would
  44  *      need to go. They ought to go away anyway
  45  */
  46
  47 static u8 m5229_revision;
  48 static u8 chip_is_1543c_e;
  49 static struct pci_dev *isa_dev;
  50
  51 /**
  52  *      ali_set_pio_mode        -       set host controller for PIO mode
  53  *      @drive: drive
  54  *      @pio: PIO mode number
  55  *
  56  *      Program the controller for the given PIO mode.
  57  */
  58
  59 static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
  60 {
  61         ide_hwif_t *hwif = drive->hwif;
  62         struct pci_dev *dev = to_pci_dev(hwif->dev);
  63         struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
  64         int s_time = t->setup, a_time = t->active, c_time = t->cycle;
  65         u8 s_clc, a_clc, r_clc;
  66         unsigned long flags;
  67         int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
  68         int port = hwif->channel ? 0x5c : 0x58;
  69         int portFIFO = hwif->channel ? 0x55 : 0x54;
  70         u8 cd_dma_fifo = 0, unit = drive->dn & 1;
  71
  72         if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
  73                 s_clc = 0;
  74         if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8)
  75                 a_clc = 0;
  76
  77         if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) {
  78                 r_clc = 1;
  79         } else {
  80                 if (r_clc >= 16)
  81                         r_clc = 0;
  82         }
  83         local_irq_save(flags);
  84
  85         /*
  86          * PIO mode => ATA FIFO on, ATAPI FIFO off
  87          */
  88         pci_read_config_byte(dev, portFIFO, &cd_dma_fifo);
  89         if (drive->media==ide_disk) {
  90                 if (unit) {
  91                         pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50);
  92                 } else {
  93                         pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05);
  94                 }
  95         } else {
  96                 if (unit) {
  97                         pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F);
  98                 } else {
  99                         pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0);
 100                 }
 101         }
 102
 103         pci_write_config_byte(dev, port, s_clc);
 104         pci_write_config_byte(dev, port + unit + 2, (a_clc << 4) | r_clc);
 105         local_irq_restore(flags);
 106 }
 107
 108 /**
 109  *      ali_udma_filter         -       compute UDMA mask
 110  *      @drive: IDE device
 111  *
 112  *      Return available UDMA modes.
 113  *
 114  *      The actual rules for the ALi are:
 115  *              No UDMA on revisions <= 0x20
 116  *              Disk only for revisions < 0xC2
 117  *              Not WDC drives on M1543C-E (?)
 118  */
 119
 120 static u8 ali_udma_filter(ide_drive_t *drive)
 121 {
 122         if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
 123                 if (drive->media != ide_disk)
 124                         return 0;
 125                 if (chip_is_1543c_e &&
 126                     strstr((char *)&drive->id[ATA_ID_PROD], "WDC "))
 127                         return 0;
 128         }
 129
 130         return drive->hwif->ultra_mask;
 131 }
 132
 133 /**
 134  *      ali_set_dma_mode        -       set host controller for DMA mode
 135  *      @drive: drive
 136  *      @speed: DMA mode
 137  *
 138  *      Configure the hardware for the desired IDE transfer mode.
 139  */
 140
 141 static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
 142 {
 143         ide_hwif_t *hwif        = drive->hwif;
 144         struct pci_dev *dev     = to_pci_dev(hwif->dev);
 145         u8 speed1               = speed;
 146         u8 unit                 = drive->dn & 1;
 147         u8 tmpbyte              = 0x00;
 148         int m5229_udma          = (hwif->channel) ? 0x57 : 0x56;
 149
 150         if (speed == XFER_UDMA_6)
 151                 speed1 = 0x47;
 152
 153         if (speed < XFER_UDMA_0) {
 154                 u8 ultra_enable = (unit) ? 0x7f : 0xf7;
 155                 /*
 156                  * clear "ultra enable" bit
 157                  */
 158                 pci_read_config_byte(dev, m5229_udma, &tmpbyte);
 159                 tmpbyte &= ultra_enable;
 160                 pci_write_config_byte(dev, m5229_udma, tmpbyte);
 161
 162                 /*
 163                  * FIXME: Oh, my... DMA timings are never set.
 164                  */
 165         } else {
 166                 pci_read_config_byte(dev, m5229_udma, &tmpbyte);
 167                 tmpbyte &= (0x0f << ((1-unit) << 2));
 168                 /*
 169                  * enable ultra dma and set timing
 170                  */
 171                 tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2));
 172                 pci_write_config_byte(dev, m5229_udma, tmpbyte);
 173                 if (speed >= XFER_UDMA_3) {
 174                         pci_read_config_byte(dev, 0x4b, &tmpbyte);
 175                         tmpbyte |= 1;
 176                         pci_write_config_byte(dev, 0x4b, tmpbyte);
 177                 }
 178         }
 179 }
 180
 181 /**
 182  *      ali_dma_check   -       DMA check
 183  *      @drive: target device
 184  *      @cmd: command
 185  *
 186  *      Returns 1 if the DMA cannot be performed, zero on success.
 187  */
 188
 189 static int ali_dma_check(ide_drive_t *drive, struct ide_cmd *cmd)
 190 {
 191         if (m5229_revision < 0xC2 && drive->media != ide_disk) {
 192                 if (cmd->tf_flags & IDE_TFLAG_WRITE)
 193                         return 1;       /* try PIO instead of DMA */
 194         }
 195         return 0;
 196 }
 197
 198 /**
 199  *      init_chipset_ali15x3    -       Initialise an ALi IDE controller
 200  *      @dev: PCI device
 201  *
 202  *      This function initializes the ALI IDE controller and where
 203  *      appropriate also sets up the 1533 southbridge.
 204  */
 205
 206 static int init_chipset_ali15x3(struct pci_dev *dev)
 207 {
 208         unsigned long flags;
 209         u8 tmpbyte;
 210         struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));
 211
 212         m5229_revision = dev->revision;
 213
 214         isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
 215
 216         local_irq_save(flags);
 217
 218         if (m5229_revision < 0xC2) {
 219                 /*
 220                  * revision 0x20 (1543-E, 1543-F)
 221                  * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
 222                  * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
 223                  */
 224                 pci_read_config_byte(dev, 0x4b, &tmpbyte);
 225                 /*
 226                  * clear bit 7
 227                  */
 228                 pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
 229                 /*
 230                  * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
 231                  */
 232                 if (m5229_revision >= 0x20 && isa_dev) {
 233                         pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
 234                         chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
 235                 }
 236                 goto out;
 237         }
 238
 239         /*
 240          * 1543C-B?, 1535, 1535D, 1553
 241          * Note 1: not all "motherboard" support this detection
 242          * Note 2: if no udma 66 device, the detection may "error".
 243          *         but in this case, we will not set the device to
 244          *         ultra 66, the detection result is not important
 245          */
 246
 247         /*
 248          * enable "Cable Detection", m5229, 0x4b, bit3
 249          */
 250         pci_read_config_byte(dev, 0x4b, &tmpbyte);
 251         pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08);
 252
 253         /*
 254          * We should only tune the 1533 enable if we are using an ALi
 255          * North bridge. We might have no north found on some zany
 256          * box without a device at 0:0.0. The ALi bridge will be at
 257          * 0:0.0 so if we didn't find one we know what is cooking.
 258          */
 259         if (north && north->vendor != PCI_VENDOR_ID_AL)
 260                 goto out;
 261
 262         if (m5229_revision < 0xC5 && isa_dev)
 263         {
 264                 /*
 265                  * set south-bridge's enable bit, m1533, 0x79
 266                  */
 267
 268                 pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
 269                 if (m5229_revision == 0xC2) {
 270                         /*
 271                          * 1543C-B0 (m1533, 0x79, bit 2)
 272                          */
 273                         pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04);
 274                 } else if (m5229_revision >= 0xC3) {
 275                         /*
 276                          * 1553/1535 (m1533, 0x79, bit 1)
 277                          */
 278                         pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02);
 279                 }
 280         }
 281
 282 out:
 283         /*
 284          * CD_ROM DMA on (m5229, 0x53, bit0)
 285          *      Enable this bit even if we want to use PIO.
 286          * PIO FIFO off (m5229, 0x53, bit1)
 287          *      The hardware will use 0x54h and 0x55h to control PIO FIFO.
 288          *      (Not on later devices it seems)
 289          *
 290          *      0x53 changes meaning on later revs - we must no touch
 291          *      bit 1 on them.  Need to check if 0x20 is the right break.
 292          */
 293         if (m5229_revision >= 0x20) {
 294                 pci_read_config_byte(dev, 0x53, &tmpbyte);
 295
 296                 if (m5229_revision <= 0x20)
 297                         tmpbyte = (tmpbyte & (~0x02)) | 0x01;
 298                 else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
 299                         tmpbyte |= 0x03;
 300                 else
 301                         tmpbyte |= 0x01;
 302
 303                 pci_write_config_byte(dev, 0x53, tmpbyte);
 304         }
 305         pci_dev_put(north);
 306         pci_dev_put(isa_dev);
 307         local_irq_restore(flags);
 308         return 0;
 309 }
 310
 311 /*
 312  *      Cable special cases
 313  */
 314
 315 static const struct dmi_system_id cable_dmi_table[] = {
 316         {
 317                 .ident = "HP Pavilion N5430",
 318                 .matches = {
 319                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 320                         DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
 321                 },
 322         },
 323         {
 324                 .ident = "Toshiba Satellite S1800-814",
 325                 .matches = {
 326                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 327                         DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
 328                 },
 329         },
 330         { }
 331 };
 332
 333 static int ali_cable_override(struct pci_dev *pdev)
 334 {
 335         /* Fujitsu P2000 */
 336         if (pdev->subsystem_vendor == 0x10CF &&
 337             pdev->subsystem_device == 0x10AF)
 338                 return 1;
 339
 340         /* Mitac 8317 (Winbook-A) and relatives */
 341         if (pdev->subsystem_vendor == 0x1071 &&
 342             pdev->subsystem_device == 0x8317)
 343                 return 1;
 344
 345         /* Systems by DMI */
 346         if (dmi_check_system(cable_dmi_table))
 347                 return 1;
 348
 349         return 0;
 350 }
 351
 352 /**
 353  *      ali_cable_detect        -       cable detection
 354  *      @hwif: IDE interface
 355  *
 356  *      This checks if the controller and the cable are capable
 357  *      of UDMA66 transfers. It doesn't check the drives.
 358  *      But see note 2 below!
 359  *
 360  *      FIXME: frobs bits that are not defined on newer ALi devicea
 361  */
 362
 363 static u8 ali_cable_detect(ide_hwif_t *hwif)
 364 {
 365         struct pci_dev *dev = to_pci_dev(hwif->dev);
 366         unsigned long flags;
 367         u8 cbl = ATA_CBL_PATA40, tmpbyte;
 368
 369         local_irq_save(flags);
 370
 371         if (m5229_revision >= 0xC2) {
 372                 /*
 373                  * m5229 80-pin cable detection (from Host View)
 374                  *
 375                  * 0x4a bit0 is 0 => primary channel has 80-pin
 376                  * 0x4a bit1 is 0 => secondary channel has 80-pin
 377                  *
 378                  * Certain laptops use short but suitable cables
 379                  * and don't implement the detect logic.
 380                  */
 381                 if (ali_cable_override(dev))
 382                         cbl = ATA_CBL_PATA40_SHORT;
 383                 else {
 384                         pci_read_config_byte(dev, 0x4a, &tmpbyte);
 385                         if ((tmpbyte & (1 << hwif->channel)) == 0)
 386                                 cbl = ATA_CBL_PATA80;
 387                 }
 388         }
 389
 390         local_irq_restore(flags);
 391
 392         return cbl;
 393 }
 394
 395 #ifndef CONFIG_SPARC64
 396 /**
 397  *      init_hwif_ali15x3       -       Initialize the ALI IDE x86 stuff
 398  *      @hwif: interface to configure
 399  *
 400  *      Obtain the IRQ tables for an ALi based IDE solution on the PC
 401  *      class platforms. This part of the code isn't applicable to the
 402  *      Sparc systems.
 403  */
 404
 405 static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
 406 {
 407         u8 ideic, inmir;
 408         s8 irq_routing_table[] = { -1,  9, 3, 10, 4,  5, 7,  6,
 409                                       1, 11, 0, 12, 0, 14, 0, 15 };
 410         int irq = -1;
 411
 412         if (isa_dev) {
 413                 /*
 414                  * read IDE interface control
 415                  */
 416                 pci_read_config_byte(isa_dev, 0x58, &ideic);
 417
 418                 /* bit0, bit1 */
 419                 ideic = ideic & 0x03;
 420
 421                 /* get IRQ for IDE Controller */
 422                 if ((hwif->channel && ideic == 0x03) ||
 423                     (!hwif->channel && !ideic)) {
 424                         /*
 425                          * get SIRQ1 routing table
 426                          */
 427                         pci_read_config_byte(isa_dev, 0x44, &inmir);
 428                         inmir = inmir & 0x0f;
 429                         irq = irq_routing_table[inmir];
 430                 } else if (hwif->channel && !(ideic & 0x01)) {
 431                         /*
 432                          * get SIRQ2 routing table
 433                          */
 434                         pci_read_config_byte(isa_dev, 0x75, &inmir);
 435                         inmir = inmir & 0x0f;
 436                         irq = irq_routing_table[inmir];
 437                 }
 438                 if(irq >= 0)
 439                         hwif->irq = irq;
 440         }
 441 }
 442 #else
 443 #define init_hwif_ali15x3 NULL
 444 #endif /* CONFIG_SPARC64 */
 445
 446 /**
 447  *      init_dma_ali15x3        -       set up DMA on ALi15x3
 448  *      @hwif: IDE interface
 449  *      @d: IDE port info
 450  *
 451  *      Set up the DMA functionality on the ALi 15x3.
 452  */
 453
 454 static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
 455                                       const struct ide_port_info *d)
 456 {
 457         struct pci_dev *dev = to_pci_dev(hwif->dev);
 458         unsigned long base = ide_pci_dma_base(hwif, d);
 459
 460         if (base == 0)
 461                 return -1;
 462
 463         hwif->dma_base = base;
 464
 465         if (ide_pci_check_simplex(hwif, d) < 0)
 466                 return -1;
 467
 468         if (ide_pci_set_master(dev, d->name) < 0)
 469                 return -1;
 470
 471         if (!hwif->channel)
 472                 outb(inb(base + 2) & 0x60, base + 2);
 473
 474         printk(KERN_INFO "    %s: BM-DMA at 0x%04lx-0x%04lx\n",
 475                          hwif->name, base, base + 7);
 476
 477         if (ide_allocate_dma_engine(hwif))
 478                 return -1;
 479
 480         return 0;
 481 }
 482
 483 static const struct ide_port_ops ali_port_ops = {
 484         .set_pio_mode           = ali_set_pio_mode,
 485         .set_dma_mode           = ali_set_dma_mode,
 486         .udma_filter            = ali_udma_filter,
 487         .cable_detect           = ali_cable_detect,
 488 };
 489
 490 static const struct ide_dma_ops ali_dma_ops = {
 491         .dma_host_set           = ide_dma_host_set,
 492         .dma_setup              = ide_dma_setup,
 493         .dma_start              = ide_dma_start,
 494         .dma_end                = ide_dma_end,
 495         .dma_test_irq           = ide_dma_test_irq,
 496         .dma_lost_irq           = ide_dma_lost_irq,
 497         .dma_check              = ali_dma_check,
 498         .dma_timer_expiry       = ide_dma_sff_timer_expiry,
 499         .dma_sff_read_status    = ide_dma_sff_read_status,
 500 };
 501
 502 static const struct ide_port_info ali15x3_chipset __devinitdata = {
 503         .name           = DRV_NAME,
 504         .init_chipset   = init_chipset_ali15x3,
 505         .init_hwif      = init_hwif_ali15x3,
 506         .init_dma       = init_dma_ali15x3,
 507         .port_ops       = &ali_port_ops,
 508         .dma_ops        = &sff_dma_ops,
 509         .pio_mask       = ATA_PIO5,
 510         .swdma_mask     = ATA_SWDMA2,
 511         .mwdma_mask     = ATA_MWDMA2,
 512 };
 513
 514 /**
 515  *      alim15x3_init_one       -       set up an ALi15x3 IDE controller
 516  *      @dev: PCI device to set up
 517  *
 518  *      Perform the actual set up for an ALi15x3 that has been found by the
 519  *      hot plug layer.
 520  */
 521
 522 static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 523 {
 524         struct ide_port_info d = ali15x3_chipset;
 525         u8 rev = dev->revision, idx = id->driver_data;
 526
 527         /* don't use LBA48 DMA on ALi devices before rev 0xC5 */
 528         if (rev <= 0xC4)
 529                 d.host_flags |= IDE_HFLAG_NO_LBA48_DMA;
 530
 531         if (rev >= 0x20) {
 532                 if (rev == 0x20)
 533                         d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
 534
 535                 if (rev < 0xC2)
 536                         d.udma_mask = ATA_UDMA2;
 537                 else if (rev == 0xC2 || rev == 0xC3)
 538                         d.udma_mask = ATA_UDMA4;
 539                 else if (rev == 0xC4)
 540                         d.udma_mask = ATA_UDMA5;
 541                 else
 542                         d.udma_mask = ATA_UDMA6;
 543
 544                 d.dma_ops = &ali_dma_ops;
 545         } else {
 546                 d.host_flags |= IDE_HFLAG_NO_DMA;
 547
 548                 d.mwdma_mask = d.swdma_mask = 0;
 549         }
 550
 551         if (idx == 0)
 552                 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;
 553
 554         return ide_pci_init_one(dev, &d, NULL);
 555 }
 556
 557
 558 static const struct pci_device_id alim15x3_pci_tbl[] = {
 559         { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 },
 560         { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
 561         { 0, },
 562 };
 563 MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl);
 564
 565 static struct pci_driver alim15x3_pci_driver = {
 566         .name           = "ALI15x3_IDE",
 567         .id_table       = alim15x3_pci_tbl,
 568         .probe          = alim15x3_init_one,
 569         .remove         = ide_pci_remove,
 570         .suspend        = ide_pci_suspend,
 571         .resume         = ide_pci_resume,
 572 };
 573
 574 static int __init ali15x3_ide_init(void)
 575 {
 576         return ide_pci_register_driver(&alim15x3_pci_driver);
 577 }
 578
 579 static void __exit ali15x3_ide_exit(void)
 580 {
 581         pci_unregister_driver(&alim15x3_pci_driver);
 582 }
 583
 584 module_init(ali15x3_ide_init);
 585 module_exit(ali15x3_ide_exit);
 586
 587 MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox");
 588 MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
 589 MODULE_LICENSE("GPL");