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ide: keep pointer to struct device instead of struct pci_dev in ide_hwif_t
[deliverable/linux.git] / drivers / ide / ide-dma.c
1 /*
2 * linux/drivers/ide/ide-dma.c Version 4.10 June 9, 2000
3 *
4 * Copyright (c) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * May be copied or modified under the terms of the GNU General Public License
6 */
7
8 /*
9 * Special Thanks to Mark for his Six years of work.
10 *
11 * Copyright (c) 1995-1998 Mark Lord
12 * May be copied or modified under the terms of the GNU General Public License
13 */
14
15 /*
16 * This module provides support for the bus-master IDE DMA functions
17 * of various PCI chipsets, including the Intel PIIX (i82371FB for
18 * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
19 * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
20 * ("PIIX" stands for "PCI ISA IDE Xcellerator").
21 *
22 * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
23 *
24 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
25 *
26 * By default, DMA support is prepared for use, but is currently enabled only
27 * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
28 * or which are recognized as "good" (see table below). Drives with only mode0
29 * or mode1 (multi/single) DMA should also work with this chipset/driver
30 * (eg. MC2112A) but are not enabled by default.
31 *
32 * Use "hdparm -i" to view modes supported by a given drive.
33 *
34 * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
35 * DMA support, but must be (re-)compiled against this kernel version or later.
36 *
37 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
38 * If problems arise, ide.c will disable DMA operation after a few retries.
39 * This error recovery mechanism works and has been extremely well exercised.
40 *
41 * IDE drives, depending on their vintage, may support several different modes
42 * of DMA operation. The boot-time modes are indicated with a "*" in
43 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
44 * the "hdparm -X" feature. There is seldom a need to do this, as drives
45 * normally power-up with their "best" PIO/DMA modes enabled.
46 *
47 * Testing has been done with a rather extensive number of drives,
48 * with Quantum & Western Digital models generally outperforming the pack,
49 * and Fujitsu & Conner (and some Seagate which are really Conner) drives
50 * showing more lackluster throughput.
51 *
52 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
53 *
54 * Some people have reported trouble with Intel Zappa motherboards.
55 * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
56 * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
57 * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
58 *
59 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
60 * fixing the problem with the BIOS on some Acer motherboards.
61 *
62 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
63 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
64 *
65 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
66 * at generic DMA -- his patches were referred to when preparing this code.
67 *
68 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
69 * for supplying a Promise UDMA board & WD UDMA drive for this work!
70 *
71 * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
72 *
73 * ATA-66/100 and recovery functions, I forgot the rest......
74 *
75 */
76
77 #include <linux/module.h>
78 #include <linux/types.h>
79 #include <linux/kernel.h>
80 #include <linux/timer.h>
81 #include <linux/mm.h>
82 #include <linux/interrupt.h>
83 #include <linux/pci.h>
84 #include <linux/init.h>
85 #include <linux/ide.h>
86 #include <linux/delay.h>
87 #include <linux/scatterlist.h>
88
89 #include <asm/io.h>
90 #include <asm/irq.h>
91
92 static const struct drive_list_entry drive_whitelist [] = {
93
94 { "Micropolis 2112A" , NULL },
95 { "CONNER CTMA 4000" , NULL },
96 { "CONNER CTT8000-A" , NULL },
97 { "ST34342A" , NULL },
98 { NULL , NULL }
99 };
100
101 static const struct drive_list_entry drive_blacklist [] = {
102
103 { "WDC AC11000H" , NULL },
104 { "WDC AC22100H" , NULL },
105 { "WDC AC32500H" , NULL },
106 { "WDC AC33100H" , NULL },
107 { "WDC AC31600H" , NULL },
108 { "WDC AC32100H" , "24.09P07" },
109 { "WDC AC23200L" , "21.10N21" },
110 { "Compaq CRD-8241B" , NULL },
111 { "CRD-8400B" , NULL },
112 { "CRD-8480B", NULL },
113 { "CRD-8482B", NULL },
114 { "CRD-84" , NULL },
115 { "SanDisk SDP3B" , NULL },
116 { "SanDisk SDP3B-64" , NULL },
117 { "SANYO CD-ROM CRD" , NULL },
118 { "HITACHI CDR-8" , NULL },
119 { "HITACHI CDR-8335" , NULL },
120 { "HITACHI CDR-8435" , NULL },
121 { "Toshiba CD-ROM XM-6202B" , NULL },
122 { "TOSHIBA CD-ROM XM-1702BC", NULL },
123 { "CD-532E-A" , NULL },
124 { "E-IDE CD-ROM CR-840", NULL },
125 { "CD-ROM Drive/F5A", NULL },
126 { "WPI CDD-820", NULL },
127 { "SAMSUNG CD-ROM SC-148C", NULL },
128 { "SAMSUNG CD-ROM SC", NULL },
129 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
130 { "_NEC DV5800A", NULL },
131 { "SAMSUNG CD-ROM SN-124", "N001" },
132 { "Seagate STT20000A", NULL },
133 { "CD-ROM CDR_U200", "1.09" },
134 { NULL , NULL }
135
136 };
137
138 /**
139 * ide_dma_intr - IDE DMA interrupt handler
140 * @drive: the drive the interrupt is for
141 *
142 * Handle an interrupt completing a read/write DMA transfer on an
143 * IDE device
144 */
145
146 ide_startstop_t ide_dma_intr (ide_drive_t *drive)
147 {
148 u8 stat = 0, dma_stat = 0;
149
150 dma_stat = HWIF(drive)->ide_dma_end(drive);
151 stat = HWIF(drive)->INB(IDE_STATUS_REG); /* get drive status */
152 if (OK_STAT(stat,DRIVE_READY,drive->bad_wstat|DRQ_STAT)) {
153 if (!dma_stat) {
154 struct request *rq = HWGROUP(drive)->rq;
155
156 task_end_request(drive, rq, stat);
157 return ide_stopped;
158 }
159 printk(KERN_ERR "%s: dma_intr: bad DMA status (dma_stat=%x)\n",
160 drive->name, dma_stat);
161 }
162 return ide_error(drive, "dma_intr", stat);
163 }
164
165 EXPORT_SYMBOL_GPL(ide_dma_intr);
166
167 static int ide_dma_good_drive(ide_drive_t *drive)
168 {
169 return ide_in_drive_list(drive->id, drive_whitelist);
170 }
171
172 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
173 /**
174 * ide_build_sglist - map IDE scatter gather for DMA I/O
175 * @drive: the drive to build the DMA table for
176 * @rq: the request holding the sg list
177 *
178 * Perform the PCI mapping magic necessary to access the source or
179 * target buffers of a request via PCI DMA. The lower layers of the
180 * kernel provide the necessary cache management so that we can
181 * operate in a portable fashion
182 */
183
184 int ide_build_sglist(ide_drive_t *drive, struct request *rq)
185 {
186 ide_hwif_t *hwif = HWIF(drive);
187 struct pci_dev *pdev = to_pci_dev(hwif->dev);
188 struct scatterlist *sg = hwif->sg_table;
189
190 ide_map_sg(drive, rq);
191
192 if (rq_data_dir(rq) == READ)
193 hwif->sg_dma_direction = PCI_DMA_FROMDEVICE;
194 else
195 hwif->sg_dma_direction = PCI_DMA_TODEVICE;
196
197 return pci_map_sg(pdev, sg, hwif->sg_nents, hwif->sg_dma_direction);
198 }
199
200 EXPORT_SYMBOL_GPL(ide_build_sglist);
201
202 /**
203 * ide_build_dmatable - build IDE DMA table
204 *
205 * ide_build_dmatable() prepares a dma request. We map the command
206 * to get the pci bus addresses of the buffers and then build up
207 * the PRD table that the IDE layer wants to be fed. The code
208 * knows about the 64K wrap bug in the CS5530.
209 *
210 * Returns the number of built PRD entries if all went okay,
211 * returns 0 otherwise.
212 *
213 * May also be invoked from trm290.c
214 */
215
216 int ide_build_dmatable (ide_drive_t *drive, struct request *rq)
217 {
218 ide_hwif_t *hwif = HWIF(drive);
219 unsigned int *table = hwif->dmatable_cpu;
220 unsigned int is_trm290 = (hwif->chipset == ide_trm290) ? 1 : 0;
221 unsigned int count = 0;
222 int i;
223 struct scatterlist *sg;
224
225 hwif->sg_nents = i = ide_build_sglist(drive, rq);
226
227 if (!i)
228 return 0;
229
230 sg = hwif->sg_table;
231 while (i) {
232 u32 cur_addr;
233 u32 cur_len;
234
235 cur_addr = sg_dma_address(sg);
236 cur_len = sg_dma_len(sg);
237
238 /*
239 * Fill in the dma table, without crossing any 64kB boundaries.
240 * Most hardware requires 16-bit alignment of all blocks,
241 * but the trm290 requires 32-bit alignment.
242 */
243
244 while (cur_len) {
245 if (count++ >= PRD_ENTRIES) {
246 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
247 goto use_pio_instead;
248 } else {
249 u32 xcount, bcount = 0x10000 - (cur_addr & 0xffff);
250
251 if (bcount > cur_len)
252 bcount = cur_len;
253 *table++ = cpu_to_le32(cur_addr);
254 xcount = bcount & 0xffff;
255 if (is_trm290)
256 xcount = ((xcount >> 2) - 1) << 16;
257 if (xcount == 0x0000) {
258 /*
259 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
260 * but at least one (e.g. CS5530) misinterprets it as zero (!).
261 * So here we break the 64KB entry into two 32KB entries instead.
262 */
263 if (count++ >= PRD_ENTRIES) {
264 printk(KERN_ERR "%s: DMA table too small\n", drive->name);
265 goto use_pio_instead;
266 }
267 *table++ = cpu_to_le32(0x8000);
268 *table++ = cpu_to_le32(cur_addr + 0x8000);
269 xcount = 0x8000;
270 }
271 *table++ = cpu_to_le32(xcount);
272 cur_addr += bcount;
273 cur_len -= bcount;
274 }
275 }
276
277 sg = sg_next(sg);
278 i--;
279 }
280
281 if (count) {
282 if (!is_trm290)
283 *--table |= cpu_to_le32(0x80000000);
284 return count;
285 }
286
287 printk(KERN_ERR "%s: empty DMA table?\n", drive->name);
288
289 use_pio_instead:
290 ide_destroy_dmatable(drive);
291
292 return 0; /* revert to PIO for this request */
293 }
294
295 EXPORT_SYMBOL_GPL(ide_build_dmatable);
296
297 /**
298 * ide_destroy_dmatable - clean up DMA mapping
299 * @drive: The drive to unmap
300 *
301 * Teardown mappings after DMA has completed. This must be called
302 * after the completion of each use of ide_build_dmatable and before
303 * the next use of ide_build_dmatable. Failure to do so will cause
304 * an oops as only one mapping can be live for each target at a given
305 * time.
306 */
307
308 void ide_destroy_dmatable (ide_drive_t *drive)
309 {
310 ide_hwif_t *hwif = drive->hwif;
311 struct pci_dev *pdev = to_pci_dev(hwif->dev);
312
313 pci_unmap_sg(pdev, hwif->sg_table, hwif->sg_nents,
314 hwif->sg_dma_direction);
315 }
316
317 EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
318
319 /**
320 * config_drive_for_dma - attempt to activate IDE DMA
321 * @drive: the drive to place in DMA mode
322 *
323 * If the drive supports at least mode 2 DMA or UDMA of any kind
324 * then attempt to place it into DMA mode. Drives that are known to
325 * support DMA but predate the DMA properties or that are known
326 * to have DMA handling bugs are also set up appropriately based
327 * on the good/bad drive lists.
328 */
329
330 static int config_drive_for_dma (ide_drive_t *drive)
331 {
332 ide_hwif_t *hwif = drive->hwif;
333 struct hd_driveid *id = drive->id;
334
335 if (drive->media != ide_disk) {
336 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
337 return 0;
338 }
339
340 /*
341 * Enable DMA on any drive that has
342 * UltraDMA (mode 0/1/2/3/4/5/6) enabled
343 */
344 if ((id->field_valid & 4) && ((id->dma_ultra >> 8) & 0x7f))
345 return 1;
346
347 /*
348 * Enable DMA on any drive that has mode2 DMA
349 * (multi or single) enabled
350 */
351 if (id->field_valid & 2) /* regular DMA */
352 if ((id->dma_mword & 0x404) == 0x404 ||
353 (id->dma_1word & 0x404) == 0x404)
354 return 1;
355
356 /* Consult the list of known "good" drives */
357 if (ide_dma_good_drive(drive))
358 return 1;
359
360 return 0;
361 }
362
363 /**
364 * dma_timer_expiry - handle a DMA timeout
365 * @drive: Drive that timed out
366 *
367 * An IDE DMA transfer timed out. In the event of an error we ask
368 * the driver to resolve the problem, if a DMA transfer is still
369 * in progress we continue to wait (arguably we need to add a
370 * secondary 'I don't care what the drive thinks' timeout here)
371 * Finally if we have an interrupt we let it complete the I/O.
372 * But only one time - we clear expiry and if it's still not
373 * completed after WAIT_CMD, we error and retry in PIO.
374 * This can occur if an interrupt is lost or due to hang or bugs.
375 */
376
377 static int dma_timer_expiry (ide_drive_t *drive)
378 {
379 ide_hwif_t *hwif = HWIF(drive);
380 u8 dma_stat = hwif->INB(hwif->dma_status);
381
382 printk(KERN_WARNING "%s: dma_timer_expiry: dma status == 0x%02x\n",
383 drive->name, dma_stat);
384
385 if ((dma_stat & 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
386 return WAIT_CMD;
387
388 HWGROUP(drive)->expiry = NULL; /* one free ride for now */
389
390 /* 1 dmaing, 2 error, 4 intr */
391 if (dma_stat & 2) /* ERROR */
392 return -1;
393
394 if (dma_stat & 1) /* DMAing */
395 return WAIT_CMD;
396
397 if (dma_stat & 4) /* Got an Interrupt */
398 return WAIT_CMD;
399
400 return 0; /* Status is unknown -- reset the bus */
401 }
402
403 /**
404 * ide_dma_host_set - Enable/disable DMA on a host
405 * @drive: drive to control
406 *
407 * Enable/disable DMA on an IDE controller following generic
408 * bus-mastering IDE controller behaviour.
409 */
410
411 void ide_dma_host_set(ide_drive_t *drive, int on)
412 {
413 ide_hwif_t *hwif = HWIF(drive);
414 u8 unit = (drive->select.b.unit & 0x01);
415 u8 dma_stat = hwif->INB(hwif->dma_status);
416
417 if (on)
418 dma_stat |= (1 << (5 + unit));
419 else
420 dma_stat &= ~(1 << (5 + unit));
421
422 hwif->OUTB(dma_stat, hwif->dma_status);
423 }
424
425 EXPORT_SYMBOL_GPL(ide_dma_host_set);
426 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
427
428 /**
429 * ide_dma_off_quietly - Generic DMA kill
430 * @drive: drive to control
431 *
432 * Turn off the current DMA on this IDE controller.
433 */
434
435 void ide_dma_off_quietly(ide_drive_t *drive)
436 {
437 drive->using_dma = 0;
438 ide_toggle_bounce(drive, 0);
439
440 drive->hwif->dma_host_set(drive, 0);
441 }
442
443 EXPORT_SYMBOL(ide_dma_off_quietly);
444
445 /**
446 * ide_dma_off - disable DMA on a device
447 * @drive: drive to disable DMA on
448 *
449 * Disable IDE DMA for a device on this IDE controller.
450 * Inform the user that DMA has been disabled.
451 */
452
453 void ide_dma_off(ide_drive_t *drive)
454 {
455 printk(KERN_INFO "%s: DMA disabled\n", drive->name);
456 ide_dma_off_quietly(drive);
457 }
458
459 EXPORT_SYMBOL(ide_dma_off);
460
461 /**
462 * ide_dma_on - Enable DMA on a device
463 * @drive: drive to enable DMA on
464 *
465 * Enable IDE DMA for a device on this IDE controller.
466 */
467
468 void ide_dma_on(ide_drive_t *drive)
469 {
470 drive->using_dma = 1;
471 ide_toggle_bounce(drive, 1);
472
473 drive->hwif->dma_host_set(drive, 1);
474 }
475
476 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
477 /**
478 * ide_dma_setup - begin a DMA phase
479 * @drive: target device
480 *
481 * Build an IDE DMA PRD (IDE speak for scatter gather table)
482 * and then set up the DMA transfer registers for a device
483 * that follows generic IDE PCI DMA behaviour. Controllers can
484 * override this function if they need to
485 *
486 * Returns 0 on success. If a PIO fallback is required then 1
487 * is returned.
488 */
489
490 int ide_dma_setup(ide_drive_t *drive)
491 {
492 ide_hwif_t *hwif = drive->hwif;
493 struct request *rq = HWGROUP(drive)->rq;
494 unsigned int reading;
495 u8 dma_stat;
496
497 if (rq_data_dir(rq))
498 reading = 0;
499 else
500 reading = 1 << 3;
501
502 /* fall back to pio! */
503 if (!ide_build_dmatable(drive, rq)) {
504 ide_map_sg(drive, rq);
505 return 1;
506 }
507
508 /* PRD table */
509 if (hwif->mmio)
510 writel(hwif->dmatable_dma, (void __iomem *)hwif->dma_prdtable);
511 else
512 outl(hwif->dmatable_dma, hwif->dma_prdtable);
513
514 /* specify r/w */
515 hwif->OUTB(reading, hwif->dma_command);
516
517 /* read dma_status for INTR & ERROR flags */
518 dma_stat = hwif->INB(hwif->dma_status);
519
520 /* clear INTR & ERROR flags */
521 hwif->OUTB(dma_stat|6, hwif->dma_status);
522 drive->waiting_for_dma = 1;
523 return 0;
524 }
525
526 EXPORT_SYMBOL_GPL(ide_dma_setup);
527
528 static void ide_dma_exec_cmd(ide_drive_t *drive, u8 command)
529 {
530 /* issue cmd to drive */
531 ide_execute_command(drive, command, &ide_dma_intr, 2*WAIT_CMD, dma_timer_expiry);
532 }
533
534 void ide_dma_start(ide_drive_t *drive)
535 {
536 ide_hwif_t *hwif = HWIF(drive);
537 u8 dma_cmd = hwif->INB(hwif->dma_command);
538
539 /* Note that this is done *after* the cmd has
540 * been issued to the drive, as per the BM-IDE spec.
541 * The Promise Ultra33 doesn't work correctly when
542 * we do this part before issuing the drive cmd.
543 */
544 /* start DMA */
545 hwif->OUTB(dma_cmd|1, hwif->dma_command);
546 hwif->dma = 1;
547 wmb();
548 }
549
550 EXPORT_SYMBOL_GPL(ide_dma_start);
551
552 /* returns 1 on error, 0 otherwise */
553 int __ide_dma_end (ide_drive_t *drive)
554 {
555 ide_hwif_t *hwif = HWIF(drive);
556 u8 dma_stat = 0, dma_cmd = 0;
557
558 drive->waiting_for_dma = 0;
559 /* get dma_command mode */
560 dma_cmd = hwif->INB(hwif->dma_command);
561 /* stop DMA */
562 hwif->OUTB(dma_cmd&~1, hwif->dma_command);
563 /* get DMA status */
564 dma_stat = hwif->INB(hwif->dma_status);
565 /* clear the INTR & ERROR bits */
566 hwif->OUTB(dma_stat|6, hwif->dma_status);
567 /* purge DMA mappings */
568 ide_destroy_dmatable(drive);
569 /* verify good DMA status */
570 hwif->dma = 0;
571 wmb();
572 return (dma_stat & 7) != 4 ? (0x10 | dma_stat) : 0;
573 }
574
575 EXPORT_SYMBOL(__ide_dma_end);
576
577 /* returns 1 if dma irq issued, 0 otherwise */
578 static int __ide_dma_test_irq(ide_drive_t *drive)
579 {
580 ide_hwif_t *hwif = HWIF(drive);
581 u8 dma_stat = hwif->INB(hwif->dma_status);
582
583 /* return 1 if INTR asserted */
584 if ((dma_stat & 4) == 4)
585 return 1;
586 if (!drive->waiting_for_dma)
587 printk(KERN_WARNING "%s: (%s) called while not waiting\n",
588 drive->name, __FUNCTION__);
589 return 0;
590 }
591 #else
592 static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
593 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
594
595 int __ide_dma_bad_drive (ide_drive_t *drive)
596 {
597 struct hd_driveid *id = drive->id;
598
599 int blacklist = ide_in_drive_list(id, drive_blacklist);
600 if (blacklist) {
601 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
602 drive->name, id->model);
603 return blacklist;
604 }
605 return 0;
606 }
607
608 EXPORT_SYMBOL(__ide_dma_bad_drive);
609
610 static const u8 xfer_mode_bases[] = {
611 XFER_UDMA_0,
612 XFER_MW_DMA_0,
613 XFER_SW_DMA_0,
614 };
615
616 static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
617 {
618 struct hd_driveid *id = drive->id;
619 ide_hwif_t *hwif = drive->hwif;
620 unsigned int mask = 0;
621
622 switch(base) {
623 case XFER_UDMA_0:
624 if ((id->field_valid & 4) == 0)
625 break;
626
627 if (hwif->udma_filter)
628 mask = hwif->udma_filter(drive);
629 else
630 mask = hwif->ultra_mask;
631 mask &= id->dma_ultra;
632
633 /*
634 * avoid false cable warning from eighty_ninty_three()
635 */
636 if (req_mode > XFER_UDMA_2) {
637 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
638 mask &= 0x07;
639 }
640 break;
641 case XFER_MW_DMA_0:
642 if ((id->field_valid & 2) == 0)
643 break;
644 if (hwif->mdma_filter)
645 mask = hwif->mdma_filter(drive);
646 else
647 mask = hwif->mwdma_mask;
648 mask &= id->dma_mword;
649 break;
650 case XFER_SW_DMA_0:
651 if (id->field_valid & 2) {
652 mask = id->dma_1word & hwif->swdma_mask;
653 } else if (id->tDMA) {
654 /*
655 * ide_fix_driveid() doesn't convert ->tDMA to the
656 * CPU endianness so we need to do it here
657 */
658 u8 mode = le16_to_cpu(id->tDMA);
659
660 /*
661 * if the mode is valid convert it to the mask
662 * (the maximum allowed mode is XFER_SW_DMA_2)
663 */
664 if (mode <= 2)
665 mask = ((2 << mode) - 1) & hwif->swdma_mask;
666 }
667 break;
668 default:
669 BUG();
670 break;
671 }
672
673 return mask;
674 }
675
676 /**
677 * ide_find_dma_mode - compute DMA speed
678 * @drive: IDE device
679 * @req_mode: requested mode
680 *
681 * Checks the drive/host capabilities and finds the speed to use for
682 * the DMA transfer. The speed is then limited by the requested mode.
683 *
684 * Returns 0 if the drive/host combination is incapable of DMA transfers
685 * or if the requested mode is not a DMA mode.
686 */
687
688 u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
689 {
690 ide_hwif_t *hwif = drive->hwif;
691 unsigned int mask;
692 int x, i;
693 u8 mode = 0;
694
695 if (drive->media != ide_disk) {
696 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
697 return 0;
698 }
699
700 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
701 if (req_mode < xfer_mode_bases[i])
702 continue;
703 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
704 x = fls(mask) - 1;
705 if (x >= 0) {
706 mode = xfer_mode_bases[i] + x;
707 break;
708 }
709 }
710
711 if (hwif->chipset == ide_acorn && mode == 0) {
712 /*
713 * is this correct?
714 */
715 if (ide_dma_good_drive(drive) && drive->id->eide_dma_time < 150)
716 mode = XFER_MW_DMA_1;
717 }
718
719 mode = min(mode, req_mode);
720
721 printk(KERN_INFO "%s: %s mode selected\n", drive->name,
722 mode ? ide_xfer_verbose(mode) : "no DMA");
723
724 return mode;
725 }
726
727 EXPORT_SYMBOL_GPL(ide_find_dma_mode);
728
729 static int ide_tune_dma(ide_drive_t *drive)
730 {
731 ide_hwif_t *hwif = drive->hwif;
732 u8 speed;
733
734 if (noautodma || drive->nodma || (drive->id->capability & 1) == 0)
735 return 0;
736
737 /* consult the list of known "bad" drives */
738 if (__ide_dma_bad_drive(drive))
739 return 0;
740
741 if (ide_id_dma_bug(drive))
742 return 0;
743
744 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
745 return config_drive_for_dma(drive);
746
747 speed = ide_max_dma_mode(drive);
748
749 if (!speed) {
750 /* is this really correct/needed? */
751 if ((hwif->host_flags & IDE_HFLAG_CY82C693) &&
752 ide_dma_good_drive(drive))
753 return 1;
754 else
755 return 0;
756 }
757
758 if (hwif->host_flags & IDE_HFLAG_NO_SET_MODE)
759 return 0;
760
761 if (ide_set_dma_mode(drive, speed))
762 return 0;
763
764 return 1;
765 }
766
767 static int ide_dma_check(ide_drive_t *drive)
768 {
769 ide_hwif_t *hwif = drive->hwif;
770 int vdma = (hwif->host_flags & IDE_HFLAG_VDMA)? 1 : 0;
771
772 if (!vdma && ide_tune_dma(drive))
773 return 0;
774
775 /* TODO: always do PIO fallback */
776 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
777 return -1;
778
779 ide_set_max_pio(drive);
780
781 return vdma ? 0 : -1;
782 }
783
784 int ide_id_dma_bug(ide_drive_t *drive)
785 {
786 struct hd_driveid *id = drive->id;
787
788 if (id->field_valid & 4) {
789 if ((id->dma_ultra >> 8) && (id->dma_mword >> 8))
790 goto err_out;
791 } else if (id->field_valid & 2) {
792 if ((id->dma_mword >> 8) && (id->dma_1word >> 8))
793 goto err_out;
794 }
795 return 0;
796 err_out:
797 printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
798 return 1;
799 }
800
801 int ide_set_dma(ide_drive_t *drive)
802 {
803 int rc;
804
805 /*
806 * Force DMAing for the beginning of the check.
807 * Some chipsets appear to do interesting
808 * things, if not checked and cleared.
809 * PARANOIA!!!
810 */
811 ide_dma_off_quietly(drive);
812
813 rc = ide_dma_check(drive);
814 if (rc)
815 return rc;
816
817 ide_dma_on(drive);
818
819 return 0;
820 }
821
822 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
823 void ide_dma_lost_irq (ide_drive_t *drive)
824 {
825 printk("%s: DMA interrupt recovery\n", drive->name);
826 }
827
828 EXPORT_SYMBOL(ide_dma_lost_irq);
829
830 void ide_dma_timeout (ide_drive_t *drive)
831 {
832 ide_hwif_t *hwif = HWIF(drive);
833
834 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
835
836 if (hwif->ide_dma_test_irq(drive))
837 return;
838
839 hwif->ide_dma_end(drive);
840 }
841
842 EXPORT_SYMBOL(ide_dma_timeout);
843
844 static void ide_release_dma_engine(ide_hwif_t *hwif)
845 {
846 if (hwif->dmatable_cpu) {
847 struct pci_dev *pdev = to_pci_dev(hwif->dev);
848
849 pci_free_consistent(pdev, PRD_ENTRIES * PRD_BYTES,
850 hwif->dmatable_cpu, hwif->dmatable_dma);
851 hwif->dmatable_cpu = NULL;
852 }
853 }
854
855 static int ide_release_iomio_dma(ide_hwif_t *hwif)
856 {
857 release_region(hwif->dma_base, 8);
858 if (hwif->extra_ports)
859 release_region(hwif->extra_base, hwif->extra_ports);
860 return 1;
861 }
862
863 /*
864 * Needed for allowing full modular support of ide-driver
865 */
866 int ide_release_dma(ide_hwif_t *hwif)
867 {
868 ide_release_dma_engine(hwif);
869
870 if (hwif->mmio)
871 return 1;
872 else
873 return ide_release_iomio_dma(hwif);
874 }
875
876 static int ide_allocate_dma_engine(ide_hwif_t *hwif)
877 {
878 struct pci_dev *pdev = to_pci_dev(hwif->dev);
879
880 hwif->dmatable_cpu = pci_alloc_consistent(pdev,
881 PRD_ENTRIES * PRD_BYTES,
882 &hwif->dmatable_dma);
883
884 if (hwif->dmatable_cpu)
885 return 0;
886
887 printk(KERN_ERR "%s: -- Error, unable to allocate DMA table.\n",
888 hwif->cds->name);
889
890 return 1;
891 }
892
893 static int ide_mapped_mmio_dma(ide_hwif_t *hwif, unsigned long base)
894 {
895 printk(KERN_INFO " %s: MMIO-DMA ", hwif->name);
896
897 return 0;
898 }
899
900 static int ide_iomio_dma(ide_hwif_t *hwif, unsigned long base)
901 {
902 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx",
903 hwif->name, base, base + 7);
904
905 if (!request_region(base, 8, hwif->name)) {
906 printk(" -- Error, ports in use.\n");
907 return 1;
908 }
909
910 if (hwif->cds->extra) {
911 hwif->extra_base = base + (hwif->channel ? 8 : 16);
912
913 if (!hwif->mate || !hwif->mate->extra_ports) {
914 if (!request_region(hwif->extra_base,
915 hwif->cds->extra, hwif->cds->name)) {
916 printk(" -- Error, extra ports in use.\n");
917 release_region(base, 8);
918 return 1;
919 }
920 hwif->extra_ports = hwif->cds->extra;
921 }
922 }
923
924 return 0;
925 }
926
927 static int ide_dma_iobase(ide_hwif_t *hwif, unsigned long base)
928 {
929 if (hwif->mmio)
930 return ide_mapped_mmio_dma(hwif, base);
931
932 return ide_iomio_dma(hwif, base);
933 }
934
935 void ide_setup_dma(ide_hwif_t *hwif, unsigned long base)
936 {
937 u8 dma_stat;
938
939 if (ide_dma_iobase(hwif, base))
940 return;
941
942 if (ide_allocate_dma_engine(hwif)) {
943 ide_release_dma(hwif);
944 return;
945 }
946
947 hwif->dma_base = base;
948
949 if (!hwif->dma_command)
950 hwif->dma_command = hwif->dma_base + 0;
951 if (!hwif->dma_vendor1)
952 hwif->dma_vendor1 = hwif->dma_base + 1;
953 if (!hwif->dma_status)
954 hwif->dma_status = hwif->dma_base + 2;
955 if (!hwif->dma_vendor3)
956 hwif->dma_vendor3 = hwif->dma_base + 3;
957 if (!hwif->dma_prdtable)
958 hwif->dma_prdtable = hwif->dma_base + 4;
959
960 if (!hwif->dma_host_set)
961 hwif->dma_host_set = &ide_dma_host_set;
962 if (!hwif->dma_setup)
963 hwif->dma_setup = &ide_dma_setup;
964 if (!hwif->dma_exec_cmd)
965 hwif->dma_exec_cmd = &ide_dma_exec_cmd;
966 if (!hwif->dma_start)
967 hwif->dma_start = &ide_dma_start;
968 if (!hwif->ide_dma_end)
969 hwif->ide_dma_end = &__ide_dma_end;
970 if (!hwif->ide_dma_test_irq)
971 hwif->ide_dma_test_irq = &__ide_dma_test_irq;
972 if (!hwif->dma_timeout)
973 hwif->dma_timeout = &ide_dma_timeout;
974 if (!hwif->dma_lost_irq)
975 hwif->dma_lost_irq = &ide_dma_lost_irq;
976
977 dma_stat = hwif->INB(hwif->dma_status);
978 printk(KERN_CONT ", BIOS settings: %s:%s, %s:%s\n",
979 hwif->drives[0].name, (dma_stat & 0x20) ? "DMA" : "PIO",
980 hwif->drives[1].name, (dma_stat & 0x40) ? "DMA" : "PIO");
981 }
982
983 EXPORT_SYMBOL_GPL(ide_setup_dma);
984 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
Linux kernel - Deliverables
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