2 * linux/drivers/ide/ide-dma.c Version 4.10 June 9, 2000
4 * Copyright (c) 1999-2000 Andre Hedrick <andre@linux-ide.org>
5 * May be copied or modified under the terms of the GNU General Public License
9 * Special Thanks to Mark for his Six years of work.
11 * Copyright (c) 1995-1998 Mark Lord
12 * May be copied or modified under the terms of the GNU General Public License
16 * This module provides support for the bus-master IDE DMA functions
17 * of various PCI chipsets, including the Intel PIIX (i82371FB for
18 * the 430 FX chipset), the PIIX3 (i82371SB for the 430 HX/VX and
19 * 440 chipsets), and the PIIX4 (i82371AB for the 430 TX chipset)
20 * ("PIIX" stands for "PCI ISA IDE Xcellerator").
22 * Pretty much the same code works for other IDE PCI bus-mastering chipsets.
24 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
26 * By default, DMA support is prepared for use, but is currently enabled only
27 * for drives which already have DMA enabled (UltraDMA or mode 2 multi/single),
28 * or which are recognized as "good" (see table below). Drives with only mode0
29 * or mode1 (multi/single) DMA should also work with this chipset/driver
30 * (eg. MC2112A) but are not enabled by default.
32 * Use "hdparm -i" to view modes supported by a given drive.
34 * The hdparm-3.5 (or later) utility can be used for manually enabling/disabling
35 * DMA support, but must be (re-)compiled against this kernel version or later.
37 * To enable DMA, use "hdparm -d1 /dev/hd?" on a per-drive basis after booting.
38 * If problems arise, ide.c will disable DMA operation after a few retries.
39 * This error recovery mechanism works and has been extremely well exercised.
41 * IDE drives, depending on their vintage, may support several different modes
42 * of DMA operation. The boot-time modes are indicated with a "*" in
43 * the "hdparm -i" listing, and can be changed with *knowledgeable* use of
44 * the "hdparm -X" feature. There is seldom a need to do this, as drives
45 * normally power-up with their "best" PIO/DMA modes enabled.
47 * Testing has been done with a rather extensive number of drives,
48 * with Quantum & Western Digital models generally outperforming the pack,
49 * and Fujitsu & Conner (and some Seagate which are really Conner) drives
50 * showing more lackluster throughput.
52 * Keep an eye on /var/adm/messages for "DMA disabled" messages.
54 * Some people have reported trouble with Intel Zappa motherboards.
55 * This can be fixed by upgrading the AMI BIOS to version 1.00.04.BS0,
56 * available from ftp://ftp.intel.com/pub/bios/10004bs0.exe
57 * (thanks to Glen Morrell <glen@spin.Stanford.edu> for researching this).
59 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
60 * fixing the problem with the BIOS on some Acer motherboards.
62 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
63 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
65 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
66 * at generic DMA -- his patches were referred to when preparing this code.
68 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
69 * for supplying a Promise UDMA board & WD UDMA drive for this work!
71 * And, yes, Intel Zappa boards really *do* use both PIIX IDE ports.
73 * ATA-66/100 and recovery functions, I forgot the rest......
77 #include <linux/module.h>
78 #include <linux/types.h>
79 #include <linux/kernel.h>
80 #include <linux/timer.h>
82 #include <linux/interrupt.h>
83 #include <linux/pci.h>
84 #include <linux/init.h>
85 #include <linux/ide.h>
86 #include <linux/delay.h>
87 #include <linux/scatterlist.h>
92 static const struct drive_list_entry drive_whitelist
[] = {
94 { "Micropolis 2112A" , NULL
},
95 { "CONNER CTMA 4000" , NULL
},
96 { "CONNER CTT8000-A" , NULL
},
97 { "ST34342A" , NULL
},
101 static const struct drive_list_entry drive_blacklist
[] = {
103 { "WDC AC11000H" , NULL
},
104 { "WDC AC22100H" , NULL
},
105 { "WDC AC32500H" , NULL
},
106 { "WDC AC33100H" , NULL
},
107 { "WDC AC31600H" , NULL
},
108 { "WDC AC32100H" , "24.09P07" },
109 { "WDC AC23200L" , "21.10N21" },
110 { "Compaq CRD-8241B" , NULL
},
111 { "CRD-8400B" , NULL
},
112 { "CRD-8480B", NULL
},
113 { "CRD-8482B", NULL
},
115 { "SanDisk SDP3B" , NULL
},
116 { "SanDisk SDP3B-64" , NULL
},
117 { "SANYO CD-ROM CRD" , NULL
},
118 { "HITACHI CDR-8" , NULL
},
119 { "HITACHI CDR-8335" , NULL
},
120 { "HITACHI CDR-8435" , NULL
},
121 { "Toshiba CD-ROM XM-6202B" , NULL
},
122 { "TOSHIBA CD-ROM XM-1702BC", NULL
},
123 { "CD-532E-A" , NULL
},
124 { "E-IDE CD-ROM CR-840", NULL
},
125 { "CD-ROM Drive/F5A", NULL
},
126 { "WPI CDD-820", NULL
},
127 { "SAMSUNG CD-ROM SC-148C", NULL
},
128 { "SAMSUNG CD-ROM SC", NULL
},
129 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL
},
130 { "_NEC DV5800A", NULL
},
131 { "SAMSUNG CD-ROM SN-124", "N001" },
132 { "Seagate STT20000A", NULL
},
133 { "CD-ROM CDR_U200", "1.09" },
139 * ide_dma_intr - IDE DMA interrupt handler
140 * @drive: the drive the interrupt is for
142 * Handle an interrupt completing a read/write DMA transfer on an
146 ide_startstop_t
ide_dma_intr (ide_drive_t
*drive
)
148 u8 stat
= 0, dma_stat
= 0;
150 dma_stat
= HWIF(drive
)->ide_dma_end(drive
);
151 stat
= HWIF(drive
)->INB(IDE_STATUS_REG
); /* get drive status */
152 if (OK_STAT(stat
,DRIVE_READY
,drive
->bad_wstat
|DRQ_STAT
)) {
154 struct request
*rq
= HWGROUP(drive
)->rq
;
159 drv
= *(ide_driver_t
**)rq
->rq_disk
->private_data
;
160 drv
->end_request(drive
, 1, rq
->nr_sectors
);
162 ide_end_request(drive
, 1, rq
->nr_sectors
);
165 printk(KERN_ERR
"%s: dma_intr: bad DMA status (dma_stat=%x)\n",
166 drive
->name
, dma_stat
);
168 return ide_error(drive
, "dma_intr", stat
);
171 EXPORT_SYMBOL_GPL(ide_dma_intr
);
173 static int ide_dma_good_drive(ide_drive_t
*drive
)
175 return ide_in_drive_list(drive
->id
, drive_whitelist
);
178 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
180 * ide_build_sglist - map IDE scatter gather for DMA I/O
181 * @drive: the drive to build the DMA table for
182 * @rq: the request holding the sg list
184 * Perform the PCI mapping magic necessary to access the source or
185 * target buffers of a request via PCI DMA. The lower layers of the
186 * kernel provide the necessary cache management so that we can
187 * operate in a portable fashion
190 int ide_build_sglist(ide_drive_t
*drive
, struct request
*rq
)
192 ide_hwif_t
*hwif
= HWIF(drive
);
193 struct scatterlist
*sg
= hwif
->sg_table
;
195 BUG_ON((rq
->cmd_type
== REQ_TYPE_ATA_TASKFILE
) && rq
->nr_sectors
> 256);
197 ide_map_sg(drive
, rq
);
199 if (rq_data_dir(rq
) == READ
)
200 hwif
->sg_dma_direction
= PCI_DMA_FROMDEVICE
;
202 hwif
->sg_dma_direction
= PCI_DMA_TODEVICE
;
204 return pci_map_sg(hwif
->pci_dev
, sg
, hwif
->sg_nents
, hwif
->sg_dma_direction
);
207 EXPORT_SYMBOL_GPL(ide_build_sglist
);
210 * ide_build_dmatable - build IDE DMA table
212 * ide_build_dmatable() prepares a dma request. We map the command
213 * to get the pci bus addresses of the buffers and then build up
214 * the PRD table that the IDE layer wants to be fed. The code
215 * knows about the 64K wrap bug in the CS5530.
217 * Returns the number of built PRD entries if all went okay,
218 * returns 0 otherwise.
220 * May also be invoked from trm290.c
223 int ide_build_dmatable (ide_drive_t
*drive
, struct request
*rq
)
225 ide_hwif_t
*hwif
= HWIF(drive
);
226 unsigned int *table
= hwif
->dmatable_cpu
;
227 unsigned int is_trm290
= (hwif
->chipset
== ide_trm290
) ? 1 : 0;
228 unsigned int count
= 0;
230 struct scatterlist
*sg
;
232 hwif
->sg_nents
= i
= ide_build_sglist(drive
, rq
);
242 cur_addr
= sg_dma_address(sg
);
243 cur_len
= sg_dma_len(sg
);
246 * Fill in the dma table, without crossing any 64kB boundaries.
247 * Most hardware requires 16-bit alignment of all blocks,
248 * but the trm290 requires 32-bit alignment.
252 if (count
++ >= PRD_ENTRIES
) {
253 printk(KERN_ERR
"%s: DMA table too small\n", drive
->name
);
254 goto use_pio_instead
;
256 u32 xcount
, bcount
= 0x10000 - (cur_addr
& 0xffff);
258 if (bcount
> cur_len
)
260 *table
++ = cpu_to_le32(cur_addr
);
261 xcount
= bcount
& 0xffff;
263 xcount
= ((xcount
>> 2) - 1) << 16;
264 if (xcount
== 0x0000) {
266 * Most chipsets correctly interpret a length of 0x0000 as 64KB,
267 * but at least one (e.g. CS5530) misinterprets it as zero (!).
268 * So here we break the 64KB entry into two 32KB entries instead.
270 if (count
++ >= PRD_ENTRIES
) {
271 printk(KERN_ERR
"%s: DMA table too small\n", drive
->name
);
272 goto use_pio_instead
;
274 *table
++ = cpu_to_le32(0x8000);
275 *table
++ = cpu_to_le32(cur_addr
+ 0x8000);
278 *table
++ = cpu_to_le32(xcount
);
290 *--table
|= cpu_to_le32(0x80000000);
293 printk(KERN_ERR
"%s: empty DMA table?\n", drive
->name
);
295 pci_unmap_sg(hwif
->pci_dev
,
298 hwif
->sg_dma_direction
);
299 return 0; /* revert to PIO for this request */
302 EXPORT_SYMBOL_GPL(ide_build_dmatable
);
305 * ide_destroy_dmatable - clean up DMA mapping
306 * @drive: The drive to unmap
308 * Teardown mappings after DMA has completed. This must be called
309 * after the completion of each use of ide_build_dmatable and before
310 * the next use of ide_build_dmatable. Failure to do so will cause
311 * an oops as only one mapping can be live for each target at a given
315 void ide_destroy_dmatable (ide_drive_t
*drive
)
317 struct pci_dev
*dev
= HWIF(drive
)->pci_dev
;
318 struct scatterlist
*sg
= HWIF(drive
)->sg_table
;
319 int nents
= HWIF(drive
)->sg_nents
;
321 pci_unmap_sg(dev
, sg
, nents
, HWIF(drive
)->sg_dma_direction
);
324 EXPORT_SYMBOL_GPL(ide_destroy_dmatable
);
327 * config_drive_for_dma - attempt to activate IDE DMA
328 * @drive: the drive to place in DMA mode
330 * If the drive supports at least mode 2 DMA or UDMA of any kind
331 * then attempt to place it into DMA mode. Drives that are known to
332 * support DMA but predate the DMA properties or that are known
333 * to have DMA handling bugs are also set up appropriately based
334 * on the good/bad drive lists.
337 static int config_drive_for_dma (ide_drive_t
*drive
)
339 ide_hwif_t
*hwif
= drive
->hwif
;
340 struct hd_driveid
*id
= drive
->id
;
342 if (drive
->media
!= ide_disk
) {
343 if (hwif
->host_flags
& IDE_HFLAG_NO_ATAPI_DMA
)
348 * Enable DMA on any drive that has
349 * UltraDMA (mode 0/1/2/3/4/5/6) enabled
351 if ((id
->field_valid
& 4) && ((id
->dma_ultra
>> 8) & 0x7f))
355 * Enable DMA on any drive that has mode2 DMA
356 * (multi or single) enabled
358 if (id
->field_valid
& 2) /* regular DMA */
359 if ((id
->dma_mword
& 0x404) == 0x404 ||
360 (id
->dma_1word
& 0x404) == 0x404)
363 /* Consult the list of known "good" drives */
364 if (ide_dma_good_drive(drive
))
371 * dma_timer_expiry - handle a DMA timeout
372 * @drive: Drive that timed out
374 * An IDE DMA transfer timed out. In the event of an error we ask
375 * the driver to resolve the problem, if a DMA transfer is still
376 * in progress we continue to wait (arguably we need to add a
377 * secondary 'I don't care what the drive thinks' timeout here)
378 * Finally if we have an interrupt we let it complete the I/O.
379 * But only one time - we clear expiry and if it's still not
380 * completed after WAIT_CMD, we error and retry in PIO.
381 * This can occur if an interrupt is lost or due to hang or bugs.
384 static int dma_timer_expiry (ide_drive_t
*drive
)
386 ide_hwif_t
*hwif
= HWIF(drive
);
387 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
389 printk(KERN_WARNING
"%s: dma_timer_expiry: dma status == 0x%02x\n",
390 drive
->name
, dma_stat
);
392 if ((dma_stat
& 0x18) == 0x18) /* BUSY Stupid Early Timer !! */
395 HWGROUP(drive
)->expiry
= NULL
; /* one free ride for now */
397 /* 1 dmaing, 2 error, 4 intr */
398 if (dma_stat
& 2) /* ERROR */
401 if (dma_stat
& 1) /* DMAing */
404 if (dma_stat
& 4) /* Got an Interrupt */
407 return 0; /* Status is unknown -- reset the bus */
411 * ide_dma_host_off - Generic DMA kill
412 * @drive: drive to control
414 * Perform the generic IDE controller DMA off operation. This
415 * works for most IDE bus mastering controllers
418 void ide_dma_host_off(ide_drive_t
*drive
)
420 ide_hwif_t
*hwif
= HWIF(drive
);
421 u8 unit
= (drive
->select
.b
.unit
& 0x01);
422 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
424 hwif
->OUTB((dma_stat
& ~(1<<(5+unit
))), hwif
->dma_status
);
427 EXPORT_SYMBOL(ide_dma_host_off
);
430 * ide_dma_off_quietly - Generic DMA kill
431 * @drive: drive to control
433 * Turn off the current DMA on this IDE controller.
436 void ide_dma_off_quietly(ide_drive_t
*drive
)
438 drive
->using_dma
= 0;
439 ide_toggle_bounce(drive
, 0);
441 drive
->hwif
->dma_host_off(drive
);
444 EXPORT_SYMBOL(ide_dma_off_quietly
);
445 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
448 * ide_dma_off - disable DMA on a device
449 * @drive: drive to disable DMA on
451 * Disable IDE DMA for a device on this IDE controller.
452 * Inform the user that DMA has been disabled.
455 void ide_dma_off(ide_drive_t
*drive
)
457 printk(KERN_INFO
"%s: DMA disabled\n", drive
->name
);
458 drive
->hwif
->dma_off_quietly(drive
);
461 EXPORT_SYMBOL(ide_dma_off
);
463 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
465 * ide_dma_host_on - Enable DMA on a host
466 * @drive: drive to enable for DMA
468 * Enable DMA on an IDE controller following generic bus mastering
469 * IDE controller behaviour
472 void ide_dma_host_on(ide_drive_t
*drive
)
474 if (drive
->using_dma
) {
475 ide_hwif_t
*hwif
= HWIF(drive
);
476 u8 unit
= (drive
->select
.b
.unit
& 0x01);
477 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
479 hwif
->OUTB((dma_stat
|(1<<(5+unit
))), hwif
->dma_status
);
483 EXPORT_SYMBOL(ide_dma_host_on
);
486 * __ide_dma_on - Enable DMA on a device
487 * @drive: drive to enable DMA on
489 * Enable IDE DMA for a device on this IDE controller.
492 int __ide_dma_on (ide_drive_t
*drive
)
494 drive
->using_dma
= 1;
495 ide_toggle_bounce(drive
, 1);
497 drive
->hwif
->dma_host_on(drive
);
502 EXPORT_SYMBOL(__ide_dma_on
);
505 * ide_dma_setup - begin a DMA phase
506 * @drive: target device
508 * Build an IDE DMA PRD (IDE speak for scatter gather table)
509 * and then set up the DMA transfer registers for a device
510 * that follows generic IDE PCI DMA behaviour. Controllers can
511 * override this function if they need to
513 * Returns 0 on success. If a PIO fallback is required then 1
517 int ide_dma_setup(ide_drive_t
*drive
)
519 ide_hwif_t
*hwif
= drive
->hwif
;
520 struct request
*rq
= HWGROUP(drive
)->rq
;
521 unsigned int reading
;
529 /* fall back to pio! */
530 if (!ide_build_dmatable(drive
, rq
)) {
531 ide_map_sg(drive
, rq
);
537 writel(hwif
->dmatable_dma
, (void __iomem
*)hwif
->dma_prdtable
);
539 outl(hwif
->dmatable_dma
, hwif
->dma_prdtable
);
542 hwif
->OUTB(reading
, hwif
->dma_command
);
544 /* read dma_status for INTR & ERROR flags */
545 dma_stat
= hwif
->INB(hwif
->dma_status
);
547 /* clear INTR & ERROR flags */
548 hwif
->OUTB(dma_stat
|6, hwif
->dma_status
);
549 drive
->waiting_for_dma
= 1;
553 EXPORT_SYMBOL_GPL(ide_dma_setup
);
555 static void ide_dma_exec_cmd(ide_drive_t
*drive
, u8 command
)
557 /* issue cmd to drive */
558 ide_execute_command(drive
, command
, &ide_dma_intr
, 2*WAIT_CMD
, dma_timer_expiry
);
561 void ide_dma_start(ide_drive_t
*drive
)
563 ide_hwif_t
*hwif
= HWIF(drive
);
564 u8 dma_cmd
= hwif
->INB(hwif
->dma_command
);
566 /* Note that this is done *after* the cmd has
567 * been issued to the drive, as per the BM-IDE spec.
568 * The Promise Ultra33 doesn't work correctly when
569 * we do this part before issuing the drive cmd.
572 hwif
->OUTB(dma_cmd
|1, hwif
->dma_command
);
577 EXPORT_SYMBOL_GPL(ide_dma_start
);
579 /* returns 1 on error, 0 otherwise */
580 int __ide_dma_end (ide_drive_t
*drive
)
582 ide_hwif_t
*hwif
= HWIF(drive
);
583 u8 dma_stat
= 0, dma_cmd
= 0;
585 drive
->waiting_for_dma
= 0;
586 /* get dma_command mode */
587 dma_cmd
= hwif
->INB(hwif
->dma_command
);
589 hwif
->OUTB(dma_cmd
&~1, hwif
->dma_command
);
591 dma_stat
= hwif
->INB(hwif
->dma_status
);
592 /* clear the INTR & ERROR bits */
593 hwif
->OUTB(dma_stat
|6, hwif
->dma_status
);
594 /* purge DMA mappings */
595 ide_destroy_dmatable(drive
);
596 /* verify good DMA status */
599 return (dma_stat
& 7) != 4 ? (0x10 | dma_stat
) : 0;
602 EXPORT_SYMBOL(__ide_dma_end
);
604 /* returns 1 if dma irq issued, 0 otherwise */
605 static int __ide_dma_test_irq(ide_drive_t
*drive
)
607 ide_hwif_t
*hwif
= HWIF(drive
);
608 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
610 /* return 1 if INTR asserted */
611 if ((dma_stat
& 4) == 4)
613 if (!drive
->waiting_for_dma
)
614 printk(KERN_WARNING
"%s: (%s) called while not waiting\n",
615 drive
->name
, __FUNCTION__
);
619 static inline int config_drive_for_dma(ide_drive_t
*drive
) { return 0; }
620 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
622 int __ide_dma_bad_drive (ide_drive_t
*drive
)
624 struct hd_driveid
*id
= drive
->id
;
626 int blacklist
= ide_in_drive_list(id
, drive_blacklist
);
628 printk(KERN_WARNING
"%s: Disabling (U)DMA for %s (blacklisted)\n",
629 drive
->name
, id
->model
);
635 EXPORT_SYMBOL(__ide_dma_bad_drive
);
637 static const u8 xfer_mode_bases
[] = {
643 static unsigned int ide_get_mode_mask(ide_drive_t
*drive
, u8 base
, u8 req_mode
)
645 struct hd_driveid
*id
= drive
->id
;
646 ide_hwif_t
*hwif
= drive
->hwif
;
647 unsigned int mask
= 0;
651 if ((id
->field_valid
& 4) == 0)
654 if (hwif
->udma_filter
)
655 mask
= hwif
->udma_filter(drive
);
657 mask
= hwif
->ultra_mask
;
658 mask
&= id
->dma_ultra
;
661 * avoid false cable warning from eighty_ninty_three()
663 if (req_mode
> XFER_UDMA_2
) {
664 if ((mask
& 0x78) && (eighty_ninty_three(drive
) == 0))
669 if ((id
->field_valid
& 2) == 0)
671 if (hwif
->mdma_filter
)
672 mask
= hwif
->mdma_filter(drive
);
674 mask
= hwif
->mwdma_mask
;
675 mask
&= id
->dma_mword
;
678 if (id
->field_valid
& 2) {
679 mask
= id
->dma_1word
& hwif
->swdma_mask
;
680 } else if (id
->tDMA
) {
682 * ide_fix_driveid() doesn't convert ->tDMA to the
683 * CPU endianness so we need to do it here
685 u8 mode
= le16_to_cpu(id
->tDMA
);
688 * if the mode is valid convert it to the mask
689 * (the maximum allowed mode is XFER_SW_DMA_2)
692 mask
= ((2 << mode
) - 1) & hwif
->swdma_mask
;
704 * ide_find_dma_mode - compute DMA speed
706 * @req_mode: requested mode
708 * Checks the drive/host capabilities and finds the speed to use for
709 * the DMA transfer. The speed is then limited by the requested mode.
711 * Returns 0 if the drive/host combination is incapable of DMA transfers
712 * or if the requested mode is not a DMA mode.
715 u8
ide_find_dma_mode(ide_drive_t
*drive
, u8 req_mode
)
717 ide_hwif_t
*hwif
= drive
->hwif
;
722 if (drive
->media
!= ide_disk
) {
723 if (hwif
->host_flags
& IDE_HFLAG_NO_ATAPI_DMA
)
727 for (i
= 0; i
< ARRAY_SIZE(xfer_mode_bases
); i
++) {
728 if (req_mode
< xfer_mode_bases
[i
])
730 mask
= ide_get_mode_mask(drive
, xfer_mode_bases
[i
], req_mode
);
733 mode
= xfer_mode_bases
[i
] + x
;
738 if (hwif
->chipset
== ide_acorn
&& mode
== 0) {
742 if (ide_dma_good_drive(drive
) && drive
->id
->eide_dma_time
< 150)
743 mode
= XFER_MW_DMA_1
;
746 mode
= min(mode
, req_mode
);
748 printk(KERN_INFO
"%s: %s mode selected\n", drive
->name
,
749 mode
? ide_xfer_verbose(mode
) : "no DMA");
754 EXPORT_SYMBOL_GPL(ide_find_dma_mode
);
756 static int ide_tune_dma(ide_drive_t
*drive
)
760 if (noautodma
|| drive
->nodma
|| (drive
->id
->capability
& 1) == 0)
763 /* consult the list of known "bad" drives */
764 if (__ide_dma_bad_drive(drive
))
767 if (ide_id_dma_bug(drive
))
770 if (drive
->hwif
->host_flags
& IDE_HFLAG_TRUST_BIOS_FOR_DMA
)
771 return config_drive_for_dma(drive
);
773 speed
= ide_max_dma_mode(drive
);
778 if (drive
->hwif
->host_flags
& IDE_HFLAG_NO_SET_MODE
)
781 if (ide_set_dma_mode(drive
, speed
))
787 static int ide_dma_check(ide_drive_t
*drive
)
789 ide_hwif_t
*hwif
= drive
->hwif
;
790 int vdma
= (hwif
->host_flags
& IDE_HFLAG_VDMA
)? 1 : 0;
792 if (!vdma
&& ide_tune_dma(drive
))
795 /* TODO: always do PIO fallback */
796 if (hwif
->host_flags
& IDE_HFLAG_TRUST_BIOS_FOR_DMA
)
799 ide_set_max_pio(drive
);
801 return vdma
? 0 : -1;
804 int ide_id_dma_bug(ide_drive_t
*drive
)
806 struct hd_driveid
*id
= drive
->id
;
808 if (id
->field_valid
& 4) {
809 if ((id
->dma_ultra
>> 8) && (id
->dma_mword
>> 8))
811 } else if (id
->field_valid
& 2) {
812 if ((id
->dma_mword
>> 8) && (id
->dma_1word
>> 8))
817 printk(KERN_ERR
"%s: bad DMA info in identify block\n", drive
->name
);
821 int ide_set_dma(ide_drive_t
*drive
)
823 ide_hwif_t
*hwif
= drive
->hwif
;
827 * Force DMAing for the beginning of the check.
828 * Some chipsets appear to do interesting
829 * things, if not checked and cleared.
832 hwif
->dma_off_quietly(drive
);
834 rc
= ide_dma_check(drive
);
838 return hwif
->ide_dma_on(drive
);
841 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
842 void ide_dma_lost_irq (ide_drive_t
*drive
)
844 printk("%s: DMA interrupt recovery\n", drive
->name
);
847 EXPORT_SYMBOL(ide_dma_lost_irq
);
849 void ide_dma_timeout (ide_drive_t
*drive
)
851 ide_hwif_t
*hwif
= HWIF(drive
);
853 printk(KERN_ERR
"%s: timeout waiting for DMA\n", drive
->name
);
855 if (hwif
->ide_dma_test_irq(drive
))
858 hwif
->ide_dma_end(drive
);
861 EXPORT_SYMBOL(ide_dma_timeout
);
863 static void ide_release_dma_engine(ide_hwif_t
*hwif
)
865 if (hwif
->dmatable_cpu
) {
866 pci_free_consistent(hwif
->pci_dev
,
867 PRD_ENTRIES
* PRD_BYTES
,
870 hwif
->dmatable_cpu
= NULL
;
874 static int ide_release_iomio_dma(ide_hwif_t
*hwif
)
876 release_region(hwif
->dma_base
, 8);
877 if (hwif
->extra_ports
)
878 release_region(hwif
->extra_base
, hwif
->extra_ports
);
883 * Needed for allowing full modular support of ide-driver
885 int ide_release_dma(ide_hwif_t
*hwif
)
887 ide_release_dma_engine(hwif
);
892 return ide_release_iomio_dma(hwif
);
895 static int ide_allocate_dma_engine(ide_hwif_t
*hwif
)
897 hwif
->dmatable_cpu
= pci_alloc_consistent(hwif
->pci_dev
,
898 PRD_ENTRIES
* PRD_BYTES
,
899 &hwif
->dmatable_dma
);
901 if (hwif
->dmatable_cpu
)
904 printk(KERN_ERR
"%s: -- Error, unable to allocate DMA table.\n",
910 static int ide_mapped_mmio_dma(ide_hwif_t
*hwif
, unsigned long base
, unsigned int ports
)
912 printk(KERN_INFO
" %s: MMIO-DMA ", hwif
->name
);
917 static int ide_iomio_dma(ide_hwif_t
*hwif
, unsigned long base
, unsigned int ports
)
919 printk(KERN_INFO
" %s: BM-DMA at 0x%04lx-0x%04lx",
920 hwif
->name
, base
, base
+ ports
- 1);
922 if (!request_region(base
, ports
, hwif
->name
)) {
923 printk(" -- Error, ports in use.\n");
927 if (hwif
->cds
->extra
) {
928 hwif
->extra_base
= base
+ (hwif
->channel
? 8 : 16);
930 if (!hwif
->mate
|| !hwif
->mate
->extra_ports
) {
931 if (!request_region(hwif
->extra_base
,
932 hwif
->cds
->extra
, hwif
->cds
->name
)) {
933 printk(" -- Error, extra ports in use.\n");
934 release_region(base
, ports
);
937 hwif
->extra_ports
= hwif
->cds
->extra
;
944 static int ide_dma_iobase(ide_hwif_t
*hwif
, unsigned long base
, unsigned int ports
)
947 return ide_mapped_mmio_dma(hwif
, base
,ports
);
949 return ide_iomio_dma(hwif
, base
, ports
);
952 void ide_setup_dma(ide_hwif_t
*hwif
, unsigned long base
, unsigned num_ports
)
954 if (ide_dma_iobase(hwif
, base
, num_ports
))
957 if (ide_allocate_dma_engine(hwif
)) {
958 ide_release_dma(hwif
);
962 hwif
->dma_base
= base
;
964 if (!(hwif
->dma_command
))
965 hwif
->dma_command
= hwif
->dma_base
;
966 if (!(hwif
->dma_vendor1
))
967 hwif
->dma_vendor1
= (hwif
->dma_base
+ 1);
968 if (!(hwif
->dma_status
))
969 hwif
->dma_status
= (hwif
->dma_base
+ 2);
970 if (!(hwif
->dma_vendor3
))
971 hwif
->dma_vendor3
= (hwif
->dma_base
+ 3);
972 if (!(hwif
->dma_prdtable
))
973 hwif
->dma_prdtable
= (hwif
->dma_base
+ 4);
975 if (!hwif
->dma_off_quietly
)
976 hwif
->dma_off_quietly
= &ide_dma_off_quietly
;
977 if (!hwif
->dma_host_off
)
978 hwif
->dma_host_off
= &ide_dma_host_off
;
979 if (!hwif
->ide_dma_on
)
980 hwif
->ide_dma_on
= &__ide_dma_on
;
981 if (!hwif
->dma_host_on
)
982 hwif
->dma_host_on
= &ide_dma_host_on
;
983 if (!hwif
->dma_setup
)
984 hwif
->dma_setup
= &ide_dma_setup
;
985 if (!hwif
->dma_exec_cmd
)
986 hwif
->dma_exec_cmd
= &ide_dma_exec_cmd
;
987 if (!hwif
->dma_start
)
988 hwif
->dma_start
= &ide_dma_start
;
989 if (!hwif
->ide_dma_end
)
990 hwif
->ide_dma_end
= &__ide_dma_end
;
991 if (!hwif
->ide_dma_test_irq
)
992 hwif
->ide_dma_test_irq
= &__ide_dma_test_irq
;
993 if (!hwif
->dma_timeout
)
994 hwif
->dma_timeout
= &ide_dma_timeout
;
995 if (!hwif
->dma_lost_irq
)
996 hwif
->dma_lost_irq
= &ide_dma_lost_irq
;
998 if (hwif
->chipset
!= ide_trm290
) {
999 u8 dma_stat
= hwif
->INB(hwif
->dma_status
);
1000 printk(", BIOS settings: %s:%s, %s:%s",
1001 hwif
->drives
[0].name
, (dma_stat
& 0x20) ? "DMA" : "pio",
1002 hwif
->drives
[1].name
, (dma_stat
& 0x40) ? "DMA" : "pio");
1007 EXPORT_SYMBOL_GPL(ide_setup_dma
);
1008 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */