f2129d5e07f2683215eb20940529d457ae04cd3b
[deliverable/linux.git] / drivers / ide / pci / alim15x3.c
1 /*
2 * Copyright (C) 1998-2000 Michel Aubry, Maintainer
3 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
4 * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
5 *
6 * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
7 * May be copied or modified under the terms of the GNU General Public License
8 * Copyright (C) 2002 Alan Cox <alan@redhat.com>
9 * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
10 * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
11 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
12 *
13 * (U)DMA capable version of ali 1533/1543(C), 1535(D)
14 *
15 **********************************************************************
16 * 9/7/99 --Parts from the above author are included and need to be
17 * converted into standard interface, once I finish the thought.
18 *
19 * Recent changes
20 * Don't use LBA48 mode on ALi <= 0xC4
21 * Don't poke 0x79 with a non ALi northbridge
22 * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang)
23 * Allow UDMA6 on revisions > 0xC4
24 *
25 * Documentation
26 * Chipset documentation available under NDA only
27 *
28 */
29
30 #include <linux/module.h>
31 #include <linux/types.h>
32 #include <linux/kernel.h>
33 #include <linux/pci.h>
34 #include <linux/hdreg.h>
35 #include <linux/ide.h>
36 #include <linux/init.h>
37 #include <linux/dmi.h>
38
39 #include <asm/io.h>
40
41 /*
42 * Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking
43 * (this is DANGEROUS and could result in data corruption).
44 */
45 static int wdc_udma;
46
47 module_param(wdc_udma, bool, 0);
48 MODULE_PARM_DESC(wdc_udma,
49 "allow UDMA on M1543C-E chipset for WDC disks (DANGEROUS)");
50
51 /*
52 * ALi devices are not plug in. Otherwise these static values would
53 * need to go. They ought to go away anyway
54 */
55
56 static u8 m5229_revision;
57 static u8 chip_is_1543c_e;
58 static struct pci_dev *isa_dev;
59
60 /**
61 * ali_set_pio_mode - set host controller for PIO mode
62 * @drive: drive
63 * @pio: PIO mode number
64 *
65 * Program the controller for the given PIO mode.
66 */
67
68 static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
69 {
70 ide_hwif_t *hwif = HWIF(drive);
71 struct pci_dev *dev = to_pci_dev(hwif->dev);
72 int s_time, a_time, c_time;
73 u8 s_clc, a_clc, r_clc;
74 unsigned long flags;
75 int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
76 int port = hwif->channel ? 0x5c : 0x58;
77 int portFIFO = hwif->channel ? 0x55 : 0x54;
78 u8 cd_dma_fifo = 0;
79 int unit = drive->select.b.unit & 1;
80
81 s_time = ide_pio_timings[pio].setup_time;
82 a_time = ide_pio_timings[pio].active_time;
83 if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
84 s_clc = 0;
85 if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8)
86 a_clc = 0;
87 c_time = ide_pio_timings[pio].cycle_time;
88
89 if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) {
90 r_clc = 1;
91 } else {
92 if (r_clc >= 16)
93 r_clc = 0;
94 }
95 local_irq_save(flags);
96
97 /*
98 * PIO mode => ATA FIFO on, ATAPI FIFO off
99 */
100 pci_read_config_byte(dev, portFIFO, &cd_dma_fifo);
101 if (drive->media==ide_disk) {
102 if (unit) {
103 pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50);
104 } else {
105 pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05);
106 }
107 } else {
108 if (unit) {
109 pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F);
110 } else {
111 pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0);
112 }
113 }
114
115 pci_write_config_byte(dev, port, s_clc);
116 pci_write_config_byte(dev, port+drive->select.b.unit+2, (a_clc << 4) | r_clc);
117 local_irq_restore(flags);
118 }
119
120 /**
121 * ali_udma_filter - compute UDMA mask
122 * @drive: IDE device
123 *
124 * Return available UDMA modes.
125 *
126 * The actual rules for the ALi are:
127 * No UDMA on revisions <= 0x20
128 * Disk only for revisions < 0xC2
129 * Not WDC drives on M1543C-E (?)
130 */
131
132 static u8 ali_udma_filter(ide_drive_t *drive)
133 {
134 if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
135 if (drive->media != ide_disk)
136 return 0;
137 if (chip_is_1543c_e && strstr(drive->id->model, "WDC ") &&
138 wdc_udma == 0)
139 return 0;
140 }
141
142 return drive->hwif->ultra_mask;
143 }
144
145 /**
146 * ali_set_dma_mode - set host controller for DMA mode
147 * @drive: drive
148 * @speed: DMA mode
149 *
150 * Configure the hardware for the desired IDE transfer mode.
151 */
152
153 static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
154 {
155 ide_hwif_t *hwif = HWIF(drive);
156 struct pci_dev *dev = to_pci_dev(hwif->dev);
157 u8 speed1 = speed;
158 u8 unit = (drive->select.b.unit & 0x01);
159 u8 tmpbyte = 0x00;
160 int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
161
162 if (speed == XFER_UDMA_6)
163 speed1 = 0x47;
164
165 if (speed < XFER_UDMA_0) {
166 u8 ultra_enable = (unit) ? 0x7f : 0xf7;
167 /*
168 * clear "ultra enable" bit
169 */
170 pci_read_config_byte(dev, m5229_udma, &tmpbyte);
171 tmpbyte &= ultra_enable;
172 pci_write_config_byte(dev, m5229_udma, tmpbyte);
173
174 /*
175 * FIXME: Oh, my... DMA timings are never set.
176 */
177 } else {
178 pci_read_config_byte(dev, m5229_udma, &tmpbyte);
179 tmpbyte &= (0x0f << ((1-unit) << 2));
180 /*
181 * enable ultra dma and set timing
182 */
183 tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2));
184 pci_write_config_byte(dev, m5229_udma, tmpbyte);
185 if (speed >= XFER_UDMA_3) {
186 pci_read_config_byte(dev, 0x4b, &tmpbyte);
187 tmpbyte |= 1;
188 pci_write_config_byte(dev, 0x4b, tmpbyte);
189 }
190 }
191 }
192
193 /**
194 * ali15x3_dma_setup - begin a DMA phase
195 * @drive: target device
196 *
197 * Returns 1 if the DMA cannot be performed, zero on success.
198 */
199
200 static int ali15x3_dma_setup(ide_drive_t *drive)
201 {
202 if (m5229_revision < 0xC2 && drive->media != ide_disk) {
203 if (rq_data_dir(drive->hwif->hwgroup->rq))
204 return 1; /* try PIO instead of DMA */
205 }
206 return ide_dma_setup(drive);
207 }
208
209 /**
210 * init_chipset_ali15x3 - Initialise an ALi IDE controller
211 * @dev: PCI device
212 * @name: Name of the controller
213 *
214 * This function initializes the ALI IDE controller and where
215 * appropriate also sets up the 1533 southbridge.
216 */
217
218 static unsigned int __devinit init_chipset_ali15x3 (struct pci_dev *dev, const char *name)
219 {
220 unsigned long flags;
221 u8 tmpbyte;
222 struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));
223
224 m5229_revision = dev->revision;
225
226 isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
227
228 local_irq_save(flags);
229
230 if (m5229_revision < 0xC2) {
231 /*
232 * revision 0x20 (1543-E, 1543-F)
233 * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
234 * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
235 */
236 pci_read_config_byte(dev, 0x4b, &tmpbyte);
237 /*
238 * clear bit 7
239 */
240 pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
241 /*
242 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
243 */
244 if (m5229_revision >= 0x20 && isa_dev) {
245 pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
246 chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
247 }
248 goto out;
249 }
250
251 /*
252 * 1543C-B?, 1535, 1535D, 1553
253 * Note 1: not all "motherboard" support this detection
254 * Note 2: if no udma 66 device, the detection may "error".
255 * but in this case, we will not set the device to
256 * ultra 66, the detection result is not important
257 */
258
259 /*
260 * enable "Cable Detection", m5229, 0x4b, bit3
261 */
262 pci_read_config_byte(dev, 0x4b, &tmpbyte);
263 pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08);
264
265 /*
266 * We should only tune the 1533 enable if we are using an ALi
267 * North bridge. We might have no north found on some zany
268 * box without a device at 0:0.0. The ALi bridge will be at
269 * 0:0.0 so if we didn't find one we know what is cooking.
270 */
271 if (north && north->vendor != PCI_VENDOR_ID_AL)
272 goto out;
273
274 if (m5229_revision < 0xC5 && isa_dev)
275 {
276 /*
277 * set south-bridge's enable bit, m1533, 0x79
278 */
279
280 pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
281 if (m5229_revision == 0xC2) {
282 /*
283 * 1543C-B0 (m1533, 0x79, bit 2)
284 */
285 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04);
286 } else if (m5229_revision >= 0xC3) {
287 /*
288 * 1553/1535 (m1533, 0x79, bit 1)
289 */
290 pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02);
291 }
292 }
293
294 out:
295 /*
296 * CD_ROM DMA on (m5229, 0x53, bit0)
297 * Enable this bit even if we want to use PIO.
298 * PIO FIFO off (m5229, 0x53, bit1)
299 * The hardware will use 0x54h and 0x55h to control PIO FIFO.
300 * (Not on later devices it seems)
301 *
302 * 0x53 changes meaning on later revs - we must no touch
303 * bit 1 on them. Need to check if 0x20 is the right break.
304 */
305 if (m5229_revision >= 0x20) {
306 pci_read_config_byte(dev, 0x53, &tmpbyte);
307
308 if (m5229_revision <= 0x20)
309 tmpbyte = (tmpbyte & (~0x02)) | 0x01;
310 else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
311 tmpbyte |= 0x03;
312 else
313 tmpbyte |= 0x01;
314
315 pci_write_config_byte(dev, 0x53, tmpbyte);
316 }
317 pci_dev_put(north);
318 pci_dev_put(isa_dev);
319 local_irq_restore(flags);
320 return 0;
321 }
322
323 /*
324 * Cable special cases
325 */
326
327 static const struct dmi_system_id cable_dmi_table[] = {
328 {
329 .ident = "HP Pavilion N5430",
330 .matches = {
331 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
332 DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
333 },
334 },
335 {
336 .ident = "Toshiba Satellite S1800-814",
337 .matches = {
338 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
339 DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
340 },
341 },
342 { }
343 };
344
345 static int ali_cable_override(struct pci_dev *pdev)
346 {
347 /* Fujitsu P2000 */
348 if (pdev->subsystem_vendor == 0x10CF &&
349 pdev->subsystem_device == 0x10AF)
350 return 1;
351
352 /* Mitac 8317 (Winbook-A) and relatives */
353 if (pdev->subsystem_vendor == 0x1071 &&
354 pdev->subsystem_device == 0x8317)
355 return 1;
356
357 /* Systems by DMI */
358 if (dmi_check_system(cable_dmi_table))
359 return 1;
360
361 return 0;
362 }
363
364 /**
365 * ali_cable_detect - cable detection
366 * @hwif: IDE interface
367 *
368 * This checks if the controller and the cable are capable
369 * of UDMA66 transfers. It doesn't check the drives.
370 * But see note 2 below!
371 *
372 * FIXME: frobs bits that are not defined on newer ALi devicea
373 */
374
375 static u8 __devinit ali_cable_detect(ide_hwif_t *hwif)
376 {
377 struct pci_dev *dev = to_pci_dev(hwif->dev);
378 unsigned long flags;
379 u8 cbl = ATA_CBL_PATA40, tmpbyte;
380
381 local_irq_save(flags);
382
383 if (m5229_revision >= 0xC2) {
384 /*
385 * m5229 80-pin cable detection (from Host View)
386 *
387 * 0x4a bit0 is 0 => primary channel has 80-pin
388 * 0x4a bit1 is 0 => secondary channel has 80-pin
389 *
390 * Certain laptops use short but suitable cables
391 * and don't implement the detect logic.
392 */
393 if (ali_cable_override(dev))
394 cbl = ATA_CBL_PATA40_SHORT;
395 else {
396 pci_read_config_byte(dev, 0x4a, &tmpbyte);
397 if ((tmpbyte & (1 << hwif->channel)) == 0)
398 cbl = ATA_CBL_PATA80;
399 }
400 }
401
402 local_irq_restore(flags);
403
404 return cbl;
405 }
406
407 #if !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC)
408 /**
409 * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff
410 * @hwif: interface to configure
411 *
412 * Obtain the IRQ tables for an ALi based IDE solution on the PC
413 * class platforms. This part of the code isn't applicable to the
414 * Sparc and PowerPC systems.
415 */
416
417 static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
418 {
419 struct pci_dev *dev = to_pci_dev(hwif->dev);
420 u8 ideic, inmir;
421 s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6,
422 1, 11, 0, 12, 0, 14, 0, 15 };
423 int irq = -1;
424
425 if (dev->device == PCI_DEVICE_ID_AL_M5229)
426 hwif->irq = hwif->channel ? 15 : 14;
427
428 if (isa_dev) {
429 /*
430 * read IDE interface control
431 */
432 pci_read_config_byte(isa_dev, 0x58, &ideic);
433
434 /* bit0, bit1 */
435 ideic = ideic & 0x03;
436
437 /* get IRQ for IDE Controller */
438 if ((hwif->channel && ideic == 0x03) ||
439 (!hwif->channel && !ideic)) {
440 /*
441 * get SIRQ1 routing table
442 */
443 pci_read_config_byte(isa_dev, 0x44, &inmir);
444 inmir = inmir & 0x0f;
445 irq = irq_routing_table[inmir];
446 } else if (hwif->channel && !(ideic & 0x01)) {
447 /*
448 * get SIRQ2 routing table
449 */
450 pci_read_config_byte(isa_dev, 0x75, &inmir);
451 inmir = inmir & 0x0f;
452 irq = irq_routing_table[inmir];
453 }
454 if(irq >= 0)
455 hwif->irq = irq;
456 }
457 }
458 #else
459 #define init_hwif_ali15x3 NULL
460 #endif /* !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) */
461
462 /**
463 * init_dma_ali15x3 - set up DMA on ALi15x3
464 * @hwif: IDE interface
465 * @d: IDE port info
466 *
467 * Set up the DMA functionality on the ALi 15x3.
468 */
469
470 static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
471 const struct ide_port_info *d)
472 {
473 struct pci_dev *dev = to_pci_dev(hwif->dev);
474 unsigned long base = ide_pci_dma_base(hwif, d);
475
476 if (base == 0 || ide_pci_set_master(dev, d->name) < 0)
477 return -1;
478
479 if (!hwif->channel)
480 outb(inb(base + 2) & 0x60, base + 2);
481
482 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
483 hwif->name, base, base + 7);
484
485 if (ide_allocate_dma_engine(hwif))
486 return -1;
487
488 ide_setup_dma(hwif, base);
489
490 return 0;
491 }
492
493 static const struct ide_port_ops ali_port_ops = {
494 .set_pio_mode = ali_set_pio_mode,
495 .set_dma_mode = ali_set_dma_mode,
496 .udma_filter = ali_udma_filter,
497 .cable_detect = ali_cable_detect,
498 };
499
500 static const struct ide_dma_ops ali_dma_ops = {
501 .dma_host_set = ide_dma_host_set,
502 .dma_setup = ali15x3_dma_setup,
503 .dma_exec_cmd = ide_dma_exec_cmd,
504 .dma_start = ide_dma_start,
505 .dma_end = __ide_dma_end,
506 .dma_test_irq = ide_dma_test_irq,
507 .dma_lost_irq = ide_dma_lost_irq,
508 .dma_timeout = ide_dma_timeout,
509 };
510
511 static const struct ide_port_info ali15x3_chipset __devinitdata = {
512 .name = "ALI15X3",
513 .init_chipset = init_chipset_ali15x3,
514 .init_hwif = init_hwif_ali15x3,
515 .init_dma = init_dma_ali15x3,
516 .port_ops = &ali_port_ops,
517 .pio_mask = ATA_PIO5,
518 .swdma_mask = ATA_SWDMA2,
519 .mwdma_mask = ATA_MWDMA2,
520 };
521
522 /**
523 * alim15x3_init_one - set up an ALi15x3 IDE controller
524 * @dev: PCI device to set up
525 *
526 * Perform the actual set up for an ALi15x3 that has been found by the
527 * hot plug layer.
528 */
529
530 static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
531 {
532 struct ide_port_info d = ali15x3_chipset;
533 u8 rev = dev->revision, idx = id->driver_data;
534
535 /* don't use LBA48 DMA on ALi devices before rev 0xC5 */
536 if (rev <= 0xC4)
537 d.host_flags |= IDE_HFLAG_NO_LBA48_DMA;
538
539 if (rev >= 0x20) {
540 if (rev == 0x20)
541 d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA;
542
543 if (rev < 0xC2)
544 d.udma_mask = ATA_UDMA2;
545 else if (rev == 0xC2 || rev == 0xC3)
546 d.udma_mask = ATA_UDMA4;
547 else if (rev == 0xC4)
548 d.udma_mask = ATA_UDMA5;
549 else
550 d.udma_mask = ATA_UDMA6;
551
552 d.dma_ops = &ali_dma_ops;
553 } else {
554 d.host_flags |= IDE_HFLAG_NO_DMA;
555
556 d.mwdma_mask = d.swdma_mask = 0;
557 }
558
559 if (idx == 0)
560 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;
561
562 return ide_setup_pci_device(dev, &d);
563 }
564
565
566 static const struct pci_device_id alim15x3_pci_tbl[] = {
567 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 },
568 { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
569 { 0, },
570 };
571 MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl);
572
573 static struct pci_driver driver = {
574 .name = "ALI15x3_IDE",
575 .id_table = alim15x3_pci_tbl,
576 .probe = alim15x3_init_one,
577 };
578
579 static int __init ali15x3_ide_init(void)
580 {
581 return ide_pci_register_driver(&driver);
582 }
583
584 module_init(ali15x3_ide_init);
585
586 MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox");
587 MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
588 MODULE_LICENSE("GPL");
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