drivers/ide/pci/atiixp.c

   1 /*
   2  *  Copyright (C) 2003 ATI Inc. <hyu@ati.com>
   3  *  Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz
   4  */
   5
   6 #include <linux/types.h>
   7 #include <linux/module.h>
   8 #include <linux/kernel.h>
   9 #include <linux/ioport.h>
  10 #include <linux/pci.h>
  11 #include <linux/hdreg.h>
  12 #include <linux/ide.h>
  13 #include <linux/delay.h>
  14 #include <linux/init.h>
  15
  16 #include <asm/io.h>
  17
  18 #define ATIIXP_IDE_PIO_TIMING           0x40
  19 #define ATIIXP_IDE_MDMA_TIMING          0x44
  20 #define ATIIXP_IDE_PIO_CONTROL          0x48
  21 #define ATIIXP_IDE_PIO_MODE             0x4a
  22 #define ATIIXP_IDE_UDMA_CONTROL         0x54
  23 #define ATIIXP_IDE_UDMA_MODE            0x56
  24
  25 typedef struct {
  26         u8 command_width;
  27         u8 recover_width;
  28 } atiixp_ide_timing;
  29
  30 static atiixp_ide_timing pio_timing[] = {
  31         { 0x05, 0x0d },
  32         { 0x04, 0x07 },
  33         { 0x03, 0x04 },
  34         { 0x02, 0x02 },
  35         { 0x02, 0x00 },
  36 };
  37
  38 static atiixp_ide_timing mdma_timing[] = {
  39         { 0x07, 0x07 },
  40         { 0x02, 0x01 },
  41         { 0x02, 0x00 },
  42 };
  43
  44 static DEFINE_SPINLOCK(atiixp_lock);
  45
  46 /**
  47  *      atiixp_set_pio_mode     -       set host controller for PIO mode
  48  *      @drive: drive
  49  *      @pio: PIO mode number
  50  *
  51  *      Set the interface PIO mode.
  52  */
  53
  54 static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio)
  55 {
  56         struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
  57         unsigned long flags;
  58         int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
  59         u32 pio_timing_data;
  60         u16 pio_mode_data;
  61
  62         spin_lock_irqsave(&atiixp_lock, flags);
  63
  64         pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
  65         pio_mode_data &= ~(0x07 << (drive->dn * 4));
  66         pio_mode_data |= (pio << (drive->dn * 4));
  67         pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
  68
  69         pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
  70         pio_timing_data &= ~(0xff << timing_shift);
  71         pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
  72                  (pio_timing[pio].command_width << (timing_shift + 4));
  73         pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
  74
  75         spin_unlock_irqrestore(&atiixp_lock, flags);
  76 }
  77
  78 /**
  79  *      atiixp_set_dma_mode     -       set host controller for DMA mode
  80  *      @drive: drive
  81  *      @speed: DMA mode
  82  *
  83  *      Set a ATIIXP host controller to the desired DMA mode.  This involves
  84  *      programming the right timing data into the PCI configuration space.
  85  */
  86
  87 static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed)
  88 {
  89         struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
  90         unsigned long flags;
  91         int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
  92         u32 tmp32;
  93         u16 tmp16;
  94         u16 udma_ctl = 0;
  95
  96         spin_lock_irqsave(&atiixp_lock, flags);
  97
  98         pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &udma_ctl);
  99
 100         if (speed >= XFER_UDMA_0) {
 101                 pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
 102                 tmp16 &= ~(0x07 << (drive->dn * 4));
 103                 tmp16 |= ((speed & 0x07) << (drive->dn * 4));
 104                 pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
 105
 106                 udma_ctl |= (1 << drive->dn);
 107         } else if (speed >= XFER_MW_DMA_0) {
 108                 u8 i = speed & 0x03;
 109
 110                 pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
 111                 tmp32 &= ~(0xff << timing_shift);
 112                 tmp32 |= (mdma_timing[i].recover_width << timing_shift) |
 113                          (mdma_timing[i].command_width << (timing_shift + 4));
 114                 pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
 115
 116                 udma_ctl &= ~(1 << drive->dn);
 117         }
 118
 119         pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, udma_ctl);
 120
 121         spin_unlock_irqrestore(&atiixp_lock, flags);
 122 }
 123
 124 static u8 __devinit atiixp_cable_detect(ide_hwif_t *hwif)
 125 {
 126         struct pci_dev *pdev = to_pci_dev(hwif->dev);
 127         u8 udma_mode = 0, ch = hwif->channel;
 128
 129         pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
 130
 131         if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40)
 132                 return ATA_CBL_PATA80;
 133         else
 134                 return ATA_CBL_PATA40;
 135 }
 136
 137 /**
 138  *      init_hwif_atiixp                -       fill in the hwif for the ATIIXP
 139  *      @hwif: IDE interface
 140  *
 141  *      Set up the ide_hwif_t for the ATIIXP interface according to the
 142  *      capabilities of the hardware.
 143  */
 144
 145 static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
 146 {
 147         hwif->set_pio_mode = &atiixp_set_pio_mode;
 148         hwif->set_dma_mode = &atiixp_set_dma_mode;
 149
 150         hwif->cable_detect = atiixp_cable_detect;
 151 }
 152
 153 static const struct ide_port_info atiixp_pci_info[] __devinitdata = {
 154         {       /* 0 */
 155                 .name           = "ATIIXP",
 156                 .init_hwif      = init_hwif_atiixp,
 157                 .enablebits     = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
 158                 .host_flags     = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
 159                 .pio_mask       = ATA_PIO4,
 160                 .mwdma_mask     = ATA_MWDMA2,
 161                 .udma_mask      = ATA_UDMA5,
 162         },{     /* 1 */
 163                 .name           = "SB600_PATA",
 164                 .init_hwif      = init_hwif_atiixp,
 165                 .enablebits     = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
 166                 .host_flags     = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS |
 167                                   IDE_HFLAG_BOOTABLE,
 168                 .pio_mask       = ATA_PIO4,
 169                 .mwdma_mask     = ATA_MWDMA2,
 170                 .udma_mask      = ATA_UDMA5,
 171         },
 172 };
 173
 174 /**
 175  *      atiixp_init_one -       called when a ATIIXP is found
 176  *      @dev: the atiixp device
 177  *      @id: the matching pci id
 178  *
 179  *      Called when the PCI registration layer (or the IDE initialization)
 180  *      finds a device matching our IDE device tables.
 181  */
 182
 183 static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 184 {
 185         return ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]);
 186 }
 187
 188 static const struct pci_device_id atiixp_pci_tbl[] = {
 189         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), 0 },
 190         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), 0 },
 191         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), 0 },
 192         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), 1 },
 193         { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), 0 },
 194         { 0, },
 195 };
 196 MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
 197
 198 static struct pci_driver driver = {
 199         .name           = "ATIIXP_IDE",
 200         .id_table       = atiixp_pci_tbl,
 201         .probe          = atiixp_init_one,
 202 };
 203
 204 static int __init atiixp_ide_init(void)
 205 {
 206         return ide_pci_register_driver(&driver);
 207 }
 208
 209 module_init(atiixp_ide_init);
 210
 211 MODULE_AUTHOR("HUI YU");
 212 MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
 213 MODULE_LICENSE("GPL");