Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
[deliverable/linux.git] / drivers / ide / pci / atiixp.c
1 /*
2 * linux/drivers/ide/pci/atiixp.c Version 0.02 Jun 16 2007
3 *
4 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
5 * Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz
6 */
7
8 #include <linux/types.h>
9 #include <linux/module.h>
10 #include <linux/kernel.h>
11 #include <linux/ioport.h>
12 #include <linux/pci.h>
13 #include <linux/hdreg.h>
14 #include <linux/ide.h>
15 #include <linux/delay.h>
16 #include <linux/init.h>
17
18 #include <asm/io.h>
19
20 #define ATIIXP_IDE_PIO_TIMING 0x40
21 #define ATIIXP_IDE_MDMA_TIMING 0x44
22 #define ATIIXP_IDE_PIO_CONTROL 0x48
23 #define ATIIXP_IDE_PIO_MODE 0x4a
24 #define ATIIXP_IDE_UDMA_CONTROL 0x54
25 #define ATIIXP_IDE_UDMA_MODE 0x56
26
27 typedef struct {
28 u8 command_width;
29 u8 recover_width;
30 } atiixp_ide_timing;
31
32 static atiixp_ide_timing pio_timing[] = {
33 { 0x05, 0x0d },
34 { 0x04, 0x07 },
35 { 0x03, 0x04 },
36 { 0x02, 0x02 },
37 { 0x02, 0x00 },
38 };
39
40 static atiixp_ide_timing mdma_timing[] = {
41 { 0x07, 0x07 },
42 { 0x02, 0x01 },
43 { 0x02, 0x00 },
44 };
45
46 static int save_mdma_mode[4];
47
48 static DEFINE_SPINLOCK(atiixp_lock);
49
50 /**
51 * atiixp_dma_2_pio - return the PIO mode matching DMA
52 * @xfer_rate: transfer speed
53 *
54 * Returns the nearest equivalent PIO timing for the PIO or DMA
55 * mode requested by the controller.
56 */
57
58 static u8 atiixp_dma_2_pio(u8 xfer_rate) {
59 switch(xfer_rate) {
60 case XFER_UDMA_6:
61 case XFER_UDMA_5:
62 case XFER_UDMA_4:
63 case XFER_UDMA_3:
64 case XFER_UDMA_2:
65 case XFER_UDMA_1:
66 case XFER_UDMA_0:
67 case XFER_MW_DMA_2:
68 case XFER_PIO_4:
69 return 4;
70 case XFER_MW_DMA_1:
71 case XFER_PIO_3:
72 return 3;
73 case XFER_SW_DMA_2:
74 case XFER_PIO_2:
75 return 2;
76 case XFER_MW_DMA_0:
77 case XFER_SW_DMA_1:
78 case XFER_SW_DMA_0:
79 case XFER_PIO_1:
80 case XFER_PIO_0:
81 case XFER_PIO_SLOW:
82 default:
83 return 0;
84 }
85 }
86
87 static void atiixp_dma_host_on(ide_drive_t *drive)
88 {
89 struct pci_dev *dev = drive->hwif->pci_dev;
90 unsigned long flags;
91 u16 tmp16;
92
93 spin_lock_irqsave(&atiixp_lock, flags);
94
95 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
96 if (save_mdma_mode[drive->dn])
97 tmp16 &= ~(1 << drive->dn);
98 else
99 tmp16 |= (1 << drive->dn);
100 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
101
102 spin_unlock_irqrestore(&atiixp_lock, flags);
103
104 ide_dma_host_on(drive);
105 }
106
107 static void atiixp_dma_host_off(ide_drive_t *drive)
108 {
109 struct pci_dev *dev = drive->hwif->pci_dev;
110 unsigned long flags;
111 u16 tmp16;
112
113 spin_lock_irqsave(&atiixp_lock, flags);
114
115 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
116 tmp16 &= ~(1 << drive->dn);
117 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
118
119 spin_unlock_irqrestore(&atiixp_lock, flags);
120
121 ide_dma_host_off(drive);
122 }
123
124 /**
125 * atiixp_tune_pio - tune a drive attached to a ATIIXP
126 * @drive: drive to tune
127 * @pio: desired PIO mode
128 *
129 * Set the interface PIO mode.
130 */
131
132 static void atiixp_tune_pio(ide_drive_t *drive, u8 pio)
133 {
134 struct pci_dev *dev = drive->hwif->pci_dev;
135 unsigned long flags;
136 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
137 u32 pio_timing_data;
138 u16 pio_mode_data;
139
140 spin_lock_irqsave(&atiixp_lock, flags);
141
142 pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
143 pio_mode_data &= ~(0x07 << (drive->dn * 4));
144 pio_mode_data |= (pio << (drive->dn * 4));
145 pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
146
147 pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
148 pio_timing_data &= ~(0xff << timing_shift);
149 pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
150 (pio_timing[pio].command_width << (timing_shift + 4));
151 pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
152
153 spin_unlock_irqrestore(&atiixp_lock, flags);
154 }
155
156 static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio)
157 {
158 atiixp_tune_pio(drive, pio);
159 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
160 }
161
162 /**
163 * atiixp_tune_chipset - tune a ATIIXP interface
164 * @drive: IDE drive to tune
165 * @speed: speed to configure
166 *
167 * Set a ATIIXP interface channel to the desired speeds. This involves
168 * requires the right timing data into the ATIIXP configuration space
169 * then setting the drive parameters appropriately
170 */
171
172 static int atiixp_speedproc(ide_drive_t *drive, const u8 speed)
173 {
174 struct pci_dev *dev = drive->hwif->pci_dev;
175 unsigned long flags;
176 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
177 u32 tmp32;
178 u16 tmp16;
179 u8 pio;
180
181 spin_lock_irqsave(&atiixp_lock, flags);
182
183 save_mdma_mode[drive->dn] = 0;
184 if (speed >= XFER_UDMA_0) {
185 pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
186 tmp16 &= ~(0x07 << (drive->dn * 4));
187 tmp16 |= ((speed & 0x07) << (drive->dn * 4));
188 pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
189 } else {
190 if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) {
191 save_mdma_mode[drive->dn] = speed;
192 pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
193 tmp32 &= ~(0xff << timing_shift);
194 tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) |
195 (mdma_timing[speed & 0x03].command_width << (timing_shift + 4));
196 pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
197 }
198 }
199
200 spin_unlock_irqrestore(&atiixp_lock, flags);
201
202 if (speed >= XFER_SW_DMA_0)
203 pio = atiixp_dma_2_pio(speed);
204 else
205 pio = speed - XFER_PIO_0;
206
207 atiixp_tune_pio(drive, pio);
208
209 return ide_config_drive_speed(drive, speed);
210 }
211
212 /**
213 * atiixp_dma_check - set up an IDE device
214 * @drive: IDE drive to configure
215 *
216 * Set up the ATIIXP interface for the best available speed on this
217 * interface, preferring DMA to PIO.
218 */
219
220 static int atiixp_dma_check(ide_drive_t *drive)
221 {
222 drive->init_speed = 0;
223
224 if (ide_tune_dma(drive))
225 return 0;
226
227 if (ide_use_fast_pio(drive))
228 ide_set_max_pio(drive);
229
230 return -1;
231 }
232
233 /**
234 * init_hwif_atiixp - fill in the hwif for the ATIIXP
235 * @hwif: IDE interface
236 *
237 * Set up the ide_hwif_t for the ATIIXP interface according to the
238 * capabilities of the hardware.
239 */
240
241 static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
242 {
243 u8 udma_mode = 0;
244 u8 ch = hwif->channel;
245 struct pci_dev *pdev = hwif->pci_dev;
246
247 if (!hwif->irq)
248 hwif->irq = ch ? 15 : 14;
249
250 hwif->autodma = 0;
251 hwif->set_pio_mode = &atiixp_set_pio_mode;
252 hwif->speedproc = &atiixp_speedproc;
253 hwif->drives[0].autotune = 1;
254 hwif->drives[1].autotune = 1;
255
256 if (!hwif->dma_base)
257 return;
258
259 hwif->atapi_dma = 1;
260 hwif->ultra_mask = 0x3f;
261 hwif->mwdma_mask = 0x06;
262 hwif->swdma_mask = 0x04;
263
264 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
265
266 if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40)
267 hwif->cbl = ATA_CBL_PATA80;
268 else
269 hwif->cbl = ATA_CBL_PATA40;
270
271 hwif->dma_host_on = &atiixp_dma_host_on;
272 hwif->dma_host_off = &atiixp_dma_host_off;
273 hwif->ide_dma_check = &atiixp_dma_check;
274 if (!noautodma)
275 hwif->autodma = 1;
276
277 hwif->drives[1].autodma = hwif->autodma;
278 hwif->drives[0].autodma = hwif->autodma;
279 }
280
281
282 static ide_pci_device_t atiixp_pci_info[] __devinitdata = {
283 { /* 0 */
284 .name = "ATIIXP",
285 .init_hwif = init_hwif_atiixp,
286 .autodma = AUTODMA,
287 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
288 .bootable = ON_BOARD,
289 .pio_mask = ATA_PIO4,
290 },{ /* 1 */
291 .name = "SB600_PATA",
292 .init_hwif = init_hwif_atiixp,
293 .autodma = AUTODMA,
294 .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
295 .bootable = ON_BOARD,
296 .host_flags = IDE_HFLAG_SINGLE,
297 .pio_mask = ATA_PIO4,
298 },
299 };
300
301 /**
302 * atiixp_init_one - called when a ATIIXP is found
303 * @dev: the atiixp device
304 * @id: the matching pci id
305 *
306 * Called when the PCI registration layer (or the IDE initialization)
307 * finds a device matching our IDE device tables.
308 */
309
310 static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
311 {
312 return ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]);
313 }
314
315 static struct pci_device_id atiixp_pci_tbl[] = {
316 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP200_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
317 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
318 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
319 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
320 { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_IDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
321 { 0, },
322 };
323 MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
324
325 static struct pci_driver driver = {
326 .name = "ATIIXP_IDE",
327 .id_table = atiixp_pci_tbl,
328 .probe = atiixp_init_one,
329 };
330
331 static int __init atiixp_ide_init(void)
332 {
333 return ide_pci_register_driver(&driver);
334 }
335
336 module_init(atiixp_ide_init);
337
338 MODULE_AUTHOR("HUI YU");
339 MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
340 MODULE_LICENSE("GPL");
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