Merge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6
[deliverable/linux.git] / drivers / ide / pci / atiixp.c
1 /*
2 * linux/drivers/ide/pci/atiixp.c Version 0.03 Aug 3 2007
3 *
4 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
5 * Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz
6 */
7
8 #include <linux/types.h>
9 #include <linux/module.h>
10 #include <linux/kernel.h>
11 #include <linux/ioport.h>
12 #include <linux/pci.h>
13 #include <linux/hdreg.h>
14 #include <linux/ide.h>
15 #include <linux/delay.h>
16 #include <linux/init.h>
17
18 #include <asm/io.h>
19
20 #define ATIIXP_IDE_PIO_TIMING 0x40
21 #define ATIIXP_IDE_MDMA_TIMING 0x44
22 #define ATIIXP_IDE_PIO_CONTROL 0x48
23 #define ATIIXP_IDE_PIO_MODE 0x4a
24 #define ATIIXP_IDE_UDMA_CONTROL 0x54
25 #define ATIIXP_IDE_UDMA_MODE 0x56
26
27 typedef struct {
28 u8 command_width;
29 u8 recover_width;
30 } atiixp_ide_timing;
31
32 static atiixp_ide_timing pio_timing[] = {
33 { 0x05, 0x0d },
34 { 0x04, 0x07 },
35 { 0x03, 0x04 },
36 { 0x02, 0x02 },
37 { 0x02, 0x00 },
38 };
39
40 static atiixp_ide_timing mdma_timing[] = {
41 { 0x07, 0x07 },
42 { 0x02, 0x01 },
43 { 0x02, 0x00 },
44 };
45
46 static int save_mdma_mode[4];
47
48 static DEFINE_SPINLOCK(atiixp_lock);
49
50 static void atiixp_dma_host_on(ide_drive_t *drive)
51 {
52 struct pci_dev *dev = drive->hwif->pci_dev;
53 unsigned long flags;
54 u16 tmp16;
55
56 spin_lock_irqsave(&atiixp_lock, flags);
57
58 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
59 if (save_mdma_mode[drive->dn])
60 tmp16 &= ~(1 << drive->dn);
61 else
62 tmp16 |= (1 << drive->dn);
63 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
64
65 spin_unlock_irqrestore(&atiixp_lock, flags);
66
67 ide_dma_host_on(drive);
68 }
69
70 static void atiixp_dma_host_off(ide_drive_t *drive)
71 {
72 struct pci_dev *dev = drive->hwif->pci_dev;
73 unsigned long flags;
74 u16 tmp16;
75
76 spin_lock_irqsave(&atiixp_lock, flags);
77
78 pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
79 tmp16 &= ~(1 << drive->dn);
80 pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
81
82 spin_unlock_irqrestore(&atiixp_lock, flags);
83
84 ide_dma_host_off(drive);
85 }
86
87 /**
88 * atiixp_set_pio_mode - set host controller for PIO mode
89 * @drive: drive
90 * @pio: PIO mode number
91 *
92 * Set the interface PIO mode.
93 */
94
95 static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio)
96 {
97 struct pci_dev *dev = drive->hwif->pci_dev;
98 unsigned long flags;
99 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
100 u32 pio_timing_data;
101 u16 pio_mode_data;
102
103 spin_lock_irqsave(&atiixp_lock, flags);
104
105 pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
106 pio_mode_data &= ~(0x07 << (drive->dn * 4));
107 pio_mode_data |= (pio << (drive->dn * 4));
108 pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
109
110 pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
111 pio_timing_data &= ~(0xff << timing_shift);
112 pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
113 (pio_timing[pio].command_width << (timing_shift + 4));
114 pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
115
116 spin_unlock_irqrestore(&atiixp_lock, flags);
117 }
118
119 /**
120 * atiixp_set_dma_mode - set host controller for DMA mode
121 * @drive: drive
122 * @speed: DMA mode
123 *
124 * Set a ATIIXP host controller to the desired DMA mode. This involves
125 * programming the right timing data into the PCI configuration space.
126 */
127
128 static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed)
129 {
130 struct pci_dev *dev = drive->hwif->pci_dev;
131 unsigned long flags;
132 int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8;
133 u32 tmp32;
134 u16 tmp16;
135
136 spin_lock_irqsave(&atiixp_lock, flags);
137
138 save_mdma_mode[drive->dn] = 0;
139 if (speed >= XFER_UDMA_0) {
140 pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
141 tmp16 &= ~(0x07 << (drive->dn * 4));
142 tmp16 |= ((speed & 0x07) << (drive->dn * 4));
143 pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
144 } else {
145 if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) {
146 save_mdma_mode[drive->dn] = speed;
147 pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
148 tmp32 &= ~(0xff << timing_shift);
149 tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) |
150 (mdma_timing[speed & 0x03].command_width << (timing_shift + 4));
151 pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
152 }
153 }
154
155 spin_unlock_irqrestore(&atiixp_lock, flags);
156 }
157
158 /**
159 * init_hwif_atiixp - fill in the hwif for the ATIIXP
160 * @hwif: IDE interface
161 *
162 * Set up the ide_hwif_t for the ATIIXP interface according to the
163 * capabilities of the hardware.
164 */
165
166 static void __devinit init_hwif_atiixp(ide_hwif_t *hwif)
167 {
168 u8 udma_mode = 0;
169 u8 ch = hwif->channel;
170 struct pci_dev *pdev = hwif->pci_dev;
171
172 hwif->set_pio_mode = &atiixp_set_pio_mode;
173 hwif->set_dma_mode = &atiixp_set_dma_mode;
174
175 if (!hwif->dma_base)
176 return;
177
178 pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
179
180 if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40)
181 hwif->cbl = ATA_CBL_PATA80;
182 else
183 hwif->cbl = ATA_CBL_PATA40;
184
185 hwif->dma_host_on = &atiixp_dma_host_on;
186 hwif->dma_host_off = &atiixp_dma_host_off;
187 }
188
189 static const struct ide_port_info atiixp_pci_info[] __devinitdata = {
190 { /* 0 */
191 .name = "ATIIXP",
192 .init_hwif = init_hwif_atiixp,
193 .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
194 .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE,
195 .pio_mask = ATA_PIO4,
196 .mwdma_mask = ATA_MWDMA2,
197 .udma_mask = ATA_UDMA5,
198 },{ /* 1 */
199 .name = "SB600_PATA",
200 .init_hwif = init_hwif_atiixp,
201 .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
202 .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS |
203 IDE_HFLAG_BOOTABLE,
204 .pio_mask = ATA_PIO4,
205 .mwdma_mask = ATA_MWDMA2,
206 .udma_mask = ATA_UDMA5,
207 },
208 };
209
210 /**
211 * atiixp_init_one - called when a ATIIXP is found
212 * @dev: the atiixp device
213 * @id: the matching pci id
214 *
215 * Called when the PCI registration layer (or the IDE initialization)
216 * finds a device matching our IDE device tables.
217 */
218
219 static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id)
220 {
221 return ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]);
222 }
223
224 static const struct pci_device_id atiixp_pci_tbl[] = {
225 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), 0 },
226 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), 0 },
227 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), 0 },
228 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), 1 },
229 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), 0 },
230 { 0, },
231 };
232 MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
233
234 static struct pci_driver driver = {
235 .name = "ATIIXP_IDE",
236 .id_table = atiixp_pci_tbl,
237 .probe = atiixp_init_one,
238 };
239
240 static int __init atiixp_ide_init(void)
241 {
242 return ide_pci_register_driver(&driver);
243 }
244
245 module_init(atiixp_ide_init);
246
247 MODULE_AUTHOR("HUI YU");
248 MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
249 MODULE_LICENSE("GPL");
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