ide: add ide_host_add() helper
[deliverable/linux.git] / drivers / ide / pci / cs5520.c
1 /*
2 * IDE tuning and bus mastering support for the CS5510/CS5520
3 * chipsets
4 *
5 * The CS5510/CS5520 are slightly unusual devices. Unlike the
6 * typical IDE controllers they do bus mastering with the drive in
7 * PIO mode and smarter silicon.
8 *
9 * The practical upshot of this is that we must always tune the
10 * drive for the right PIO mode. We must also ignore all the blacklists
11 * and the drive bus mastering DMA information.
12 *
13 * *** This driver is strictly experimental ***
14 *
15 * (c) Copyright Red Hat Inc 2002
16 *
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the
19 * Free Software Foundation; either version 2, or (at your option) any
20 * later version.
21 *
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
25 * General Public License for more details.
26 *
27 * For the avoidance of doubt the "preferred form" of this code is one which
28 * is in an open non patent encumbered format. Where cryptographic key signing
29 * forms part of the process of creating an executable the information
30 * including keys needed to generate an equivalently functional executable
31 * are deemed to be part of the source code.
32 *
33 */
34
35 #include <linux/module.h>
36 #include <linux/types.h>
37 #include <linux/kernel.h>
38 #include <linux/hdreg.h>
39 #include <linux/init.h>
40 #include <linux/pci.h>
41 #include <linux/ide.h>
42 #include <linux/dma-mapping.h>
43
44 struct pio_clocks
45 {
46 int address;
47 int assert;
48 int recovery;
49 };
50
51 static struct pio_clocks cs5520_pio_clocks[]={
52 {3, 6, 11},
53 {2, 5, 6},
54 {1, 4, 3},
55 {1, 3, 2},
56 {1, 2, 1}
57 };
58
59 static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
60 {
61 ide_hwif_t *hwif = HWIF(drive);
62 struct pci_dev *pdev = to_pci_dev(hwif->dev);
63 int controller = drive->dn > 1 ? 1 : 0;
64
65 /* 8bit CAT/CRT - 8bit command timing for channel */
66 pci_write_config_byte(pdev, 0x62 + controller,
67 (cs5520_pio_clocks[pio].recovery << 4) |
68 (cs5520_pio_clocks[pio].assert));
69
70 /* 0x64 - 16bit Primary, 0x68 - 16bit Secondary */
71
72 /* FIXME: should these use address ? */
73 /* Data read timing */
74 pci_write_config_byte(pdev, 0x64 + 4*controller + (drive->dn&1),
75 (cs5520_pio_clocks[pio].recovery << 4) |
76 (cs5520_pio_clocks[pio].assert));
77 /* Write command timing */
78 pci_write_config_byte(pdev, 0x66 + 4*controller + (drive->dn&1),
79 (cs5520_pio_clocks[pio].recovery << 4) |
80 (cs5520_pio_clocks[pio].assert));
81 }
82
83 static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed)
84 {
85 printk(KERN_ERR "cs55x0: bad ide timing.\n");
86
87 cs5520_set_pio_mode(drive, 0);
88 }
89
90 static const struct ide_port_ops cs5520_port_ops = {
91 .set_pio_mode = cs5520_set_pio_mode,
92 .set_dma_mode = cs5520_set_dma_mode,
93 };
94
95 #define DECLARE_CS_DEV(name_str) \
96 { \
97 .name = name_str, \
98 .port_ops = &cs5520_port_ops, \
99 .host_flags = IDE_HFLAG_ISA_PORTS | \
100 IDE_HFLAG_CS5520, \
101 .pio_mask = ATA_PIO4, \
102 }
103
104 static const struct ide_port_info cyrix_chipsets[] __devinitdata = {
105 /* 0 */ DECLARE_CS_DEV("Cyrix 5510"),
106 /* 1 */ DECLARE_CS_DEV("Cyrix 5520")
107 };
108
109 /*
110 * The 5510/5520 are a bit weird. They don't quite set up the way
111 * the PCI helper layer expects so we must do much of the set up
112 * work longhand.
113 */
114
115 static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id)
116 {
117 const struct ide_port_info *d = &cyrix_chipsets[id->driver_data];
118 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
119
120 ide_setup_pci_noise(dev, d);
121
122 /* We must not grab the entire device, it has 'ISA' space in its
123 * BARS too and we will freak out other bits of the kernel
124 */
125 if (pci_enable_device_io(dev)) {
126 printk(KERN_WARNING "%s: Unable to enable 55x0.\n", d->name);
127 return -ENODEV;
128 }
129 pci_set_master(dev);
130 if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) {
131 printk(KERN_WARNING "cs5520: No suitable DMA available.\n");
132 return -ENODEV;
133 }
134
135 /*
136 * Now the chipset is configured we can let the core
137 * do all the device setup for us
138 */
139
140 ide_pci_setup_ports(dev, d, 14, &hw[0], &hws[0]);
141
142 return ide_host_add(d, hws, NULL);
143 }
144
145 static const struct pci_device_id cs5520_pci_tbl[] = {
146 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), 0 },
147 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), 1 },
148 { 0, },
149 };
150 MODULE_DEVICE_TABLE(pci, cs5520_pci_tbl);
151
152 static struct pci_driver driver = {
153 .name = "Cyrix_IDE",
154 .id_table = cs5520_pci_tbl,
155 .probe = cs5520_init_one,
156 };
157
158 static int __init cs5520_ide_init(void)
159 {
160 return ide_pci_register_driver(&driver);
161 }
162
163 module_init(cs5520_ide_init);
164
165 MODULE_AUTHOR("Alan Cox");
166 MODULE_DESCRIPTION("PCI driver module for Cyrix 5510/5520 IDE");
167 MODULE_LICENSE("GPL");
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