drivers/ide/pci/cs5520.c

   1 /*
   2  *      IDE tuning and bus mastering support for the CS5510/CS5520
   3  *      chipsets
   4  *
   5  *      The CS5510/CS5520 are slightly unusual devices. Unlike the
   6  *      typical IDE controllers they do bus mastering with the drive in
   7  *      PIO mode and smarter silicon.
   8  *
   9  *      The practical upshot of this is that we must always tune the
  10  *      drive for the right PIO mode. We must also ignore all the blacklists
  11  *      and the drive bus mastering DMA information.
  12  *
  13  *      *** This driver is strictly experimental ***
  14  *
  15  *      (c) Copyright Red Hat Inc 2002
  16  *
  17  * This program is free software; you can redistribute it and/or modify it
  18  * under the terms of the GNU General Public License as published by the
  19  * Free Software Foundation; either version 2, or (at your option) any
  20  * later version.
  21  *
  22  * This program is distributed in the hope that it will be useful, but
  23  * WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  25  * General Public License for more details.
  26  *
  27  * For the avoidance of doubt the "preferred form" of this code is one which
  28  * is in an open non patent encumbered format. Where cryptographic key signing
  29  * forms part of the process of creating an executable the information
  30  * including keys needed to generate an equivalently functional executable
  31  * are deemed to be part of the source code.
  32  *
  33  */
  34
  35 #include <linux/module.h>
  36 #include <linux/types.h>
  37 #include <linux/kernel.h>
  38 #include <linux/delay.h>
  39 #include <linux/timer.h>
  40 #include <linux/mm.h>
  41 #include <linux/ioport.h>
  42 #include <linux/blkdev.h>
  43 #include <linux/hdreg.h>
  44
  45 #include <linux/interrupt.h>
  46 #include <linux/init.h>
  47 #include <linux/pci.h>
  48 #include <linux/ide.h>
  49 #include <linux/dma-mapping.h>
  50
  51 #include <asm/io.h>
  52 #include <asm/irq.h>
  53
  54 struct pio_clocks
  55 {
  56         int address;
  57         int assert;
  58         int recovery;
  59 };
  60
  61 static struct pio_clocks cs5520_pio_clocks[]={
  62         {3, 6, 11},
  63         {2, 5, 6},
  64         {1, 4, 3},
  65         {1, 3, 2},
  66         {1, 2, 1}
  67 };
  68
  69 static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
  70 {
  71         ide_hwif_t *hwif = HWIF(drive);
  72         struct pci_dev *pdev = hwif->pci_dev;
  73         int controller = drive->dn > 1 ? 1 : 0;
  74         u8 reg;
  75
  76         /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
  77
  78         /* 8bit CAT/CRT - 8bit command timing for channel */
  79         pci_write_config_byte(pdev, 0x62 + controller,
  80                 (cs5520_pio_clocks[pio].recovery << 4) |
  81                 (cs5520_pio_clocks[pio].assert));
  82
  83         /* 0x64 - 16bit Primary, 0x68 - 16bit Secondary */
  84
  85         /* FIXME: should these use address ? */
  86         /* Data read timing */
  87         pci_write_config_byte(pdev, 0x64 + 4*controller + (drive->dn&1),
  88                 (cs5520_pio_clocks[pio].recovery << 4) |
  89                 (cs5520_pio_clocks[pio].assert));
  90         /* Write command timing */
  91         pci_write_config_byte(pdev, 0x66 + 4*controller + (drive->dn&1),
  92                 (cs5520_pio_clocks[pio].recovery << 4) |
  93                 (cs5520_pio_clocks[pio].assert));
  94
  95         /* Set the DMA enable/disable flag */
  96         reg = inb(hwif->dma_base + 0x02 + 8*controller);
  97         reg |= 1<<((drive->dn&1)+5);
  98         outb(reg, hwif->dma_base + 0x02 + 8*controller);
  99
 100         (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
 101 }
 102
 103 static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed)
 104 {
 105         printk(KERN_ERR "cs55x0: bad ide timing.\n");
 106
 107         cs5520_set_pio_mode(drive, 0);
 108
 109         /*
 110          * FIXME: this is incorrect to return zero here but
 111          * since all users of ide_set_xfer_rate() ignore
 112          * the return value it is not a problem currently
 113          */
 114         return 0;
 115 }
 116
 117 static int cs5520_config_drive_xfer_rate(ide_drive_t *drive)
 118 {
 119         /* Tune the drive for PIO modes up to PIO 4 */
 120         ide_set_max_pio(drive);
 121
 122         /* Then tell the core to use DMA operations */
 123         return 0;
 124 }
 125
 126 /*
 127  *      We provide a callback for our nonstandard DMA location
 128  */
 129
 130 static void __devinit cs5520_init_setup_dma(struct pci_dev *dev, ide_pci_device_t *d, ide_hwif_t *hwif)
 131 {
 132         unsigned long bmide = pci_resource_start(dev, 2);       /* Not the usual 4 */
 133         if(hwif->mate && hwif->mate->dma_base)  /* Second channel at primary + 8 */
 134                 bmide += 8;
 135         ide_setup_dma(hwif, bmide, 8);
 136 }
 137
 138 /*
 139  *      We wrap the DMA activate to set the vdma flag. This is needed
 140  *      so that the IDE DMA layer issues PIO not DMA commands over the
 141  *      DMA channel
 142  */
 143
 144 static int cs5520_dma_on(ide_drive_t *drive)
 145 {
 146         drive->vdma = 1;
 147         return 0;
 148 }
 149
 150 static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
 151 {
 152         hwif->set_pio_mode = &cs5520_set_pio_mode;
 153         hwif->speedproc = &cs5520_tune_chipset;
 154         hwif->ide_dma_check = &cs5520_config_drive_xfer_rate;
 155         hwif->ide_dma_on = &cs5520_dma_on;
 156
 157         if(!noautodma)
 158                 hwif->autodma = 1;
 159
 160         if(!hwif->dma_base)
 161         {
 162                 hwif->drives[0].autotune = 1;
 163                 hwif->drives[1].autotune = 1;
 164                 return;
 165         }
 166
 167         /* ATAPI is harder so leave it for now */
 168         hwif->atapi_dma = 0;
 169         hwif->ultra_mask = 0;
 170         hwif->swdma_mask = 0;
 171         hwif->mwdma_mask = 0;
 172
 173         hwif->drives[0].autodma = hwif->autodma;
 174         hwif->drives[1].autodma = hwif->autodma;
 175 }
 176
 177 #define DECLARE_CS_DEV(name_str)                                \
 178         {                                                       \
 179                 .name           = name_str,                     \
 180                 .init_setup_dma = cs5520_init_setup_dma,        \
 181                 .init_hwif      = init_hwif_cs5520,             \
 182                 .autodma        = AUTODMA,                      \
 183                 .bootable       = ON_BOARD,                     \
 184                 .host_flags     = IDE_HFLAG_ISA_PORTS,          \
 185                 .pio_mask       = ATA_PIO4,                     \
 186         }
 187
 188 static ide_pci_device_t cyrix_chipsets[] __devinitdata = {
 189         /* 0 */ DECLARE_CS_DEV("Cyrix 5510"),
 190         /* 1 */ DECLARE_CS_DEV("Cyrix 5520")
 191 };
 192
 193 /*
 194  *      The 5510/5520 are a bit weird. They don't quite set up the way
 195  *      the PCI helper layer expects so we must do much of the set up
 196  *      work longhand.
 197  */
 198
 199 static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 200 {
 201         ide_hwif_t *hwif = NULL, *mate = NULL;
 202         ata_index_t index;
 203         ide_pci_device_t *d = &cyrix_chipsets[id->driver_data];
 204
 205         ide_setup_pci_noise(dev, d);
 206
 207         /* We must not grab the entire device, it has 'ISA' space in its
 208            BARS too and we will freak out other bits of the kernel */
 209         if (pci_enable_device_bars(dev, 1<<2)) {
 210                 printk(KERN_WARNING "%s: Unable to enable 55x0.\n", d->name);
 211                 return -ENODEV;
 212         }
 213         pci_set_master(dev);
 214         if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) {
 215                 printk(KERN_WARNING "cs5520: No suitable DMA available.\n");
 216                 return -ENODEV;
 217         }
 218
 219         index.all = 0xf0f0;
 220
 221         /*
 222          *      Now the chipset is configured we can let the core
 223          *      do all the device setup for us
 224          */
 225
 226         ide_pci_setup_ports(dev, d, 14, &index);
 227
 228         if ((index.b.low & 0xf0) != 0xf0)
 229                 hwif = &ide_hwifs[index.b.low];
 230         if ((index.b.high & 0xf0) != 0xf0)
 231                 mate = &ide_hwifs[index.b.high];
 232
 233         if (hwif)
 234                 probe_hwif_init(hwif);
 235         if (mate)
 236                 probe_hwif_init(mate);
 237
 238         if (hwif)
 239                 ide_proc_register_port(hwif);
 240         if (mate)
 241                 ide_proc_register_port(mate);
 242
 243         return 0;
 244 }
 245
 246 static struct pci_device_id cs5520_pci_tbl[] = {
 247         { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 248         { PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
 249         { 0, },
 250 };
 251 MODULE_DEVICE_TABLE(pci, cs5520_pci_tbl);
 252
 253 static struct pci_driver driver = {
 254         .name           = "Cyrix_IDE",
 255         .id_table       = cs5520_pci_tbl,
 256         .probe          = cs5520_init_one,
 257 };
 258
 259 static int __init cs5520_ide_init(void)
 260 {
 261         return ide_pci_register_driver(&driver);
 262 }
 263
 264 module_init(cs5520_ide_init);
 265
 266 MODULE_AUTHOR("Alan Cox");
 267 MODULE_DESCRIPTION("PCI driver module for Cyrix 5510/5520 IDE");
 268 MODULE_LICENSE("GPL");