ide: remove ->init_setup_dma from ide_pci_device_t (take 2)
[deliverable/linux.git] / drivers / ide / pci / cs5520.c
1 /*
2 * IDE tuning and bus mastering support for the CS5510/CS5520
3 * chipsets
4 *
5 * The CS5510/CS5520 are slightly unusual devices. Unlike the
6 * typical IDE controllers they do bus mastering with the drive in
7 * PIO mode and smarter silicon.
8 *
9 * The practical upshot of this is that we must always tune the
10 * drive for the right PIO mode. We must also ignore all the blacklists
11 * and the drive bus mastering DMA information.
12 *
13 * *** This driver is strictly experimental ***
14 *
15 * (c) Copyright Red Hat Inc 2002
16 *
17 * This program is free software; you can redistribute it and/or modify it
18 * under the terms of the GNU General Public License as published by the
19 * Free Software Foundation; either version 2, or (at your option) any
20 * later version.
21 *
22 * This program is distributed in the hope that it will be useful, but
23 * WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
25 * General Public License for more details.
26 *
27 * For the avoidance of doubt the "preferred form" of this code is one which
28 * is in an open non patent encumbered format. Where cryptographic key signing
29 * forms part of the process of creating an executable the information
30 * including keys needed to generate an equivalently functional executable
31 * are deemed to be part of the source code.
32 *
33 */
34
35 #include <linux/module.h>
36 #include <linux/types.h>
37 #include <linux/kernel.h>
38 #include <linux/delay.h>
39 #include <linux/timer.h>
40 #include <linux/mm.h>
41 #include <linux/ioport.h>
42 #include <linux/blkdev.h>
43 #include <linux/hdreg.h>
44
45 #include <linux/interrupt.h>
46 #include <linux/init.h>
47 #include <linux/pci.h>
48 #include <linux/ide.h>
49 #include <linux/dma-mapping.h>
50
51 #include <asm/io.h>
52 #include <asm/irq.h>
53
54 struct pio_clocks
55 {
56 int address;
57 int assert;
58 int recovery;
59 };
60
61 static struct pio_clocks cs5520_pio_clocks[]={
62 {3, 6, 11},
63 {2, 5, 6},
64 {1, 4, 3},
65 {1, 3, 2},
66 {1, 2, 1}
67 };
68
69 static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
70 {
71 ide_hwif_t *hwif = HWIF(drive);
72 struct pci_dev *pdev = hwif->pci_dev;
73 int controller = drive->dn > 1 ? 1 : 0;
74 u8 reg;
75
76 /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
77
78 /* 8bit CAT/CRT - 8bit command timing for channel */
79 pci_write_config_byte(pdev, 0x62 + controller,
80 (cs5520_pio_clocks[pio].recovery << 4) |
81 (cs5520_pio_clocks[pio].assert));
82
83 /* 0x64 - 16bit Primary, 0x68 - 16bit Secondary */
84
85 /* FIXME: should these use address ? */
86 /* Data read timing */
87 pci_write_config_byte(pdev, 0x64 + 4*controller + (drive->dn&1),
88 (cs5520_pio_clocks[pio].recovery << 4) |
89 (cs5520_pio_clocks[pio].assert));
90 /* Write command timing */
91 pci_write_config_byte(pdev, 0x66 + 4*controller + (drive->dn&1),
92 (cs5520_pio_clocks[pio].recovery << 4) |
93 (cs5520_pio_clocks[pio].assert));
94
95 /* Set the DMA enable/disable flag */
96 reg = inb(hwif->dma_base + 0x02 + 8*controller);
97 reg |= 1<<((drive->dn&1)+5);
98 outb(reg, hwif->dma_base + 0x02 + 8*controller);
99 }
100
101 static void cs5520_set_dma_mode(ide_drive_t *drive, const u8 speed)
102 {
103 printk(KERN_ERR "cs55x0: bad ide timing.\n");
104
105 cs5520_set_pio_mode(drive, 0);
106 }
107
108 /*
109 * We wrap the DMA activate to set the vdma flag. This is needed
110 * so that the IDE DMA layer issues PIO not DMA commands over the
111 * DMA channel
112 */
113
114 static int cs5520_dma_on(ide_drive_t *drive)
115 {
116 /* ATAPI is harder so leave it for now */
117 drive->vdma = 1;
118 return 0;
119 }
120
121 static void __devinit init_hwif_cs5520(ide_hwif_t *hwif)
122 {
123 hwif->set_pio_mode = &cs5520_set_pio_mode;
124 hwif->set_dma_mode = &cs5520_set_dma_mode;
125
126 if (hwif->dma_base == 0) {
127 hwif->drives[1].autotune = hwif->drives[0].autotune = 1;
128 return;
129 }
130
131 hwif->ide_dma_on = &cs5520_dma_on;
132
133 hwif->ultra_mask = 0;
134 hwif->swdma_mask = 0;
135 hwif->mwdma_mask = 0;
136 }
137
138 #define DECLARE_CS_DEV(name_str) \
139 { \
140 .name = name_str, \
141 .init_hwif = init_hwif_cs5520, \
142 .host_flags = IDE_HFLAG_ISA_PORTS | \
143 IDE_HFLAG_CS5520 | \
144 IDE_HFLAG_VDMA | \
145 IDE_HFLAG_NO_ATAPI_DMA | \
146 IDE_HFLAG_BOOTABLE, \
147 .pio_mask = ATA_PIO4, \
148 }
149
150 static ide_pci_device_t cyrix_chipsets[] __devinitdata = {
151 /* 0 */ DECLARE_CS_DEV("Cyrix 5510"),
152 /* 1 */ DECLARE_CS_DEV("Cyrix 5520")
153 };
154
155 /*
156 * The 5510/5520 are a bit weird. They don't quite set up the way
157 * the PCI helper layer expects so we must do much of the set up
158 * work longhand.
159 */
160
161 static int __devinit cs5520_init_one(struct pci_dev *dev, const struct pci_device_id *id)
162 {
163 ide_hwif_t *hwif = NULL, *mate = NULL;
164 ata_index_t index;
165 ide_pci_device_t *d = &cyrix_chipsets[id->driver_data];
166
167 ide_setup_pci_noise(dev, d);
168
169 /* We must not grab the entire device, it has 'ISA' space in its
170 BARS too and we will freak out other bits of the kernel */
171 if (pci_enable_device_bars(dev, 1<<2)) {
172 printk(KERN_WARNING "%s: Unable to enable 55x0.\n", d->name);
173 return -ENODEV;
174 }
175 pci_set_master(dev);
176 if (pci_set_dma_mask(dev, DMA_32BIT_MASK)) {
177 printk(KERN_WARNING "cs5520: No suitable DMA available.\n");
178 return -ENODEV;
179 }
180
181 index.all = 0xf0f0;
182
183 /*
184 * Now the chipset is configured we can let the core
185 * do all the device setup for us
186 */
187
188 ide_pci_setup_ports(dev, d, 14, &index);
189
190 if ((index.b.low & 0xf0) != 0xf0)
191 hwif = &ide_hwifs[index.b.low];
192 if ((index.b.high & 0xf0) != 0xf0)
193 mate = &ide_hwifs[index.b.high];
194
195 if (hwif)
196 probe_hwif_init(hwif);
197 if (mate)
198 probe_hwif_init(mate);
199
200 if (hwif)
201 ide_proc_register_port(hwif);
202 if (mate)
203 ide_proc_register_port(mate);
204
205 return 0;
206 }
207
208 static const struct pci_device_id cs5520_pci_tbl[] = {
209 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5510), 0 },
210 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5520), 1 },
211 { 0, },
212 };
213 MODULE_DEVICE_TABLE(pci, cs5520_pci_tbl);
214
215 static struct pci_driver driver = {
216 .name = "Cyrix_IDE",
217 .id_table = cs5520_pci_tbl,
218 .probe = cs5520_init_one,
219 };
220
221 static int __init cs5520_ide_init(void)
222 {
223 return ide_pci_register_driver(&driver);
224 }
225
226 module_init(cs5520_ide_init);
227
228 MODULE_AUTHOR("Alan Cox");
229 MODULE_DESCRIPTION("PCI driver module for Cyrix 5510/5520 IDE");
230 MODULE_LICENSE("GPL");
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