drivers/ide/pci/it8213.c

   1 /*
   2  * ITE 8213 IDE driver
   3  *
   4  * Copyright (C) 2006 Jack Lee
   5  * Copyright (C) 2006 Alan Cox
   6  * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
   7  */
   8
   9 #include <linux/kernel.h>
  10 #include <linux/types.h>
  11 #include <linux/module.h>
  12 #include <linux/pci.h>
  13 #include <linux/delay.h>
  14 #include <linux/hdreg.h>
  15 #include <linux/ide.h>
  16 #include <linux/init.h>
  17
  18 #include <asm/io.h>
  19
  20 /**
  21  *      it8213_set_pio_mode     -       set host controller for PIO mode
  22  *      @drive: drive
  23  *      @pio: PIO mode number
  24  *
  25  *      Set the interface PIO mode.
  26  */
  27
  28 static void it8213_set_pio_mode(ide_drive_t *drive, const u8 pio)
  29 {
  30         ide_hwif_t *hwif        = HWIF(drive);
  31         struct pci_dev *dev     = hwif->pci_dev;
  32         int is_slave            = drive->dn & 1;
  33         int master_port         = 0x40;
  34         int slave_port          = 0x44;
  35         unsigned long flags;
  36         u16 master_data;
  37         u8 slave_data;
  38         static DEFINE_SPINLOCK(tune_lock);
  39         int control = 0;
  40
  41         static const u8 timings[][2]= {
  42                                         { 0, 0 },
  43                                         { 0, 0 },
  44                                         { 1, 0 },
  45                                         { 2, 1 },
  46                                         { 2, 3 }, };
  47
  48         spin_lock_irqsave(&tune_lock, flags);
  49         pci_read_config_word(dev, master_port, &master_data);
  50
  51         if (pio > 1)
  52                 control |= 1;   /* Programmable timing on */
  53         if (drive->media != ide_disk)
  54                 control |= 4;   /* ATAPI */
  55         if (pio > 2)
  56                 control |= 2;   /* IORDY */
  57         if (is_slave) {
  58                 master_data |=  0x4000;
  59                 master_data &= ~0x0070;
  60                 if (pio > 1)
  61                         master_data = master_data | (control << 4);
  62                 pci_read_config_byte(dev, slave_port, &slave_data);
  63                 slave_data = slave_data & 0xf0;
  64                 slave_data = slave_data | (timings[pio][0] << 2) | timings[pio][1];
  65         } else {
  66                 master_data &= ~0x3307;
  67                 if (pio > 1)
  68                         master_data = master_data | control;
  69                 master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
  70         }
  71         pci_write_config_word(dev, master_port, master_data);
  72         if (is_slave)
  73                 pci_write_config_byte(dev, slave_port, slave_data);
  74         spin_unlock_irqrestore(&tune_lock, flags);
  75 }
  76
  77 /**
  78  *      it8213_set_dma_mode     -       set host controller for DMA mode
  79  *      @drive: drive
  80  *      @speed: DMA mode
  81  *
  82  *      Tune the ITE chipset for the DMA mode.
  83  */
  84
  85 static void it8213_set_dma_mode(ide_drive_t *drive, const u8 speed)
  86 {
  87         ide_hwif_t *hwif        = HWIF(drive);
  88         struct pci_dev *dev     = hwif->pci_dev;
  89         u8 maslave              = 0x40;
  90         int a_speed             = 3 << (drive->dn * 4);
  91         int u_flag              = 1 << drive->dn;
  92         int v_flag              = 0x01 << drive->dn;
  93         int w_flag              = 0x10 << drive->dn;
  94         int u_speed             = 0;
  95         u16                     reg4042, reg4a;
  96         u8                      reg48, reg54, reg55, pio;
  97
  98         pci_read_config_word(dev, maslave, &reg4042);
  99         pci_read_config_byte(dev, 0x48, &reg48);
 100         pci_read_config_word(dev, 0x4a, &reg4a);
 101         pci_read_config_byte(dev, 0x54, &reg54);
 102         pci_read_config_byte(dev, 0x55, &reg55);
 103
 104         switch(speed) {
 105                 case XFER_UDMA_6:
 106                 case XFER_UDMA_4:
 107                 case XFER_UDMA_2:       u_speed = 2 << (drive->dn * 4); break;
 108                 case XFER_UDMA_5:
 109                 case XFER_UDMA_3:
 110                 case XFER_UDMA_1:       u_speed = 1 << (drive->dn * 4); break;
 111                 case XFER_UDMA_0:       u_speed = 0 << (drive->dn * 4); break;
 112                         break;
 113                 case XFER_MW_DMA_2:
 114                 case XFER_MW_DMA_1:
 115                 case XFER_SW_DMA_2:
 116                         break;
 117                 default:
 118                         return;
 119         }
 120
 121         if (speed >= XFER_UDMA_0) {
 122                 if (!(reg48 & u_flag))
 123                         pci_write_config_byte(dev, 0x48, reg48 | u_flag);
 124                 if (speed >= XFER_UDMA_5) {
 125                         pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
 126                 } else {
 127                         pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
 128                 }
 129
 130                 if ((reg4a & a_speed) != u_speed)
 131                         pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
 132                 if (speed > XFER_UDMA_2) {
 133                         if (!(reg54 & v_flag))
 134                                 pci_write_config_byte(dev, 0x54, reg54 | v_flag);
 135                 } else
 136                         pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
 137
 138                 pio = 4;
 139         } else {
 140                 const u8 mwdma_to_pio[] = { 0, 3, 4 };
 141
 142                 if (reg48 & u_flag)
 143                         pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
 144                 if (reg4a & a_speed)
 145                         pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
 146                 if (reg54 & v_flag)
 147                         pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
 148                 if (reg55 & w_flag)
 149                         pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
 150
 151                 if (speed >= XFER_MW_DMA_0)
 152                         pio = mwdma_to_pio[speed - XFER_MW_DMA_0];
 153                 else
 154                         pio = 2; /* only SWDMA2 is allowed */
 155         }
 156
 157         it8213_set_pio_mode(drive, pio);
 158 }
 159
 160 /**
 161  *      init_hwif_it8213        -       set up hwif structs
 162  *      @hwif: interface to set up
 163  *
 164  *      We do the basic set up of the interface structure.
 165  */
 166
 167 static void __devinit init_hwif_it8213(ide_hwif_t *hwif)
 168 {
 169         u8 reg42h = 0;
 170
 171         hwif->set_dma_mode = &it8213_set_dma_mode;
 172         hwif->set_pio_mode = &it8213_set_pio_mode;
 173
 174         hwif->autodma = 0;
 175
 176         hwif->drives[0].autotune = 1;
 177         hwif->drives[1].autotune = 1;
 178
 179         if (!hwif->dma_base)
 180                 return;
 181
 182         hwif->atapi_dma = 1;
 183         hwif->ultra_mask = 0x7f;
 184         hwif->mwdma_mask = 0x06;
 185         hwif->swdma_mask = 0x04;
 186
 187         pci_read_config_byte(hwif->pci_dev, 0x42, &reg42h);
 188
 189         if (hwif->cbl != ATA_CBL_PATA40_SHORT)
 190                 hwif->cbl = (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
 191
 192         /*
 193          *      The BIOS often doesn't set up DMA on this controller
 194          *      so we always do it.
 195          */
 196         if (!noautodma)
 197                 hwif->autodma = 1;
 198
 199         hwif->drives[0].autodma = hwif->autodma;
 200         hwif->drives[1].autodma = hwif->autodma;
 201 }
 202
 203
 204 #define DECLARE_ITE_DEV(name_str)                       \
 205         {                                               \
 206                 .name           = name_str,             \
 207                 .init_hwif      = init_hwif_it8213,     \
 208                 .autodma        = AUTODMA,              \
 209                 .enablebits     = {{0x41,0x80,0x80}}, \
 210                 .bootable       = ON_BOARD,             \
 211                 .host_flags     = IDE_HFLAG_SINGLE,     \
 212                 .pio_mask       = ATA_PIO4,             \
 213         }
 214
 215 static ide_pci_device_t it8213_chipsets[] __devinitdata = {
 216         /* 0 */ DECLARE_ITE_DEV("IT8213"),
 217 };
 218
 219
 220 /**
 221  *      it8213_init_one -       pci layer discovery entry
 222  *      @dev: PCI device
 223  *      @id: ident table entry
 224  *
 225  *      Called by the PCI code when it finds an ITE8213 controller. As
 226  *      this device follows the standard interfaces we can use the
 227  *      standard helper functions to do almost all the work for us.
 228  */
 229
 230 static int __devinit it8213_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 231 {
 232         ide_setup_pci_device(dev, &it8213_chipsets[id->driver_data]);
 233         return 0;
 234 }
 235
 236
 237 static struct pci_device_id it8213_pci_tbl[] = {
 238         { PCI_VENDOR_ID_ITE, 0x8213, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
 239         { 0, },
 240 };
 241
 242 MODULE_DEVICE_TABLE(pci, it8213_pci_tbl);
 243
 244 static struct pci_driver driver = {
 245         .name           = "ITE8213_IDE",
 246         .id_table       = it8213_pci_tbl,
 247         .probe          = it8213_init_one,
 248 };
 249
 250 static int __init it8213_ide_init(void)
 251 {
 252         return ide_pci_register_driver(&driver);
 253 }
 254
 255 module_init(it8213_ide_init);
 256
 257 MODULE_AUTHOR("Jack Lee, Alan Cox");
 258 MODULE_DESCRIPTION("PCI driver module for the ITE 8213");
 259 MODULE_LICENSE("GPL");