drivers/ide/pci/opti621.c

   1 /*
   2  *  Copyright (C) 1996-1998  Linus Torvalds & authors (see below)
   3  */
   4
   5 /*
   6  * Authors:
   7  * Jaromir Koutek <miri@punknet.cz>,
   8  * Jan Harkes <jaharkes@cwi.nl>,
   9  * Mark Lord <mlord@pobox.com>
  10  * Some parts of code are from ali14xx.c and from rz1000.c.
  11  *
  12  * OPTi is trademark of OPTi, Octek is trademark of Octek.
  13  *
  14  * I used docs from OPTi databook, from ftp.opti.com, file 9123-0002.ps
  15  * and disassembled/traced setupvic.exe (DOS program).
  16  * It increases kernel code about 2 kB.
  17  * I don't have this card no more, but I hope I can get some in case
  18  * of needed development.
  19  * My card is Octek PIDE 1.01 (on card) or OPTiViC (program).
  20  * It has a place for a secondary connector in circuit, but nothing
  21  * is there. Also BIOS says no address for
  22  * secondary controller (see bellow in ide_init_opti621).
  23  * I've only tested this on my system, which only has one disk.
  24  * It's Western Digital WDAC2850, with PIO mode 3. The PCI bus
  25  * is at 20 MHz (I have DX2/80, I tried PCI at 40, but I got random
  26  * lockups). I tried the OCTEK double speed CD-ROM and
  27  * it does not work! But I can't boot DOS also, so it's probably
  28  * hardware fault. I have connected Conner 80MB, the Seagate 850MB (no
  29  * problems) and Seagate 1GB (as slave, WD as master). My experiences
  30  * with the third, 1GB drive: I got 3MB/s (hdparm), but sometimes
  31  * it slows to about 100kB/s! I don't know why and I have
  32  * not this drive now, so I can't try it again.
  33  * I write this driver because I lost the paper ("manual") with
  34  * settings of jumpers on the card and I have to boot Linux with
  35  * Loadlin except LILO, cause I have to run the setupvic.exe program
  36  * already or I get disk errors (my test: rpm -Vf
  37  * /usr/X11R6/bin/XF86_SVGA - or any big file).
  38  * Some numbers from hdparm -t /dev/hda:
  39  * Timing buffer-cache reads:   32 MB in  3.02 seconds =10.60 MB/sec
  40  * Timing buffered disk reads:  16 MB in  5.52 seconds = 2.90 MB/sec
  41  * I have 4 Megs/s before, but I don't know why (maybe changes
  42  * in hdparm test).
  43  * After release of 0.1, I got some successful reports, so it might work.
  44  *
  45  * The main problem with OPTi is that some timings for master
  46  * and slave must be the same. For example, if you have master
  47  * PIO 3 and slave PIO 0, driver have to set some timings of
  48  * master for PIO 0. Second problem is that opti621_set_pio_mode
  49  * got only one drive to set, but have to set both drives.
  50  * This is solved in compute_pios. If you don't set
  51  * the second drive, compute_pios use ide_get_best_pio_mode
  52  * for autoselect mode (you can change it to PIO 0, if you want).
  53  * If you then set the second drive to another PIO, the old value
  54  * (automatically selected) will be overrided by yours.
  55  * There is a 25/33MHz switch in configuration
  56  * register, but driver is written for use at any frequency.
  57  *
  58  * Version 0.1, Nov 8, 1996
  59  * by Jaromir Koutek, for 2.1.8.
  60  * Initial version of driver.
  61  *
  62  * Version 0.2
  63  * Number 0.2 skipped.
  64  *
  65  * Version 0.3, Nov 29, 1997
  66  * by Mark Lord (probably), for 2.1.68
  67  * Updates for use with new IDE block driver.
  68  *
  69  * Version 0.4, Dec 14, 1997
  70  * by Jan Harkes
  71  * Fixed some errors and cleaned the code.
  72  *
  73  * Version 0.5, Jan 2, 1998
  74  * by Jaromir Koutek
  75  * Updates for use with (again) new IDE block driver.
  76  * Update of documentation.
  77  *
  78  * Version 0.6, Jan 2, 1999
  79  * by Jaromir Koutek
  80  * Reversed to version 0.3 of the driver, because
  81  * 0.5 doesn't work.
  82  */
  83
  84 #define OPTI621_DEBUG           /* define for debug messages */
  85
  86 #include <linux/types.h>
  87 #include <linux/module.h>
  88 #include <linux/kernel.h>
  89 #include <linux/pci.h>
  90 #include <linux/hdreg.h>
  91 #include <linux/ide.h>
  92
  93 #include <asm/io.h>
  94
  95 //#define OPTI621_MAX_PIO 3
  96 /* In fact, I do not have any PIO 4 drive
  97  * (address: 25 ns, data: 70 ns, recovery: 35 ns),
  98  * but OPTi 82C621 is programmable and it can do (minimal values):
  99  * on 40MHz PCI bus (pulse 25 ns):
 100  *  address: 25 ns, data: 25 ns, recovery: 50 ns;
 101  * on 20MHz PCI bus (pulse 50 ns):
 102  *  address: 50 ns, data: 50 ns, recovery: 100 ns.
 103  */
 104
 105 #define READ_REG 0      /* index of Read cycle timing register */
 106 #define WRITE_REG 1     /* index of Write cycle timing register */
 107 #define CNTRL_REG 3     /* index of Control register */
 108 #define STRAP_REG 5     /* index of Strap register */
 109 #define MISC_REG 6      /* index of Miscellaneous register */
 110
 111 static int reg_base;
 112
 113 #define PIO_NOT_EXIST 254
 114 #define PIO_DONT_KNOW 255
 115
 116 static DEFINE_SPINLOCK(opti621_lock);
 117
 118 /* there are stored pio numbers from other calls of opti621_set_pio_mode */
 119 static void compute_pios(ide_drive_t *drive, const u8 pio)
 120 /* Store values into drive->drive_data
 121  *      second_contr - 0 for primary controller, 1 for secondary
 122  *      slave_drive - 0 -> pio is for master, 1 -> pio is for slave
 123  *      pio - PIO mode for selected drive (for other we don't know)
 124  */
 125 {
 126         int d;
 127         ide_hwif_t *hwif = HWIF(drive);
 128
 129         drive->drive_data = pio;
 130
 131         for (d = 0; d < 2; ++d) {
 132                 drive = &hwif->drives[d];
 133                 if (drive->present) {
 134                         if (drive->drive_data == PIO_DONT_KNOW)
 135                                 drive->drive_data = ide_get_best_pio_mode(drive, 255, 3);
 136 #ifdef OPTI621_DEBUG
 137                         printk("%s: Selected PIO mode %d\n",
 138                                 drive->name, drive->drive_data);
 139 #endif
 140                 } else {
 141                         drive->drive_data = PIO_NOT_EXIST;
 142                 }
 143         }
 144 }
 145
 146 static int cmpt_clk(int time, int bus_speed)
 147 /* Returns (rounded up) time in clocks for time in ns,
 148  * with bus_speed in MHz.
 149  * Example: bus_speed = 40 MHz, time = 80 ns
 150  * 1000/40 = 25 ns (clk value),
 151  * 80/25 = 3.2, rounded up to 4 (I hope ;-)).
 152  * Use idebus=xx to select right frequency.
 153  */
 154 {
 155         return ((time*bus_speed+999)/1000);
 156 }
 157
 158 /* Write value to register reg, base of register
 159  * is at reg_base (0x1f0 primary, 0x170 secondary,
 160  * if not changed by PCI configuration).
 161  * This is from setupvic.exe program.
 162  */
 163 static void write_reg(u8 value, int reg)
 164 {
 165         inw(reg_base + 1);
 166         inw(reg_base + 1);
 167         outb(3, reg_base + 2);
 168         outb(value, reg_base + reg);
 169         outb(0x83, reg_base + 2);
 170 }
 171
 172 /* Read value from register reg, base of register
 173  * is at reg_base (0x1f0 primary, 0x170 secondary,
 174  * if not changed by PCI configuration).
 175  * This is from setupvic.exe program.
 176  */
 177 static u8 read_reg(int reg)
 178 {
 179         u8 ret = 0;
 180
 181         inw(reg_base + 1);
 182         inw(reg_base + 1);
 183         outb(3, reg_base + 2);
 184         ret = inb(reg_base + reg);
 185         outb(0x83, reg_base + 2);
 186
 187         return ret;
 188 }
 189
 190 typedef struct pio_clocks_s {
 191         int     address_time;   /* Address setup (clocks) */
 192         int     data_time;      /* Active/data pulse (clocks) */
 193         int     recovery_time;  /* Recovery time (clocks) */
 194 } pio_clocks_t;
 195
 196 static void compute_clocks(int pio, pio_clocks_t *clks)
 197 {
 198         if (pio != PIO_NOT_EXIST) {
 199                 int adr_setup, data_pls;
 200                 int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
 201
 202                 adr_setup = ide_pio_timings[pio].setup_time;
 203                 data_pls = ide_pio_timings[pio].active_time;
 204                 clks->address_time = cmpt_clk(adr_setup, bus_speed);
 205                 clks->data_time = cmpt_clk(data_pls, bus_speed);
 206                 clks->recovery_time = cmpt_clk(ide_pio_timings[pio].cycle_time
 207                         - adr_setup-data_pls, bus_speed);
 208                 if (clks->address_time < 1)
 209                         clks->address_time = 1;
 210                 if (clks->address_time > 4)
 211                         clks->address_time = 4;
 212                 if (clks->data_time < 1)
 213                         clks->data_time = 1;
 214                 if (clks->data_time > 16)
 215                         clks->data_time = 16;
 216                 if (clks->recovery_time < 2)
 217                         clks->recovery_time = 2;
 218                 if (clks->recovery_time > 17)
 219                         clks->recovery_time = 17;
 220         } else {
 221                 clks->address_time = 1;
 222                 clks->data_time = 1;
 223                 clks->recovery_time = 2;
 224                 /* minimal values */
 225         }
 226 }
 227
 228 static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio)
 229 {
 230         /* primary and secondary drives share some registers,
 231          * so we have to program both drives
 232          */
 233         unsigned long flags;
 234         u8 pio1 = 0, pio2 = 0;
 235         pio_clocks_t first, second;
 236         int ax, drdy;
 237         u8 cycle1, cycle2, misc;
 238         ide_hwif_t *hwif = HWIF(drive);
 239
 240         /* sets drive->drive_data for both drives */
 241         compute_pios(drive, pio);
 242         pio1 = hwif->drives[0].drive_data;
 243         pio2 = hwif->drives[1].drive_data;
 244
 245         compute_clocks(pio1, &first);
 246         compute_clocks(pio2, &second);
 247
 248         /* ax = max(a1,a2) */
 249         ax = (first.address_time < second.address_time) ? second.address_time : first.address_time;
 250
 251         drdy = 2; /* DRDY is default 2 (by OPTi Databook) */
 252
 253         cycle1 = ((first.data_time-1)<<4)  | (first.recovery_time-2);
 254         cycle2 = ((second.data_time-1)<<4) | (second.recovery_time-2);
 255
 256         misc = ((ax - 1) << 4) | ((drdy - 2) << 1);
 257
 258 #ifdef OPTI621_DEBUG
 259         printk("%s: master: address: %d, data: %d, "
 260                 "recovery: %d, drdy: %d [clk]\n",
 261                 hwif->name, ax, first.data_time,
 262                 first.recovery_time, drdy);
 263         printk("%s: slave:  address: %d, data: %d, "
 264                 "recovery: %d, drdy: %d [clk]\n",
 265                 hwif->name, ax, second.data_time,
 266                 second.recovery_time, drdy);
 267 #endif
 268
 269         spin_lock_irqsave(&opti621_lock, flags);
 270
 271         reg_base = hwif->io_ports.data_addr;
 272
 273         /* allow Register-B */
 274         outb(0xc0, reg_base + CNTRL_REG);
 275         /* hmm, setupvic.exe does this ;-) */
 276         outb(0xff, reg_base + 5);
 277         /* if reads 0xff, adapter not exist? */
 278         (void)inb(reg_base + CNTRL_REG);
 279         /* if reads 0xc0, no interface exist? */
 280         read_reg(CNTRL_REG);
 281         /* read version, probably 0 */
 282         read_reg(STRAP_REG);
 283
 284         /* program primary drive */
 285         /* select Index-0 for Register-A */
 286         write_reg(0, MISC_REG);
 287         /* set read cycle timings */
 288         write_reg(cycle1, READ_REG);
 289         /* set write cycle timings */
 290         write_reg(cycle1, WRITE_REG);
 291
 292         /* program secondary drive */
 293         /* select Index-1 for Register-B */
 294         write_reg(1, MISC_REG);
 295         /* set read cycle timings */
 296         write_reg(cycle2, READ_REG);
 297         /* set write cycle timings */
 298         write_reg(cycle2, WRITE_REG);
 299
 300         /* use Register-A for drive 0 */
 301         /* use Register-B for drive 1 */
 302         write_reg(0x85, CNTRL_REG);
 303
 304         /* set address setup, DRDY timings,   */
 305         /*  and read prefetch for both drives */
 306         write_reg(misc, MISC_REG);
 307
 308         spin_unlock_irqrestore(&opti621_lock, flags);
 309 }
 310
 311 static void __devinit opti621_port_init_devs(ide_hwif_t *hwif)
 312 {
 313         hwif->drives[0].drive_data = PIO_DONT_KNOW;
 314         hwif->drives[1].drive_data = PIO_DONT_KNOW;
 315 }
 316
 317 static const struct ide_port_ops opti621_port_ops = {
 318         .port_init_devs         = opti621_port_init_devs,
 319         .set_pio_mode           = opti621_set_pio_mode,
 320 };
 321
 322 static const struct ide_port_info opti621_chipsets[] __devinitdata = {
 323         {       /* 0 */
 324                 .name           = "OPTI621",
 325                 .enablebits     = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
 326                 .port_ops       = &opti621_port_ops,
 327                 .host_flags     = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
 328                 .pio_mask       = ATA_PIO3,
 329                 .swdma_mask     = ATA_SWDMA2,
 330                 .mwdma_mask     = ATA_MWDMA2,
 331         }, {    /* 1 */
 332                 .name           = "OPTI621X",
 333                 .enablebits     = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} },
 334                 .port_ops       = &opti621_port_ops,
 335                 .host_flags     = IDE_HFLAG_TRUST_BIOS_FOR_DMA,
 336                 .pio_mask       = ATA_PIO3,
 337                 .swdma_mask     = ATA_SWDMA2,
 338                 .mwdma_mask     = ATA_MWDMA2,
 339         }
 340 };
 341
 342 static int __devinit opti621_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 343 {
 344         return ide_setup_pci_device(dev, &opti621_chipsets[id->driver_data]);
 345 }
 346
 347 static const struct pci_device_id opti621_pci_tbl[] = {
 348         { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
 349         { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },
 350         { 0, },
 351 };
 352 MODULE_DEVICE_TABLE(pci, opti621_pci_tbl);
 353
 354 static struct pci_driver driver = {
 355         .name           = "Opti621_IDE",
 356         .id_table       = opti621_pci_tbl,
 357         .probe          = opti621_init_one,
 358 };
 359
 360 static int __init opti621_ide_init(void)
 361 {
 362         return ide_pci_register_driver(&driver);
 363 }
 364
 365 module_init(opti621_ide_init);
 366
 367 MODULE_AUTHOR("Jaromir Koutek, Jan Harkes, Mark Lord");
 368 MODULE_DESCRIPTION("PCI driver module for Opti621 IDE");
 369 MODULE_LICENSE("GPL");