drivers/ide/pci/tc86c001.c

   1 /*
   2  * drivers/ide/pci/tc86c001.c   Version 1.00    Dec 12, 2006
   3  *
   4  * Copyright (C) 2002 Toshiba Corporation
   5  * Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * This file is licensed under the terms of the GNU General Public
   8  * License version 2.  This program is licensed "as is" without any
   9  * warranty of any kind, whether express or implied.
  10  */
  11
  12 #include <linux/types.h>
  13 #include <linux/pci.h>
  14 #include <linux/ide.h>
  15
  16 static int tc86c001_tune_chipset(ide_drive_t *drive, const u8 speed)
  17 {
  18         ide_hwif_t *hwif        = HWIF(drive);
  19         unsigned long scr_port  = hwif->config_data + (drive->dn ? 0x02 : 0x00);
  20         u16 mode, scr           = hwif->INW(scr_port);
  21
  22         switch (speed) {
  23                 case XFER_UDMA_4:       mode = 0x00c0; break;
  24                 case XFER_UDMA_3:       mode = 0x00b0; break;
  25                 case XFER_UDMA_2:       mode = 0x00a0; break;
  26                 case XFER_UDMA_1:       mode = 0x0090; break;
  27                 case XFER_UDMA_0:       mode = 0x0080; break;
  28                 case XFER_MW_DMA_2:     mode = 0x0070; break;
  29                 case XFER_MW_DMA_1:     mode = 0x0060; break;
  30                 case XFER_MW_DMA_0:     mode = 0x0050; break;
  31                 case XFER_PIO_4:        mode = 0x0400; break;
  32                 case XFER_PIO_3:        mode = 0x0300; break;
  33                 case XFER_PIO_2:        mode = 0x0200; break;
  34                 case XFER_PIO_1:        mode = 0x0100; break;
  35                 case XFER_PIO_0:
  36                 default:                mode = 0x0000; break;
  37         }
  38
  39         scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
  40         scr |= mode;
  41         outw(scr, scr_port);
  42
  43         return ide_config_drive_speed(drive, speed);
  44 }
  45
  46 static void tc86c001_tune_drive(ide_drive_t *drive, u8 pio)
  47 {
  48         pio = ide_get_best_pio_mode(drive, pio, 4);
  49         (void) tc86c001_tune_chipset(drive, XFER_PIO_0 + pio);
  50 }
  51
  52 /*
  53  * HACKITY HACK
  54  *
  55  * This is a workaround for the limitation 5 of the TC86C001 IDE controller:
  56  * if a DMA transfer terminates prematurely, the controller leaves the device's
  57  * interrupt request (INTRQ) pending and does not generate a PCI interrupt (or
  58  * set the interrupt bit in the DMA status register), thus no PCI interrupt
  59  * will occur until a DMA transfer has been successfully completed.
  60  *
  61  * We work around this by initiating dummy, zero-length DMA transfer on
  62  * a DMA timeout expiration. I found no better way to do this with the current
  63  * IDE core than to temporarily replace a higher level driver's timer expiry
  64  * handler with our own backing up to that handler in case our recovery fails.
  65  */
  66 static int tc86c001_timer_expiry(ide_drive_t *drive)
  67 {
  68         ide_hwif_t *hwif        = HWIF(drive);
  69         ide_expiry_t *expiry    = ide_get_hwifdata(hwif);
  70         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
  71         u8 dma_stat             = hwif->INB(hwif->dma_status);
  72
  73         /* Restore a higher level driver's expiry handler first. */
  74         hwgroup->expiry = expiry;
  75
  76         if ((dma_stat & 5) == 1) {      /* DMA active and no interrupt */
  77                 unsigned long sc_base   = hwif->config_data;
  78                 unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
  79                 u8 dma_cmd              = hwif->INB(hwif->dma_command);
  80
  81                 printk(KERN_WARNING "%s: DMA interrupt possibly stuck, "
  82                        "attempting recovery...\n", drive->name);
  83
  84                 /* Stop DMA */
  85                 outb(dma_cmd & ~0x01, hwif->dma_command);
  86
  87                 /* Setup the dummy DMA transfer */
  88                 outw(0, sc_base + 0x0a);        /* Sector Count */
  89                 outw(0, twcr_port);     /* Transfer Word Count 1 or 2 */
  90
  91                 /* Start the dummy DMA transfer */
  92                 outb(0x00, hwif->dma_command); /* clear R_OR_WCTR for write */
  93                 outb(0x01, hwif->dma_command); /* set START_STOPBM */
  94
  95                 /*
  96                  * If an interrupt was pending, it should come thru shortly.
  97                  * If not, a higher level driver's expiry handler should
  98                  * eventually cause some kind of recovery from the DMA stall.
  99                  */
 100                 return WAIT_MIN_SLEEP;
 101         }
 102
 103         /* Chain to the restored expiry handler if DMA wasn't active. */
 104         if (likely(expiry != NULL))
 105                 return expiry(drive);
 106
 107         /* If there was no handler, "emulate" that for ide_timer_expiry()... */
 108         return -1;
 109 }
 110
 111 static void tc86c001_dma_start(ide_drive_t *drive)
 112 {
 113         ide_hwif_t *hwif        = HWIF(drive);
 114         ide_hwgroup_t *hwgroup  = HWGROUP(drive);
 115         unsigned long sc_base   = hwif->config_data;
 116         unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
 117         unsigned long nsectors  = hwgroup->rq->nr_sectors;
 118
 119         /*
 120          * We have to manually load the sector count and size into
 121          * the appropriate system control registers for DMA to work
 122          * with LBA48 and ATAPI devices...
 123          */
 124         outw(nsectors, sc_base + 0x0a); /* Sector Count */
 125         outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */
 126
 127         /* Install our timeout expiry hook, saving the current handler... */
 128         ide_set_hwifdata(hwif, hwgroup->expiry);
 129         hwgroup->expiry = &tc86c001_timer_expiry;
 130
 131         ide_dma_start(drive);
 132 }
 133
 134 static int tc86c001_busproc(ide_drive_t *drive, int state)
 135 {
 136         ide_hwif_t *hwif        = HWIF(drive);
 137         unsigned long sc_base   = hwif->config_data;
 138         u16 scr1;
 139
 140         /* System Control 1 Register bit 11 (ATA Hard Reset) read */
 141         scr1 = hwif->INW(sc_base + 0x00);
 142
 143         switch (state) {
 144                 case BUSSTATE_ON:
 145                         if (!(scr1 & 0x0800))
 146                                 return 0;
 147                         scr1 &= ~0x0800;
 148
 149                         hwif->drives[0].failures = hwif->drives[1].failures = 0;
 150                         break;
 151                 case BUSSTATE_OFF:
 152                         if (scr1 & 0x0800)
 153                                 return 0;
 154                         scr1 |= 0x0800;
 155
 156                         hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
 157                         hwif->drives[1].failures = hwif->drives[1].max_failures + 1;
 158                         break;
 159                 default:
 160                         return -EINVAL;
 161         }
 162
 163         /* System Control 1 Register bit 11 (ATA Hard Reset) write */
 164         outw(scr1, sc_base + 0x00);
 165         return 0;
 166 }
 167
 168 static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive)
 169 {
 170         if (ide_tune_dma(drive))
 171                 return 0;
 172
 173         if (ide_use_fast_pio(drive))
 174                 tc86c001_tune_drive(drive, 255);
 175
 176         return -1;
 177 }
 178
 179 static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
 180 {
 181         unsigned long sc_base   = pci_resource_start(hwif->pci_dev, 5);
 182         u16 scr1                = hwif->INW(sc_base + 0x00);;
 183
 184         /* System Control 1 Register bit 15 (Soft Reset) set */
 185         outw(scr1 |  0x8000, sc_base + 0x00);
 186
 187         /* System Control 1 Register bit 14 (FIFO Reset) set */
 188         outw(scr1 |  0x4000, sc_base + 0x00);
 189
 190         /* System Control 1 Register: reset clear */
 191         outw(scr1 & ~0xc000, sc_base + 0x00);
 192
 193         /* Store the system control register base for convenience... */
 194         hwif->config_data = sc_base;
 195
 196         hwif->tuneproc  = &tc86c001_tune_drive;
 197         hwif->speedproc = &tc86c001_tune_chipset;
 198         hwif->busproc   = &tc86c001_busproc;
 199
 200         hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
 201
 202         if (!hwif->dma_base)
 203                 return;
 204
 205         /*
 206          * Sector Count Control Register bits 0 and 1 set:
 207          * software sets Sector Count Register for master and slave device
 208          */
 209         outw(0x0003, sc_base + 0x0c);
 210
 211         /* Sector Count Register limit */
 212         hwif->rqsize     = 0xffff;
 213
 214         hwif->atapi_dma  = 1;
 215         hwif->ultra_mask = 0x1f;
 216         hwif->mwdma_mask = 0x07;
 217
 218         hwif->ide_dma_check     = &tc86c001_config_drive_xfer_rate;
 219         hwif->dma_start         = &tc86c001_dma_start;
 220
 221         if (hwif->cbl != ATA_CBL_PATA40_SHORT) {
 222                 /*
 223                  * System Control  1 Register bit 13 (PDIAGN):
 224                  * 0=80-pin cable, 1=40-pin cable
 225                  */
 226                 scr1 = hwif->INW(sc_base + 0x00);
 227                 hwif->cbl = (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
 228         }
 229
 230         if (!noautodma)
 231                 hwif->autodma = 1;
 232         hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
 233 }
 234
 235 static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev,
 236                                                         const char *name)
 237 {
 238         int err = pci_request_region(dev, 5, name);
 239
 240         if (err)
 241                 printk(KERN_ERR "%s: system control regs already in use", name);
 242         return err;
 243 }
 244
 245 static ide_pci_device_t tc86c001_chipset __devinitdata = {
 246         .name           = "TC86C001",
 247         .init_chipset   = init_chipset_tc86c001,
 248         .init_hwif      = init_hwif_tc86c001,
 249         .autodma        = AUTODMA,
 250         .bootable       = OFF_BOARD,
 251         .host_flags     = IDE_HFLAG_SINGLE,
 252         .pio_mask       = ATA_PIO4,
 253 };
 254
 255 static int __devinit tc86c001_init_one(struct pci_dev *dev,
 256                                        const struct pci_device_id *id)
 257 {
 258         return ide_setup_pci_device(dev, &tc86c001_chipset);
 259 }
 260
 261 static struct pci_device_id tc86c001_pci_tbl[] = {
 262         { PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE,
 263           PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 264         { 0, }
 265 };
 266 MODULE_DEVICE_TABLE(pci, tc86c001_pci_tbl);
 267
 268 static struct pci_driver driver = {
 269         .name           = "TC86C001",
 270         .id_table       = tc86c001_pci_tbl,
 271         .probe          = tc86c001_init_one
 272 };
 273
 274 static int __init tc86c001_ide_init(void)
 275 {
 276         return ide_pci_register_driver(&driver);
 277 }
 278 module_init(tc86c001_ide_init);
 279
 280 MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
 281 MODULE_DESCRIPTION("PCI driver module for TC86C001 IDE");
 282 MODULE_LICENSE("GPL");