drivers/ide/pci/via82cxxx.c

   1 /*
   2  *
   3  * Version 3.48
   4  *
   5  * VIA IDE driver for Linux. Supported southbridges:
   6  *
   7  *   vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
   8  *   vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
   9  *   vt8235, vt8237, vt8237a
  10  *
  11  * Copyright (c) 2000-2002 Vojtech Pavlik
  12  * Copyright (c) 2007 Bartlomiej Zolnierkiewicz
  13  *
  14  * Based on the work of:
  15  *      Michel Aubry
  16  *      Jeff Garzik
  17  *      Andre Hedrick
  18  *
  19  * Documentation:
  20  *      Obsolete device documentation publically available from via.com.tw
  21  *      Current device documentation available under NDA only
  22  */
  23
  24 /*
  25  * This program is free software; you can redistribute it and/or modify it
  26  * under the terms of the GNU General Public License version 2 as published by
  27  * the Free Software Foundation.
  28  */
  29
  30 #include <linux/module.h>
  31 #include <linux/kernel.h>
  32 #include <linux/ioport.h>
  33 #include <linux/blkdev.h>
  34 #include <linux/pci.h>
  35 #include <linux/init.h>
  36 #include <linux/ide.h>
  37 #include <linux/dmi.h>
  38
  39 #include <asm/io.h>
  40
  41 #ifdef CONFIG_PPC_CHRP
  42 #include <asm/processor.h>
  43 #endif
  44
  45 #include "ide-timing.h"
  46
  47 #define VIA_IDE_ENABLE          0x40
  48 #define VIA_IDE_CONFIG          0x41
  49 #define VIA_FIFO_CONFIG         0x43
  50 #define VIA_MISC_1              0x44
  51 #define VIA_MISC_2              0x45
  52 #define VIA_MISC_3              0x46
  53 #define VIA_DRIVE_TIMING        0x48
  54 #define VIA_8BIT_TIMING         0x4e
  55 #define VIA_ADDRESS_SETUP       0x4c
  56 #define VIA_UDMA_TIMING         0x50
  57
  58 #define VIA_BAD_PREQ            0x01 /* Crashes if PREQ# till DDACK# set */
  59 #define VIA_BAD_CLK66           0x02 /* 66 MHz clock doesn't work correctly */
  60 #define VIA_SET_FIFO            0x04 /* Needs to have FIFO split set */
  61 #define VIA_NO_UNMASK           0x08 /* Doesn't work with IRQ unmasking on */
  62 #define VIA_BAD_ID              0x10 /* Has wrong vendor ID (0x1107) */
  63 #define VIA_BAD_AST             0x20 /* Don't touch Address Setup Timing */
  64
  65 /*
  66  * VIA SouthBridge chips.
  67  */
  68
  69 static struct via_isa_bridge {
  70         char *name;
  71         u16 id;
  72         u8 rev_min;
  73         u8 rev_max;
  74         u8 udma_mask;
  75         u8 flags;
  76 } via_isa_bridges[] = {
  77         { "vx800",      PCI_DEVICE_ID_VIA_VX800,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  78         { "cx700",      PCI_DEVICE_ID_VIA_CX700,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  79         { "vt8237s",    PCI_DEVICE_ID_VIA_8237S,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  80         { "vt6410",     PCI_DEVICE_ID_VIA_6410,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  81         { "vt8251",     PCI_DEVICE_ID_VIA_8251,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  82         { "vt8237",     PCI_DEVICE_ID_VIA_8237,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  83         { "vt8237a",    PCI_DEVICE_ID_VIA_8237A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  84         { "vt8235",     PCI_DEVICE_ID_VIA_8235,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  85         { "vt8233a",    PCI_DEVICE_ID_VIA_8233A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  86         { "vt8233c",    PCI_DEVICE_ID_VIA_8233C_0,  0x00, 0x2f, ATA_UDMA5, },
  87         { "vt8233",     PCI_DEVICE_ID_VIA_8233_0,   0x00, 0x2f, ATA_UDMA5, },
  88         { "vt8231",     PCI_DEVICE_ID_VIA_8231,     0x00, 0x2f, ATA_UDMA5, },
  89         { "vt82c686b",  PCI_DEVICE_ID_VIA_82C686,   0x40, 0x4f, ATA_UDMA5, },
  90         { "vt82c686a",  PCI_DEVICE_ID_VIA_82C686,   0x10, 0x2f, ATA_UDMA4, },
  91         { "vt82c686",   PCI_DEVICE_ID_VIA_82C686,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
  92         { "vt82c596b",  PCI_DEVICE_ID_VIA_82C596,   0x10, 0x2f, ATA_UDMA4, },
  93         { "vt82c596a",  PCI_DEVICE_ID_VIA_82C596,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
  94         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
  95         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
  96         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
  97         { "vt82c586a",  PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
  98         { "vt82c586",   PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f,      0x00, VIA_SET_FIFO },
  99         { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
 100         { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
 101         { NULL }
 102 };
 103
 104 static unsigned int via_clock;
 105 static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
 106
 107 struct via82cxxx_dev
 108 {
 109         struct via_isa_bridge *via_config;
 110         unsigned int via_80w;
 111 };
 112
 113 /**
 114  *      via_set_speed                   -       write timing registers
 115  *      @dev: PCI device
 116  *      @dn: device
 117  *      @timing: IDE timing data to use
 118  *
 119  *      via_set_speed writes timing values to the chipset registers
 120  */
 121
 122 static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
 123 {
 124         struct pci_dev *dev = hwif->pci_dev;
 125         struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
 126         u8 t;
 127
 128         if (~vdev->via_config->flags & VIA_BAD_AST) {
 129                 pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
 130                 t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
 131                 pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
 132         }
 133
 134         pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
 135                 ((FIT(timing->act8b, 1, 16) - 1) << 4) | (FIT(timing->rec8b, 1, 16) - 1));
 136
 137         pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
 138                 ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
 139
 140         switch (vdev->via_config->udma_mask) {
 141         case ATA_UDMA2: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
 142         case ATA_UDMA4: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break;
 143         case ATA_UDMA5: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
 144         case ATA_UDMA6: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
 145         default: return;
 146         }
 147
 148         pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
 149 }
 150
 151 /**
 152  *      via_set_drive           -       configure transfer mode
 153  *      @drive: Drive to set up
 154  *      @speed: desired speed
 155  *
 156  *      via_set_drive() computes timing values configures the drive and
 157  *      the chipset to a desired transfer mode. It also can be called
 158  *      by upper layers.
 159  */
 160
 161 static int via_set_drive(ide_drive_t *drive, const u8 speed)
 162 {
 163         ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
 164         struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev);
 165         struct ide_timing t, p;
 166         unsigned int T, UT;
 167
 168         if (speed != XFER_PIO_SLOW)
 169                 ide_config_drive_speed(drive, speed);
 170
 171         T = 1000000000 / via_clock;
 172
 173         switch (vdev->via_config->udma_mask) {
 174         case ATA_UDMA2: UT = T;   break;
 175         case ATA_UDMA4: UT = T/2; break;
 176         case ATA_UDMA5: UT = T/3; break;
 177         case ATA_UDMA6: UT = T/4; break;
 178         default:        UT = T;
 179         }
 180
 181         ide_timing_compute(drive, speed, &t, T, UT);
 182
 183         if (peer->present) {
 184                 ide_timing_compute(peer, peer->current_speed, &p, T, UT);
 185                 ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
 186         }
 187
 188         via_set_speed(HWIF(drive), drive->dn, &t);
 189
 190         if (!drive->init_speed)
 191                 drive->init_speed = speed;
 192         drive->current_speed = speed;
 193
 194         return 0;
 195 }
 196
 197 /**
 198  *      via_set_pio_mode        -       PIO setup
 199  *      @drive: drive
 200  *      @pio: PIO mode number
 201  *
 202  *      A callback from the upper layers for PIO-only tuning.
 203  */
 204
 205 static void via_set_pio_mode(ide_drive_t *drive, const u8 pio)
 206 {
 207         via_set_drive(drive, XFER_PIO_0 + pio);
 208 }
 209
 210 /**
 211  *      via82cxxx_ide_dma_check         -       set up for DMA if possible
 212  *      @drive: IDE drive to set up
 213  *
 214  *      Set up the drive for the highest supported speed considering the
 215  *      driver, controller and cable
 216  */
 217
 218 static int via82cxxx_ide_dma_check (ide_drive_t *drive)
 219 {
 220         if (ide_tune_dma(drive))
 221                 return 0;
 222
 223         ide_set_max_pio(drive);
 224
 225         return -1;
 226 }
 227
 228 static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
 229 {
 230         struct via_isa_bridge *via_config;
 231
 232         for (via_config = via_isa_bridges; via_config->id; via_config++)
 233                 if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
 234                         !!(via_config->flags & VIA_BAD_ID),
 235                         via_config->id, NULL))) {
 236
 237                         if ((*isa)->revision >= via_config->rev_min &&
 238                             (*isa)->revision <= via_config->rev_max)
 239                                 break;
 240                         pci_dev_put(*isa);
 241                 }
 242
 243         return via_config;
 244 }
 245
 246 /*
 247  * Check and handle 80-wire cable presence
 248  */
 249 static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
 250 {
 251         int i;
 252
 253         switch (vdev->via_config->udma_mask) {
 254                 case ATA_UDMA4:
 255                         for (i = 24; i >= 0; i -= 8)
 256                                 if (((u >> (i & 16)) & 8) &&
 257                                     ((u >> i) & 0x20) &&
 258                                      (((u >> i) & 7) < 2)) {
 259                                         /*
 260                                          * 2x PCI clock and
 261                                          * UDMA w/ < 3T/cycle
 262                                          */
 263                                         vdev->via_80w |= (1 << (1 - (i >> 4)));
 264                                 }
 265                         break;
 266
 267                 case ATA_UDMA5:
 268                         for (i = 24; i >= 0; i -= 8)
 269                                 if (((u >> i) & 0x10) ||
 270                                     (((u >> i) & 0x20) &&
 271                                      (((u >> i) & 7) < 4))) {
 272                                         /* BIOS 80-wire bit or
 273                                          * UDMA w/ < 60ns/cycle
 274                                          */
 275                                         vdev->via_80w |= (1 << (1 - (i >> 4)));
 276                                 }
 277                         break;
 278
 279                 case ATA_UDMA6:
 280                         for (i = 24; i >= 0; i -= 8)
 281                                 if (((u >> i) & 0x10) ||
 282                                     (((u >> i) & 0x20) &&
 283                                      (((u >> i) & 7) < 6))) {
 284                                         /* BIOS 80-wire bit or
 285                                          * UDMA w/ < 60ns/cycle
 286                                          */
 287                                         vdev->via_80w |= (1 << (1 - (i >> 4)));
 288                                 }
 289                         break;
 290         }
 291 }
 292
 293 /**
 294  *      init_chipset_via82cxxx  -       initialization handler
 295  *      @dev: PCI device
 296  *      @name: Name of interface
 297  *
 298  *      The initialization callback. Here we determine the IDE chip type
 299  *      and initialize its drive independent registers.
 300  */
 301
 302 static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const char *name)
 303 {
 304         struct pci_dev *isa = NULL;
 305         struct via82cxxx_dev *vdev;
 306         struct via_isa_bridge *via_config;
 307         u8 t, v;
 308         u32 u;
 309
 310         vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
 311         if (!vdev) {
 312                 printk(KERN_ERR "VP_IDE: out of memory :(\n");
 313                 return -ENOMEM;
 314         }
 315         pci_set_drvdata(dev, vdev);
 316
 317         /*
 318          * Find the ISA bridge to see how good the IDE is.
 319          */
 320         vdev->via_config = via_config = via_config_find(&isa);
 321
 322         /* We checked this earlier so if it fails here deeep badness
 323            is involved */
 324
 325         BUG_ON(!via_config->id);
 326
 327         /*
 328          * Detect cable and configure Clk66
 329          */
 330         pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
 331
 332         via_cable_detect(vdev, u);
 333
 334         if (via_config->udma_mask == ATA_UDMA4) {
 335                 /* Enable Clk66 */
 336                 pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
 337         } else if (via_config->flags & VIA_BAD_CLK66) {
 338                 /* Would cause trouble on 596a and 686 */
 339                 pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
 340         }
 341
 342         /*
 343          * Check whether interfaces are enabled.
 344          */
 345
 346         pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
 347
 348         /*
 349          * Set up FIFO sizes and thresholds.
 350          */
 351
 352         pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
 353
 354         /* Disable PREQ# till DDACK# */
 355         if (via_config->flags & VIA_BAD_PREQ) {
 356                 /* Would crash on 586b rev 41 */
 357                 t &= 0x7f;
 358         }
 359
 360         /* Fix FIFO split between channels */
 361         if (via_config->flags & VIA_SET_FIFO) {
 362                 t &= (t & 0x9f);
 363                 switch (v & 3) {
 364                         case 2: t |= 0x00; break;       /* 16 on primary */
 365                         case 1: t |= 0x60; break;       /* 16 on secondary */
 366                         case 3: t |= 0x20; break;       /* 8 pri 8 sec */
 367                 }
 368         }
 369
 370         pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
 371
 372         /*
 373          * Determine system bus clock.
 374          */
 375
 376         via_clock = system_bus_clock() * 1000;
 377
 378         switch (via_clock) {
 379                 case 33000: via_clock = 33333; break;
 380                 case 37000: via_clock = 37500; break;
 381                 case 41000: via_clock = 41666; break;
 382         }
 383
 384         if (via_clock < 20000 || via_clock > 50000) {
 385                 printk(KERN_WARNING "VP_IDE: User given PCI clock speed "
 386                         "impossible (%d), using 33 MHz instead.\n", via_clock);
 387                 printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want "
 388                         "to assume 80-wire cable.\n");
 389                 via_clock = 33333;
 390         }
 391
 392         /*
 393          * Print the boot message.
 394          */
 395
 396         printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %sDMA%s "
 397                 "controller on pci%s\n",
 398                 via_config->name, isa->revision,
 399                 via_config->udma_mask ? "U" : "MW",
 400                 via_dma[via_config->udma_mask ?
 401                         (fls(via_config->udma_mask) - 1) : 0],
 402                 pci_name(dev));
 403
 404         pci_dev_put(isa);
 405         return 0;
 406 }
 407
 408 /*
 409  *      Cable special cases
 410  */
 411
 412 static const struct dmi_system_id cable_dmi_table[] = {
 413         {
 414                 .ident = "Acer Ferrari 3400",
 415                 .matches = {
 416                         DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
 417                         DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
 418                 },
 419         },
 420         { }
 421 };
 422
 423 static int via_cable_override(struct pci_dev *pdev)
 424 {
 425         /* Systems by DMI */
 426         if (dmi_check_system(cable_dmi_table))
 427                 return 1;
 428
 429         /* Arima W730-K8/Targa Visionary 811/... */
 430         if (pdev->subsystem_vendor == 0x161F &&
 431             pdev->subsystem_device == 0x2032)
 432                 return 1;
 433
 434         return 0;
 435 }
 436
 437 static u8 __devinit via82cxxx_cable_detect(ide_hwif_t *hwif)
 438 {
 439         struct pci_dev *pdev = hwif->pci_dev;
 440         struct via82cxxx_dev *vdev = pci_get_drvdata(pdev);
 441
 442         if (via_cable_override(pdev))
 443                 return ATA_CBL_PATA40_SHORT;
 444
 445         if ((vdev->via_80w >> hwif->channel) & 1)
 446                 return ATA_CBL_PATA80;
 447         else
 448                 return ATA_CBL_PATA40;
 449 }
 450
 451 static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
 452 {
 453         struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
 454         int i;
 455
 456         hwif->autodma = 0;
 457
 458         hwif->set_pio_mode = &via_set_pio_mode;
 459         hwif->speedproc = &via_set_drive;
 460
 461
 462 #ifdef CONFIG_PPC_CHRP
 463         if(machine_is(chrp) && _chrp_type == _CHRP_Pegasos) {
 464                 hwif->irq = hwif->channel ? 15 : 14;
 465         }
 466 #endif
 467
 468         for (i = 0; i < 2; i++) {
 469                 hwif->drives[i].io_32bit = 1;
 470                 hwif->drives[i].unmask = (vdev->via_config->flags & VIA_NO_UNMASK) ? 0 : 1;
 471                 hwif->drives[i].autotune = 1;
 472                 hwif->drives[i].dn = hwif->channel * 2 + i;
 473         }
 474
 475         if (!hwif->dma_base)
 476                 return;
 477
 478         hwif->atapi_dma = 1;
 479
 480         hwif->ultra_mask = vdev->via_config->udma_mask;
 481         hwif->mwdma_mask = 0x07;
 482         hwif->swdma_mask = 0x07;
 483
 484         if (hwif->cbl != ATA_CBL_PATA40_SHORT)
 485                 hwif->cbl = via82cxxx_cable_detect(hwif);
 486
 487         hwif->ide_dma_check = &via82cxxx_ide_dma_check;
 488         if (!noautodma)
 489                 hwif->autodma = 1;
 490         hwif->drives[0].autodma = hwif->autodma;
 491         hwif->drives[1].autodma = hwif->autodma;
 492 }
 493
 494 static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = {
 495         {       /* 0 */
 496                 .name           = "VP_IDE",
 497                 .init_chipset   = init_chipset_via82cxxx,
 498                 .init_hwif      = init_hwif_via82cxxx,
 499                 .autodma        = NOAUTODMA,
 500                 .enablebits     = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
 501                 .bootable       = ON_BOARD,
 502                 .host_flags     = IDE_HFLAG_PIO_NO_BLACKLIST
 503                                 | IDE_HFLAG_PIO_NO_DOWNGRADE,
 504                 .pio_mask       = ATA_PIO5,
 505         },{     /* 1 */
 506                 .name           = "VP_IDE",
 507                 .init_chipset   = init_chipset_via82cxxx,
 508                 .init_hwif      = init_hwif_via82cxxx,
 509                 .autodma        = AUTODMA,
 510                 .enablebits     = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
 511                 .bootable       = ON_BOARD,
 512                 .host_flags     = IDE_HFLAG_PIO_NO_BLACKLIST
 513                                 | IDE_HFLAG_PIO_NO_DOWNGRADE,
 514                 .pio_mask       = ATA_PIO5,
 515         }
 516 };
 517
 518 static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
 519 {
 520         struct pci_dev *isa = NULL;
 521         struct via_isa_bridge *via_config;
 522         /*
 523          * Find the ISA bridge and check we know what it is.
 524          */
 525         via_config = via_config_find(&isa);
 526         pci_dev_put(isa);
 527         if (!via_config->id) {
 528                 printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
 529                 return -ENODEV;
 530         }
 531         return ide_setup_pci_device(dev, &via82cxxx_chipsets[id->driver_data]);
 532 }
 533
 534 static struct pci_device_id via_pci_tbl[] = {
 535         { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 536         { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
 537         { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_6410,     PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
 538         { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_SATA_EIDE,     PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
 539         { 0, },
 540 };
 541 MODULE_DEVICE_TABLE(pci, via_pci_tbl);
 542
 543 static struct pci_driver driver = {
 544         .name           = "VIA_IDE",
 545         .id_table       = via_pci_tbl,
 546         .probe          = via_init_one,
 547 };
 548
 549 static int __init via_ide_init(void)
 550 {
 551         return ide_pci_register_driver(&driver);
 552 }
 553
 554 module_init(via_ide_init);
 555
 556 MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
 557 MODULE_DESCRIPTION("PCI driver module for VIA IDE");
 558 MODULE_LICENSE("GPL");