2 * intel_idle.c - native hardware idle loop for modern Intel processors
4 * Copyright (c) 2010, Intel Corporation.
5 * Len Brown <len.brown@intel.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
22 * intel_idle is a cpuidle driver that loads on specific Intel processors
23 * in lieu of the legacy ACPI processor_idle driver. The intent is to
24 * make Linux more efficient on these processors, as intel_idle knows
25 * more than ACPI, as well as make Linux more immune to ACPI BIOS bugs.
31 * All CPUs have same idle states as boot CPU
33 * Chipset BM_STS (bus master status) bit is a NOP
34 * for preventing entry into deep C-stats
40 * The driver currently initializes for_each_online_cpu() upon modprobe.
41 * It it unaware of subsequent processors hot-added to the system.
42 * This means that if you boot with maxcpus=n and later online
43 * processors above n, those processors will use C1 only.
45 * ACPI has a .suspend hack to turn off deep c-statees during suspend
46 * to avoid complications with the lapic timer workaround.
47 * Have not seen issues with suspend, but may need same workaround here.
49 * There is currently no kernel-based automatic probing/loading mechanism
50 * if the driver is built as a module.
53 /* un-comment DEBUG to enable pr_debug() statements */
56 #include <linux/kernel.h>
57 #include <linux/cpuidle.h>
58 #include <linux/clockchips.h>
59 #include <linux/hrtimer.h> /* ktime_get_real() */
60 #include <trace/events/power.h>
61 #include <linux/sched.h>
62 #include <linux/notifier.h>
63 #include <linux/cpu.h>
64 #include <asm/mwait.h>
67 #define INTEL_IDLE_VERSION "0.4"
68 #define PREFIX "intel_idle: "
70 static struct cpuidle_driver intel_idle_driver
= {
74 /* intel_idle.max_cstate=0 disables driver */
75 static int max_cstate
= MWAIT_MAX_NUM_CSTATES
- 1;
77 static unsigned int mwait_substates
;
79 #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF
80 /* Reliable LAPIC Timer States, bit 1 for C1 etc. */
81 static unsigned int lapic_timer_reliable_states
= (1 << 1); /* Default to only C1 */
83 static struct cpuidle_device __percpu
*intel_idle_cpuidle_devices
;
84 static int intel_idle(struct cpuidle_device
*dev
, int index
);
86 static struct cpuidle_state
*cpuidle_state_table
;
89 * Hardware C-state auto-demotion may not always be optimal.
90 * Indicate which enable bits to clear here.
92 static unsigned long long auto_demotion_disable_flags
;
95 * Set this flag for states where the HW flushes the TLB for us
96 * and so we don't need cross-calls to keep it consistent.
97 * If this flag is set, SW flushes the TLB, so even if the
98 * HW doesn't do the flushing, this flag is safe to use.
100 #define CPUIDLE_FLAG_TLB_FLUSHED 0x10000
103 * States are indexed by the cstate number,
104 * which is also the index into the MWAIT hint array.
105 * Thus C0 is a dummy.
107 static struct cpuidle_state nehalem_cstates
[MWAIT_MAX_NUM_CSTATES
] = {
111 .desc
= "MWAIT 0x00",
112 .driver_data
= (void *) 0x00,
113 .flags
= CPUIDLE_FLAG_TIME_VALID
,
115 .target_residency
= 6,
116 .enter
= &intel_idle
},
119 .desc
= "MWAIT 0x10",
120 .driver_data
= (void *) 0x10,
121 .flags
= CPUIDLE_FLAG_TIME_VALID
| CPUIDLE_FLAG_TLB_FLUSHED
,
123 .target_residency
= 80,
124 .enter
= &intel_idle
},
127 .desc
= "MWAIT 0x20",
128 .driver_data
= (void *) 0x20,
129 .flags
= CPUIDLE_FLAG_TIME_VALID
| CPUIDLE_FLAG_TLB_FLUSHED
,
131 .target_residency
= 800,
132 .enter
= &intel_idle
},
135 static struct cpuidle_state snb_cstates
[MWAIT_MAX_NUM_CSTATES
] = {
139 .desc
= "MWAIT 0x00",
140 .driver_data
= (void *) 0x00,
141 .flags
= CPUIDLE_FLAG_TIME_VALID
,
143 .target_residency
= 1,
144 .enter
= &intel_idle
},
147 .desc
= "MWAIT 0x10",
148 .driver_data
= (void *) 0x10,
149 .flags
= CPUIDLE_FLAG_TIME_VALID
| CPUIDLE_FLAG_TLB_FLUSHED
,
151 .target_residency
= 211,
152 .enter
= &intel_idle
},
155 .desc
= "MWAIT 0x20",
156 .driver_data
= (void *) 0x20,
157 .flags
= CPUIDLE_FLAG_TIME_VALID
| CPUIDLE_FLAG_TLB_FLUSHED
,
159 .target_residency
= 345,
160 .enter
= &intel_idle
},
163 .desc
= "MWAIT 0x30",
164 .driver_data
= (void *) 0x30,
165 .flags
= CPUIDLE_FLAG_TIME_VALID
| CPUIDLE_FLAG_TLB_FLUSHED
,
167 .target_residency
= 345,
168 .enter
= &intel_idle
},
171 static struct cpuidle_state atom_cstates
[MWAIT_MAX_NUM_CSTATES
] = {
175 .desc
= "MWAIT 0x00",
176 .driver_data
= (void *) 0x00,
177 .flags
= CPUIDLE_FLAG_TIME_VALID
,
179 .target_residency
= 4,
180 .enter
= &intel_idle
},
183 .desc
= "MWAIT 0x10",
184 .driver_data
= (void *) 0x10,
185 .flags
= CPUIDLE_FLAG_TIME_VALID
,
187 .target_residency
= 80,
188 .enter
= &intel_idle
},
192 .desc
= "MWAIT 0x30",
193 .driver_data
= (void *) 0x30,
194 .flags
= CPUIDLE_FLAG_TIME_VALID
| CPUIDLE_FLAG_TLB_FLUSHED
,
196 .target_residency
= 400,
197 .enter
= &intel_idle
},
201 .desc
= "MWAIT 0x52",
202 .driver_data
= (void *) 0x52,
203 .flags
= CPUIDLE_FLAG_TIME_VALID
| CPUIDLE_FLAG_TLB_FLUSHED
,
205 .target_residency
= 560,
206 .enter
= &intel_idle
},
211 * @dev: cpuidle_device
212 * @index: index of cpuidle state
215 static int intel_idle(struct cpuidle_device
*dev
, int index
)
217 unsigned long ecx
= 1; /* break on interrupt flag */
218 struct cpuidle_state
*state
= &dev
->states
[index
];
219 unsigned long eax
= (unsigned long)cpuidle_get_statedata(state
);
221 ktime_t kt_before
, kt_after
;
223 int cpu
= smp_processor_id();
225 cstate
= (((eax
) >> MWAIT_SUBSTATE_SIZE
) & MWAIT_CSTATE_MASK
) + 1;
230 * leave_mm() to avoid costly and often unnecessary wakeups
231 * for flushing the user TLB's associated with the active mm.
233 if (state
->flags
& CPUIDLE_FLAG_TLB_FLUSHED
)
236 if (!(lapic_timer_reliable_states
& (1 << (cstate
))))
237 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER
, &cpu
);
239 kt_before
= ktime_get_real();
241 stop_critical_timings();
242 if (!need_resched()) {
244 __monitor((void *)¤t_thread_info()->flags
, 0, 0);
250 start_critical_timings();
252 kt_after
= ktime_get_real();
253 usec_delta
= ktime_to_us(ktime_sub(kt_after
, kt_before
));
257 if (!(lapic_timer_reliable_states
& (1 << (cstate
))))
258 clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT
, &cpu
);
260 /* Update cpuidle counters */
261 dev
->last_residency
= (int)usec_delta
;
266 static void __setup_broadcast_timer(void *arg
)
268 unsigned long reason
= (unsigned long)arg
;
269 int cpu
= smp_processor_id();
272 CLOCK_EVT_NOTIFY_BROADCAST_ON
: CLOCK_EVT_NOTIFY_BROADCAST_OFF
;
274 clockevents_notify(reason
, &cpu
);
277 static int setup_broadcast_cpuhp_notify(struct notifier_block
*n
,
278 unsigned long action
, void *hcpu
)
280 int hotcpu
= (unsigned long)hcpu
;
282 switch (action
& 0xf) {
284 smp_call_function_single(hotcpu
, __setup_broadcast_timer
,
291 static struct notifier_block setup_broadcast_notifier
= {
292 .notifier_call
= setup_broadcast_cpuhp_notify
,
295 static void auto_demotion_disable(void *dummy
)
297 unsigned long long msr_bits
;
299 rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL
, msr_bits
);
300 msr_bits
&= ~auto_demotion_disable_flags
;
301 wrmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL
, msr_bits
);
307 static int intel_idle_probe(void)
309 unsigned int eax
, ebx
, ecx
;
311 if (max_cstate
== 0) {
312 pr_debug(PREFIX
"disabled\n");
316 if (boot_cpu_data
.x86_vendor
!= X86_VENDOR_INTEL
)
319 if (!boot_cpu_has(X86_FEATURE_MWAIT
))
322 if (boot_cpu_data
.cpuid_level
< CPUID_MWAIT_LEAF
)
325 cpuid(CPUID_MWAIT_LEAF
, &eax
, &ebx
, &ecx
, &mwait_substates
);
327 if (!(ecx
& CPUID5_ECX_EXTENSIONS_SUPPORTED
) ||
328 !(ecx
& CPUID5_ECX_INTERRUPT_BREAK
))
331 pr_debug(PREFIX
"MWAIT substates: 0x%x\n", mwait_substates
);
334 if (boot_cpu_data
.x86
!= 6) /* family 6 */
337 switch (boot_cpu_data
.x86_model
) {
339 case 0x1A: /* Core i7, Xeon 5500 series */
340 case 0x1E: /* Core i7 and i5 Processor - Lynnfield Jasper Forest */
341 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
342 case 0x2E: /* Nehalem-EX Xeon */
343 case 0x2F: /* Westmere-EX Xeon */
344 case 0x25: /* Westmere */
345 case 0x2C: /* Westmere */
346 cpuidle_state_table
= nehalem_cstates
;
347 auto_demotion_disable_flags
=
348 (NHM_C1_AUTO_DEMOTE
| NHM_C3_AUTO_DEMOTE
);
351 case 0x1C: /* 28 - Atom Processor */
352 cpuidle_state_table
= atom_cstates
;
355 case 0x26: /* 38 - Lincroft Atom Processor */
356 cpuidle_state_table
= atom_cstates
;
357 auto_demotion_disable_flags
= ATM_LNC_C6_AUTO_DEMOTE
;
361 case 0x2D: /* SNB Xeon */
362 cpuidle_state_table
= snb_cstates
;
366 pr_debug(PREFIX
"does not run on family %d model %d\n",
367 boot_cpu_data
.x86
, boot_cpu_data
.x86_model
);
371 if (boot_cpu_has(X86_FEATURE_ARAT
)) /* Always Reliable APIC Timer */
372 lapic_timer_reliable_states
= LAPIC_TIMER_ALWAYS_RELIABLE
;
374 smp_call_function(__setup_broadcast_timer
, (void *)true, 1);
375 register_cpu_notifier(&setup_broadcast_notifier
);
378 pr_debug(PREFIX
"v" INTEL_IDLE_VERSION
379 " model 0x%X\n", boot_cpu_data
.x86_model
);
381 pr_debug(PREFIX
"lapic_timer_reliable_states 0x%x\n",
382 lapic_timer_reliable_states
);
387 * intel_idle_cpuidle_devices_uninit()
388 * unregister, free cpuidle_devices
390 static void intel_idle_cpuidle_devices_uninit(void)
393 struct cpuidle_device
*dev
;
395 for_each_online_cpu(i
) {
396 dev
= per_cpu_ptr(intel_idle_cpuidle_devices
, i
);
397 cpuidle_unregister_device(dev
);
400 free_percpu(intel_idle_cpuidle_devices
);
404 * intel_idle_cpuidle_devices_init()
405 * allocate, initialize, register cpuidle_devices
407 static int intel_idle_cpuidle_devices_init(void)
410 struct cpuidle_device
*dev
;
412 intel_idle_cpuidle_devices
= alloc_percpu(struct cpuidle_device
);
413 if (intel_idle_cpuidle_devices
== NULL
)
416 for_each_online_cpu(i
) {
417 dev
= per_cpu_ptr(intel_idle_cpuidle_devices
, i
);
419 dev
->state_count
= 1;
421 for (cstate
= 1; cstate
< MWAIT_MAX_NUM_CSTATES
; ++cstate
) {
424 if (cstate
> max_cstate
) {
425 printk(PREFIX
"max_cstate %d reached\n",
430 /* does the state exist in CPUID.MWAIT? */
431 num_substates
= (mwait_substates
>> ((cstate
) * 4))
432 & MWAIT_SUBSTATE_MASK
;
433 if (num_substates
== 0)
435 /* is the state not enabled? */
436 if (cpuidle_state_table
[cstate
].enter
== NULL
) {
437 /* does the driver not know about the state? */
438 if (*cpuidle_state_table
[cstate
].name
== '\0')
439 pr_debug(PREFIX
"unaware of model 0x%x"
441 " contact lenb@kernel.org",
442 boot_cpu_data
.x86_model
, cstate
);
447 !boot_cpu_has(X86_FEATURE_NONSTOP_TSC
))
448 mark_tsc_unstable("TSC halts in idle"
449 " states deeper than C2");
451 dev
->states
[dev
->state_count
] = /* structure copy */
452 cpuidle_state_table
[cstate
];
454 dev
->state_count
+= 1;
458 if (cpuidle_register_device(dev
)) {
459 pr_debug(PREFIX
"cpuidle_register_device %d failed!\n",
461 intel_idle_cpuidle_devices_uninit();
465 if (auto_demotion_disable_flags
)
466 smp_call_function(auto_demotion_disable
, NULL
, 1);
472 static int __init
intel_idle_init(void)
476 /* Do not load intel_idle at all for now if idle= is passed */
477 if (boot_option_idle_override
!= IDLE_NO_OVERRIDE
)
480 retval
= intel_idle_probe();
484 retval
= cpuidle_register_driver(&intel_idle_driver
);
486 printk(KERN_DEBUG PREFIX
"intel_idle yielding to %s",
487 cpuidle_get_driver()->name
);
491 retval
= intel_idle_cpuidle_devices_init();
493 cpuidle_unregister_driver(&intel_idle_driver
);
500 static void __exit
intel_idle_exit(void)
502 intel_idle_cpuidle_devices_uninit();
503 cpuidle_unregister_driver(&intel_idle_driver
);
505 if (lapic_timer_reliable_states
!= LAPIC_TIMER_ALWAYS_RELIABLE
) {
506 smp_call_function(__setup_broadcast_timer
, (void *)false, 1);
507 unregister_cpu_notifier(&setup_broadcast_notifier
);
513 module_init(intel_idle_init
);
514 module_exit(intel_idle_exit
);
516 module_param(max_cstate
, int, 0444);
518 MODULE_AUTHOR("Len Brown <len.brown@intel.com>");
519 MODULE_DESCRIPTION("Cpuidle driver for Intel Hardware v" INTEL_IDLE_VERSION
);
520 MODULE_LICENSE("GPL");