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[deliverable/linux.git] / drivers / iio / adc / at91_adc.c
1 /*
2 * Driver for the ADC present in the Atmel AT91 evaluation boards.
3 *
4 * Copyright 2011 Free Electrons
5 *
6 * Licensed under the GPLv2 or later.
7 */
8
9 #include <linux/bitmap.h>
10 #include <linux/bitops.h>
11 #include <linux/clk.h>
12 #include <linux/err.h>
13 #include <linux/io.h>
14 #include <linux/interrupt.h>
15 #include <linux/jiffies.h>
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/of.h>
19 #include <linux/of_device.h>
20 #include <linux/platform_device.h>
21 #include <linux/sched.h>
22 #include <linux/slab.h>
23 #include <linux/wait.h>
24
25 #include <linux/platform_data/at91_adc.h>
26
27 #include <linux/iio/iio.h>
28 #include <linux/iio/buffer.h>
29 #include <linux/iio/trigger.h>
30 #include <linux/iio/trigger_consumer.h>
31 #include <linux/iio/triggered_buffer.h>
32
33 #include <mach/at91_adc.h>
34
35 #define AT91_ADC_CHAN(st, ch) \
36 (st->registers->channel_base + (ch * 4))
37 #define at91_adc_readl(st, reg) \
38 (readl_relaxed(st->reg_base + reg))
39 #define at91_adc_writel(st, reg, val) \
40 (writel_relaxed(val, st->reg_base + reg))
41
42 struct at91_adc_caps {
43 struct at91_adc_reg_desc registers;
44 };
45
46 struct at91_adc_state {
47 struct clk *adc_clk;
48 u16 *buffer;
49 unsigned long channels_mask;
50 struct clk *clk;
51 bool done;
52 int irq;
53 u16 last_value;
54 struct mutex lock;
55 u8 num_channels;
56 void __iomem *reg_base;
57 struct at91_adc_reg_desc *registers;
58 u8 startup_time;
59 u8 sample_hold_time;
60 bool sleep_mode;
61 struct iio_trigger **trig;
62 struct at91_adc_trigger *trigger_list;
63 u32 trigger_number;
64 bool use_external;
65 u32 vref_mv;
66 u32 res; /* resolution used for convertions */
67 bool low_res; /* the resolution corresponds to the lowest one */
68 wait_queue_head_t wq_data_avail;
69 struct at91_adc_caps *caps;
70 };
71
72 static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
73 {
74 struct iio_poll_func *pf = p;
75 struct iio_dev *idev = pf->indio_dev;
76 struct at91_adc_state *st = iio_priv(idev);
77 int i, j = 0;
78
79 for (i = 0; i < idev->masklength; i++) {
80 if (!test_bit(i, idev->active_scan_mask))
81 continue;
82 st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, i));
83 j++;
84 }
85
86 iio_push_to_buffers_with_timestamp(idev, st->buffer, pf->timestamp);
87
88 iio_trigger_notify_done(idev->trig);
89
90 /* Needed to ACK the DRDY interruption */
91 at91_adc_readl(st, AT91_ADC_LCDR);
92
93 enable_irq(st->irq);
94
95 return IRQ_HANDLED;
96 }
97
98 static irqreturn_t at91_adc_eoc_trigger(int irq, void *private)
99 {
100 struct iio_dev *idev = private;
101 struct at91_adc_state *st = iio_priv(idev);
102 u32 status = at91_adc_readl(st, st->registers->status_register);
103
104 if (!(status & st->registers->drdy_mask))
105 return IRQ_HANDLED;
106
107 if (iio_buffer_enabled(idev)) {
108 disable_irq_nosync(irq);
109 iio_trigger_poll(idev->trig, iio_get_time_ns());
110 } else {
111 st->last_value = at91_adc_readl(st, AT91_ADC_LCDR);
112 st->done = true;
113 wake_up_interruptible(&st->wq_data_avail);
114 }
115
116 return IRQ_HANDLED;
117 }
118
119 static int at91_adc_channel_init(struct iio_dev *idev)
120 {
121 struct at91_adc_state *st = iio_priv(idev);
122 struct iio_chan_spec *chan_array, *timestamp;
123 int bit, idx = 0;
124
125 idev->num_channels = bitmap_weight(&st->channels_mask,
126 st->num_channels) + 1;
127
128 chan_array = devm_kzalloc(&idev->dev,
129 ((idev->num_channels + 1) *
130 sizeof(struct iio_chan_spec)),
131 GFP_KERNEL);
132
133 if (!chan_array)
134 return -ENOMEM;
135
136 for_each_set_bit(bit, &st->channels_mask, st->num_channels) {
137 struct iio_chan_spec *chan = chan_array + idx;
138
139 chan->type = IIO_VOLTAGE;
140 chan->indexed = 1;
141 chan->channel = bit;
142 chan->scan_index = idx;
143 chan->scan_type.sign = 'u';
144 chan->scan_type.realbits = st->res;
145 chan->scan_type.storagebits = 16;
146 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
147 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
148 idx++;
149 }
150 timestamp = chan_array + idx;
151
152 timestamp->type = IIO_TIMESTAMP;
153 timestamp->channel = -1;
154 timestamp->scan_index = idx;
155 timestamp->scan_type.sign = 's';
156 timestamp->scan_type.realbits = 64;
157 timestamp->scan_type.storagebits = 64;
158
159 idev->channels = chan_array;
160 return idev->num_channels;
161 }
162
163 static u8 at91_adc_get_trigger_value_by_name(struct iio_dev *idev,
164 struct at91_adc_trigger *triggers,
165 const char *trigger_name)
166 {
167 struct at91_adc_state *st = iio_priv(idev);
168 u8 value = 0;
169 int i;
170
171 for (i = 0; i < st->trigger_number; i++) {
172 char *name = kasprintf(GFP_KERNEL,
173 "%s-dev%d-%s",
174 idev->name,
175 idev->id,
176 triggers[i].name);
177 if (!name)
178 return -ENOMEM;
179
180 if (strcmp(trigger_name, name) == 0) {
181 value = triggers[i].value;
182 kfree(name);
183 break;
184 }
185
186 kfree(name);
187 }
188
189 return value;
190 }
191
192 static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
193 {
194 struct iio_dev *idev = iio_trigger_get_drvdata(trig);
195 struct at91_adc_state *st = iio_priv(idev);
196 struct iio_buffer *buffer = idev->buffer;
197 struct at91_adc_reg_desc *reg = st->registers;
198 u32 status = at91_adc_readl(st, reg->trigger_register);
199 u8 value;
200 u8 bit;
201
202 value = at91_adc_get_trigger_value_by_name(idev,
203 st->trigger_list,
204 idev->trig->name);
205 if (value == 0)
206 return -EINVAL;
207
208 if (state) {
209 st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);
210 if (st->buffer == NULL)
211 return -ENOMEM;
212
213 at91_adc_writel(st, reg->trigger_register,
214 status | value);
215
216 for_each_set_bit(bit, buffer->scan_mask,
217 st->num_channels) {
218 struct iio_chan_spec const *chan = idev->channels + bit;
219 at91_adc_writel(st, AT91_ADC_CHER,
220 AT91_ADC_CH(chan->channel));
221 }
222
223 at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask);
224
225 } else {
226 at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask);
227
228 at91_adc_writel(st, reg->trigger_register,
229 status & ~value);
230
231 for_each_set_bit(bit, buffer->scan_mask,
232 st->num_channels) {
233 struct iio_chan_spec const *chan = idev->channels + bit;
234 at91_adc_writel(st, AT91_ADC_CHDR,
235 AT91_ADC_CH(chan->channel));
236 }
237 kfree(st->buffer);
238 }
239
240 return 0;
241 }
242
243 static const struct iio_trigger_ops at91_adc_trigger_ops = {
244 .owner = THIS_MODULE,
245 .set_trigger_state = &at91_adc_configure_trigger,
246 };
247
248 static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev,
249 struct at91_adc_trigger *trigger)
250 {
251 struct iio_trigger *trig;
252 int ret;
253
254 trig = iio_trigger_alloc("%s-dev%d-%s", idev->name,
255 idev->id, trigger->name);
256 if (trig == NULL)
257 return NULL;
258
259 trig->dev.parent = idev->dev.parent;
260 iio_trigger_set_drvdata(trig, idev);
261 trig->ops = &at91_adc_trigger_ops;
262
263 ret = iio_trigger_register(trig);
264 if (ret)
265 return NULL;
266
267 return trig;
268 }
269
270 static int at91_adc_trigger_init(struct iio_dev *idev)
271 {
272 struct at91_adc_state *st = iio_priv(idev);
273 int i, ret;
274
275 st->trig = devm_kzalloc(&idev->dev,
276 st->trigger_number * sizeof(*st->trig),
277 GFP_KERNEL);
278
279 if (st->trig == NULL) {
280 ret = -ENOMEM;
281 goto error_ret;
282 }
283
284 for (i = 0; i < st->trigger_number; i++) {
285 if (st->trigger_list[i].is_external && !(st->use_external))
286 continue;
287
288 st->trig[i] = at91_adc_allocate_trigger(idev,
289 st->trigger_list + i);
290 if (st->trig[i] == NULL) {
291 dev_err(&idev->dev,
292 "Could not allocate trigger %d\n", i);
293 ret = -ENOMEM;
294 goto error_trigger;
295 }
296 }
297
298 return 0;
299
300 error_trigger:
301 for (i--; i >= 0; i--) {
302 iio_trigger_unregister(st->trig[i]);
303 iio_trigger_free(st->trig[i]);
304 }
305 error_ret:
306 return ret;
307 }
308
309 static void at91_adc_trigger_remove(struct iio_dev *idev)
310 {
311 struct at91_adc_state *st = iio_priv(idev);
312 int i;
313
314 for (i = 0; i < st->trigger_number; i++) {
315 iio_trigger_unregister(st->trig[i]);
316 iio_trigger_free(st->trig[i]);
317 }
318 }
319
320 static int at91_adc_buffer_init(struct iio_dev *idev)
321 {
322 return iio_triggered_buffer_setup(idev, &iio_pollfunc_store_time,
323 &at91_adc_trigger_handler, NULL);
324 }
325
326 static void at91_adc_buffer_remove(struct iio_dev *idev)
327 {
328 iio_triggered_buffer_cleanup(idev);
329 }
330
331 static int at91_adc_read_raw(struct iio_dev *idev,
332 struct iio_chan_spec const *chan,
333 int *val, int *val2, long mask)
334 {
335 struct at91_adc_state *st = iio_priv(idev);
336 int ret;
337
338 switch (mask) {
339 case IIO_CHAN_INFO_RAW:
340 mutex_lock(&st->lock);
341
342 at91_adc_writel(st, AT91_ADC_CHER,
343 AT91_ADC_CH(chan->channel));
344 at91_adc_writel(st, AT91_ADC_IER, st->registers->drdy_mask);
345 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);
346
347 ret = wait_event_interruptible_timeout(st->wq_data_avail,
348 st->done,
349 msecs_to_jiffies(1000));
350 if (ret == 0)
351 ret = -ETIMEDOUT;
352 if (ret < 0) {
353 mutex_unlock(&st->lock);
354 return ret;
355 }
356
357 *val = st->last_value;
358
359 at91_adc_writel(st, AT91_ADC_CHDR,
360 AT91_ADC_CH(chan->channel));
361 at91_adc_writel(st, AT91_ADC_IDR, st->registers->drdy_mask);
362
363 st->last_value = 0;
364 st->done = false;
365 mutex_unlock(&st->lock);
366 return IIO_VAL_INT;
367
368 case IIO_CHAN_INFO_SCALE:
369 *val = st->vref_mv;
370 *val2 = chan->scan_type.realbits;
371 return IIO_VAL_FRACTIONAL_LOG2;
372 default:
373 break;
374 }
375 return -EINVAL;
376 }
377
378 static int at91_adc_of_get_resolution(struct at91_adc_state *st,
379 struct platform_device *pdev)
380 {
381 struct iio_dev *idev = iio_priv_to_dev(st);
382 struct device_node *np = pdev->dev.of_node;
383 int count, i, ret = 0;
384 char *res_name, *s;
385 u32 *resolutions;
386
387 count = of_property_count_strings(np, "atmel,adc-res-names");
388 if (count < 2) {
389 dev_err(&idev->dev, "You must specified at least two resolution names for "
390 "adc-res-names property in the DT\n");
391 return count;
392 }
393
394 resolutions = kmalloc(count * sizeof(*resolutions), GFP_KERNEL);
395 if (!resolutions)
396 return -ENOMEM;
397
398 if (of_property_read_u32_array(np, "atmel,adc-res", resolutions, count)) {
399 dev_err(&idev->dev, "Missing adc-res property in the DT.\n");
400 ret = -ENODEV;
401 goto ret;
402 }
403
404 if (of_property_read_string(np, "atmel,adc-use-res", (const char **)&res_name))
405 res_name = "highres";
406
407 for (i = 0; i < count; i++) {
408 if (of_property_read_string_index(np, "atmel,adc-res-names", i, (const char **)&s))
409 continue;
410
411 if (strcmp(res_name, s))
412 continue;
413
414 st->res = resolutions[i];
415 if (!strcmp(res_name, "lowres"))
416 st->low_res = true;
417 else
418 st->low_res = false;
419
420 dev_info(&idev->dev, "Resolution used: %u bits\n", st->res);
421 goto ret;
422 }
423
424 dev_err(&idev->dev, "There is no resolution for %s\n", res_name);
425
426 ret:
427 kfree(resolutions);
428 return ret;
429 }
430
431 static const struct of_device_id at91_adc_dt_ids[];
432
433 static int at91_adc_probe_dt(struct at91_adc_state *st,
434 struct platform_device *pdev)
435 {
436 struct iio_dev *idev = iio_priv_to_dev(st);
437 struct device_node *node = pdev->dev.of_node;
438 struct device_node *trig_node;
439 int i = 0, ret;
440 u32 prop;
441
442 if (!node)
443 return -EINVAL;
444
445 st->caps = (struct at91_adc_caps *)
446 of_match_device(at91_adc_dt_ids, &pdev->dev)->data;
447
448 st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");
449
450 if (of_property_read_u32(node, "atmel,adc-channels-used", &prop)) {
451 dev_err(&idev->dev, "Missing adc-channels-used property in the DT.\n");
452 ret = -EINVAL;
453 goto error_ret;
454 }
455 st->channels_mask = prop;
456
457 if (of_property_read_u32(node, "atmel,adc-num-channels", &prop)) {
458 dev_err(&idev->dev, "Missing adc-num-channels property in the DT.\n");
459 ret = -EINVAL;
460 goto error_ret;
461 }
462 st->num_channels = prop;
463
464 st->sleep_mode = of_property_read_bool(node, "atmel,adc-sleep-mode");
465
466 if (of_property_read_u32(node, "atmel,adc-startup-time", &prop)) {
467 dev_err(&idev->dev, "Missing adc-startup-time property in the DT.\n");
468 ret = -EINVAL;
469 goto error_ret;
470 }
471 st->startup_time = prop;
472
473 prop = 0;
474 of_property_read_u32(node, "atmel,adc-sample-hold-time", &prop);
475 st->sample_hold_time = prop;
476
477 if (of_property_read_u32(node, "atmel,adc-vref", &prop)) {
478 dev_err(&idev->dev, "Missing adc-vref property in the DT.\n");
479 ret = -EINVAL;
480 goto error_ret;
481 }
482 st->vref_mv = prop;
483
484 ret = at91_adc_of_get_resolution(st, pdev);
485 if (ret)
486 goto error_ret;
487
488 st->registers = &st->caps->registers;
489 st->trigger_number = of_get_child_count(node);
490 st->trigger_list = devm_kzalloc(&idev->dev, st->trigger_number *
491 sizeof(struct at91_adc_trigger),
492 GFP_KERNEL);
493 if (!st->trigger_list) {
494 dev_err(&idev->dev, "Could not allocate trigger list memory.\n");
495 ret = -ENOMEM;
496 goto error_ret;
497 }
498
499 for_each_child_of_node(node, trig_node) {
500 struct at91_adc_trigger *trig = st->trigger_list + i;
501 const char *name;
502
503 if (of_property_read_string(trig_node, "trigger-name", &name)) {
504 dev_err(&idev->dev, "Missing trigger-name property in the DT.\n");
505 ret = -EINVAL;
506 goto error_ret;
507 }
508 trig->name = name;
509
510 if (of_property_read_u32(trig_node, "trigger-value", &prop)) {
511 dev_err(&idev->dev, "Missing trigger-value property in the DT.\n");
512 ret = -EINVAL;
513 goto error_ret;
514 }
515 trig->value = prop;
516 trig->is_external = of_property_read_bool(trig_node, "trigger-external");
517 i++;
518 }
519
520 return 0;
521
522 error_ret:
523 return ret;
524 }
525
526 static int at91_adc_probe_pdata(struct at91_adc_state *st,
527 struct platform_device *pdev)
528 {
529 struct at91_adc_data *pdata = pdev->dev.platform_data;
530
531 if (!pdata)
532 return -EINVAL;
533
534 st->use_external = pdata->use_external_triggers;
535 st->vref_mv = pdata->vref;
536 st->channels_mask = pdata->channels_used;
537 st->num_channels = pdata->num_channels;
538 st->startup_time = pdata->startup_time;
539 st->trigger_number = pdata->trigger_number;
540 st->trigger_list = pdata->trigger_list;
541 st->registers = pdata->registers;
542
543 return 0;
544 }
545
546 static const struct iio_info at91_adc_info = {
547 .driver_module = THIS_MODULE,
548 .read_raw = &at91_adc_read_raw,
549 };
550
551 static int at91_adc_probe(struct platform_device *pdev)
552 {
553 unsigned int prsc, mstrclk, ticks, adc_clk, adc_clk_khz, shtim;
554 int ret;
555 struct iio_dev *idev;
556 struct at91_adc_state *st;
557 struct resource *res;
558 u32 reg;
559
560 idev = devm_iio_device_alloc(&pdev->dev, sizeof(struct at91_adc_state));
561 if (!idev)
562 return -ENOMEM;
563
564 st = iio_priv(idev);
565
566 if (pdev->dev.of_node)
567 ret = at91_adc_probe_dt(st, pdev);
568 else
569 ret = at91_adc_probe_pdata(st, pdev);
570
571 if (ret) {
572 dev_err(&pdev->dev, "No platform data available.\n");
573 return -EINVAL;
574 }
575
576 platform_set_drvdata(pdev, idev);
577
578 idev->dev.parent = &pdev->dev;
579 idev->name = dev_name(&pdev->dev);
580 idev->modes = INDIO_DIRECT_MODE;
581 idev->info = &at91_adc_info;
582
583 st->irq = platform_get_irq(pdev, 0);
584 if (st->irq < 0) {
585 dev_err(&pdev->dev, "No IRQ ID is designated\n");
586 return -ENODEV;
587 }
588
589 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
590
591 st->reg_base = devm_ioremap_resource(&pdev->dev, res);
592 if (IS_ERR(st->reg_base)) {
593 return PTR_ERR(st->reg_base);
594 }
595
596 /*
597 * Disable all IRQs before setting up the handler
598 */
599 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);
600 at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);
601 ret = request_irq(st->irq,
602 at91_adc_eoc_trigger,
603 0,
604 pdev->dev.driver->name,
605 idev);
606 if (ret) {
607 dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
608 return ret;
609 }
610
611 st->clk = devm_clk_get(&pdev->dev, "adc_clk");
612 if (IS_ERR(st->clk)) {
613 dev_err(&pdev->dev, "Failed to get the clock.\n");
614 ret = PTR_ERR(st->clk);
615 goto error_free_irq;
616 }
617
618 ret = clk_prepare_enable(st->clk);
619 if (ret) {
620 dev_err(&pdev->dev,
621 "Could not prepare or enable the clock.\n");
622 goto error_free_irq;
623 }
624
625 st->adc_clk = devm_clk_get(&pdev->dev, "adc_op_clk");
626 if (IS_ERR(st->adc_clk)) {
627 dev_err(&pdev->dev, "Failed to get the ADC clock.\n");
628 ret = PTR_ERR(st->adc_clk);
629 goto error_disable_clk;
630 }
631
632 ret = clk_prepare_enable(st->adc_clk);
633 if (ret) {
634 dev_err(&pdev->dev,
635 "Could not prepare or enable the ADC clock.\n");
636 goto error_disable_clk;
637 }
638
639 /*
640 * Prescaler rate computation using the formula from the Atmel's
641 * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being
642 * specified by the electrical characteristics of the board.
643 */
644 mstrclk = clk_get_rate(st->clk);
645 adc_clk = clk_get_rate(st->adc_clk);
646 adc_clk_khz = adc_clk / 1000;
647 prsc = (mstrclk / (2 * adc_clk)) - 1;
648
649 if (!st->startup_time) {
650 dev_err(&pdev->dev, "No startup time available.\n");
651 ret = -EINVAL;
652 goto error_disable_adc_clk;
653 }
654
655 /*
656 * Number of ticks needed to cover the startup time of the ADC as
657 * defined in the electrical characteristics of the board, divided by 8.
658 * The formula thus is : Startup Time = (ticks + 1) * 8 / ADC Clock
659 */
660 ticks = round_up((st->startup_time * adc_clk_khz /
661 1000) - 1, 8) / 8;
662 /*
663 * a minimal Sample and Hold Time is necessary for the ADC to guarantee
664 * the best converted final value between two channels selection
665 * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock
666 */
667 shtim = round_up((st->sample_hold_time * adc_clk_khz /
668 1000) - 1, 1);
669
670 reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;
671 reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;
672 if (st->low_res)
673 reg |= AT91_ADC_LOWRES;
674 if (st->sleep_mode)
675 reg |= AT91_ADC_SLEEP;
676 reg |= AT91_ADC_SHTIM_(shtim) & AT91_ADC_SHTIM;
677 at91_adc_writel(st, AT91_ADC_MR, reg);
678
679 /* Setup the ADC channels available on the board */
680 ret = at91_adc_channel_init(idev);
681 if (ret < 0) {
682 dev_err(&pdev->dev, "Couldn't initialize the channels.\n");
683 goto error_disable_adc_clk;
684 }
685
686 init_waitqueue_head(&st->wq_data_avail);
687 mutex_init(&st->lock);
688
689 ret = at91_adc_buffer_init(idev);
690 if (ret < 0) {
691 dev_err(&pdev->dev, "Couldn't initialize the buffer.\n");
692 goto error_disable_adc_clk;
693 }
694
695 ret = at91_adc_trigger_init(idev);
696 if (ret < 0) {
697 dev_err(&pdev->dev, "Couldn't setup the triggers.\n");
698 goto error_unregister_buffer;
699 }
700
701 ret = iio_device_register(idev);
702 if (ret < 0) {
703 dev_err(&pdev->dev, "Couldn't register the device.\n");
704 goto error_remove_triggers;
705 }
706
707 return 0;
708
709 error_remove_triggers:
710 at91_adc_trigger_remove(idev);
711 error_unregister_buffer:
712 at91_adc_buffer_remove(idev);
713 error_disable_adc_clk:
714 clk_disable_unprepare(st->adc_clk);
715 error_disable_clk:
716 clk_disable_unprepare(st->clk);
717 error_free_irq:
718 free_irq(st->irq, idev);
719 return ret;
720 }
721
722 static int at91_adc_remove(struct platform_device *pdev)
723 {
724 struct iio_dev *idev = platform_get_drvdata(pdev);
725 struct at91_adc_state *st = iio_priv(idev);
726
727 iio_device_unregister(idev);
728 at91_adc_trigger_remove(idev);
729 at91_adc_buffer_remove(idev);
730 clk_disable_unprepare(st->adc_clk);
731 clk_disable_unprepare(st->clk);
732 free_irq(st->irq, idev);
733
734 return 0;
735 }
736
737 #ifdef CONFIG_OF
738 static struct at91_adc_caps at91sam9260_caps = {
739 .registers = {
740 .channel_base = AT91_ADC_CHR(0),
741 .drdy_mask = AT91_ADC_DRDY,
742 .status_register = AT91_ADC_SR,
743 .trigger_register = AT91_ADC_TRGR_9260,
744 .mr_prescal_mask = AT91_ADC_PRESCAL_9260,
745 .mr_startup_mask = AT91_ADC_STARTUP_9260,
746 },
747 };
748
749 static struct at91_adc_caps at91sam9g45_caps = {
750 .registers = {
751 .channel_base = AT91_ADC_CHR(0),
752 .drdy_mask = AT91_ADC_DRDY,
753 .status_register = AT91_ADC_SR,
754 .trigger_register = AT91_ADC_TRGR_9G45,
755 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
756 .mr_startup_mask = AT91_ADC_STARTUP_9G45,
757 },
758 };
759
760 static struct at91_adc_caps at91sam9x5_caps = {
761 .registers = {
762 .channel_base = AT91_ADC_CDR0_9X5,
763 .drdy_mask = AT91_ADC_SR_DRDY_9X5,
764 .status_register = AT91_ADC_SR_9X5,
765 .trigger_register = AT91_ADC_TRGR_9X5,
766 /* prescal mask is same as 9G45 */
767 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
768 .mr_startup_mask = AT91_ADC_STARTUP_9X5,
769 },
770 };
771
772 static const struct of_device_id at91_adc_dt_ids[] = {
773 { .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps },
774 { .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps },
775 { .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps },
776 {},
777 };
778 MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);
779 #endif
780
781 static struct platform_driver at91_adc_driver = {
782 .probe = at91_adc_probe,
783 .remove = at91_adc_remove,
784 .driver = {
785 .name = "at91_adc",
786 .of_match_table = of_match_ptr(at91_adc_dt_ids),
787 },
788 };
789
790 module_platform_driver(at91_adc_driver);
791
792 MODULE_LICENSE("GPL");
793 MODULE_DESCRIPTION("Atmel AT91 ADC Driver");
794 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
Linux kernel - Deliverables
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