2 * mcp3422.c - driver for the Microchip mcp3422/3/4/6/7/8 chip family
4 * Copyright (C) 2013, Angelo Compagnucci
5 * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
7 * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
8 * http://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf
10 * This driver exports the value of analog input voltage to sysfs, the
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
19 #include <linux/err.h>
20 #include <linux/i2c.h>
21 #include <linux/module.h>
22 #include <linux/delay.h>
23 #include <linux/sysfs.h>
26 #include <linux/iio/iio.h>
27 #include <linux/iio/sysfs.h>
30 #define MCP3422_CHANNEL_MASK 0x60
31 #define MCP3422_PGA_MASK 0x03
32 #define MCP3422_SRATE_MASK 0x0C
33 #define MCP3422_SRATE_240 0x0
34 #define MCP3422_SRATE_60 0x1
35 #define MCP3422_SRATE_15 0x2
36 #define MCP3422_SRATE_3 0x3
37 #define MCP3422_PGA_1 0
38 #define MCP3422_PGA_2 1
39 #define MCP3422_PGA_4 2
40 #define MCP3422_PGA_8 3
41 #define MCP3422_CONT_SAMPLING 0x10
43 #define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5)
44 #define MCP3422_PGA(config) ((config) & MCP3422_PGA_MASK)
45 #define MCP3422_SAMPLE_RATE(config) (((config) & MCP3422_SRATE_MASK) >> 2)
47 #define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
48 #define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
49 #define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
51 #define MCP3422_CHAN(_index) \
53 .type = IIO_VOLTAGE, \
56 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
57 | BIT(IIO_CHAN_INFO_SCALE), \
58 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
61 /* LSB is in nV to eliminate floating point */
62 static const u32 rates_to_lsb
[] = {1000000, 250000, 62500, 15625};
65 * scales calculated as:
66 * rates_to_lsb[sample_rate] / (1 << pga);
70 static const int mcp3422_scales
[4][4] = {
71 { 1000000, 250000, 62500, 15625 },
72 { 500000 , 125000, 31250, 7812 },
73 { 250000 , 62500 , 15625, 3906 },
74 { 125000 , 31250 , 7812 , 1953 } };
76 /* Constant msleep times for data acquisitions */
77 static const int mcp3422_read_times
[4] = {
78 [MCP3422_SRATE_240
] = 1000 / 240,
79 [MCP3422_SRATE_60
] = 1000 / 60,
80 [MCP3422_SRATE_15
] = 1000 / 15,
81 [MCP3422_SRATE_3
] = 1000 / 3 };
83 /* sample rates to integer conversion table */
84 static const int mcp3422_sample_rates
[4] = {
85 [MCP3422_SRATE_240
] = 240,
86 [MCP3422_SRATE_60
] = 60,
87 [MCP3422_SRATE_15
] = 15,
88 [MCP3422_SRATE_3
] = 3 };
90 /* sample rates to sign extension table */
91 static const int mcp3422_sign_extend
[4] = {
92 [MCP3422_SRATE_240
] = 11,
93 [MCP3422_SRATE_60
] = 13,
94 [MCP3422_SRATE_15
] = 15,
95 [MCP3422_SRATE_3
] = 17 };
97 /* Client data (each client gets its own) */
99 struct i2c_client
*i2c
;
106 static int mcp3422_update_config(struct mcp3422
*adc
, u8 newconfig
)
110 mutex_lock(&adc
->lock
);
112 ret
= i2c_master_send(adc
->i2c
, &newconfig
, 1);
114 adc
->config
= newconfig
;
118 mutex_unlock(&adc
->lock
);
123 static int mcp3422_read(struct mcp3422
*adc
, int *value
, u8
*config
)
126 u8 sample_rate
= MCP3422_SAMPLE_RATE(adc
->config
);
127 u8 buf
[4] = {0, 0, 0, 0};
130 if (sample_rate
== MCP3422_SRATE_3
) {
131 ret
= i2c_master_recv(adc
->i2c
, buf
, 4);
132 temp
= buf
[0] << 16 | buf
[1] << 8 | buf
[2];
135 ret
= i2c_master_recv(adc
->i2c
, buf
, 3);
136 temp
= buf
[0] << 8 | buf
[1];
140 *value
= sign_extend32(temp
, mcp3422_sign_extend
[sample_rate
]);
145 static int mcp3422_read_channel(struct mcp3422
*adc
,
146 struct iio_chan_spec
const *channel
, int *value
)
150 u8 req_channel
= channel
->channel
;
152 if (req_channel
!= MCP3422_CHANNEL(adc
->config
)) {
153 config
= adc
->config
;
154 config
&= ~MCP3422_CHANNEL_MASK
;
155 config
|= MCP3422_CHANNEL_VALUE(req_channel
);
156 config
&= ~MCP3422_PGA_MASK
;
157 config
|= MCP3422_PGA_VALUE(adc
->pga
[req_channel
]);
158 ret
= mcp3422_update_config(adc
, config
);
161 msleep(mcp3422_read_times
[MCP3422_SAMPLE_RATE(adc
->config
)]);
164 return mcp3422_read(adc
, value
, &config
);
167 static int mcp3422_read_raw(struct iio_dev
*iio
,
168 struct iio_chan_spec
const *channel
, int *val1
,
169 int *val2
, long mask
)
171 struct mcp3422
*adc
= iio_priv(iio
);
174 u8 sample_rate
= MCP3422_SAMPLE_RATE(adc
->config
);
175 u8 pga
= MCP3422_PGA(adc
->config
);
178 case IIO_CHAN_INFO_RAW
:
179 err
= mcp3422_read_channel(adc
, channel
, val1
);
184 case IIO_CHAN_INFO_SCALE
:
187 *val2
= mcp3422_scales
[sample_rate
][pga
];
188 return IIO_VAL_INT_PLUS_NANO
;
190 case IIO_CHAN_INFO_SAMP_FREQ
:
191 *val1
= mcp3422_sample_rates
[MCP3422_SAMPLE_RATE(adc
->config
)];
201 static int mcp3422_write_raw(struct iio_dev
*iio
,
202 struct iio_chan_spec
const *channel
, int val1
,
205 struct mcp3422
*adc
= iio_priv(iio
);
207 u8 config
= adc
->config
;
208 u8 req_channel
= channel
->channel
;
209 u8 sample_rate
= MCP3422_SAMPLE_RATE(config
);
213 case IIO_CHAN_INFO_SCALE
:
217 for (i
= 0; i
< ARRAY_SIZE(mcp3422_scales
[0]); i
++) {
218 if (val2
== mcp3422_scales
[sample_rate
][i
]) {
219 adc
->pga
[req_channel
] = i
;
221 config
&= ~MCP3422_CHANNEL_MASK
;
222 config
|= MCP3422_CHANNEL_VALUE(req_channel
);
223 config
&= ~MCP3422_PGA_MASK
;
224 config
|= MCP3422_PGA_VALUE(adc
->pga
[req_channel
]);
226 return mcp3422_update_config(adc
, config
);
231 case IIO_CHAN_INFO_SAMP_FREQ
:
234 temp
= MCP3422_SRATE_240
;
237 temp
= MCP3422_SRATE_60
;
240 temp
= MCP3422_SRATE_15
;
245 temp
= MCP3422_SRATE_3
;
251 config
&= ~MCP3422_CHANNEL_MASK
;
252 config
|= MCP3422_CHANNEL_VALUE(req_channel
);
253 config
&= ~MCP3422_SRATE_MASK
;
254 config
|= MCP3422_SAMPLE_RATE_VALUE(temp
);
256 return mcp3422_update_config(adc
, config
);
265 static int mcp3422_write_raw_get_fmt(struct iio_dev
*indio_dev
,
266 struct iio_chan_spec
const *chan
, long mask
)
269 case IIO_CHAN_INFO_SCALE
:
270 return IIO_VAL_INT_PLUS_NANO
;
271 case IIO_CHAN_INFO_SAMP_FREQ
:
272 return IIO_VAL_INT_PLUS_MICRO
;
278 static ssize_t
mcp3422_show_samp_freqs(struct device
*dev
,
279 struct device_attribute
*attr
, char *buf
)
281 struct mcp3422
*adc
= iio_priv(dev_to_iio_dev(dev
));
284 return sprintf(buf
, "240 60 15\n");
286 return sprintf(buf
, "240 60 15 3\n");
289 static ssize_t
mcp3422_show_scales(struct device
*dev
,
290 struct device_attribute
*attr
, char *buf
)
292 struct mcp3422
*adc
= iio_priv(dev_to_iio_dev(dev
));
293 u8 sample_rate
= MCP3422_SAMPLE_RATE(adc
->config
);
295 return sprintf(buf
, "0.%09u 0.%09u 0.%09u 0.%09u\n",
296 mcp3422_scales
[sample_rate
][0],
297 mcp3422_scales
[sample_rate
][1],
298 mcp3422_scales
[sample_rate
][2],
299 mcp3422_scales
[sample_rate
][3]);
302 static IIO_DEVICE_ATTR(sampling_frequency_available
, S_IRUGO
,
303 mcp3422_show_samp_freqs
, NULL
, 0);
304 static IIO_DEVICE_ATTR(in_voltage_scale_available
, S_IRUGO
,
305 mcp3422_show_scales
, NULL
, 0);
307 static struct attribute
*mcp3422_attributes
[] = {
308 &iio_dev_attr_sampling_frequency_available
.dev_attr
.attr
,
309 &iio_dev_attr_in_voltage_scale_available
.dev_attr
.attr
,
313 static const struct attribute_group mcp3422_attribute_group
= {
314 .attrs
= mcp3422_attributes
,
317 static const struct iio_chan_spec mcp3422_channels
[] = {
322 static const struct iio_chan_spec mcp3424_channels
[] = {
329 static const struct iio_info mcp3422_info
= {
330 .read_raw
= mcp3422_read_raw
,
331 .write_raw
= mcp3422_write_raw
,
332 .write_raw_get_fmt
= mcp3422_write_raw_get_fmt
,
333 .attrs
= &mcp3422_attribute_group
,
334 .driver_module
= THIS_MODULE
,
337 static int mcp3422_probe(struct i2c_client
*client
,
338 const struct i2c_device_id
*id
)
340 struct iio_dev
*indio_dev
;
345 if (!i2c_check_functionality(client
->adapter
, I2C_FUNC_I2C
))
348 indio_dev
= devm_iio_device_alloc(&client
->dev
, sizeof(*adc
));
352 adc
= iio_priv(indio_dev
);
354 adc
->id
= (u8
)(id
->driver_data
);
356 mutex_init(&adc
->lock
);
358 indio_dev
->dev
.parent
= &client
->dev
;
359 indio_dev
->name
= dev_name(&client
->dev
);
360 indio_dev
->modes
= INDIO_DIRECT_MODE
;
361 indio_dev
->info
= &mcp3422_info
;
368 indio_dev
->channels
= mcp3422_channels
;
369 indio_dev
->num_channels
= ARRAY_SIZE(mcp3422_channels
);
373 indio_dev
->channels
= mcp3424_channels
;
374 indio_dev
->num_channels
= ARRAY_SIZE(mcp3424_channels
);
378 /* meaningful default configuration */
379 config
= (MCP3422_CONT_SAMPLING
380 | MCP3422_CHANNEL_VALUE(1)
381 | MCP3422_PGA_VALUE(MCP3422_PGA_1
)
382 | MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240
));
383 mcp3422_update_config(adc
, config
);
385 err
= devm_iio_device_register(&client
->dev
, indio_dev
);
389 i2c_set_clientdata(client
, indio_dev
);
394 static const struct i2c_device_id mcp3422_id
[] = {
403 MODULE_DEVICE_TABLE(i2c
, mcp3422_id
);
406 static const struct of_device_id mcp3422_of_match
[] = {
407 { .compatible
= "mcp3422" },
410 MODULE_DEVICE_TABLE(of
, mcp3422_of_match
);
413 static struct i2c_driver mcp3422_driver
= {
416 .owner
= THIS_MODULE
,
417 .of_match_table
= of_match_ptr(mcp3422_of_match
),
419 .probe
= mcp3422_probe
,
420 .id_table
= mcp3422_id
,
422 module_i2c_driver(mcp3422_driver
);
424 MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
425 MODULE_DESCRIPTION("Microchip mcp3422/3/4/6/7/8 driver");
426 MODULE_LICENSE("GPL v2");