net: hns: delete redundancy ring enable operations
[deliverable/linux.git] / drivers / iio / light / opt3001.c
1 /**
2 * opt3001.c - Texas Instruments OPT3001 Light Sensor
3 *
4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Author: Andreas Dannenberg <dannenberg@ti.com>
7 * Based on previous work from: Felipe Balbi <balbi@ti.com>
8 *
9 * This program is free software: you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 of the License
11 * as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * more details.
17 */
18
19 #include <linux/bitops.h>
20 #include <linux/delay.h>
21 #include <linux/device.h>
22 #include <linux/i2c.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/mutex.h>
28 #include <linux/slab.h>
29 #include <linux/types.h>
30
31 #include <linux/iio/events.h>
32 #include <linux/iio/iio.h>
33 #include <linux/iio/sysfs.h>
34
35 #define OPT3001_RESULT 0x00
36 #define OPT3001_CONFIGURATION 0x01
37 #define OPT3001_LOW_LIMIT 0x02
38 #define OPT3001_HIGH_LIMIT 0x03
39 #define OPT3001_MANUFACTURER_ID 0x7e
40 #define OPT3001_DEVICE_ID 0x7f
41
42 #define OPT3001_CONFIGURATION_RN_MASK (0xf << 12)
43 #define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12)
44
45 #define OPT3001_CONFIGURATION_CT BIT(11)
46
47 #define OPT3001_CONFIGURATION_M_MASK (3 << 9)
48 #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9)
49 #define OPT3001_CONFIGURATION_M_SINGLE (1 << 9)
50 #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */
51
52 #define OPT3001_CONFIGURATION_OVF BIT(8)
53 #define OPT3001_CONFIGURATION_CRF BIT(7)
54 #define OPT3001_CONFIGURATION_FH BIT(6)
55 #define OPT3001_CONFIGURATION_FL BIT(5)
56 #define OPT3001_CONFIGURATION_L BIT(4)
57 #define OPT3001_CONFIGURATION_POL BIT(3)
58 #define OPT3001_CONFIGURATION_ME BIT(2)
59
60 #define OPT3001_CONFIGURATION_FC_MASK (3 << 0)
61
62 /* The end-of-conversion enable is located in the low-limit register */
63 #define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000
64
65 #define OPT3001_REG_EXPONENT(n) ((n) >> 12)
66 #define OPT3001_REG_MANTISSA(n) ((n) & 0xfff)
67
68 #define OPT3001_INT_TIME_LONG 800000
69 #define OPT3001_INT_TIME_SHORT 100000
70
71 /*
72 * Time to wait for conversion result to be ready. The device datasheet
73 * sect. 6.5 states results are ready after total integration time plus 3ms.
74 * This results in worst-case max values of 113ms or 883ms, respectively.
75 * Add some slack to be on the safe side.
76 */
77 #define OPT3001_RESULT_READY_SHORT 150
78 #define OPT3001_RESULT_READY_LONG 1000
79
80 struct opt3001 {
81 struct i2c_client *client;
82 struct device *dev;
83
84 struct mutex lock;
85 bool ok_to_ignore_lock;
86 bool result_ready;
87 wait_queue_head_t result_ready_queue;
88 u16 result;
89
90 u32 int_time;
91 u32 mode;
92
93 u16 high_thresh_mantissa;
94 u16 low_thresh_mantissa;
95
96 u8 high_thresh_exp;
97 u8 low_thresh_exp;
98
99 bool use_irq;
100 };
101
102 struct opt3001_scale {
103 int val;
104 int val2;
105 };
106
107 static const struct opt3001_scale opt3001_scales[] = {
108 {
109 .val = 40,
110 .val2 = 950000,
111 },
112 {
113 .val = 81,
114 .val2 = 900000,
115 },
116 {
117 .val = 163,
118 .val2 = 800000,
119 },
120 {
121 .val = 327,
122 .val2 = 600000,
123 },
124 {
125 .val = 655,
126 .val2 = 200000,
127 },
128 {
129 .val = 1310,
130 .val2 = 400000,
131 },
132 {
133 .val = 2620,
134 .val2 = 800000,
135 },
136 {
137 .val = 5241,
138 .val2 = 600000,
139 },
140 {
141 .val = 10483,
142 .val2 = 200000,
143 },
144 {
145 .val = 20966,
146 .val2 = 400000,
147 },
148 {
149 .val = 83865,
150 .val2 = 600000,
151 },
152 };
153
154 static int opt3001_find_scale(const struct opt3001 *opt, int val,
155 int val2, u8 *exponent)
156 {
157 int i;
158
159 for (i = 0; i < ARRAY_SIZE(opt3001_scales); i++) {
160 const struct opt3001_scale *scale = &opt3001_scales[i];
161
162 /*
163 * Combine the integer and micro parts for comparison
164 * purposes. Use milli lux precision to avoid 32-bit integer
165 * overflows.
166 */
167 if ((val * 1000 + val2 / 1000) <=
168 (scale->val * 1000 + scale->val2 / 1000)) {
169 *exponent = i;
170 return 0;
171 }
172 }
173
174 return -EINVAL;
175 }
176
177 static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent,
178 u16 mantissa, int *val, int *val2)
179 {
180 int lux;
181
182 lux = 10 * (mantissa << exponent);
183 *val = lux / 1000;
184 *val2 = (lux - (*val * 1000)) * 1000;
185 }
186
187 static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode)
188 {
189 *reg &= ~OPT3001_CONFIGURATION_M_MASK;
190 *reg |= mode;
191 opt->mode = mode;
192 }
193
194 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8");
195
196 static struct attribute *opt3001_attributes[] = {
197 &iio_const_attr_integration_time_available.dev_attr.attr,
198 NULL
199 };
200
201 static const struct attribute_group opt3001_attribute_group = {
202 .attrs = opt3001_attributes,
203 };
204
205 static const struct iio_event_spec opt3001_event_spec[] = {
206 {
207 .type = IIO_EV_TYPE_THRESH,
208 .dir = IIO_EV_DIR_RISING,
209 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
210 BIT(IIO_EV_INFO_ENABLE),
211 },
212 {
213 .type = IIO_EV_TYPE_THRESH,
214 .dir = IIO_EV_DIR_FALLING,
215 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
216 BIT(IIO_EV_INFO_ENABLE),
217 },
218 };
219
220 static const struct iio_chan_spec opt3001_channels[] = {
221 {
222 .type = IIO_LIGHT,
223 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
224 BIT(IIO_CHAN_INFO_INT_TIME),
225 .event_spec = opt3001_event_spec,
226 .num_event_specs = ARRAY_SIZE(opt3001_event_spec),
227 },
228 IIO_CHAN_SOFT_TIMESTAMP(1),
229 };
230
231 static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2)
232 {
233 int ret;
234 u16 mantissa;
235 u16 reg;
236 u8 exponent;
237 u16 value;
238 long timeout;
239
240 if (opt->use_irq) {
241 /*
242 * Enable the end-of-conversion interrupt mechanism. Note that
243 * doing so will overwrite the low-level limit value however we
244 * will restore this value later on.
245 */
246 ret = i2c_smbus_write_word_swapped(opt->client,
247 OPT3001_LOW_LIMIT,
248 OPT3001_LOW_LIMIT_EOC_ENABLE);
249 if (ret < 0) {
250 dev_err(opt->dev, "failed to write register %02x\n",
251 OPT3001_LOW_LIMIT);
252 return ret;
253 }
254
255 /* Allow IRQ to access the device despite lock being set */
256 opt->ok_to_ignore_lock = true;
257 }
258
259 /* Reset data-ready indicator flag */
260 opt->result_ready = false;
261
262 /* Configure for single-conversion mode and start a new conversion */
263 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
264 if (ret < 0) {
265 dev_err(opt->dev, "failed to read register %02x\n",
266 OPT3001_CONFIGURATION);
267 goto err;
268 }
269
270 reg = ret;
271 opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SINGLE);
272
273 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
274 reg);
275 if (ret < 0) {
276 dev_err(opt->dev, "failed to write register %02x\n",
277 OPT3001_CONFIGURATION);
278 goto err;
279 }
280
281 if (opt->use_irq) {
282 /* Wait for the IRQ to indicate the conversion is complete */
283 ret = wait_event_timeout(opt->result_ready_queue,
284 opt->result_ready,
285 msecs_to_jiffies(OPT3001_RESULT_READY_LONG));
286 } else {
287 /* Sleep for result ready time */
288 timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ?
289 OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG;
290 msleep(timeout);
291
292 /* Check result ready flag */
293 ret = i2c_smbus_read_word_swapped(opt->client,
294 OPT3001_CONFIGURATION);
295 if (ret < 0) {
296 dev_err(opt->dev, "failed to read register %02x\n",
297 OPT3001_CONFIGURATION);
298 goto err;
299 }
300
301 if (!(ret & OPT3001_CONFIGURATION_CRF)) {
302 ret = -ETIMEDOUT;
303 goto err;
304 }
305
306 /* Obtain value */
307 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
308 if (ret < 0) {
309 dev_err(opt->dev, "failed to read register %02x\n",
310 OPT3001_RESULT);
311 goto err;
312 }
313 opt->result = ret;
314 opt->result_ready = true;
315 }
316
317 err:
318 if (opt->use_irq)
319 /* Disallow IRQ to access the device while lock is active */
320 opt->ok_to_ignore_lock = false;
321
322 if (ret == 0)
323 return -ETIMEDOUT;
324 else if (ret < 0)
325 return ret;
326
327 if (opt->use_irq) {
328 /*
329 * Disable the end-of-conversion interrupt mechanism by
330 * restoring the low-level limit value (clearing
331 * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing
332 * those enable bits would affect the actual limit value due to
333 * bit-overlap and therefore can't be done.
334 */
335 value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa;
336 ret = i2c_smbus_write_word_swapped(opt->client,
337 OPT3001_LOW_LIMIT,
338 value);
339 if (ret < 0) {
340 dev_err(opt->dev, "failed to write register %02x\n",
341 OPT3001_LOW_LIMIT);
342 return ret;
343 }
344 }
345
346 exponent = OPT3001_REG_EXPONENT(opt->result);
347 mantissa = OPT3001_REG_MANTISSA(opt->result);
348
349 opt3001_to_iio_ret(opt, exponent, mantissa, val, val2);
350
351 return IIO_VAL_INT_PLUS_MICRO;
352 }
353
354 static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2)
355 {
356 *val = 0;
357 *val2 = opt->int_time;
358
359 return IIO_VAL_INT_PLUS_MICRO;
360 }
361
362 static int opt3001_set_int_time(struct opt3001 *opt, int time)
363 {
364 int ret;
365 u16 reg;
366
367 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
368 if (ret < 0) {
369 dev_err(opt->dev, "failed to read register %02x\n",
370 OPT3001_CONFIGURATION);
371 return ret;
372 }
373
374 reg = ret;
375
376 switch (time) {
377 case OPT3001_INT_TIME_SHORT:
378 reg &= ~OPT3001_CONFIGURATION_CT;
379 opt->int_time = OPT3001_INT_TIME_SHORT;
380 break;
381 case OPT3001_INT_TIME_LONG:
382 reg |= OPT3001_CONFIGURATION_CT;
383 opt->int_time = OPT3001_INT_TIME_LONG;
384 break;
385 default:
386 return -EINVAL;
387 }
388
389 return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
390 reg);
391 }
392
393 static int opt3001_read_raw(struct iio_dev *iio,
394 struct iio_chan_spec const *chan, int *val, int *val2,
395 long mask)
396 {
397 struct opt3001 *opt = iio_priv(iio);
398 int ret;
399
400 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
401 return -EBUSY;
402
403 if (chan->type != IIO_LIGHT)
404 return -EINVAL;
405
406 mutex_lock(&opt->lock);
407
408 switch (mask) {
409 case IIO_CHAN_INFO_PROCESSED:
410 ret = opt3001_get_lux(opt, val, val2);
411 break;
412 case IIO_CHAN_INFO_INT_TIME:
413 ret = opt3001_get_int_time(opt, val, val2);
414 break;
415 default:
416 ret = -EINVAL;
417 }
418
419 mutex_unlock(&opt->lock);
420
421 return ret;
422 }
423
424 static int opt3001_write_raw(struct iio_dev *iio,
425 struct iio_chan_spec const *chan, int val, int val2,
426 long mask)
427 {
428 struct opt3001 *opt = iio_priv(iio);
429 int ret;
430
431 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
432 return -EBUSY;
433
434 if (chan->type != IIO_LIGHT)
435 return -EINVAL;
436
437 if (mask != IIO_CHAN_INFO_INT_TIME)
438 return -EINVAL;
439
440 if (val != 0)
441 return -EINVAL;
442
443 mutex_lock(&opt->lock);
444 ret = opt3001_set_int_time(opt, val2);
445 mutex_unlock(&opt->lock);
446
447 return ret;
448 }
449
450 static int opt3001_read_event_value(struct iio_dev *iio,
451 const struct iio_chan_spec *chan, enum iio_event_type type,
452 enum iio_event_direction dir, enum iio_event_info info,
453 int *val, int *val2)
454 {
455 struct opt3001 *opt = iio_priv(iio);
456 int ret = IIO_VAL_INT_PLUS_MICRO;
457
458 mutex_lock(&opt->lock);
459
460 switch (dir) {
461 case IIO_EV_DIR_RISING:
462 opt3001_to_iio_ret(opt, opt->high_thresh_exp,
463 opt->high_thresh_mantissa, val, val2);
464 break;
465 case IIO_EV_DIR_FALLING:
466 opt3001_to_iio_ret(opt, opt->low_thresh_exp,
467 opt->low_thresh_mantissa, val, val2);
468 break;
469 default:
470 ret = -EINVAL;
471 }
472
473 mutex_unlock(&opt->lock);
474
475 return ret;
476 }
477
478 static int opt3001_write_event_value(struct iio_dev *iio,
479 const struct iio_chan_spec *chan, enum iio_event_type type,
480 enum iio_event_direction dir, enum iio_event_info info,
481 int val, int val2)
482 {
483 struct opt3001 *opt = iio_priv(iio);
484 int ret;
485
486 u16 mantissa;
487 u16 value;
488 u16 reg;
489
490 u8 exponent;
491
492 if (val < 0)
493 return -EINVAL;
494
495 mutex_lock(&opt->lock);
496
497 ret = opt3001_find_scale(opt, val, val2, &exponent);
498 if (ret < 0) {
499 dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2);
500 goto err;
501 }
502
503 mantissa = (((val * 1000) + (val2 / 1000)) / 10) >> exponent;
504 value = (exponent << 12) | mantissa;
505
506 switch (dir) {
507 case IIO_EV_DIR_RISING:
508 reg = OPT3001_HIGH_LIMIT;
509 opt->high_thresh_mantissa = mantissa;
510 opt->high_thresh_exp = exponent;
511 break;
512 case IIO_EV_DIR_FALLING:
513 reg = OPT3001_LOW_LIMIT;
514 opt->low_thresh_mantissa = mantissa;
515 opt->low_thresh_exp = exponent;
516 break;
517 default:
518 ret = -EINVAL;
519 goto err;
520 }
521
522 ret = i2c_smbus_write_word_swapped(opt->client, reg, value);
523 if (ret < 0) {
524 dev_err(opt->dev, "failed to write register %02x\n", reg);
525 goto err;
526 }
527
528 err:
529 mutex_unlock(&opt->lock);
530
531 return ret;
532 }
533
534 static int opt3001_read_event_config(struct iio_dev *iio,
535 const struct iio_chan_spec *chan, enum iio_event_type type,
536 enum iio_event_direction dir)
537 {
538 struct opt3001 *opt = iio_priv(iio);
539
540 return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS;
541 }
542
543 static int opt3001_write_event_config(struct iio_dev *iio,
544 const struct iio_chan_spec *chan, enum iio_event_type type,
545 enum iio_event_direction dir, int state)
546 {
547 struct opt3001 *opt = iio_priv(iio);
548 int ret;
549 u16 mode;
550 u16 reg;
551
552 if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
553 return 0;
554
555 if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN)
556 return 0;
557
558 mutex_lock(&opt->lock);
559
560 mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS
561 : OPT3001_CONFIGURATION_M_SHUTDOWN;
562
563 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
564 if (ret < 0) {
565 dev_err(opt->dev, "failed to read register %02x\n",
566 OPT3001_CONFIGURATION);
567 goto err;
568 }
569
570 reg = ret;
571 opt3001_set_mode(opt, &reg, mode);
572
573 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
574 reg);
575 if (ret < 0) {
576 dev_err(opt->dev, "failed to write register %02x\n",
577 OPT3001_CONFIGURATION);
578 goto err;
579 }
580
581 err:
582 mutex_unlock(&opt->lock);
583
584 return ret;
585 }
586
587 static const struct iio_info opt3001_info = {
588 .driver_module = THIS_MODULE,
589 .attrs = &opt3001_attribute_group,
590 .read_raw = opt3001_read_raw,
591 .write_raw = opt3001_write_raw,
592 .read_event_value = opt3001_read_event_value,
593 .write_event_value = opt3001_write_event_value,
594 .read_event_config = opt3001_read_event_config,
595 .write_event_config = opt3001_write_event_config,
596 };
597
598 static int opt3001_read_id(struct opt3001 *opt)
599 {
600 char manufacturer[2];
601 u16 device_id;
602 int ret;
603
604 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID);
605 if (ret < 0) {
606 dev_err(opt->dev, "failed to read register %02x\n",
607 OPT3001_MANUFACTURER_ID);
608 return ret;
609 }
610
611 manufacturer[0] = ret >> 8;
612 manufacturer[1] = ret & 0xff;
613
614 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID);
615 if (ret < 0) {
616 dev_err(opt->dev, "failed to read register %02x\n",
617 OPT3001_DEVICE_ID);
618 return ret;
619 }
620
621 device_id = ret;
622
623 dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0],
624 manufacturer[1], device_id);
625
626 return 0;
627 }
628
629 static int opt3001_configure(struct opt3001 *opt)
630 {
631 int ret;
632 u16 reg;
633
634 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
635 if (ret < 0) {
636 dev_err(opt->dev, "failed to read register %02x\n",
637 OPT3001_CONFIGURATION);
638 return ret;
639 }
640
641 reg = ret;
642
643 /* Enable automatic full-scale setting mode */
644 reg &= ~OPT3001_CONFIGURATION_RN_MASK;
645 reg |= OPT3001_CONFIGURATION_RN_AUTO;
646
647 /* Reflect status of the device's integration time setting */
648 if (reg & OPT3001_CONFIGURATION_CT)
649 opt->int_time = OPT3001_INT_TIME_LONG;
650 else
651 opt->int_time = OPT3001_INT_TIME_SHORT;
652
653 /* Ensure device is in shutdown initially */
654 opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SHUTDOWN);
655
656 /* Configure for latched window-style comparison operation */
657 reg |= OPT3001_CONFIGURATION_L;
658 reg &= ~OPT3001_CONFIGURATION_POL;
659 reg &= ~OPT3001_CONFIGURATION_ME;
660 reg &= ~OPT3001_CONFIGURATION_FC_MASK;
661
662 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
663 reg);
664 if (ret < 0) {
665 dev_err(opt->dev, "failed to write register %02x\n",
666 OPT3001_CONFIGURATION);
667 return ret;
668 }
669
670 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT);
671 if (ret < 0) {
672 dev_err(opt->dev, "failed to read register %02x\n",
673 OPT3001_LOW_LIMIT);
674 return ret;
675 }
676
677 opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
678 opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret);
679
680 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT);
681 if (ret < 0) {
682 dev_err(opt->dev, "failed to read register %02x\n",
683 OPT3001_HIGH_LIMIT);
684 return ret;
685 }
686
687 opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
688 opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret);
689
690 return 0;
691 }
692
693 static irqreturn_t opt3001_irq(int irq, void *_iio)
694 {
695 struct iio_dev *iio = _iio;
696 struct opt3001 *opt = iio_priv(iio);
697 int ret;
698
699 if (!opt->ok_to_ignore_lock)
700 mutex_lock(&opt->lock);
701
702 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
703 if (ret < 0) {
704 dev_err(opt->dev, "failed to read register %02x\n",
705 OPT3001_CONFIGURATION);
706 goto out;
707 }
708
709 if ((ret & OPT3001_CONFIGURATION_M_MASK) ==
710 OPT3001_CONFIGURATION_M_CONTINUOUS) {
711 if (ret & OPT3001_CONFIGURATION_FH)
712 iio_push_event(iio,
713 IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
714 IIO_EV_TYPE_THRESH,
715 IIO_EV_DIR_RISING),
716 iio_get_time_ns());
717 if (ret & OPT3001_CONFIGURATION_FL)
718 iio_push_event(iio,
719 IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
720 IIO_EV_TYPE_THRESH,
721 IIO_EV_DIR_FALLING),
722 iio_get_time_ns());
723 } else if (ret & OPT3001_CONFIGURATION_CRF) {
724 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
725 if (ret < 0) {
726 dev_err(opt->dev, "failed to read register %02x\n",
727 OPT3001_RESULT);
728 goto out;
729 }
730 opt->result = ret;
731 opt->result_ready = true;
732 wake_up(&opt->result_ready_queue);
733 }
734
735 out:
736 if (!opt->ok_to_ignore_lock)
737 mutex_unlock(&opt->lock);
738
739 return IRQ_HANDLED;
740 }
741
742 static int opt3001_probe(struct i2c_client *client,
743 const struct i2c_device_id *id)
744 {
745 struct device *dev = &client->dev;
746
747 struct iio_dev *iio;
748 struct opt3001 *opt;
749 int irq = client->irq;
750 int ret;
751
752 iio = devm_iio_device_alloc(dev, sizeof(*opt));
753 if (!iio)
754 return -ENOMEM;
755
756 opt = iio_priv(iio);
757 opt->client = client;
758 opt->dev = dev;
759
760 mutex_init(&opt->lock);
761 init_waitqueue_head(&opt->result_ready_queue);
762 i2c_set_clientdata(client, iio);
763
764 ret = opt3001_read_id(opt);
765 if (ret)
766 return ret;
767
768 ret = opt3001_configure(opt);
769 if (ret)
770 return ret;
771
772 iio->name = client->name;
773 iio->channels = opt3001_channels;
774 iio->num_channels = ARRAY_SIZE(opt3001_channels);
775 iio->dev.parent = dev;
776 iio->modes = INDIO_DIRECT_MODE;
777 iio->info = &opt3001_info;
778
779 ret = devm_iio_device_register(dev, iio);
780 if (ret) {
781 dev_err(dev, "failed to register IIO device\n");
782 return ret;
783 }
784
785 /* Make use of INT pin only if valid IRQ no. is given */
786 if (irq > 0) {
787 ret = request_threaded_irq(irq, NULL, opt3001_irq,
788 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
789 "opt3001", iio);
790 if (ret) {
791 dev_err(dev, "failed to request IRQ #%d\n", irq);
792 return ret;
793 }
794 opt->use_irq = true;
795 } else {
796 dev_dbg(opt->dev, "enabling interrupt-less operation\n");
797 }
798
799 return 0;
800 }
801
802 static int opt3001_remove(struct i2c_client *client)
803 {
804 struct iio_dev *iio = i2c_get_clientdata(client);
805 struct opt3001 *opt = iio_priv(iio);
806 int ret;
807 u16 reg;
808
809 if (opt->use_irq)
810 free_irq(client->irq, iio);
811
812 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
813 if (ret < 0) {
814 dev_err(opt->dev, "failed to read register %02x\n",
815 OPT3001_CONFIGURATION);
816 return ret;
817 }
818
819 reg = ret;
820 opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SHUTDOWN);
821
822 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
823 reg);
824 if (ret < 0) {
825 dev_err(opt->dev, "failed to write register %02x\n",
826 OPT3001_CONFIGURATION);
827 return ret;
828 }
829
830 return 0;
831 }
832
833 static const struct i2c_device_id opt3001_id[] = {
834 { "opt3001", 0 },
835 { } /* Terminating Entry */
836 };
837 MODULE_DEVICE_TABLE(i2c, opt3001_id);
838
839 static const struct of_device_id opt3001_of_match[] = {
840 { .compatible = "ti,opt3001" },
841 { }
842 };
843
844 static struct i2c_driver opt3001_driver = {
845 .probe = opt3001_probe,
846 .remove = opt3001_remove,
847 .id_table = opt3001_id,
848
849 .driver = {
850 .name = "opt3001",
851 .of_match_table = of_match_ptr(opt3001_of_match),
852 },
853 };
854
855 module_i2c_driver(opt3001_driver);
856
857 MODULE_LICENSE("GPL v2");
858 MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>");
859 MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver");
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