Merge tag 'for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford...
[deliverable/linux.git] / drivers / infiniband / core / verbs.c
1 /*
2 * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
3 * Copyright (c) 2004 Infinicon Corporation. All rights reserved.
4 * Copyright (c) 2004 Intel Corporation. All rights reserved.
5 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
6 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
7 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
8 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
9 *
10 * This software is available to you under a choice of one of two
11 * licenses. You may choose to be licensed under the terms of the GNU
12 * General Public License (GPL) Version 2, available from the file
13 * COPYING in the main directory of this source tree, or the
14 * OpenIB.org BSD license below:
15 *
16 * Redistribution and use in source and binary forms, with or
17 * without modification, are permitted provided that the following
18 * conditions are met:
19 *
20 * - Redistributions of source code must retain the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer.
23 *
24 * - Redistributions in binary form must reproduce the above
25 * copyright notice, this list of conditions and the following
26 * disclaimer in the documentation and/or other materials
27 * provided with the distribution.
28 *
29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
33 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * SOFTWARE.
37 */
38
39 #include <linux/errno.h>
40 #include <linux/err.h>
41 #include <linux/export.h>
42 #include <linux/string.h>
43 #include <linux/slab.h>
44 #include <linux/in.h>
45 #include <linux/in6.h>
46 #include <net/addrconf.h>
47
48 #include <rdma/ib_verbs.h>
49 #include <rdma/ib_cache.h>
50 #include <rdma/ib_addr.h>
51 #include <rdma/rw.h>
52
53 #include "core_priv.h"
54
55 static const char * const ib_events[] = {
56 [IB_EVENT_CQ_ERR] = "CQ error",
57 [IB_EVENT_QP_FATAL] = "QP fatal error",
58 [IB_EVENT_QP_REQ_ERR] = "QP request error",
59 [IB_EVENT_QP_ACCESS_ERR] = "QP access error",
60 [IB_EVENT_COMM_EST] = "communication established",
61 [IB_EVENT_SQ_DRAINED] = "send queue drained",
62 [IB_EVENT_PATH_MIG] = "path migration successful",
63 [IB_EVENT_PATH_MIG_ERR] = "path migration error",
64 [IB_EVENT_DEVICE_FATAL] = "device fatal error",
65 [IB_EVENT_PORT_ACTIVE] = "port active",
66 [IB_EVENT_PORT_ERR] = "port error",
67 [IB_EVENT_LID_CHANGE] = "LID change",
68 [IB_EVENT_PKEY_CHANGE] = "P_key change",
69 [IB_EVENT_SM_CHANGE] = "SM change",
70 [IB_EVENT_SRQ_ERR] = "SRQ error",
71 [IB_EVENT_SRQ_LIMIT_REACHED] = "SRQ limit reached",
72 [IB_EVENT_QP_LAST_WQE_REACHED] = "last WQE reached",
73 [IB_EVENT_CLIENT_REREGISTER] = "client reregister",
74 [IB_EVENT_GID_CHANGE] = "GID changed",
75 };
76
77 const char *__attribute_const__ ib_event_msg(enum ib_event_type event)
78 {
79 size_t index = event;
80
81 return (index < ARRAY_SIZE(ib_events) && ib_events[index]) ?
82 ib_events[index] : "unrecognized event";
83 }
84 EXPORT_SYMBOL(ib_event_msg);
85
86 static const char * const wc_statuses[] = {
87 [IB_WC_SUCCESS] = "success",
88 [IB_WC_LOC_LEN_ERR] = "local length error",
89 [IB_WC_LOC_QP_OP_ERR] = "local QP operation error",
90 [IB_WC_LOC_EEC_OP_ERR] = "local EE context operation error",
91 [IB_WC_LOC_PROT_ERR] = "local protection error",
92 [IB_WC_WR_FLUSH_ERR] = "WR flushed",
93 [IB_WC_MW_BIND_ERR] = "memory management operation error",
94 [IB_WC_BAD_RESP_ERR] = "bad response error",
95 [IB_WC_LOC_ACCESS_ERR] = "local access error",
96 [IB_WC_REM_INV_REQ_ERR] = "invalid request error",
97 [IB_WC_REM_ACCESS_ERR] = "remote access error",
98 [IB_WC_REM_OP_ERR] = "remote operation error",
99 [IB_WC_RETRY_EXC_ERR] = "transport retry counter exceeded",
100 [IB_WC_RNR_RETRY_EXC_ERR] = "RNR retry counter exceeded",
101 [IB_WC_LOC_RDD_VIOL_ERR] = "local RDD violation error",
102 [IB_WC_REM_INV_RD_REQ_ERR] = "remote invalid RD request",
103 [IB_WC_REM_ABORT_ERR] = "operation aborted",
104 [IB_WC_INV_EECN_ERR] = "invalid EE context number",
105 [IB_WC_INV_EEC_STATE_ERR] = "invalid EE context state",
106 [IB_WC_FATAL_ERR] = "fatal error",
107 [IB_WC_RESP_TIMEOUT_ERR] = "response timeout error",
108 [IB_WC_GENERAL_ERR] = "general error",
109 };
110
111 const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status)
112 {
113 size_t index = status;
114
115 return (index < ARRAY_SIZE(wc_statuses) && wc_statuses[index]) ?
116 wc_statuses[index] : "unrecognized status";
117 }
118 EXPORT_SYMBOL(ib_wc_status_msg);
119
120 __attribute_const__ int ib_rate_to_mult(enum ib_rate rate)
121 {
122 switch (rate) {
123 case IB_RATE_2_5_GBPS: return 1;
124 case IB_RATE_5_GBPS: return 2;
125 case IB_RATE_10_GBPS: return 4;
126 case IB_RATE_20_GBPS: return 8;
127 case IB_RATE_30_GBPS: return 12;
128 case IB_RATE_40_GBPS: return 16;
129 case IB_RATE_60_GBPS: return 24;
130 case IB_RATE_80_GBPS: return 32;
131 case IB_RATE_120_GBPS: return 48;
132 default: return -1;
133 }
134 }
135 EXPORT_SYMBOL(ib_rate_to_mult);
136
137 __attribute_const__ enum ib_rate mult_to_ib_rate(int mult)
138 {
139 switch (mult) {
140 case 1: return IB_RATE_2_5_GBPS;
141 case 2: return IB_RATE_5_GBPS;
142 case 4: return IB_RATE_10_GBPS;
143 case 8: return IB_RATE_20_GBPS;
144 case 12: return IB_RATE_30_GBPS;
145 case 16: return IB_RATE_40_GBPS;
146 case 24: return IB_RATE_60_GBPS;
147 case 32: return IB_RATE_80_GBPS;
148 case 48: return IB_RATE_120_GBPS;
149 default: return IB_RATE_PORT_CURRENT;
150 }
151 }
152 EXPORT_SYMBOL(mult_to_ib_rate);
153
154 __attribute_const__ int ib_rate_to_mbps(enum ib_rate rate)
155 {
156 switch (rate) {
157 case IB_RATE_2_5_GBPS: return 2500;
158 case IB_RATE_5_GBPS: return 5000;
159 case IB_RATE_10_GBPS: return 10000;
160 case IB_RATE_20_GBPS: return 20000;
161 case IB_RATE_30_GBPS: return 30000;
162 case IB_RATE_40_GBPS: return 40000;
163 case IB_RATE_60_GBPS: return 60000;
164 case IB_RATE_80_GBPS: return 80000;
165 case IB_RATE_120_GBPS: return 120000;
166 case IB_RATE_14_GBPS: return 14062;
167 case IB_RATE_56_GBPS: return 56250;
168 case IB_RATE_112_GBPS: return 112500;
169 case IB_RATE_168_GBPS: return 168750;
170 case IB_RATE_25_GBPS: return 25781;
171 case IB_RATE_100_GBPS: return 103125;
172 case IB_RATE_200_GBPS: return 206250;
173 case IB_RATE_300_GBPS: return 309375;
174 default: return -1;
175 }
176 }
177 EXPORT_SYMBOL(ib_rate_to_mbps);
178
179 __attribute_const__ enum rdma_transport_type
180 rdma_node_get_transport(enum rdma_node_type node_type)
181 {
182 switch (node_type) {
183 case RDMA_NODE_IB_CA:
184 case RDMA_NODE_IB_SWITCH:
185 case RDMA_NODE_IB_ROUTER:
186 return RDMA_TRANSPORT_IB;
187 case RDMA_NODE_RNIC:
188 return RDMA_TRANSPORT_IWARP;
189 case RDMA_NODE_USNIC:
190 return RDMA_TRANSPORT_USNIC;
191 case RDMA_NODE_USNIC_UDP:
192 return RDMA_TRANSPORT_USNIC_UDP;
193 default:
194 BUG();
195 return 0;
196 }
197 }
198 EXPORT_SYMBOL(rdma_node_get_transport);
199
200 enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, u8 port_num)
201 {
202 if (device->get_link_layer)
203 return device->get_link_layer(device, port_num);
204
205 switch (rdma_node_get_transport(device->node_type)) {
206 case RDMA_TRANSPORT_IB:
207 return IB_LINK_LAYER_INFINIBAND;
208 case RDMA_TRANSPORT_IWARP:
209 case RDMA_TRANSPORT_USNIC:
210 case RDMA_TRANSPORT_USNIC_UDP:
211 return IB_LINK_LAYER_ETHERNET;
212 default:
213 return IB_LINK_LAYER_UNSPECIFIED;
214 }
215 }
216 EXPORT_SYMBOL(rdma_port_get_link_layer);
217
218 /* Protection domains */
219
220 /**
221 * ib_alloc_pd - Allocates an unused protection domain.
222 * @device: The device on which to allocate the protection domain.
223 *
224 * A protection domain object provides an association between QPs, shared
225 * receive queues, address handles, memory regions, and memory windows.
226 *
227 * Every PD has a local_dma_lkey which can be used as the lkey value for local
228 * memory operations.
229 */
230 struct ib_pd *ib_alloc_pd(struct ib_device *device)
231 {
232 struct ib_pd *pd;
233
234 pd = device->alloc_pd(device, NULL, NULL);
235 if (IS_ERR(pd))
236 return pd;
237
238 pd->device = device;
239 pd->uobject = NULL;
240 pd->local_mr = NULL;
241 atomic_set(&pd->usecnt, 0);
242
243 if (device->attrs.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY)
244 pd->local_dma_lkey = device->local_dma_lkey;
245 else {
246 struct ib_mr *mr;
247
248 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE);
249 if (IS_ERR(mr)) {
250 ib_dealloc_pd(pd);
251 return (struct ib_pd *)mr;
252 }
253
254 pd->local_mr = mr;
255 pd->local_dma_lkey = pd->local_mr->lkey;
256 }
257 return pd;
258 }
259 EXPORT_SYMBOL(ib_alloc_pd);
260
261 /**
262 * ib_dealloc_pd - Deallocates a protection domain.
263 * @pd: The protection domain to deallocate.
264 *
265 * It is an error to call this function while any resources in the pd still
266 * exist. The caller is responsible to synchronously destroy them and
267 * guarantee no new allocations will happen.
268 */
269 void ib_dealloc_pd(struct ib_pd *pd)
270 {
271 int ret;
272
273 if (pd->local_mr) {
274 ret = ib_dereg_mr(pd->local_mr);
275 WARN_ON(ret);
276 pd->local_mr = NULL;
277 }
278
279 /* uverbs manipulates usecnt with proper locking, while the kabi
280 requires the caller to guarantee we can't race here. */
281 WARN_ON(atomic_read(&pd->usecnt));
282
283 /* Making delalloc_pd a void return is a WIP, no driver should return
284 an error here. */
285 ret = pd->device->dealloc_pd(pd);
286 WARN_ONCE(ret, "Infiniband HW driver failed dealloc_pd");
287 }
288 EXPORT_SYMBOL(ib_dealloc_pd);
289
290 /* Address handles */
291
292 struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr)
293 {
294 struct ib_ah *ah;
295
296 ah = pd->device->create_ah(pd, ah_attr);
297
298 if (!IS_ERR(ah)) {
299 ah->device = pd->device;
300 ah->pd = pd;
301 ah->uobject = NULL;
302 atomic_inc(&pd->usecnt);
303 }
304
305 return ah;
306 }
307 EXPORT_SYMBOL(ib_create_ah);
308
309 static int ib_get_header_version(const union rdma_network_hdr *hdr)
310 {
311 const struct iphdr *ip4h = (struct iphdr *)&hdr->roce4grh;
312 struct iphdr ip4h_checked;
313 const struct ipv6hdr *ip6h = (struct ipv6hdr *)&hdr->ibgrh;
314
315 /* If it's IPv6, the version must be 6, otherwise, the first
316 * 20 bytes (before the IPv4 header) are garbled.
317 */
318 if (ip6h->version != 6)
319 return (ip4h->version == 4) ? 4 : 0;
320 /* version may be 6 or 4 because the first 20 bytes could be garbled */
321
322 /* RoCE v2 requires no options, thus header length
323 * must be 5 words
324 */
325 if (ip4h->ihl != 5)
326 return 6;
327
328 /* Verify checksum.
329 * We can't write on scattered buffers so we need to copy to
330 * temp buffer.
331 */
332 memcpy(&ip4h_checked, ip4h, sizeof(ip4h_checked));
333 ip4h_checked.check = 0;
334 ip4h_checked.check = ip_fast_csum((u8 *)&ip4h_checked, 5);
335 /* if IPv4 header checksum is OK, believe it */
336 if (ip4h->check == ip4h_checked.check)
337 return 4;
338 return 6;
339 }
340
341 static enum rdma_network_type ib_get_net_type_by_grh(struct ib_device *device,
342 u8 port_num,
343 const struct ib_grh *grh)
344 {
345 int grh_version;
346
347 if (rdma_protocol_ib(device, port_num))
348 return RDMA_NETWORK_IB;
349
350 grh_version = ib_get_header_version((union rdma_network_hdr *)grh);
351
352 if (grh_version == 4)
353 return RDMA_NETWORK_IPV4;
354
355 if (grh->next_hdr == IPPROTO_UDP)
356 return RDMA_NETWORK_IPV6;
357
358 return RDMA_NETWORK_ROCE_V1;
359 }
360
361 struct find_gid_index_context {
362 u16 vlan_id;
363 enum ib_gid_type gid_type;
364 };
365
366 static bool find_gid_index(const union ib_gid *gid,
367 const struct ib_gid_attr *gid_attr,
368 void *context)
369 {
370 struct find_gid_index_context *ctx =
371 (struct find_gid_index_context *)context;
372
373 if (ctx->gid_type != gid_attr->gid_type)
374 return false;
375
376 if ((!!(ctx->vlan_id != 0xffff) == !is_vlan_dev(gid_attr->ndev)) ||
377 (is_vlan_dev(gid_attr->ndev) &&
378 vlan_dev_vlan_id(gid_attr->ndev) != ctx->vlan_id))
379 return false;
380
381 return true;
382 }
383
384 static int get_sgid_index_from_eth(struct ib_device *device, u8 port_num,
385 u16 vlan_id, const union ib_gid *sgid,
386 enum ib_gid_type gid_type,
387 u16 *gid_index)
388 {
389 struct find_gid_index_context context = {.vlan_id = vlan_id,
390 .gid_type = gid_type};
391
392 return ib_find_gid_by_filter(device, sgid, port_num, find_gid_index,
393 &context, gid_index);
394 }
395
396 static int get_gids_from_rdma_hdr(union rdma_network_hdr *hdr,
397 enum rdma_network_type net_type,
398 union ib_gid *sgid, union ib_gid *dgid)
399 {
400 struct sockaddr_in src_in;
401 struct sockaddr_in dst_in;
402 __be32 src_saddr, dst_saddr;
403
404 if (!sgid || !dgid)
405 return -EINVAL;
406
407 if (net_type == RDMA_NETWORK_IPV4) {
408 memcpy(&src_in.sin_addr.s_addr,
409 &hdr->roce4grh.saddr, 4);
410 memcpy(&dst_in.sin_addr.s_addr,
411 &hdr->roce4grh.daddr, 4);
412 src_saddr = src_in.sin_addr.s_addr;
413 dst_saddr = dst_in.sin_addr.s_addr;
414 ipv6_addr_set_v4mapped(src_saddr,
415 (struct in6_addr *)sgid);
416 ipv6_addr_set_v4mapped(dst_saddr,
417 (struct in6_addr *)dgid);
418 return 0;
419 } else if (net_type == RDMA_NETWORK_IPV6 ||
420 net_type == RDMA_NETWORK_IB) {
421 *dgid = hdr->ibgrh.dgid;
422 *sgid = hdr->ibgrh.sgid;
423 return 0;
424 } else {
425 return -EINVAL;
426 }
427 }
428
429 int ib_init_ah_from_wc(struct ib_device *device, u8 port_num,
430 const struct ib_wc *wc, const struct ib_grh *grh,
431 struct ib_ah_attr *ah_attr)
432 {
433 u32 flow_class;
434 u16 gid_index;
435 int ret;
436 enum rdma_network_type net_type = RDMA_NETWORK_IB;
437 enum ib_gid_type gid_type = IB_GID_TYPE_IB;
438 int hoplimit = 0xff;
439 union ib_gid dgid;
440 union ib_gid sgid;
441
442 memset(ah_attr, 0, sizeof *ah_attr);
443 if (rdma_cap_eth_ah(device, port_num)) {
444 if (wc->wc_flags & IB_WC_WITH_NETWORK_HDR_TYPE)
445 net_type = wc->network_hdr_type;
446 else
447 net_type = ib_get_net_type_by_grh(device, port_num, grh);
448 gid_type = ib_network_to_gid_type(net_type);
449 }
450 ret = get_gids_from_rdma_hdr((union rdma_network_hdr *)grh, net_type,
451 &sgid, &dgid);
452 if (ret)
453 return ret;
454
455 if (rdma_protocol_roce(device, port_num)) {
456 int if_index = 0;
457 u16 vlan_id = wc->wc_flags & IB_WC_WITH_VLAN ?
458 wc->vlan_id : 0xffff;
459 struct net_device *idev;
460 struct net_device *resolved_dev;
461
462 if (!(wc->wc_flags & IB_WC_GRH))
463 return -EPROTOTYPE;
464
465 if (!device->get_netdev)
466 return -EOPNOTSUPP;
467
468 idev = device->get_netdev(device, port_num);
469 if (!idev)
470 return -ENODEV;
471
472 ret = rdma_addr_find_l2_eth_by_grh(&dgid, &sgid,
473 ah_attr->dmac,
474 wc->wc_flags & IB_WC_WITH_VLAN ?
475 NULL : &vlan_id,
476 &if_index, &hoplimit);
477 if (ret) {
478 dev_put(idev);
479 return ret;
480 }
481
482 resolved_dev = dev_get_by_index(&init_net, if_index);
483 if (resolved_dev->flags & IFF_LOOPBACK) {
484 dev_put(resolved_dev);
485 resolved_dev = idev;
486 dev_hold(resolved_dev);
487 }
488 rcu_read_lock();
489 if (resolved_dev != idev && !rdma_is_upper_dev_rcu(idev,
490 resolved_dev))
491 ret = -EHOSTUNREACH;
492 rcu_read_unlock();
493 dev_put(idev);
494 dev_put(resolved_dev);
495 if (ret)
496 return ret;
497
498 ret = get_sgid_index_from_eth(device, port_num, vlan_id,
499 &dgid, gid_type, &gid_index);
500 if (ret)
501 return ret;
502 }
503
504 ah_attr->dlid = wc->slid;
505 ah_attr->sl = wc->sl;
506 ah_attr->src_path_bits = wc->dlid_path_bits;
507 ah_attr->port_num = port_num;
508
509 if (wc->wc_flags & IB_WC_GRH) {
510 ah_attr->ah_flags = IB_AH_GRH;
511 ah_attr->grh.dgid = sgid;
512
513 if (!rdma_cap_eth_ah(device, port_num)) {
514 if (dgid.global.interface_id != cpu_to_be64(IB_SA_WELL_KNOWN_GUID)) {
515 ret = ib_find_cached_gid_by_port(device, &dgid,
516 IB_GID_TYPE_IB,
517 port_num, NULL,
518 &gid_index);
519 if (ret)
520 return ret;
521 } else {
522 gid_index = 0;
523 }
524 }
525
526 ah_attr->grh.sgid_index = (u8) gid_index;
527 flow_class = be32_to_cpu(grh->version_tclass_flow);
528 ah_attr->grh.flow_label = flow_class & 0xFFFFF;
529 ah_attr->grh.hop_limit = hoplimit;
530 ah_attr->grh.traffic_class = (flow_class >> 20) & 0xFF;
531 }
532 return 0;
533 }
534 EXPORT_SYMBOL(ib_init_ah_from_wc);
535
536 struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc,
537 const struct ib_grh *grh, u8 port_num)
538 {
539 struct ib_ah_attr ah_attr;
540 int ret;
541
542 ret = ib_init_ah_from_wc(pd->device, port_num, wc, grh, &ah_attr);
543 if (ret)
544 return ERR_PTR(ret);
545
546 return ib_create_ah(pd, &ah_attr);
547 }
548 EXPORT_SYMBOL(ib_create_ah_from_wc);
549
550 int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
551 {
552 return ah->device->modify_ah ?
553 ah->device->modify_ah(ah, ah_attr) :
554 -ENOSYS;
555 }
556 EXPORT_SYMBOL(ib_modify_ah);
557
558 int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
559 {
560 return ah->device->query_ah ?
561 ah->device->query_ah(ah, ah_attr) :
562 -ENOSYS;
563 }
564 EXPORT_SYMBOL(ib_query_ah);
565
566 int ib_destroy_ah(struct ib_ah *ah)
567 {
568 struct ib_pd *pd;
569 int ret;
570
571 pd = ah->pd;
572 ret = ah->device->destroy_ah(ah);
573 if (!ret)
574 atomic_dec(&pd->usecnt);
575
576 return ret;
577 }
578 EXPORT_SYMBOL(ib_destroy_ah);
579
580 /* Shared receive queues */
581
582 struct ib_srq *ib_create_srq(struct ib_pd *pd,
583 struct ib_srq_init_attr *srq_init_attr)
584 {
585 struct ib_srq *srq;
586
587 if (!pd->device->create_srq)
588 return ERR_PTR(-ENOSYS);
589
590 srq = pd->device->create_srq(pd, srq_init_attr, NULL);
591
592 if (!IS_ERR(srq)) {
593 srq->device = pd->device;
594 srq->pd = pd;
595 srq->uobject = NULL;
596 srq->event_handler = srq_init_attr->event_handler;
597 srq->srq_context = srq_init_attr->srq_context;
598 srq->srq_type = srq_init_attr->srq_type;
599 if (srq->srq_type == IB_SRQT_XRC) {
600 srq->ext.xrc.xrcd = srq_init_attr->ext.xrc.xrcd;
601 srq->ext.xrc.cq = srq_init_attr->ext.xrc.cq;
602 atomic_inc(&srq->ext.xrc.xrcd->usecnt);
603 atomic_inc(&srq->ext.xrc.cq->usecnt);
604 }
605 atomic_inc(&pd->usecnt);
606 atomic_set(&srq->usecnt, 0);
607 }
608
609 return srq;
610 }
611 EXPORT_SYMBOL(ib_create_srq);
612
613 int ib_modify_srq(struct ib_srq *srq,
614 struct ib_srq_attr *srq_attr,
615 enum ib_srq_attr_mask srq_attr_mask)
616 {
617 return srq->device->modify_srq ?
618 srq->device->modify_srq(srq, srq_attr, srq_attr_mask, NULL) :
619 -ENOSYS;
620 }
621 EXPORT_SYMBOL(ib_modify_srq);
622
623 int ib_query_srq(struct ib_srq *srq,
624 struct ib_srq_attr *srq_attr)
625 {
626 return srq->device->query_srq ?
627 srq->device->query_srq(srq, srq_attr) : -ENOSYS;
628 }
629 EXPORT_SYMBOL(ib_query_srq);
630
631 int ib_destroy_srq(struct ib_srq *srq)
632 {
633 struct ib_pd *pd;
634 enum ib_srq_type srq_type;
635 struct ib_xrcd *uninitialized_var(xrcd);
636 struct ib_cq *uninitialized_var(cq);
637 int ret;
638
639 if (atomic_read(&srq->usecnt))
640 return -EBUSY;
641
642 pd = srq->pd;
643 srq_type = srq->srq_type;
644 if (srq_type == IB_SRQT_XRC) {
645 xrcd = srq->ext.xrc.xrcd;
646 cq = srq->ext.xrc.cq;
647 }
648
649 ret = srq->device->destroy_srq(srq);
650 if (!ret) {
651 atomic_dec(&pd->usecnt);
652 if (srq_type == IB_SRQT_XRC) {
653 atomic_dec(&xrcd->usecnt);
654 atomic_dec(&cq->usecnt);
655 }
656 }
657
658 return ret;
659 }
660 EXPORT_SYMBOL(ib_destroy_srq);
661
662 /* Queue pairs */
663
664 static void __ib_shared_qp_event_handler(struct ib_event *event, void *context)
665 {
666 struct ib_qp *qp = context;
667 unsigned long flags;
668
669 spin_lock_irqsave(&qp->device->event_handler_lock, flags);
670 list_for_each_entry(event->element.qp, &qp->open_list, open_list)
671 if (event->element.qp->event_handler)
672 event->element.qp->event_handler(event, event->element.qp->qp_context);
673 spin_unlock_irqrestore(&qp->device->event_handler_lock, flags);
674 }
675
676 static void __ib_insert_xrcd_qp(struct ib_xrcd *xrcd, struct ib_qp *qp)
677 {
678 mutex_lock(&xrcd->tgt_qp_mutex);
679 list_add(&qp->xrcd_list, &xrcd->tgt_qp_list);
680 mutex_unlock(&xrcd->tgt_qp_mutex);
681 }
682
683 static struct ib_qp *__ib_open_qp(struct ib_qp *real_qp,
684 void (*event_handler)(struct ib_event *, void *),
685 void *qp_context)
686 {
687 struct ib_qp *qp;
688 unsigned long flags;
689
690 qp = kzalloc(sizeof *qp, GFP_KERNEL);
691 if (!qp)
692 return ERR_PTR(-ENOMEM);
693
694 qp->real_qp = real_qp;
695 atomic_inc(&real_qp->usecnt);
696 qp->device = real_qp->device;
697 qp->event_handler = event_handler;
698 qp->qp_context = qp_context;
699 qp->qp_num = real_qp->qp_num;
700 qp->qp_type = real_qp->qp_type;
701
702 spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
703 list_add(&qp->open_list, &real_qp->open_list);
704 spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
705
706 return qp;
707 }
708
709 struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
710 struct ib_qp_open_attr *qp_open_attr)
711 {
712 struct ib_qp *qp, *real_qp;
713
714 if (qp_open_attr->qp_type != IB_QPT_XRC_TGT)
715 return ERR_PTR(-EINVAL);
716
717 qp = ERR_PTR(-EINVAL);
718 mutex_lock(&xrcd->tgt_qp_mutex);
719 list_for_each_entry(real_qp, &xrcd->tgt_qp_list, xrcd_list) {
720 if (real_qp->qp_num == qp_open_attr->qp_num) {
721 qp = __ib_open_qp(real_qp, qp_open_attr->event_handler,
722 qp_open_attr->qp_context);
723 break;
724 }
725 }
726 mutex_unlock(&xrcd->tgt_qp_mutex);
727 return qp;
728 }
729 EXPORT_SYMBOL(ib_open_qp);
730
731 static struct ib_qp *ib_create_xrc_qp(struct ib_qp *qp,
732 struct ib_qp_init_attr *qp_init_attr)
733 {
734 struct ib_qp *real_qp = qp;
735
736 qp->event_handler = __ib_shared_qp_event_handler;
737 qp->qp_context = qp;
738 qp->pd = NULL;
739 qp->send_cq = qp->recv_cq = NULL;
740 qp->srq = NULL;
741 qp->xrcd = qp_init_attr->xrcd;
742 atomic_inc(&qp_init_attr->xrcd->usecnt);
743 INIT_LIST_HEAD(&qp->open_list);
744
745 qp = __ib_open_qp(real_qp, qp_init_attr->event_handler,
746 qp_init_attr->qp_context);
747 if (!IS_ERR(qp))
748 __ib_insert_xrcd_qp(qp_init_attr->xrcd, real_qp);
749 else
750 real_qp->device->destroy_qp(real_qp);
751 return qp;
752 }
753
754 struct ib_qp *ib_create_qp(struct ib_pd *pd,
755 struct ib_qp_init_attr *qp_init_attr)
756 {
757 struct ib_device *device = pd ? pd->device : qp_init_attr->xrcd->device;
758 struct ib_qp *qp;
759 int ret;
760
761 if (qp_init_attr->rwq_ind_tbl &&
762 (qp_init_attr->recv_cq ||
763 qp_init_attr->srq || qp_init_attr->cap.max_recv_wr ||
764 qp_init_attr->cap.max_recv_sge))
765 return ERR_PTR(-EINVAL);
766
767 /*
768 * If the callers is using the RDMA API calculate the resources
769 * needed for the RDMA READ/WRITE operations.
770 *
771 * Note that these callers need to pass in a port number.
772 */
773 if (qp_init_attr->cap.max_rdma_ctxs)
774 rdma_rw_init_qp(device, qp_init_attr);
775
776 qp = device->create_qp(pd, qp_init_attr, NULL);
777 if (IS_ERR(qp))
778 return qp;
779
780 qp->device = device;
781 qp->real_qp = qp;
782 qp->uobject = NULL;
783 qp->qp_type = qp_init_attr->qp_type;
784 qp->rwq_ind_tbl = qp_init_attr->rwq_ind_tbl;
785
786 atomic_set(&qp->usecnt, 0);
787 qp->mrs_used = 0;
788 spin_lock_init(&qp->mr_lock);
789 INIT_LIST_HEAD(&qp->rdma_mrs);
790 INIT_LIST_HEAD(&qp->sig_mrs);
791
792 if (qp_init_attr->qp_type == IB_QPT_XRC_TGT)
793 return ib_create_xrc_qp(qp, qp_init_attr);
794
795 qp->event_handler = qp_init_attr->event_handler;
796 qp->qp_context = qp_init_attr->qp_context;
797 if (qp_init_attr->qp_type == IB_QPT_XRC_INI) {
798 qp->recv_cq = NULL;
799 qp->srq = NULL;
800 } else {
801 qp->recv_cq = qp_init_attr->recv_cq;
802 if (qp_init_attr->recv_cq)
803 atomic_inc(&qp_init_attr->recv_cq->usecnt);
804 qp->srq = qp_init_attr->srq;
805 if (qp->srq)
806 atomic_inc(&qp_init_attr->srq->usecnt);
807 }
808
809 qp->pd = pd;
810 qp->send_cq = qp_init_attr->send_cq;
811 qp->xrcd = NULL;
812
813 atomic_inc(&pd->usecnt);
814 if (qp_init_attr->send_cq)
815 atomic_inc(&qp_init_attr->send_cq->usecnt);
816 if (qp_init_attr->rwq_ind_tbl)
817 atomic_inc(&qp->rwq_ind_tbl->usecnt);
818
819 if (qp_init_attr->cap.max_rdma_ctxs) {
820 ret = rdma_rw_init_mrs(qp, qp_init_attr);
821 if (ret) {
822 pr_err("failed to init MR pool ret= %d\n", ret);
823 ib_destroy_qp(qp);
824 qp = ERR_PTR(ret);
825 }
826 }
827
828 /*
829 * Note: all hw drivers guarantee that max_send_sge is lower than
830 * the device RDMA WRITE SGE limit but not all hw drivers ensure that
831 * max_send_sge <= max_sge_rd.
832 */
833 qp->max_write_sge = qp_init_attr->cap.max_send_sge;
834 qp->max_read_sge = min_t(u32, qp_init_attr->cap.max_send_sge,
835 device->attrs.max_sge_rd);
836
837 return qp;
838 }
839 EXPORT_SYMBOL(ib_create_qp);
840
841 static const struct {
842 int valid;
843 enum ib_qp_attr_mask req_param[IB_QPT_MAX];
844 enum ib_qp_attr_mask opt_param[IB_QPT_MAX];
845 } qp_state_table[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = {
846 [IB_QPS_RESET] = {
847 [IB_QPS_RESET] = { .valid = 1 },
848 [IB_QPS_INIT] = {
849 .valid = 1,
850 .req_param = {
851 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
852 IB_QP_PORT |
853 IB_QP_QKEY),
854 [IB_QPT_RAW_PACKET] = IB_QP_PORT,
855 [IB_QPT_UC] = (IB_QP_PKEY_INDEX |
856 IB_QP_PORT |
857 IB_QP_ACCESS_FLAGS),
858 [IB_QPT_RC] = (IB_QP_PKEY_INDEX |
859 IB_QP_PORT |
860 IB_QP_ACCESS_FLAGS),
861 [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX |
862 IB_QP_PORT |
863 IB_QP_ACCESS_FLAGS),
864 [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX |
865 IB_QP_PORT |
866 IB_QP_ACCESS_FLAGS),
867 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
868 IB_QP_QKEY),
869 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
870 IB_QP_QKEY),
871 }
872 },
873 },
874 [IB_QPS_INIT] = {
875 [IB_QPS_RESET] = { .valid = 1 },
876 [IB_QPS_ERR] = { .valid = 1 },
877 [IB_QPS_INIT] = {
878 .valid = 1,
879 .opt_param = {
880 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
881 IB_QP_PORT |
882 IB_QP_QKEY),
883 [IB_QPT_UC] = (IB_QP_PKEY_INDEX |
884 IB_QP_PORT |
885 IB_QP_ACCESS_FLAGS),
886 [IB_QPT_RC] = (IB_QP_PKEY_INDEX |
887 IB_QP_PORT |
888 IB_QP_ACCESS_FLAGS),
889 [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX |
890 IB_QP_PORT |
891 IB_QP_ACCESS_FLAGS),
892 [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX |
893 IB_QP_PORT |
894 IB_QP_ACCESS_FLAGS),
895 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
896 IB_QP_QKEY),
897 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
898 IB_QP_QKEY),
899 }
900 },
901 [IB_QPS_RTR] = {
902 .valid = 1,
903 .req_param = {
904 [IB_QPT_UC] = (IB_QP_AV |
905 IB_QP_PATH_MTU |
906 IB_QP_DEST_QPN |
907 IB_QP_RQ_PSN),
908 [IB_QPT_RC] = (IB_QP_AV |
909 IB_QP_PATH_MTU |
910 IB_QP_DEST_QPN |
911 IB_QP_RQ_PSN |
912 IB_QP_MAX_DEST_RD_ATOMIC |
913 IB_QP_MIN_RNR_TIMER),
914 [IB_QPT_XRC_INI] = (IB_QP_AV |
915 IB_QP_PATH_MTU |
916 IB_QP_DEST_QPN |
917 IB_QP_RQ_PSN),
918 [IB_QPT_XRC_TGT] = (IB_QP_AV |
919 IB_QP_PATH_MTU |
920 IB_QP_DEST_QPN |
921 IB_QP_RQ_PSN |
922 IB_QP_MAX_DEST_RD_ATOMIC |
923 IB_QP_MIN_RNR_TIMER),
924 },
925 .opt_param = {
926 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
927 IB_QP_QKEY),
928 [IB_QPT_UC] = (IB_QP_ALT_PATH |
929 IB_QP_ACCESS_FLAGS |
930 IB_QP_PKEY_INDEX),
931 [IB_QPT_RC] = (IB_QP_ALT_PATH |
932 IB_QP_ACCESS_FLAGS |
933 IB_QP_PKEY_INDEX),
934 [IB_QPT_XRC_INI] = (IB_QP_ALT_PATH |
935 IB_QP_ACCESS_FLAGS |
936 IB_QP_PKEY_INDEX),
937 [IB_QPT_XRC_TGT] = (IB_QP_ALT_PATH |
938 IB_QP_ACCESS_FLAGS |
939 IB_QP_PKEY_INDEX),
940 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
941 IB_QP_QKEY),
942 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
943 IB_QP_QKEY),
944 },
945 },
946 },
947 [IB_QPS_RTR] = {
948 [IB_QPS_RESET] = { .valid = 1 },
949 [IB_QPS_ERR] = { .valid = 1 },
950 [IB_QPS_RTS] = {
951 .valid = 1,
952 .req_param = {
953 [IB_QPT_UD] = IB_QP_SQ_PSN,
954 [IB_QPT_UC] = IB_QP_SQ_PSN,
955 [IB_QPT_RC] = (IB_QP_TIMEOUT |
956 IB_QP_RETRY_CNT |
957 IB_QP_RNR_RETRY |
958 IB_QP_SQ_PSN |
959 IB_QP_MAX_QP_RD_ATOMIC),
960 [IB_QPT_XRC_INI] = (IB_QP_TIMEOUT |
961 IB_QP_RETRY_CNT |
962 IB_QP_RNR_RETRY |
963 IB_QP_SQ_PSN |
964 IB_QP_MAX_QP_RD_ATOMIC),
965 [IB_QPT_XRC_TGT] = (IB_QP_TIMEOUT |
966 IB_QP_SQ_PSN),
967 [IB_QPT_SMI] = IB_QP_SQ_PSN,
968 [IB_QPT_GSI] = IB_QP_SQ_PSN,
969 },
970 .opt_param = {
971 [IB_QPT_UD] = (IB_QP_CUR_STATE |
972 IB_QP_QKEY),
973 [IB_QPT_UC] = (IB_QP_CUR_STATE |
974 IB_QP_ALT_PATH |
975 IB_QP_ACCESS_FLAGS |
976 IB_QP_PATH_MIG_STATE),
977 [IB_QPT_RC] = (IB_QP_CUR_STATE |
978 IB_QP_ALT_PATH |
979 IB_QP_ACCESS_FLAGS |
980 IB_QP_MIN_RNR_TIMER |
981 IB_QP_PATH_MIG_STATE),
982 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
983 IB_QP_ALT_PATH |
984 IB_QP_ACCESS_FLAGS |
985 IB_QP_PATH_MIG_STATE),
986 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
987 IB_QP_ALT_PATH |
988 IB_QP_ACCESS_FLAGS |
989 IB_QP_MIN_RNR_TIMER |
990 IB_QP_PATH_MIG_STATE),
991 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
992 IB_QP_QKEY),
993 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
994 IB_QP_QKEY),
995 }
996 }
997 },
998 [IB_QPS_RTS] = {
999 [IB_QPS_RESET] = { .valid = 1 },
1000 [IB_QPS_ERR] = { .valid = 1 },
1001 [IB_QPS_RTS] = {
1002 .valid = 1,
1003 .opt_param = {
1004 [IB_QPT_UD] = (IB_QP_CUR_STATE |
1005 IB_QP_QKEY),
1006 [IB_QPT_UC] = (IB_QP_CUR_STATE |
1007 IB_QP_ACCESS_FLAGS |
1008 IB_QP_ALT_PATH |
1009 IB_QP_PATH_MIG_STATE),
1010 [IB_QPT_RC] = (IB_QP_CUR_STATE |
1011 IB_QP_ACCESS_FLAGS |
1012 IB_QP_ALT_PATH |
1013 IB_QP_PATH_MIG_STATE |
1014 IB_QP_MIN_RNR_TIMER),
1015 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
1016 IB_QP_ACCESS_FLAGS |
1017 IB_QP_ALT_PATH |
1018 IB_QP_PATH_MIG_STATE),
1019 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
1020 IB_QP_ACCESS_FLAGS |
1021 IB_QP_ALT_PATH |
1022 IB_QP_PATH_MIG_STATE |
1023 IB_QP_MIN_RNR_TIMER),
1024 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
1025 IB_QP_QKEY),
1026 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
1027 IB_QP_QKEY),
1028 }
1029 },
1030 [IB_QPS_SQD] = {
1031 .valid = 1,
1032 .opt_param = {
1033 [IB_QPT_UD] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1034 [IB_QPT_UC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1035 [IB_QPT_RC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1036 [IB_QPT_XRC_INI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1037 [IB_QPT_XRC_TGT] = IB_QP_EN_SQD_ASYNC_NOTIFY, /* ??? */
1038 [IB_QPT_SMI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
1039 [IB_QPT_GSI] = IB_QP_EN_SQD_ASYNC_NOTIFY
1040 }
1041 },
1042 },
1043 [IB_QPS_SQD] = {
1044 [IB_QPS_RESET] = { .valid = 1 },
1045 [IB_QPS_ERR] = { .valid = 1 },
1046 [IB_QPS_RTS] = {
1047 .valid = 1,
1048 .opt_param = {
1049 [IB_QPT_UD] = (IB_QP_CUR_STATE |
1050 IB_QP_QKEY),
1051 [IB_QPT_UC] = (IB_QP_CUR_STATE |
1052 IB_QP_ALT_PATH |
1053 IB_QP_ACCESS_FLAGS |
1054 IB_QP_PATH_MIG_STATE),
1055 [IB_QPT_RC] = (IB_QP_CUR_STATE |
1056 IB_QP_ALT_PATH |
1057 IB_QP_ACCESS_FLAGS |
1058 IB_QP_MIN_RNR_TIMER |
1059 IB_QP_PATH_MIG_STATE),
1060 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
1061 IB_QP_ALT_PATH |
1062 IB_QP_ACCESS_FLAGS |
1063 IB_QP_PATH_MIG_STATE),
1064 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
1065 IB_QP_ALT_PATH |
1066 IB_QP_ACCESS_FLAGS |
1067 IB_QP_MIN_RNR_TIMER |
1068 IB_QP_PATH_MIG_STATE),
1069 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
1070 IB_QP_QKEY),
1071 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
1072 IB_QP_QKEY),
1073 }
1074 },
1075 [IB_QPS_SQD] = {
1076 .valid = 1,
1077 .opt_param = {
1078 [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
1079 IB_QP_QKEY),
1080 [IB_QPT_UC] = (IB_QP_AV |
1081 IB_QP_ALT_PATH |
1082 IB_QP_ACCESS_FLAGS |
1083 IB_QP_PKEY_INDEX |
1084 IB_QP_PATH_MIG_STATE),
1085 [IB_QPT_RC] = (IB_QP_PORT |
1086 IB_QP_AV |
1087 IB_QP_TIMEOUT |
1088 IB_QP_RETRY_CNT |
1089 IB_QP_RNR_RETRY |
1090 IB_QP_MAX_QP_RD_ATOMIC |
1091 IB_QP_MAX_DEST_RD_ATOMIC |
1092 IB_QP_ALT_PATH |
1093 IB_QP_ACCESS_FLAGS |
1094 IB_QP_PKEY_INDEX |
1095 IB_QP_MIN_RNR_TIMER |
1096 IB_QP_PATH_MIG_STATE),
1097 [IB_QPT_XRC_INI] = (IB_QP_PORT |
1098 IB_QP_AV |
1099 IB_QP_TIMEOUT |
1100 IB_QP_RETRY_CNT |
1101 IB_QP_RNR_RETRY |
1102 IB_QP_MAX_QP_RD_ATOMIC |
1103 IB_QP_ALT_PATH |
1104 IB_QP_ACCESS_FLAGS |
1105 IB_QP_PKEY_INDEX |
1106 IB_QP_PATH_MIG_STATE),
1107 [IB_QPT_XRC_TGT] = (IB_QP_PORT |
1108 IB_QP_AV |
1109 IB_QP_TIMEOUT |
1110 IB_QP_MAX_DEST_RD_ATOMIC |
1111 IB_QP_ALT_PATH |
1112 IB_QP_ACCESS_FLAGS |
1113 IB_QP_PKEY_INDEX |
1114 IB_QP_MIN_RNR_TIMER |
1115 IB_QP_PATH_MIG_STATE),
1116 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
1117 IB_QP_QKEY),
1118 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
1119 IB_QP_QKEY),
1120 }
1121 }
1122 },
1123 [IB_QPS_SQE] = {
1124 [IB_QPS_RESET] = { .valid = 1 },
1125 [IB_QPS_ERR] = { .valid = 1 },
1126 [IB_QPS_RTS] = {
1127 .valid = 1,
1128 .opt_param = {
1129 [IB_QPT_UD] = (IB_QP_CUR_STATE |
1130 IB_QP_QKEY),
1131 [IB_QPT_UC] = (IB_QP_CUR_STATE |
1132 IB_QP_ACCESS_FLAGS),
1133 [IB_QPT_SMI] = (IB_QP_CUR_STATE |
1134 IB_QP_QKEY),
1135 [IB_QPT_GSI] = (IB_QP_CUR_STATE |
1136 IB_QP_QKEY),
1137 }
1138 }
1139 },
1140 [IB_QPS_ERR] = {
1141 [IB_QPS_RESET] = { .valid = 1 },
1142 [IB_QPS_ERR] = { .valid = 1 }
1143 }
1144 };
1145
1146 int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
1147 enum ib_qp_type type, enum ib_qp_attr_mask mask,
1148 enum rdma_link_layer ll)
1149 {
1150 enum ib_qp_attr_mask req_param, opt_param;
1151
1152 if (cur_state < 0 || cur_state > IB_QPS_ERR ||
1153 next_state < 0 || next_state > IB_QPS_ERR)
1154 return 0;
1155
1156 if (mask & IB_QP_CUR_STATE &&
1157 cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS &&
1158 cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE)
1159 return 0;
1160
1161 if (!qp_state_table[cur_state][next_state].valid)
1162 return 0;
1163
1164 req_param = qp_state_table[cur_state][next_state].req_param[type];
1165 opt_param = qp_state_table[cur_state][next_state].opt_param[type];
1166
1167 if ((mask & req_param) != req_param)
1168 return 0;
1169
1170 if (mask & ~(req_param | opt_param | IB_QP_STATE))
1171 return 0;
1172
1173 return 1;
1174 }
1175 EXPORT_SYMBOL(ib_modify_qp_is_ok);
1176
1177 int ib_resolve_eth_dmac(struct ib_qp *qp,
1178 struct ib_qp_attr *qp_attr, int *qp_attr_mask)
1179 {
1180 int ret = 0;
1181
1182 if (*qp_attr_mask & IB_QP_AV) {
1183 if (qp_attr->ah_attr.port_num < rdma_start_port(qp->device) ||
1184 qp_attr->ah_attr.port_num > rdma_end_port(qp->device))
1185 return -EINVAL;
1186
1187 if (!rdma_cap_eth_ah(qp->device, qp_attr->ah_attr.port_num))
1188 return 0;
1189
1190 if (rdma_link_local_addr((struct in6_addr *)qp_attr->ah_attr.grh.dgid.raw)) {
1191 rdma_get_ll_mac((struct in6_addr *)qp_attr->ah_attr.grh.dgid.raw,
1192 qp_attr->ah_attr.dmac);
1193 } else {
1194 union ib_gid sgid;
1195 struct ib_gid_attr sgid_attr;
1196 int ifindex;
1197 int hop_limit;
1198
1199 ret = ib_query_gid(qp->device,
1200 qp_attr->ah_attr.port_num,
1201 qp_attr->ah_attr.grh.sgid_index,
1202 &sgid, &sgid_attr);
1203
1204 if (ret || !sgid_attr.ndev) {
1205 if (!ret)
1206 ret = -ENXIO;
1207 goto out;
1208 }
1209
1210 ifindex = sgid_attr.ndev->ifindex;
1211
1212 ret = rdma_addr_find_l2_eth_by_grh(&sgid,
1213 &qp_attr->ah_attr.grh.dgid,
1214 qp_attr->ah_attr.dmac,
1215 NULL, &ifindex, &hop_limit);
1216
1217 dev_put(sgid_attr.ndev);
1218
1219 qp_attr->ah_attr.grh.hop_limit = hop_limit;
1220 }
1221 }
1222 out:
1223 return ret;
1224 }
1225 EXPORT_SYMBOL(ib_resolve_eth_dmac);
1226
1227
1228 int ib_modify_qp(struct ib_qp *qp,
1229 struct ib_qp_attr *qp_attr,
1230 int qp_attr_mask)
1231 {
1232 int ret;
1233
1234 ret = ib_resolve_eth_dmac(qp, qp_attr, &qp_attr_mask);
1235 if (ret)
1236 return ret;
1237
1238 return qp->device->modify_qp(qp->real_qp, qp_attr, qp_attr_mask, NULL);
1239 }
1240 EXPORT_SYMBOL(ib_modify_qp);
1241
1242 int ib_query_qp(struct ib_qp *qp,
1243 struct ib_qp_attr *qp_attr,
1244 int qp_attr_mask,
1245 struct ib_qp_init_attr *qp_init_attr)
1246 {
1247 return qp->device->query_qp ?
1248 qp->device->query_qp(qp->real_qp, qp_attr, qp_attr_mask, qp_init_attr) :
1249 -ENOSYS;
1250 }
1251 EXPORT_SYMBOL(ib_query_qp);
1252
1253 int ib_close_qp(struct ib_qp *qp)
1254 {
1255 struct ib_qp *real_qp;
1256 unsigned long flags;
1257
1258 real_qp = qp->real_qp;
1259 if (real_qp == qp)
1260 return -EINVAL;
1261
1262 spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
1263 list_del(&qp->open_list);
1264 spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
1265
1266 atomic_dec(&real_qp->usecnt);
1267 kfree(qp);
1268
1269 return 0;
1270 }
1271 EXPORT_SYMBOL(ib_close_qp);
1272
1273 static int __ib_destroy_shared_qp(struct ib_qp *qp)
1274 {
1275 struct ib_xrcd *xrcd;
1276 struct ib_qp *real_qp;
1277 int ret;
1278
1279 real_qp = qp->real_qp;
1280 xrcd = real_qp->xrcd;
1281
1282 mutex_lock(&xrcd->tgt_qp_mutex);
1283 ib_close_qp(qp);
1284 if (atomic_read(&real_qp->usecnt) == 0)
1285 list_del(&real_qp->xrcd_list);
1286 else
1287 real_qp = NULL;
1288 mutex_unlock(&xrcd->tgt_qp_mutex);
1289
1290 if (real_qp) {
1291 ret = ib_destroy_qp(real_qp);
1292 if (!ret)
1293 atomic_dec(&xrcd->usecnt);
1294 else
1295 __ib_insert_xrcd_qp(xrcd, real_qp);
1296 }
1297
1298 return 0;
1299 }
1300
1301 int ib_destroy_qp(struct ib_qp *qp)
1302 {
1303 struct ib_pd *pd;
1304 struct ib_cq *scq, *rcq;
1305 struct ib_srq *srq;
1306 struct ib_rwq_ind_table *ind_tbl;
1307 int ret;
1308
1309 WARN_ON_ONCE(qp->mrs_used > 0);
1310
1311 if (atomic_read(&qp->usecnt))
1312 return -EBUSY;
1313
1314 if (qp->real_qp != qp)
1315 return __ib_destroy_shared_qp(qp);
1316
1317 pd = qp->pd;
1318 scq = qp->send_cq;
1319 rcq = qp->recv_cq;
1320 srq = qp->srq;
1321 ind_tbl = qp->rwq_ind_tbl;
1322
1323 if (!qp->uobject)
1324 rdma_rw_cleanup_mrs(qp);
1325
1326 ret = qp->device->destroy_qp(qp);
1327 if (!ret) {
1328 if (pd)
1329 atomic_dec(&pd->usecnt);
1330 if (scq)
1331 atomic_dec(&scq->usecnt);
1332 if (rcq)
1333 atomic_dec(&rcq->usecnt);
1334 if (srq)
1335 atomic_dec(&srq->usecnt);
1336 if (ind_tbl)
1337 atomic_dec(&ind_tbl->usecnt);
1338 }
1339
1340 return ret;
1341 }
1342 EXPORT_SYMBOL(ib_destroy_qp);
1343
1344 /* Completion queues */
1345
1346 struct ib_cq *ib_create_cq(struct ib_device *device,
1347 ib_comp_handler comp_handler,
1348 void (*event_handler)(struct ib_event *, void *),
1349 void *cq_context,
1350 const struct ib_cq_init_attr *cq_attr)
1351 {
1352 struct ib_cq *cq;
1353
1354 cq = device->create_cq(device, cq_attr, NULL, NULL);
1355
1356 if (!IS_ERR(cq)) {
1357 cq->device = device;
1358 cq->uobject = NULL;
1359 cq->comp_handler = comp_handler;
1360 cq->event_handler = event_handler;
1361 cq->cq_context = cq_context;
1362 atomic_set(&cq->usecnt, 0);
1363 }
1364
1365 return cq;
1366 }
1367 EXPORT_SYMBOL(ib_create_cq);
1368
1369 int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period)
1370 {
1371 return cq->device->modify_cq ?
1372 cq->device->modify_cq(cq, cq_count, cq_period) : -ENOSYS;
1373 }
1374 EXPORT_SYMBOL(ib_modify_cq);
1375
1376 int ib_destroy_cq(struct ib_cq *cq)
1377 {
1378 if (atomic_read(&cq->usecnt))
1379 return -EBUSY;
1380
1381 return cq->device->destroy_cq(cq);
1382 }
1383 EXPORT_SYMBOL(ib_destroy_cq);
1384
1385 int ib_resize_cq(struct ib_cq *cq, int cqe)
1386 {
1387 return cq->device->resize_cq ?
1388 cq->device->resize_cq(cq, cqe, NULL) : -ENOSYS;
1389 }
1390 EXPORT_SYMBOL(ib_resize_cq);
1391
1392 /* Memory regions */
1393
1394 struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags)
1395 {
1396 struct ib_mr *mr;
1397 int err;
1398
1399 err = ib_check_mr_access(mr_access_flags);
1400 if (err)
1401 return ERR_PTR(err);
1402
1403 mr = pd->device->get_dma_mr(pd, mr_access_flags);
1404
1405 if (!IS_ERR(mr)) {
1406 mr->device = pd->device;
1407 mr->pd = pd;
1408 mr->uobject = NULL;
1409 atomic_inc(&pd->usecnt);
1410 mr->need_inval = false;
1411 }
1412
1413 return mr;
1414 }
1415 EXPORT_SYMBOL(ib_get_dma_mr);
1416
1417 int ib_dereg_mr(struct ib_mr *mr)
1418 {
1419 struct ib_pd *pd = mr->pd;
1420 int ret;
1421
1422 ret = mr->device->dereg_mr(mr);
1423 if (!ret)
1424 atomic_dec(&pd->usecnt);
1425
1426 return ret;
1427 }
1428 EXPORT_SYMBOL(ib_dereg_mr);
1429
1430 /**
1431 * ib_alloc_mr() - Allocates a memory region
1432 * @pd: protection domain associated with the region
1433 * @mr_type: memory region type
1434 * @max_num_sg: maximum sg entries available for registration.
1435 *
1436 * Notes:
1437 * Memory registeration page/sg lists must not exceed max_num_sg.
1438 * For mr_type IB_MR_TYPE_MEM_REG, the total length cannot exceed
1439 * max_num_sg * used_page_size.
1440 *
1441 */
1442 struct ib_mr *ib_alloc_mr(struct ib_pd *pd,
1443 enum ib_mr_type mr_type,
1444 u32 max_num_sg)
1445 {
1446 struct ib_mr *mr;
1447
1448 if (!pd->device->alloc_mr)
1449 return ERR_PTR(-ENOSYS);
1450
1451 mr = pd->device->alloc_mr(pd, mr_type, max_num_sg);
1452 if (!IS_ERR(mr)) {
1453 mr->device = pd->device;
1454 mr->pd = pd;
1455 mr->uobject = NULL;
1456 atomic_inc(&pd->usecnt);
1457 mr->need_inval = false;
1458 }
1459
1460 return mr;
1461 }
1462 EXPORT_SYMBOL(ib_alloc_mr);
1463
1464 /* "Fast" memory regions */
1465
1466 struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd,
1467 int mr_access_flags,
1468 struct ib_fmr_attr *fmr_attr)
1469 {
1470 struct ib_fmr *fmr;
1471
1472 if (!pd->device->alloc_fmr)
1473 return ERR_PTR(-ENOSYS);
1474
1475 fmr = pd->device->alloc_fmr(pd, mr_access_flags, fmr_attr);
1476 if (!IS_ERR(fmr)) {
1477 fmr->device = pd->device;
1478 fmr->pd = pd;
1479 atomic_inc(&pd->usecnt);
1480 }
1481
1482 return fmr;
1483 }
1484 EXPORT_SYMBOL(ib_alloc_fmr);
1485
1486 int ib_unmap_fmr(struct list_head *fmr_list)
1487 {
1488 struct ib_fmr *fmr;
1489
1490 if (list_empty(fmr_list))
1491 return 0;
1492
1493 fmr = list_entry(fmr_list->next, struct ib_fmr, list);
1494 return fmr->device->unmap_fmr(fmr_list);
1495 }
1496 EXPORT_SYMBOL(ib_unmap_fmr);
1497
1498 int ib_dealloc_fmr(struct ib_fmr *fmr)
1499 {
1500 struct ib_pd *pd;
1501 int ret;
1502
1503 pd = fmr->pd;
1504 ret = fmr->device->dealloc_fmr(fmr);
1505 if (!ret)
1506 atomic_dec(&pd->usecnt);
1507
1508 return ret;
1509 }
1510 EXPORT_SYMBOL(ib_dealloc_fmr);
1511
1512 /* Multicast groups */
1513
1514 int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
1515 {
1516 int ret;
1517
1518 if (!qp->device->attach_mcast)
1519 return -ENOSYS;
1520 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
1521 return -EINVAL;
1522
1523 ret = qp->device->attach_mcast(qp, gid, lid);
1524 if (!ret)
1525 atomic_inc(&qp->usecnt);
1526 return ret;
1527 }
1528 EXPORT_SYMBOL(ib_attach_mcast);
1529
1530 int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
1531 {
1532 int ret;
1533
1534 if (!qp->device->detach_mcast)
1535 return -ENOSYS;
1536 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
1537 return -EINVAL;
1538
1539 ret = qp->device->detach_mcast(qp, gid, lid);
1540 if (!ret)
1541 atomic_dec(&qp->usecnt);
1542 return ret;
1543 }
1544 EXPORT_SYMBOL(ib_detach_mcast);
1545
1546 struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device)
1547 {
1548 struct ib_xrcd *xrcd;
1549
1550 if (!device->alloc_xrcd)
1551 return ERR_PTR(-ENOSYS);
1552
1553 xrcd = device->alloc_xrcd(device, NULL, NULL);
1554 if (!IS_ERR(xrcd)) {
1555 xrcd->device = device;
1556 xrcd->inode = NULL;
1557 atomic_set(&xrcd->usecnt, 0);
1558 mutex_init(&xrcd->tgt_qp_mutex);
1559 INIT_LIST_HEAD(&xrcd->tgt_qp_list);
1560 }
1561
1562 return xrcd;
1563 }
1564 EXPORT_SYMBOL(ib_alloc_xrcd);
1565
1566 int ib_dealloc_xrcd(struct ib_xrcd *xrcd)
1567 {
1568 struct ib_qp *qp;
1569 int ret;
1570
1571 if (atomic_read(&xrcd->usecnt))
1572 return -EBUSY;
1573
1574 while (!list_empty(&xrcd->tgt_qp_list)) {
1575 qp = list_entry(xrcd->tgt_qp_list.next, struct ib_qp, xrcd_list);
1576 ret = ib_destroy_qp(qp);
1577 if (ret)
1578 return ret;
1579 }
1580
1581 return xrcd->device->dealloc_xrcd(xrcd);
1582 }
1583 EXPORT_SYMBOL(ib_dealloc_xrcd);
1584
1585 /**
1586 * ib_create_wq - Creates a WQ associated with the specified protection
1587 * domain.
1588 * @pd: The protection domain associated with the WQ.
1589 * @wq_init_attr: A list of initial attributes required to create the
1590 * WQ. If WQ creation succeeds, then the attributes are updated to
1591 * the actual capabilities of the created WQ.
1592 *
1593 * wq_init_attr->max_wr and wq_init_attr->max_sge determine
1594 * the requested size of the WQ, and set to the actual values allocated
1595 * on return.
1596 * If ib_create_wq() succeeds, then max_wr and max_sge will always be
1597 * at least as large as the requested values.
1598 */
1599 struct ib_wq *ib_create_wq(struct ib_pd *pd,
1600 struct ib_wq_init_attr *wq_attr)
1601 {
1602 struct ib_wq *wq;
1603
1604 if (!pd->device->create_wq)
1605 return ERR_PTR(-ENOSYS);
1606
1607 wq = pd->device->create_wq(pd, wq_attr, NULL);
1608 if (!IS_ERR(wq)) {
1609 wq->event_handler = wq_attr->event_handler;
1610 wq->wq_context = wq_attr->wq_context;
1611 wq->wq_type = wq_attr->wq_type;
1612 wq->cq = wq_attr->cq;
1613 wq->device = pd->device;
1614 wq->pd = pd;
1615 wq->uobject = NULL;
1616 atomic_inc(&pd->usecnt);
1617 atomic_inc(&wq_attr->cq->usecnt);
1618 atomic_set(&wq->usecnt, 0);
1619 }
1620 return wq;
1621 }
1622 EXPORT_SYMBOL(ib_create_wq);
1623
1624 /**
1625 * ib_destroy_wq - Destroys the specified WQ.
1626 * @wq: The WQ to destroy.
1627 */
1628 int ib_destroy_wq(struct ib_wq *wq)
1629 {
1630 int err;
1631 struct ib_cq *cq = wq->cq;
1632 struct ib_pd *pd = wq->pd;
1633
1634 if (atomic_read(&wq->usecnt))
1635 return -EBUSY;
1636
1637 err = wq->device->destroy_wq(wq);
1638 if (!err) {
1639 atomic_dec(&pd->usecnt);
1640 atomic_dec(&cq->usecnt);
1641 }
1642 return err;
1643 }
1644 EXPORT_SYMBOL(ib_destroy_wq);
1645
1646 /**
1647 * ib_modify_wq - Modifies the specified WQ.
1648 * @wq: The WQ to modify.
1649 * @wq_attr: On input, specifies the WQ attributes to modify.
1650 * @wq_attr_mask: A bit-mask used to specify which attributes of the WQ
1651 * are being modified.
1652 * On output, the current values of selected WQ attributes are returned.
1653 */
1654 int ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr,
1655 u32 wq_attr_mask)
1656 {
1657 int err;
1658
1659 if (!wq->device->modify_wq)
1660 return -ENOSYS;
1661
1662 err = wq->device->modify_wq(wq, wq_attr, wq_attr_mask, NULL);
1663 return err;
1664 }
1665 EXPORT_SYMBOL(ib_modify_wq);
1666
1667 /*
1668 * ib_create_rwq_ind_table - Creates a RQ Indirection Table.
1669 * @device: The device on which to create the rwq indirection table.
1670 * @ib_rwq_ind_table_init_attr: A list of initial attributes required to
1671 * create the Indirection Table.
1672 *
1673 * Note: The life time of ib_rwq_ind_table_init_attr->ind_tbl is not less
1674 * than the created ib_rwq_ind_table object and the caller is responsible
1675 * for its memory allocation/free.
1676 */
1677 struct ib_rwq_ind_table *ib_create_rwq_ind_table(struct ib_device *device,
1678 struct ib_rwq_ind_table_init_attr *init_attr)
1679 {
1680 struct ib_rwq_ind_table *rwq_ind_table;
1681 int i;
1682 u32 table_size;
1683
1684 if (!device->create_rwq_ind_table)
1685 return ERR_PTR(-ENOSYS);
1686
1687 table_size = (1 << init_attr->log_ind_tbl_size);
1688 rwq_ind_table = device->create_rwq_ind_table(device,
1689 init_attr, NULL);
1690 if (IS_ERR(rwq_ind_table))
1691 return rwq_ind_table;
1692
1693 rwq_ind_table->ind_tbl = init_attr->ind_tbl;
1694 rwq_ind_table->log_ind_tbl_size = init_attr->log_ind_tbl_size;
1695 rwq_ind_table->device = device;
1696 rwq_ind_table->uobject = NULL;
1697 atomic_set(&rwq_ind_table->usecnt, 0);
1698
1699 for (i = 0; i < table_size; i++)
1700 atomic_inc(&rwq_ind_table->ind_tbl[i]->usecnt);
1701
1702 return rwq_ind_table;
1703 }
1704 EXPORT_SYMBOL(ib_create_rwq_ind_table);
1705
1706 /*
1707 * ib_destroy_rwq_ind_table - Destroys the specified Indirection Table.
1708 * @wq_ind_table: The Indirection Table to destroy.
1709 */
1710 int ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *rwq_ind_table)
1711 {
1712 int err, i;
1713 u32 table_size = (1 << rwq_ind_table->log_ind_tbl_size);
1714 struct ib_wq **ind_tbl = rwq_ind_table->ind_tbl;
1715
1716 if (atomic_read(&rwq_ind_table->usecnt))
1717 return -EBUSY;
1718
1719 err = rwq_ind_table->device->destroy_rwq_ind_table(rwq_ind_table);
1720 if (!err) {
1721 for (i = 0; i < table_size; i++)
1722 atomic_dec(&ind_tbl[i]->usecnt);
1723 }
1724
1725 return err;
1726 }
1727 EXPORT_SYMBOL(ib_destroy_rwq_ind_table);
1728
1729 struct ib_flow *ib_create_flow(struct ib_qp *qp,
1730 struct ib_flow_attr *flow_attr,
1731 int domain)
1732 {
1733 struct ib_flow *flow_id;
1734 if (!qp->device->create_flow)
1735 return ERR_PTR(-ENOSYS);
1736
1737 flow_id = qp->device->create_flow(qp, flow_attr, domain);
1738 if (!IS_ERR(flow_id))
1739 atomic_inc(&qp->usecnt);
1740 return flow_id;
1741 }
1742 EXPORT_SYMBOL(ib_create_flow);
1743
1744 int ib_destroy_flow(struct ib_flow *flow_id)
1745 {
1746 int err;
1747 struct ib_qp *qp = flow_id->qp;
1748
1749 err = qp->device->destroy_flow(flow_id);
1750 if (!err)
1751 atomic_dec(&qp->usecnt);
1752 return err;
1753 }
1754 EXPORT_SYMBOL(ib_destroy_flow);
1755
1756 int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
1757 struct ib_mr_status *mr_status)
1758 {
1759 return mr->device->check_mr_status ?
1760 mr->device->check_mr_status(mr, check_mask, mr_status) : -ENOSYS;
1761 }
1762 EXPORT_SYMBOL(ib_check_mr_status);
1763
1764 int ib_set_vf_link_state(struct ib_device *device, int vf, u8 port,
1765 int state)
1766 {
1767 if (!device->set_vf_link_state)
1768 return -ENOSYS;
1769
1770 return device->set_vf_link_state(device, vf, port, state);
1771 }
1772 EXPORT_SYMBOL(ib_set_vf_link_state);
1773
1774 int ib_get_vf_config(struct ib_device *device, int vf, u8 port,
1775 struct ifla_vf_info *info)
1776 {
1777 if (!device->get_vf_config)
1778 return -ENOSYS;
1779
1780 return device->get_vf_config(device, vf, port, info);
1781 }
1782 EXPORT_SYMBOL(ib_get_vf_config);
1783
1784 int ib_get_vf_stats(struct ib_device *device, int vf, u8 port,
1785 struct ifla_vf_stats *stats)
1786 {
1787 if (!device->get_vf_stats)
1788 return -ENOSYS;
1789
1790 return device->get_vf_stats(device, vf, port, stats);
1791 }
1792 EXPORT_SYMBOL(ib_get_vf_stats);
1793
1794 int ib_set_vf_guid(struct ib_device *device, int vf, u8 port, u64 guid,
1795 int type)
1796 {
1797 if (!device->set_vf_guid)
1798 return -ENOSYS;
1799
1800 return device->set_vf_guid(device, vf, port, guid, type);
1801 }
1802 EXPORT_SYMBOL(ib_set_vf_guid);
1803
1804 /**
1805 * ib_map_mr_sg() - Map the largest prefix of a dma mapped SG list
1806 * and set it the memory region.
1807 * @mr: memory region
1808 * @sg: dma mapped scatterlist
1809 * @sg_nents: number of entries in sg
1810 * @sg_offset: offset in bytes into sg
1811 * @page_size: page vector desired page size
1812 *
1813 * Constraints:
1814 * - The first sg element is allowed to have an offset.
1815 * - Each sg element must be aligned to page_size (or physically
1816 * contiguous to the previous element). In case an sg element has a
1817 * non contiguous offset, the mapping prefix will not include it.
1818 * - The last sg element is allowed to have length less than page_size.
1819 * - If sg_nents total byte length exceeds the mr max_num_sge * page_size
1820 * then only max_num_sg entries will be mapped.
1821 * - If the MR was allocated with type IB_MR_TYPE_SG_GAPS_REG, non of these
1822 * constraints holds and the page_size argument is ignored.
1823 *
1824 * Returns the number of sg elements that were mapped to the memory region.
1825 *
1826 * After this completes successfully, the memory region
1827 * is ready for registration.
1828 */
1829 int ib_map_mr_sg(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
1830 unsigned int *sg_offset, unsigned int page_size)
1831 {
1832 if (unlikely(!mr->device->map_mr_sg))
1833 return -ENOSYS;
1834
1835 mr->page_size = page_size;
1836
1837 return mr->device->map_mr_sg(mr, sg, sg_nents, sg_offset);
1838 }
1839 EXPORT_SYMBOL(ib_map_mr_sg);
1840
1841 /**
1842 * ib_sg_to_pages() - Convert the largest prefix of a sg list
1843 * to a page vector
1844 * @mr: memory region
1845 * @sgl: dma mapped scatterlist
1846 * @sg_nents: number of entries in sg
1847 * @sg_offset_p: IN: start offset in bytes into sg
1848 * OUT: offset in bytes for element n of the sg of the first
1849 * byte that has not been processed where n is the return
1850 * value of this function.
1851 * @set_page: driver page assignment function pointer
1852 *
1853 * Core service helper for drivers to convert the largest
1854 * prefix of given sg list to a page vector. The sg list
1855 * prefix converted is the prefix that meet the requirements
1856 * of ib_map_mr_sg.
1857 *
1858 * Returns the number of sg elements that were assigned to
1859 * a page vector.
1860 */
1861 int ib_sg_to_pages(struct ib_mr *mr, struct scatterlist *sgl, int sg_nents,
1862 unsigned int *sg_offset_p, int (*set_page)(struct ib_mr *, u64))
1863 {
1864 struct scatterlist *sg;
1865 u64 last_end_dma_addr = 0;
1866 unsigned int sg_offset = sg_offset_p ? *sg_offset_p : 0;
1867 unsigned int last_page_off = 0;
1868 u64 page_mask = ~((u64)mr->page_size - 1);
1869 int i, ret;
1870
1871 if (unlikely(sg_nents <= 0 || sg_offset > sg_dma_len(&sgl[0])))
1872 return -EINVAL;
1873
1874 mr->iova = sg_dma_address(&sgl[0]) + sg_offset;
1875 mr->length = 0;
1876
1877 for_each_sg(sgl, sg, sg_nents, i) {
1878 u64 dma_addr = sg_dma_address(sg) + sg_offset;
1879 u64 prev_addr = dma_addr;
1880 unsigned int dma_len = sg_dma_len(sg) - sg_offset;
1881 u64 end_dma_addr = dma_addr + dma_len;
1882 u64 page_addr = dma_addr & page_mask;
1883
1884 /*
1885 * For the second and later elements, check whether either the
1886 * end of element i-1 or the start of element i is not aligned
1887 * on a page boundary.
1888 */
1889 if (i && (last_page_off != 0 || page_addr != dma_addr)) {
1890 /* Stop mapping if there is a gap. */
1891 if (last_end_dma_addr != dma_addr)
1892 break;
1893
1894 /*
1895 * Coalesce this element with the last. If it is small
1896 * enough just update mr->length. Otherwise start
1897 * mapping from the next page.
1898 */
1899 goto next_page;
1900 }
1901
1902 do {
1903 ret = set_page(mr, page_addr);
1904 if (unlikely(ret < 0)) {
1905 sg_offset = prev_addr - sg_dma_address(sg);
1906 mr->length += prev_addr - dma_addr;
1907 if (sg_offset_p)
1908 *sg_offset_p = sg_offset;
1909 return i || sg_offset ? i : ret;
1910 }
1911 prev_addr = page_addr;
1912 next_page:
1913 page_addr += mr->page_size;
1914 } while (page_addr < end_dma_addr);
1915
1916 mr->length += dma_len;
1917 last_end_dma_addr = end_dma_addr;
1918 last_page_off = end_dma_addr & ~page_mask;
1919
1920 sg_offset = 0;
1921 }
1922
1923 if (sg_offset_p)
1924 *sg_offset_p = 0;
1925 return i;
1926 }
1927 EXPORT_SYMBOL(ib_sg_to_pages);
1928
1929 struct ib_drain_cqe {
1930 struct ib_cqe cqe;
1931 struct completion done;
1932 };
1933
1934 static void ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc)
1935 {
1936 struct ib_drain_cqe *cqe = container_of(wc->wr_cqe, struct ib_drain_cqe,
1937 cqe);
1938
1939 complete(&cqe->done);
1940 }
1941
1942 /*
1943 * Post a WR and block until its completion is reaped for the SQ.
1944 */
1945 static void __ib_drain_sq(struct ib_qp *qp)
1946 {
1947 struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
1948 struct ib_drain_cqe sdrain;
1949 struct ib_send_wr swr = {}, *bad_swr;
1950 int ret;
1951
1952 if (qp->send_cq->poll_ctx == IB_POLL_DIRECT) {
1953 WARN_ONCE(qp->send_cq->poll_ctx == IB_POLL_DIRECT,
1954 "IB_POLL_DIRECT poll_ctx not supported for drain\n");
1955 return;
1956 }
1957
1958 swr.wr_cqe = &sdrain.cqe;
1959 sdrain.cqe.done = ib_drain_qp_done;
1960 init_completion(&sdrain.done);
1961
1962 ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
1963 if (ret) {
1964 WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
1965 return;
1966 }
1967
1968 ret = ib_post_send(qp, &swr, &bad_swr);
1969 if (ret) {
1970 WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
1971 return;
1972 }
1973
1974 wait_for_completion(&sdrain.done);
1975 }
1976
1977 /*
1978 * Post a WR and block until its completion is reaped for the RQ.
1979 */
1980 static void __ib_drain_rq(struct ib_qp *qp)
1981 {
1982 struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
1983 struct ib_drain_cqe rdrain;
1984 struct ib_recv_wr rwr = {}, *bad_rwr;
1985 int ret;
1986
1987 if (qp->recv_cq->poll_ctx == IB_POLL_DIRECT) {
1988 WARN_ONCE(qp->recv_cq->poll_ctx == IB_POLL_DIRECT,
1989 "IB_POLL_DIRECT poll_ctx not supported for drain\n");
1990 return;
1991 }
1992
1993 rwr.wr_cqe = &rdrain.cqe;
1994 rdrain.cqe.done = ib_drain_qp_done;
1995 init_completion(&rdrain.done);
1996
1997 ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
1998 if (ret) {
1999 WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
2000 return;
2001 }
2002
2003 ret = ib_post_recv(qp, &rwr, &bad_rwr);
2004 if (ret) {
2005 WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
2006 return;
2007 }
2008
2009 wait_for_completion(&rdrain.done);
2010 }
2011
2012 /**
2013 * ib_drain_sq() - Block until all SQ CQEs have been consumed by the
2014 * application.
2015 * @qp: queue pair to drain
2016 *
2017 * If the device has a provider-specific drain function, then
2018 * call that. Otherwise call the generic drain function
2019 * __ib_drain_sq().
2020 *
2021 * The caller must:
2022 *
2023 * ensure there is room in the CQ and SQ for the drain work request and
2024 * completion.
2025 *
2026 * allocate the CQ using ib_alloc_cq() and the CQ poll context cannot be
2027 * IB_POLL_DIRECT.
2028 *
2029 * ensure that there are no other contexts that are posting WRs concurrently.
2030 * Otherwise the drain is not guaranteed.
2031 */
2032 void ib_drain_sq(struct ib_qp *qp)
2033 {
2034 if (qp->device->drain_sq)
2035 qp->device->drain_sq(qp);
2036 else
2037 __ib_drain_sq(qp);
2038 }
2039 EXPORT_SYMBOL(ib_drain_sq);
2040
2041 /**
2042 * ib_drain_rq() - Block until all RQ CQEs have been consumed by the
2043 * application.
2044 * @qp: queue pair to drain
2045 *
2046 * If the device has a provider-specific drain function, then
2047 * call that. Otherwise call the generic drain function
2048 * __ib_drain_rq().
2049 *
2050 * The caller must:
2051 *
2052 * ensure there is room in the CQ and RQ for the drain work request and
2053 * completion.
2054 *
2055 * allocate the CQ using ib_alloc_cq() and the CQ poll context cannot be
2056 * IB_POLL_DIRECT.
2057 *
2058 * ensure that there are no other contexts that are posting WRs concurrently.
2059 * Otherwise the drain is not guaranteed.
2060 */
2061 void ib_drain_rq(struct ib_qp *qp)
2062 {
2063 if (qp->device->drain_rq)
2064 qp->device->drain_rq(qp);
2065 else
2066 __ib_drain_rq(qp);
2067 }
2068 EXPORT_SYMBOL(ib_drain_rq);
2069
2070 /**
2071 * ib_drain_qp() - Block until all CQEs have been consumed by the
2072 * application on both the RQ and SQ.
2073 * @qp: queue pair to drain
2074 *
2075 * The caller must:
2076 *
2077 * ensure there is room in the CQ(s), SQ, and RQ for drain work requests
2078 * and completions.
2079 *
2080 * allocate the CQs using ib_alloc_cq() and the CQ poll context cannot be
2081 * IB_POLL_DIRECT.
2082 *
2083 * ensure that there are no other contexts that are posting WRs concurrently.
2084 * Otherwise the drain is not guaranteed.
2085 */
2086 void ib_drain_qp(struct ib_qp *qp)
2087 {
2088 ib_drain_sq(qp);
2089 if (!qp->srq)
2090 ib_drain_rq(qp);
2091 }
2092 EXPORT_SYMBOL(ib_drain_qp);
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