Merge branch 'acpi' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev
[deliverable/linux.git] / drivers / infiniband / hw / ehca / ehca_classes.h
1 /*
2 * IBM eServer eHCA Infiniband device driver for Linux on POWER
3 *
4 * Struct definition for eHCA internal structures
5 *
6 * Authors: Heiko J Schick <schickhj@de.ibm.com>
7 * Christoph Raisch <raisch@de.ibm.com>
8 *
9 * Copyright (c) 2005 IBM Corporation
10 *
11 * All rights reserved.
12 *
13 * This source code is distributed under a dual license of GPL v2.0 and OpenIB
14 * BSD.
15 *
16 * OpenIB BSD License
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are met:
20 *
21 * Redistributions of source code must retain the above copyright notice, this
22 * list of conditions and the following disclaimer.
23 *
24 * Redistributions in binary form must reproduce the above copyright notice,
25 * this list of conditions and the following disclaimer in the documentation
26 * and/or other materials
27 * provided with the distribution.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
32 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
33 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
36 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
37 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 * POSSIBILITY OF SUCH DAMAGE.
40 */
41
42 #ifndef __EHCA_CLASSES_H__
43 #define __EHCA_CLASSES_H__
44
45
46 struct ehca_module;
47 struct ehca_qp;
48 struct ehca_cq;
49 struct ehca_eq;
50 struct ehca_mr;
51 struct ehca_mw;
52 struct ehca_pd;
53 struct ehca_av;
54
55 #include <rdma/ib_verbs.h>
56 #include <rdma/ib_user_verbs.h>
57
58 #ifdef CONFIG_PPC64
59 #include "ehca_classes_pSeries.h"
60 #endif
61 #include "ipz_pt_fn.h"
62 #include "ehca_qes.h"
63 #include "ehca_irq.h"
64
65 #define EHCA_EQE_CACHE_SIZE 20
66
67 struct ehca_eqe_cache_entry {
68 struct ehca_eqe *eqe;
69 struct ehca_cq *cq;
70 };
71
72 struct ehca_eq {
73 u32 length;
74 struct ipz_queue ipz_queue;
75 struct ipz_eq_handle ipz_eq_handle;
76 struct work_struct work;
77 struct h_galpas galpas;
78 int is_initialized;
79 struct ehca_pfeq pf;
80 spinlock_t spinlock;
81 struct tasklet_struct interrupt_task;
82 u32 ist;
83 spinlock_t irq_spinlock;
84 struct ehca_eqe_cache_entry eqe_cache[EHCA_EQE_CACHE_SIZE];
85 };
86
87 struct ehca_sport {
88 struct ib_cq *ibcq_aqp1;
89 struct ib_qp *ibqp_aqp1;
90 enum ib_rate rate;
91 enum ib_port_state port_state;
92 };
93
94 struct ehca_shca {
95 struct ib_device ib_device;
96 struct ibmebus_dev *ibmebus_dev;
97 u8 num_ports;
98 int hw_level;
99 struct list_head shca_list;
100 struct ipz_adapter_handle ipz_hca_handle;
101 struct ehca_sport sport[2];
102 struct ehca_eq eq;
103 struct ehca_eq neq;
104 struct ehca_mr *maxmr;
105 struct ehca_pd *pd;
106 struct h_galpas galpas;
107 };
108
109 struct ehca_pd {
110 struct ib_pd ib_pd;
111 struct ipz_pd fw_pd;
112 u32 ownpid;
113 };
114
115 struct ehca_qp {
116 struct ib_qp ib_qp;
117 u32 qp_type;
118 struct ipz_queue ipz_squeue;
119 struct ipz_queue ipz_rqueue;
120 struct h_galpas galpas;
121 u32 qkey;
122 u32 real_qp_num;
123 u32 token;
124 spinlock_t spinlock_s;
125 spinlock_t spinlock_r;
126 u32 sq_max_inline_data_size;
127 struct ipz_qp_handle ipz_qp_handle;
128 struct ehca_pfqp pf;
129 struct ib_qp_init_attr init_attr;
130 struct ehca_cq *send_cq;
131 struct ehca_cq *recv_cq;
132 unsigned int sqerr_purgeflag;
133 struct hlist_node list_entries;
134 /* mmap counter for resources mapped into user space */
135 u32 mm_count_squeue;
136 u32 mm_count_rqueue;
137 u32 mm_count_galpa;
138 };
139
140 /* must be power of 2 */
141 #define QP_HASHTAB_LEN 8
142
143 struct ehca_cq {
144 struct ib_cq ib_cq;
145 struct ipz_queue ipz_queue;
146 struct h_galpas galpas;
147 spinlock_t spinlock;
148 u32 cq_number;
149 u32 token;
150 u32 nr_of_entries;
151 struct ipz_cq_handle ipz_cq_handle;
152 struct ehca_pfcq pf;
153 spinlock_t cb_lock;
154 struct hlist_head qp_hashtab[QP_HASHTAB_LEN];
155 struct list_head entry;
156 u32 nr_callbacks;
157 spinlock_t task_lock;
158 u32 ownpid;
159 /* mmap counter for resources mapped into user space */
160 u32 mm_count_queue;
161 u32 mm_count_galpa;
162 };
163
164 enum ehca_mr_flag {
165 EHCA_MR_FLAG_FMR = 0x80000000, /* FMR, created with ehca_alloc_fmr */
166 EHCA_MR_FLAG_MAXMR = 0x40000000, /* max-MR */
167 };
168
169 struct ehca_mr {
170 union {
171 struct ib_mr ib_mr; /* must always be first in ehca_mr */
172 struct ib_fmr ib_fmr; /* must always be first in ehca_mr */
173 } ib;
174 spinlock_t mrlock;
175
176 enum ehca_mr_flag flags;
177 u32 num_pages; /* number of MR pages */
178 u32 num_4k; /* number of 4k "page" portions to form MR */
179 int acl; /* ACL (stored here for usage in reregister) */
180 u64 *start; /* virtual start address (stored here for */
181 /* usage in reregister) */
182 u64 size; /* size (stored here for usage in reregister) */
183 u32 fmr_page_size; /* page size for FMR */
184 u32 fmr_max_pages; /* max pages for FMR */
185 u32 fmr_max_maps; /* max outstanding maps for FMR */
186 u32 fmr_map_cnt; /* map counter for FMR */
187 /* fw specific data */
188 struct ipz_mrmw_handle ipz_mr_handle; /* MR handle for h-calls */
189 struct h_galpas galpas;
190 /* data for userspace bridge */
191 u32 nr_of_pages;
192 void *pagearray;
193 };
194
195 struct ehca_mw {
196 struct ib_mw ib_mw; /* gen2 mw, must always be first in ehca_mw */
197 spinlock_t mwlock;
198
199 u8 never_bound; /* indication MW was never bound */
200 struct ipz_mrmw_handle ipz_mw_handle; /* MW handle for h-calls */
201 struct h_galpas galpas;
202 };
203
204 enum ehca_mr_pgi_type {
205 EHCA_MR_PGI_PHYS = 1, /* type of ehca_reg_phys_mr,
206 * ehca_rereg_phys_mr,
207 * ehca_reg_internal_maxmr */
208 EHCA_MR_PGI_USER = 2, /* type of ehca_reg_user_mr */
209 EHCA_MR_PGI_FMR = 3 /* type of ehca_map_phys_fmr */
210 };
211
212 struct ehca_mr_pginfo {
213 enum ehca_mr_pgi_type type;
214 u64 num_pages;
215 u64 page_cnt;
216 u64 num_4k; /* number of 4k "page" portions */
217 u64 page_4k_cnt; /* counter for 4k "page" portions */
218 u64 next_4k; /* next 4k "page" portion in buffer/chunk/listelem */
219
220 /* type EHCA_MR_PGI_PHYS section */
221 int num_phys_buf;
222 struct ib_phys_buf *phys_buf_array;
223 u64 next_buf;
224
225 /* type EHCA_MR_PGI_USER section */
226 struct ib_umem *region;
227 struct ib_umem_chunk *next_chunk;
228 u64 next_nmap;
229
230 /* type EHCA_MR_PGI_FMR section */
231 u64 *page_list;
232 u64 next_listelem;
233 /* next_4k also used within EHCA_MR_PGI_FMR */
234 };
235
236 /* output parameters for MR/FMR hipz calls */
237 struct ehca_mr_hipzout_parms {
238 struct ipz_mrmw_handle handle;
239 u32 lkey;
240 u32 rkey;
241 u64 len;
242 u64 vaddr;
243 u32 acl;
244 };
245
246 /* output parameters for MW hipz calls */
247 struct ehca_mw_hipzout_parms {
248 struct ipz_mrmw_handle handle;
249 u32 rkey;
250 };
251
252 struct ehca_av {
253 struct ib_ah ib_ah;
254 struct ehca_ud_av av;
255 };
256
257 struct ehca_ucontext {
258 struct ib_ucontext ib_ucontext;
259 };
260
261 int ehca_init_pd_cache(void);
262 void ehca_cleanup_pd_cache(void);
263 int ehca_init_cq_cache(void);
264 void ehca_cleanup_cq_cache(void);
265 int ehca_init_qp_cache(void);
266 void ehca_cleanup_qp_cache(void);
267 int ehca_init_av_cache(void);
268 void ehca_cleanup_av_cache(void);
269 int ehca_init_mrmw_cache(void);
270 void ehca_cleanup_mrmw_cache(void);
271
272 extern spinlock_t ehca_qp_idr_lock;
273 extern spinlock_t ehca_cq_idr_lock;
274 extern struct idr ehca_qp_idr;
275 extern struct idr ehca_cq_idr;
276
277 extern int ehca_static_rate;
278 extern int ehca_port_act_time;
279 extern int ehca_use_hp_mr;
280 extern int ehca_scaling_code;
281
282 struct ipzu_queue_resp {
283 u32 qe_size; /* queue entry size */
284 u32 act_nr_of_sg;
285 u32 queue_length; /* queue length allocated in bytes */
286 u32 pagesize;
287 u32 toggle_state;
288 u32 dummy; /* padding for 8 byte alignment */
289 };
290
291 struct ehca_create_cq_resp {
292 u32 cq_number;
293 u32 token;
294 struct ipzu_queue_resp ipz_queue;
295 };
296
297 struct ehca_create_qp_resp {
298 u32 qp_num;
299 u32 token;
300 u32 qp_type;
301 u32 qkey;
302 /* qp_num assigned by ehca: sqp0/1 may have got different numbers */
303 u32 real_qp_num;
304 u32 dummy; /* padding for 8 byte alignment */
305 struct ipzu_queue_resp ipz_squeue;
306 struct ipzu_queue_resp ipz_rqueue;
307 };
308
309 struct ehca_alloc_cq_parms {
310 u32 nr_cqe;
311 u32 act_nr_of_entries;
312 u32 act_pages;
313 struct ipz_eq_handle eq_handle;
314 };
315
316 struct ehca_alloc_qp_parms {
317 int servicetype;
318 int sigtype;
319 int daqp_ctrl;
320 int max_send_sge;
321 int max_recv_sge;
322 int ud_av_l_key_ctl;
323
324 u16 act_nr_send_wqes;
325 u16 act_nr_recv_wqes;
326 u8 act_nr_recv_sges;
327 u8 act_nr_send_sges;
328
329 u32 nr_rq_pages;
330 u32 nr_sq_pages;
331
332 struct ipz_eq_handle ipz_eq_handle;
333 struct ipz_pd pd;
334 };
335
336 int ehca_cq_assign_qp(struct ehca_cq *cq, struct ehca_qp *qp);
337 int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int qp_num);
338 struct ehca_qp* ehca_cq_get_qp(struct ehca_cq *cq, int qp_num);
339
340 #endif
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