2 * IBM eServer eHCA Infiniband device driver for Linux on POWER
6 * Authors: Waleri Fomin <fomin@de.ibm.com>
7 * Hoang-Nam Nguyen <hnguyen@de.ibm.com>
8 * Reinhard Ernst <rernst@de.ibm.com>
9 * Heiko J Schick <schickhj@de.ibm.com>
11 * Copyright (c) 2005 IBM Corporation
13 * All rights reserved.
15 * This source code is distributed under a dual license of GPL v2.0 and OpenIB
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions are met:
23 * Redistributions of source code must retain the above copyright notice, this
24 * list of conditions and the following disclaimer.
26 * Redistributions in binary form must reproduce the above copyright notice,
27 * this list of conditions and the following disclaimer in the documentation
28 * and/or other materials
29 * provided with the distribution.
31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
34 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
35 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
36 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
37 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
38 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
39 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
40 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
41 * POSSIBILITY OF SUCH DAMAGE.
45 #include <asm/current.h>
47 #include "ehca_classes.h"
48 #include "ehca_tools.h"
50 #include "ehca_iverbs.h"
54 static struct kmem_cache
*qp_cache
;
57 * attributes not supported by query qp
59 #define QP_ATTR_QUERY_NOT_SUPPORTED (IB_QP_MAX_DEST_RD_ATOMIC | \
60 IB_QP_MAX_QP_RD_ATOMIC | \
61 IB_QP_ACCESS_FLAGS | \
62 IB_QP_EN_SQD_ASYNC_NOTIFY)
65 * ehca (internal) qp state values
78 * qp state transitions as defined by IB Arch Rel 1.1 page 431
80 enum ib_qp_statetrans
{
92 IB_QPST_MAX
/* nr of transitions, this must be last!!! */
96 * ib2ehca_qp_state maps IB to ehca qp_state
97 * returns ehca qp state corresponding to given ib qp state
99 static inline enum ehca_qp_state
ib2ehca_qp_state(enum ib_qp_state ib_qp_state
)
101 switch (ib_qp_state
) {
103 return EHCA_QPS_RESET
;
105 return EHCA_QPS_INIT
;
117 ehca_gen_err("invalid ib_qp_state=%x", ib_qp_state
);
123 * ehca2ib_qp_state maps ehca to IB qp_state
124 * returns ib qp state corresponding to given ehca qp state
126 static inline enum ib_qp_state
ehca2ib_qp_state(enum ehca_qp_state
129 switch (ehca_qp_state
) {
145 ehca_gen_err("invalid ehca_qp_state=%x", ehca_qp_state
);
151 * ehca_qp_type used as index for req_attr and opt_attr of
152 * struct ehca_modqp_statetrans
163 * ib2ehcaqptype maps Ib to ehca qp_type
164 * returns ehca qp type corresponding to ib qp type
166 static inline enum ehca_qp_type
ib2ehcaqptype(enum ib_qp_type ibqptype
)
179 ehca_gen_err("Invalid ibqptype=%x", ibqptype
);
184 static inline enum ib_qp_statetrans
get_modqp_statetrans(int ib_fromstate
,
188 switch (ib_tostate
) {
190 index
= IB_QPST_ANY2RESET
;
193 switch (ib_fromstate
) {
195 index
= IB_QPST_RESET2INIT
;
198 index
= IB_QPST_INIT2INIT
;
203 if (ib_fromstate
== IB_QPS_INIT
)
204 index
= IB_QPST_INIT2RTR
;
207 switch (ib_fromstate
) {
209 index
= IB_QPST_RTR2RTS
;
212 index
= IB_QPST_RTS2RTS
;
215 index
= IB_QPST_SQD2RTS
;
218 index
= IB_QPST_SQE2RTS
;
223 if (ib_fromstate
== IB_QPS_RTS
)
224 index
= IB_QPST_RTS2SQD
;
229 index
= IB_QPST_ANY2ERR
;
237 enum ehca_service_type
{
245 * ibqptype2servicetype returns hcp service type corresponding to given
246 * ib qp type used by create_qp()
248 static inline int ibqptype2servicetype(enum ib_qp_type ibqptype
)
260 case IB_QPT_RAW_IPV6
:
265 ehca_gen_err("Invalid ibqptype=%x", ibqptype
);
271 * init_qp_queues initializes/constructs r/squeue and registers queue pages.
273 static inline int init_qp_queues(struct ehca_shca
*shca
,
274 struct ehca_qp
*my_qp
,
279 int nr_send_sges
, int nr_receive_sges
)
281 int ret
, cnt
, ipz_rc
;
284 struct ib_device
*ib_dev
= &shca
->ib_device
;
285 struct ipz_adapter_handle ipz_hca_handle
= shca
->ipz_hca_handle
;
287 ipz_rc
= ipz_queue_ctor(&my_qp
->ipz_squeue
,
289 EHCA_PAGESIZE
, swqe_size
, nr_send_sges
);
291 ehca_err(ib_dev
,"Cannot allocate page for squeue. ipz_rc=%x",
296 ipz_rc
= ipz_queue_ctor(&my_qp
->ipz_rqueue
,
298 EHCA_PAGESIZE
, rwqe_size
, nr_receive_sges
);
300 ehca_err(ib_dev
, "Cannot allocate page for rqueue. ipz_rc=%x",
303 goto init_qp_queues0
;
305 /* register SQ pages */
306 for (cnt
= 0; cnt
< nr_sq_pages
; cnt
++) {
307 vpage
= ipz_qpageit_get_inc(&my_qp
->ipz_squeue
);
309 ehca_err(ib_dev
, "SQ ipz_qpageit_get_inc() "
310 "failed p_vpage= %p", vpage
);
312 goto init_qp_queues1
;
314 rpage
= virt_to_abs(vpage
);
316 h_ret
= hipz_h_register_rpage_qp(ipz_hca_handle
,
317 my_qp
->ipz_qp_handle
,
320 my_qp
->galpas
.kernel
);
321 if (h_ret
< H_SUCCESS
) {
322 ehca_err(ib_dev
, "SQ hipz_qp_register_rpage()"
323 " failed rc=%lx", h_ret
);
324 ret
= ehca2ib_return_code(h_ret
);
325 goto init_qp_queues1
;
329 ipz_qeit_reset(&my_qp
->ipz_squeue
);
331 /* register RQ pages */
332 for (cnt
= 0; cnt
< nr_rq_pages
; cnt
++) {
333 vpage
= ipz_qpageit_get_inc(&my_qp
->ipz_rqueue
);
335 ehca_err(ib_dev
, "RQ ipz_qpageit_get_inc() "
336 "failed p_vpage = %p", vpage
);
338 goto init_qp_queues1
;
341 rpage
= virt_to_abs(vpage
);
343 h_ret
= hipz_h_register_rpage_qp(ipz_hca_handle
,
344 my_qp
->ipz_qp_handle
,
346 rpage
, 1,my_qp
->galpas
.kernel
);
347 if (h_ret
< H_SUCCESS
) {
348 ehca_err(ib_dev
, "RQ hipz_qp_register_rpage() failed "
350 ret
= ehca2ib_return_code(h_ret
);
351 goto init_qp_queues1
;
353 if (cnt
== (nr_rq_pages
- 1)) { /* last page! */
354 if (h_ret
!= H_SUCCESS
) {
355 ehca_err(ib_dev
, "RQ hipz_qp_register_rpage() "
356 "h_ret= %lx ", h_ret
);
357 ret
= ehca2ib_return_code(h_ret
);
358 goto init_qp_queues1
;
360 vpage
= ipz_qpageit_get_inc(&my_qp
->ipz_rqueue
);
362 ehca_err(ib_dev
, "ipz_qpageit_get_inc() "
363 "should not succeed vpage=%p", vpage
);
365 goto init_qp_queues1
;
368 if (h_ret
!= H_PAGE_REGISTERED
) {
369 ehca_err(ib_dev
, "RQ hipz_qp_register_rpage() "
370 "h_ret= %lx ", h_ret
);
371 ret
= ehca2ib_return_code(h_ret
);
372 goto init_qp_queues1
;
377 ipz_qeit_reset(&my_qp
->ipz_rqueue
);
382 ipz_queue_dtor(&my_qp
->ipz_rqueue
);
384 ipz_queue_dtor(&my_qp
->ipz_squeue
);
388 struct ib_qp
*ehca_create_qp(struct ib_pd
*pd
,
389 struct ib_qp_init_attr
*init_attr
,
390 struct ib_udata
*udata
)
392 static int da_rc_msg_size
[]={ 128, 256, 512, 1024, 2048, 4096 };
393 static int da_ud_sq_msg_size
[]={ 128, 384, 896, 1920, 3968 };
394 struct ehca_qp
*my_qp
;
395 struct ehca_pd
*my_pd
= container_of(pd
, struct ehca_pd
, ib_pd
);
396 struct ehca_shca
*shca
= container_of(pd
->device
, struct ehca_shca
,
398 struct ib_ucontext
*context
= NULL
;
400 int max_send_sge
, max_recv_sge
, ret
;
402 /* h_call's out parameters */
403 struct ehca_alloc_qp_parms parms
;
404 u32 swqe_size
= 0, rwqe_size
= 0;
405 u8 daqp_completion
, isdaqp
;
408 if (init_attr
->sq_sig_type
!= IB_SIGNAL_REQ_WR
&&
409 init_attr
->sq_sig_type
!= IB_SIGNAL_ALL_WR
) {
410 ehca_err(pd
->device
, "init_attr->sg_sig_type=%x not allowed",
411 init_attr
->sq_sig_type
);
412 return ERR_PTR(-EINVAL
);
415 /* save daqp completion bits */
416 daqp_completion
= init_attr
->qp_type
& 0x60;
418 isdaqp
= (init_attr
->qp_type
& 0x80) ? 1 : 0;
419 init_attr
->qp_type
= init_attr
->qp_type
& 0x1F;
421 if (init_attr
->qp_type
!= IB_QPT_UD
&&
422 init_attr
->qp_type
!= IB_QPT_SMI
&&
423 init_attr
->qp_type
!= IB_QPT_GSI
&&
424 init_attr
->qp_type
!= IB_QPT_UC
&&
425 init_attr
->qp_type
!= IB_QPT_RC
) {
426 ehca_err(pd
->device
, "wrong QP Type=%x", init_attr
->qp_type
);
427 return ERR_PTR(-EINVAL
);
429 if ((init_attr
->qp_type
!= IB_QPT_RC
&& init_attr
->qp_type
!= IB_QPT_UD
)
431 ehca_err(pd
->device
, "unsupported LL QP Type=%x",
433 return ERR_PTR(-EINVAL
);
434 } else if (init_attr
->qp_type
== IB_QPT_RC
&& isdaqp
&&
435 (init_attr
->cap
.max_send_wr
> 255 ||
436 init_attr
->cap
.max_recv_wr
> 255 )) {
437 ehca_err(pd
->device
, "Invalid Number of max_sq_wr =%x "
438 "or max_rq_wr=%x for QP Type=%x",
439 init_attr
->cap
.max_send_wr
,
440 init_attr
->cap
.max_recv_wr
,init_attr
->qp_type
);
441 return ERR_PTR(-EINVAL
);
442 } else if (init_attr
->qp_type
== IB_QPT_UD
&& isdaqp
&&
443 init_attr
->cap
.max_send_wr
> 255) {
445 "Invalid Number of max_send_wr=%x for UD QP_TYPE=%x",
446 init_attr
->cap
.max_send_wr
, init_attr
->qp_type
);
447 return ERR_PTR(-EINVAL
);
450 if (pd
->uobject
&& udata
)
451 context
= pd
->uobject
->context
;
453 my_qp
= kmem_cache_alloc(qp_cache
, SLAB_KERNEL
);
455 ehca_err(pd
->device
, "pd=%p not enough memory to alloc qp", pd
);
456 return ERR_PTR(-ENOMEM
);
459 memset(my_qp
, 0, sizeof(struct ehca_qp
));
460 memset (&parms
, 0, sizeof(struct ehca_alloc_qp_parms
));
461 spin_lock_init(&my_qp
->spinlock_s
);
462 spin_lock_init(&my_qp
->spinlock_r
);
465 container_of(init_attr
->recv_cq
, struct ehca_cq
, ib_cq
);
467 container_of(init_attr
->send_cq
, struct ehca_cq
, ib_cq
);
469 my_qp
->init_attr
= *init_attr
;
472 if (!idr_pre_get(&ehca_qp_idr
, GFP_KERNEL
)) {
474 ehca_err(pd
->device
, "Can't reserve idr resources.");
475 goto create_qp_exit0
;
478 spin_lock_irqsave(&ehca_qp_idr_lock
, flags
);
479 ret
= idr_get_new(&ehca_qp_idr
, my_qp
, &my_qp
->token
);
480 spin_unlock_irqrestore(&ehca_qp_idr_lock
, flags
);
482 } while (ret
== -EAGAIN
);
486 ehca_err(pd
->device
, "Can't allocate new idr entry.");
487 goto create_qp_exit0
;
490 parms
.servicetype
= ibqptype2servicetype(init_attr
->qp_type
);
491 if (parms
.servicetype
< 0) {
493 ehca_err(pd
->device
, "Invalid qp_type=%x", init_attr
->qp_type
);
494 goto create_qp_exit0
;
497 if (init_attr
->sq_sig_type
== IB_SIGNAL_ALL_WR
)
498 parms
.sigtype
= HCALL_SIGT_EVERY
;
500 parms
.sigtype
= HCALL_SIGT_BY_WQE
;
502 /* UD_AV CIRCUMVENTION */
503 max_send_sge
= init_attr
->cap
.max_send_sge
;
504 max_recv_sge
= init_attr
->cap
.max_recv_sge
;
505 if (IB_QPT_UD
== init_attr
->qp_type
||
506 IB_QPT_GSI
== init_attr
->qp_type
||
507 IB_QPT_SMI
== init_attr
->qp_type
) {
512 parms
.ipz_eq_handle
= shca
->eq
.ipz_eq_handle
;
513 parms
.daqp_ctrl
= isdaqp
| daqp_completion
;
514 parms
.pd
= my_pd
->fw_pd
;
515 parms
.max_recv_sge
= max_recv_sge
;
516 parms
.max_send_sge
= max_send_sge
;
518 h_ret
= hipz_h_alloc_resource_qp(shca
->ipz_hca_handle
, my_qp
, &parms
);
520 if (h_ret
!= H_SUCCESS
) {
521 ehca_err(pd
->device
, "h_alloc_resource_qp() failed h_ret=%lx",
523 ret
= ehca2ib_return_code(h_ret
);
524 goto create_qp_exit1
;
527 switch (init_attr
->qp_type
) {
530 swqe_size
= offsetof(struct ehca_wqe
, u
.nud
.sg_list
[
531 (parms
.act_nr_send_sges
)]);
532 rwqe_size
= offsetof(struct ehca_wqe
, u
.nud
.sg_list
[
533 (parms
.act_nr_recv_sges
)]);
534 } else { /* for daqp we need to use msg size, not wqe size */
535 swqe_size
= da_rc_msg_size
[max_send_sge
];
536 rwqe_size
= da_rc_msg_size
[max_recv_sge
];
537 parms
.act_nr_send_sges
= 1;
538 parms
.act_nr_recv_sges
= 1;
542 swqe_size
= offsetof(struct ehca_wqe
,
543 u
.nud
.sg_list
[parms
.act_nr_send_sges
]);
544 rwqe_size
= offsetof(struct ehca_wqe
,
545 u
.nud
.sg_list
[parms
.act_nr_recv_sges
]);
551 /* UD circumvention */
552 parms
.act_nr_recv_sges
-= 2;
553 parms
.act_nr_send_sges
-= 2;
555 swqe_size
= da_ud_sq_msg_size
[max_send_sge
];
556 rwqe_size
= da_rc_msg_size
[max_recv_sge
];
557 parms
.act_nr_send_sges
= 1;
558 parms
.act_nr_recv_sges
= 1;
560 swqe_size
= offsetof(struct ehca_wqe
,
561 u
.ud_av
.sg_list
[parms
.act_nr_send_sges
]);
562 rwqe_size
= offsetof(struct ehca_wqe
,
563 u
.ud_av
.sg_list
[parms
.act_nr_recv_sges
]);
566 if (IB_QPT_GSI
== init_attr
->qp_type
||
567 IB_QPT_SMI
== init_attr
->qp_type
) {
568 parms
.act_nr_send_wqes
= init_attr
->cap
.max_send_wr
;
569 parms
.act_nr_recv_wqes
= init_attr
->cap
.max_recv_wr
;
570 parms
.act_nr_send_sges
= init_attr
->cap
.max_send_sge
;
571 parms
.act_nr_recv_sges
= init_attr
->cap
.max_recv_sge
;
573 (init_attr
->qp_type
== IB_QPT_SMI
) ? 0 : 1;
582 /* initializes r/squeue and registers queue pages */
583 ret
= init_qp_queues(shca
, my_qp
,
584 parms
.nr_sq_pages
, parms
.nr_rq_pages
,
585 swqe_size
, rwqe_size
,
586 parms
.act_nr_send_sges
, parms
.act_nr_recv_sges
);
589 "Couldn't initialize r/squeue and pages ret=%x", ret
);
590 goto create_qp_exit2
;
593 my_qp
->ib_qp
.pd
= &my_pd
->ib_pd
;
594 my_qp
->ib_qp
.device
= my_pd
->ib_pd
.device
;
596 my_qp
->ib_qp
.recv_cq
= init_attr
->recv_cq
;
597 my_qp
->ib_qp
.send_cq
= init_attr
->send_cq
;
599 my_qp
->ib_qp
.qp_num
= my_qp
->real_qp_num
;
600 my_qp
->ib_qp
.qp_type
= init_attr
->qp_type
;
602 my_qp
->qp_type
= init_attr
->qp_type
;
603 my_qp
->ib_qp
.srq
= init_attr
->srq
;
605 my_qp
->ib_qp
.qp_context
= init_attr
->qp_context
;
606 my_qp
->ib_qp
.event_handler
= init_attr
->event_handler
;
608 init_attr
->cap
.max_inline_data
= 0; /* not supported yet */
609 init_attr
->cap
.max_recv_sge
= parms
.act_nr_recv_sges
;
610 init_attr
->cap
.max_recv_wr
= parms
.act_nr_recv_wqes
;
611 init_attr
->cap
.max_send_sge
= parms
.act_nr_send_sges
;
612 init_attr
->cap
.max_send_wr
= parms
.act_nr_send_wqes
;
614 /* NOTE: define_apq0() not supported yet */
615 if (init_attr
->qp_type
== IB_QPT_GSI
) {
616 h_ret
= ehca_define_sqp(shca
, my_qp
, init_attr
);
617 if (h_ret
!= H_SUCCESS
) {
618 ehca_err(pd
->device
, "ehca_define_sqp() failed rc=%lx",
620 ret
= ehca2ib_return_code(h_ret
);
621 goto create_qp_exit3
;
624 if (init_attr
->send_cq
) {
625 struct ehca_cq
*cq
= container_of(init_attr
->send_cq
,
626 struct ehca_cq
, ib_cq
);
627 ret
= ehca_cq_assign_qp(cq
, my_qp
);
629 ehca_err(pd
->device
, "Couldn't assign qp to send_cq ret=%x",
631 goto create_qp_exit3
;
635 /* copy queues, galpa data to user space */
636 if (context
&& udata
) {
637 struct ipz_queue
*ipz_rqueue
= &my_qp
->ipz_rqueue
;
638 struct ipz_queue
*ipz_squeue
= &my_qp
->ipz_squeue
;
639 struct ehca_create_qp_resp resp
;
640 struct vm_area_struct
* vma
;
641 memset(&resp
, 0, sizeof(resp
));
643 resp
.qp_num
= my_qp
->real_qp_num
;
644 resp
.token
= my_qp
->token
;
645 resp
.qp_type
= my_qp
->qp_type
;
646 resp
.qkey
= my_qp
->qkey
;
647 resp
.real_qp_num
= my_qp
->real_qp_num
;
648 /* rqueue properties */
649 resp
.ipz_rqueue
.qe_size
= ipz_rqueue
->qe_size
;
650 resp
.ipz_rqueue
.act_nr_of_sg
= ipz_rqueue
->act_nr_of_sg
;
651 resp
.ipz_rqueue
.queue_length
= ipz_rqueue
->queue_length
;
652 resp
.ipz_rqueue
.pagesize
= ipz_rqueue
->pagesize
;
653 resp
.ipz_rqueue
.toggle_state
= ipz_rqueue
->toggle_state
;
654 ret
= ehca_mmap_nopage(((u64
)(my_qp
->token
) << 32) | 0x22000000,
655 ipz_rqueue
->queue_length
,
656 (void**)&resp
.ipz_rqueue
.queue
,
659 ehca_err(pd
->device
, "Could not mmap rqueue pages");
660 goto create_qp_exit3
;
662 my_qp
->uspace_rqueue
= resp
.ipz_rqueue
.queue
;
663 /* squeue properties */
664 resp
.ipz_squeue
.qe_size
= ipz_squeue
->qe_size
;
665 resp
.ipz_squeue
.act_nr_of_sg
= ipz_squeue
->act_nr_of_sg
;
666 resp
.ipz_squeue
.queue_length
= ipz_squeue
->queue_length
;
667 resp
.ipz_squeue
.pagesize
= ipz_squeue
->pagesize
;
668 resp
.ipz_squeue
.toggle_state
= ipz_squeue
->toggle_state
;
669 ret
= ehca_mmap_nopage(((u64
)(my_qp
->token
) << 32) | 0x23000000,
670 ipz_squeue
->queue_length
,
671 (void**)&resp
.ipz_squeue
.queue
,
674 ehca_err(pd
->device
, "Could not mmap squeue pages");
675 goto create_qp_exit4
;
677 my_qp
->uspace_squeue
= resp
.ipz_squeue
.queue
;
679 resp
.galpas
= my_qp
->galpas
;
680 ret
= ehca_mmap_register(my_qp
->galpas
.user
.fw_handle
,
681 (void**)&resp
.galpas
.kernel
.fw_handle
,
684 ehca_err(pd
->device
, "Could not mmap fw_handle");
685 goto create_qp_exit5
;
687 my_qp
->uspace_fwh
= (u64
)resp
.galpas
.kernel
.fw_handle
;
689 if (ib_copy_to_udata(udata
, &resp
, sizeof resp
)) {
690 ehca_err(pd
->device
, "Copy to udata failed");
692 goto create_qp_exit6
;
696 return &my_qp
->ib_qp
;
699 ehca_munmap(my_qp
->uspace_fwh
, EHCA_PAGESIZE
);
702 ehca_munmap(my_qp
->uspace_squeue
, my_qp
->ipz_squeue
.queue_length
);
705 ehca_munmap(my_qp
->uspace_rqueue
, my_qp
->ipz_rqueue
.queue_length
);
708 ipz_queue_dtor(&my_qp
->ipz_rqueue
);
709 ipz_queue_dtor(&my_qp
->ipz_squeue
);
712 hipz_h_destroy_qp(shca
->ipz_hca_handle
, my_qp
);
715 spin_lock_irqsave(&ehca_qp_idr_lock
, flags
);
716 idr_remove(&ehca_qp_idr
, my_qp
->token
);
717 spin_unlock_irqrestore(&ehca_qp_idr_lock
, flags
);
720 kmem_cache_free(qp_cache
, my_qp
);
725 * prepare_sqe_rts called by internal_modify_qp() at trans sqe -> rts
726 * set purge bit of bad wqe and subsequent wqes to avoid reentering sqe
727 * returns total number of bad wqes in bad_wqe_cnt
729 static int prepare_sqe_rts(struct ehca_qp
*my_qp
, struct ehca_shca
*shca
,
733 struct ipz_queue
*squeue
;
734 void *bad_send_wqe_p
, *bad_send_wqe_v
;
735 void *squeue_start_p
, *squeue_end_p
;
736 void *squeue_start_v
, *squeue_end_v
;
737 struct ehca_wqe
*wqe
;
738 int qp_num
= my_qp
->ib_qp
.qp_num
;
740 /* get send wqe pointer */
741 h_ret
= hipz_h_disable_and_get_wqe(shca
->ipz_hca_handle
,
742 my_qp
->ipz_qp_handle
, &my_qp
->pf
,
743 &bad_send_wqe_p
, NULL
, 2);
744 if (h_ret
!= H_SUCCESS
) {
745 ehca_err(&shca
->ib_device
, "hipz_h_disable_and_get_wqe() failed"
746 " ehca_qp=%p qp_num=%x h_ret=%lx",
747 my_qp
, qp_num
, h_ret
);
748 return ehca2ib_return_code(h_ret
);
750 bad_send_wqe_p
= (void*)((u64
)bad_send_wqe_p
& (~(1L<<63)));
751 ehca_dbg(&shca
->ib_device
, "qp_num=%x bad_send_wqe_p=%p",
752 qp_num
, bad_send_wqe_p
);
753 /* convert wqe pointer to vadr */
754 bad_send_wqe_v
= abs_to_virt((u64
)bad_send_wqe_p
);
755 if (ehca_debug_level
)
756 ehca_dmp(bad_send_wqe_v
, 32, "qp_num=%x bad_wqe", qp_num
);
757 squeue
= &my_qp
->ipz_squeue
;
758 squeue_start_p
= (void*)virt_to_abs(ipz_qeit_calc(squeue
, 0L));
759 squeue_end_p
= squeue_start_p
+squeue
->queue_length
;
760 squeue_start_v
= abs_to_virt((u64
)squeue_start_p
);
761 squeue_end_v
= abs_to_virt((u64
)squeue_end_p
);
762 ehca_dbg(&shca
->ib_device
, "qp_num=%x squeue_start_v=%p squeue_end_v=%p",
763 qp_num
, squeue_start_v
, squeue_end_v
);
765 /* loop sets wqe's purge bit */
766 wqe
= (struct ehca_wqe
*)bad_send_wqe_v
;
768 while (wqe
->optype
!= 0xff && wqe
->wqef
!= 0xff) {
769 if (ehca_debug_level
)
770 ehca_dmp(wqe
, 32, "qp_num=%x wqe", qp_num
);
771 wqe
->nr_of_data_seg
= 0; /* suppress data access */
772 wqe
->wqef
= WQEF_PURGE
; /* WQE to be purged */
773 wqe
= (struct ehca_wqe
*)((u8
*)wqe
+squeue
->qe_size
);
774 *bad_wqe_cnt
= (*bad_wqe_cnt
)+1;
775 if ((void*)wqe
>= squeue_end_v
) {
776 wqe
= squeue_start_v
;
780 * bad wqe will be reprocessed and ignored when pol_cq() is called,
781 * i.e. nr of wqes with flush error status is one less
783 ehca_dbg(&shca
->ib_device
, "qp_num=%x flusherr_wqe_cnt=%x",
784 qp_num
, (*bad_wqe_cnt
)-1);
791 * internal_modify_qp with circumvention to handle aqp0 properly
792 * smi_reset2init indicates if this is an internal reset-to-init-call for
793 * smi. This flag must always be zero if called from ehca_modify_qp()!
794 * This internal func was intorduced to avoid recursion of ehca_modify_qp()!
796 static int internal_modify_qp(struct ib_qp
*ibqp
,
797 struct ib_qp_attr
*attr
,
798 int attr_mask
, int smi_reset2init
)
800 enum ib_qp_state qp_cur_state
, qp_new_state
;
801 int cnt
, qp_attr_idx
, ret
= 0;
802 enum ib_qp_statetrans statetrans
;
803 struct hcp_modify_qp_control_block
*mqpcb
;
804 struct ehca_qp
*my_qp
= container_of(ibqp
, struct ehca_qp
, ib_qp
);
805 struct ehca_shca
*shca
=
806 container_of(ibqp
->pd
->device
, struct ehca_shca
, ib_device
);
810 int squeue_locked
= 0;
811 unsigned long spl_flags
= 0;
813 /* do query_qp to obtain current attr values */
814 mqpcb
= kzalloc(H_CB_ALIGNMENT
, GFP_KERNEL
);
816 ehca_err(ibqp
->device
, "Could not get zeroed page for mqpcb "
817 "ehca_qp=%p qp_num=%x ", my_qp
, ibqp
->qp_num
);
821 h_ret
= hipz_h_query_qp(shca
->ipz_hca_handle
,
822 my_qp
->ipz_qp_handle
,
824 mqpcb
, my_qp
->galpas
.kernel
);
825 if (h_ret
!= H_SUCCESS
) {
826 ehca_err(ibqp
->device
, "hipz_h_query_qp() failed "
827 "ehca_qp=%p qp_num=%x h_ret=%lx",
828 my_qp
, ibqp
->qp_num
, h_ret
);
829 ret
= ehca2ib_return_code(h_ret
);
830 goto modify_qp_exit1
;
833 qp_cur_state
= ehca2ib_qp_state(mqpcb
->qp_state
);
835 if (qp_cur_state
== -EINVAL
) { /* invalid qp state */
837 ehca_err(ibqp
->device
, "Invalid current ehca_qp_state=%x "
838 "ehca_qp=%p qp_num=%x",
839 mqpcb
->qp_state
, my_qp
, ibqp
->qp_num
);
840 goto modify_qp_exit1
;
843 * circumvention to set aqp0 initial state to init
844 * as expected by IB spec
846 if (smi_reset2init
== 0 &&
847 ibqp
->qp_type
== IB_QPT_SMI
&&
848 qp_cur_state
== IB_QPS_RESET
&&
849 (attr_mask
& IB_QP_STATE
) &&
850 attr
->qp_state
== IB_QPS_INIT
) { /* RESET -> INIT */
851 struct ib_qp_attr smiqp_attr
= {
852 .qp_state
= IB_QPS_INIT
,
853 .port_num
= my_qp
->init_attr
.port_num
,
857 int smiqp_attr_mask
= IB_QP_STATE
| IB_QP_PORT
|
858 IB_QP_PKEY_INDEX
| IB_QP_QKEY
;
859 int smirc
= internal_modify_qp(
860 ibqp
, &smiqp_attr
, smiqp_attr_mask
, 1);
862 ehca_err(ibqp
->device
, "SMI RESET -> INIT failed. "
863 "ehca_modify_qp() rc=%x", smirc
);
865 goto modify_qp_exit1
;
867 qp_cur_state
= IB_QPS_INIT
;
868 ehca_dbg(ibqp
->device
, "SMI RESET -> INIT succeeded");
870 /* is transmitted current state equal to "real" current state */
871 if ((attr_mask
& IB_QP_CUR_STATE
) &&
872 qp_cur_state
!= attr
->cur_qp_state
) {
874 ehca_err(ibqp
->device
,
875 "Invalid IB_QP_CUR_STATE attr->curr_qp_state=%x <>"
876 " actual cur_qp_state=%x. ehca_qp=%p qp_num=%x",
877 attr
->cur_qp_state
, qp_cur_state
, my_qp
, ibqp
->qp_num
);
878 goto modify_qp_exit1
;
881 ehca_dbg(ibqp
->device
,"ehca_qp=%p qp_num=%x current qp_state=%x "
882 "new qp_state=%x attribute_mask=%x",
883 my_qp
, ibqp
->qp_num
, qp_cur_state
, attr
->qp_state
, attr_mask
);
885 qp_new_state
= attr_mask
& IB_QP_STATE
? attr
->qp_state
: qp_cur_state
;
886 if (!smi_reset2init
&&
887 !ib_modify_qp_is_ok(qp_cur_state
, qp_new_state
, ibqp
->qp_type
,
890 ehca_err(ibqp
->device
,
891 "Invalid qp transition new_state=%x cur_state=%x "
892 "ehca_qp=%p qp_num=%x attr_mask=%x", qp_new_state
,
893 qp_cur_state
, my_qp
, ibqp
->qp_num
, attr_mask
);
894 goto modify_qp_exit1
;
897 if ((mqpcb
->qp_state
= ib2ehca_qp_state(qp_new_state
)))
898 update_mask
= EHCA_BMASK_SET(MQPCB_MASK_QP_STATE
, 1);
901 ehca_err(ibqp
->device
, "Invalid new qp state=%x "
902 "ehca_qp=%p qp_num=%x",
903 qp_new_state
, my_qp
, ibqp
->qp_num
);
904 goto modify_qp_exit1
;
907 /* retrieve state transition struct to get req and opt attrs */
908 statetrans
= get_modqp_statetrans(qp_cur_state
, qp_new_state
);
909 if (statetrans
< 0) {
911 ehca_err(ibqp
->device
, "<INVALID STATE CHANGE> qp_cur_state=%x "
912 "new_qp_state=%x State_xsition=%x ehca_qp=%p "
913 "qp_num=%x", qp_cur_state
, qp_new_state
,
914 statetrans
, my_qp
, ibqp
->qp_num
);
915 goto modify_qp_exit1
;
918 qp_attr_idx
= ib2ehcaqptype(ibqp
->qp_type
);
920 if (qp_attr_idx
< 0) {
922 ehca_err(ibqp
->device
,
923 "Invalid QP type=%x ehca_qp=%p qp_num=%x",
924 ibqp
->qp_type
, my_qp
, ibqp
->qp_num
);
925 goto modify_qp_exit1
;
928 ehca_dbg(ibqp
->device
,
929 "ehca_qp=%p qp_num=%x <VALID STATE CHANGE> qp_state_xsit=%x",
930 my_qp
, ibqp
->qp_num
, statetrans
);
932 /* sqe -> rts: set purge bit of bad wqe before actual trans */
933 if ((my_qp
->qp_type
== IB_QPT_UD
||
934 my_qp
->qp_type
== IB_QPT_GSI
||
935 my_qp
->qp_type
== IB_QPT_SMI
) &&
936 statetrans
== IB_QPST_SQE2RTS
) {
937 /* mark next free wqe if kernel */
938 if (my_qp
->uspace_squeue
== 0) {
939 struct ehca_wqe
*wqe
;
940 /* lock send queue */
941 spin_lock_irqsave(&my_qp
->spinlock_s
, spl_flags
);
943 /* mark next free wqe */
944 wqe
= (struct ehca_wqe
*)
945 ipz_qeit_get(&my_qp
->ipz_squeue
);
946 wqe
->optype
= wqe
->wqef
= 0xff;
947 ehca_dbg(ibqp
->device
, "qp_num=%x next_free_wqe=%p",
950 ret
= prepare_sqe_rts(my_qp
, shca
, &bad_wqe_cnt
);
952 ehca_err(ibqp
->device
, "prepare_sqe_rts() failed "
953 "ehca_qp=%p qp_num=%x ret=%x",
954 my_qp
, ibqp
->qp_num
, ret
);
955 goto modify_qp_exit2
;
960 * enable RDMA_Atomic_Control if reset->init und reliable con
961 * this is necessary since gen2 does not provide that flag,
962 * but pHyp requires it
964 if (statetrans
== IB_QPST_RESET2INIT
&&
965 (ibqp
->qp_type
== IB_QPT_RC
|| ibqp
->qp_type
== IB_QPT_UC
)) {
966 mqpcb
->rdma_atomic_ctrl
= 3;
967 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_RDMA_ATOMIC_CTRL
, 1);
969 /* circ. pHyp requires #RDMA/Atomic Resp Res for UC INIT -> RTR */
970 if (statetrans
== IB_QPST_INIT2RTR
&&
971 (ibqp
->qp_type
== IB_QPT_UC
) &&
972 !(attr_mask
& IB_QP_MAX_DEST_RD_ATOMIC
)) {
973 mqpcb
->rdma_nr_atomic_resp_res
= 1; /* default to 1 */
975 EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES
, 1);
978 if (attr_mask
& IB_QP_PKEY_INDEX
) {
979 mqpcb
->prim_p_key_idx
= attr
->pkey_index
;
980 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_PRIM_P_KEY_IDX
, 1);
982 if (attr_mask
& IB_QP_PORT
) {
983 if (attr
->port_num
< 1 || attr
->port_num
> shca
->num_ports
) {
985 ehca_err(ibqp
->device
, "Invalid port=%x. "
986 "ehca_qp=%p qp_num=%x num_ports=%x",
987 attr
->port_num
, my_qp
, ibqp
->qp_num
,
989 goto modify_qp_exit2
;
991 mqpcb
->prim_phys_port
= attr
->port_num
;
992 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_PRIM_PHYS_PORT
, 1);
994 if (attr_mask
& IB_QP_QKEY
) {
995 mqpcb
->qkey
= attr
->qkey
;
996 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_QKEY
, 1);
998 if (attr_mask
& IB_QP_AV
) {
999 int ah_mult
= ib_rate_to_mult(attr
->ah_attr
.static_rate
);
1000 int ehca_mult
= ib_rate_to_mult(shca
->sport
[my_qp
->
1001 init_attr
.port_num
].rate
);
1003 mqpcb
->dlid
= attr
->ah_attr
.dlid
;
1004 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_DLID
, 1);
1005 mqpcb
->source_path_bits
= attr
->ah_attr
.src_path_bits
;
1006 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS
, 1);
1007 mqpcb
->service_level
= attr
->ah_attr
.sl
;
1008 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL
, 1);
1010 if (ah_mult
< ehca_mult
)
1011 mqpcb
->max_static_rate
= (ah_mult
> 0) ?
1012 ((ehca_mult
- 1) / ah_mult
) : 0;
1014 mqpcb
->max_static_rate
= 0;
1016 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE
, 1);
1019 * only if GRH is TRUE we might consider SOURCE_GID_IDX
1020 * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1022 if (attr
->ah_attr
.ah_flags
== IB_AH_GRH
) {
1023 mqpcb
->send_grh_flag
= 1 << 31;
1025 EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG
, 1);
1026 mqpcb
->source_gid_idx
= attr
->ah_attr
.grh
.sgid_index
;
1028 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX
, 1);
1030 for (cnt
= 0; cnt
< 16; cnt
++)
1031 mqpcb
->dest_gid
.byte
[cnt
] =
1032 attr
->ah_attr
.grh
.dgid
.raw
[cnt
];
1034 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_DEST_GID
, 1);
1035 mqpcb
->flow_label
= attr
->ah_attr
.grh
.flow_label
;
1036 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL
, 1);
1037 mqpcb
->hop_limit
= attr
->ah_attr
.grh
.hop_limit
;
1038 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT
, 1);
1039 mqpcb
->traffic_class
= attr
->ah_attr
.grh
.traffic_class
;
1041 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS
, 1);
1045 if (attr_mask
& IB_QP_PATH_MTU
) {
1046 mqpcb
->path_mtu
= attr
->path_mtu
;
1047 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_PATH_MTU
, 1);
1049 if (attr_mask
& IB_QP_TIMEOUT
) {
1050 mqpcb
->timeout
= attr
->timeout
;
1051 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_TIMEOUT
, 1);
1053 if (attr_mask
& IB_QP_RETRY_CNT
) {
1054 mqpcb
->retry_count
= attr
->retry_cnt
;
1055 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_RETRY_COUNT
, 1);
1057 if (attr_mask
& IB_QP_RNR_RETRY
) {
1058 mqpcb
->rnr_retry_count
= attr
->rnr_retry
;
1059 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_RNR_RETRY_COUNT
, 1);
1061 if (attr_mask
& IB_QP_RQ_PSN
) {
1062 mqpcb
->receive_psn
= attr
->rq_psn
;
1063 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_RECEIVE_PSN
, 1);
1065 if (attr_mask
& IB_QP_MAX_DEST_RD_ATOMIC
) {
1066 mqpcb
->rdma_nr_atomic_resp_res
= attr
->max_dest_rd_atomic
< 3 ?
1067 attr
->max_dest_rd_atomic
: 2;
1069 EHCA_BMASK_SET(MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES
, 1);
1071 if (attr_mask
& IB_QP_MAX_QP_RD_ATOMIC
) {
1072 mqpcb
->rdma_atomic_outst_dest_qp
= attr
->max_rd_atomic
< 3 ?
1073 attr
->max_rd_atomic
: 2;
1076 (MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP
, 1);
1078 if (attr_mask
& IB_QP_ALT_PATH
) {
1079 int ah_mult
= ib_rate_to_mult(attr
->alt_ah_attr
.static_rate
);
1080 int ehca_mult
= ib_rate_to_mult(
1081 shca
->sport
[my_qp
->init_attr
.port_num
].rate
);
1083 mqpcb
->dlid_al
= attr
->alt_ah_attr
.dlid
;
1084 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_DLID_AL
, 1);
1085 mqpcb
->source_path_bits_al
= attr
->alt_ah_attr
.src_path_bits
;
1087 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_PATH_BITS_AL
, 1);
1088 mqpcb
->service_level_al
= attr
->alt_ah_attr
.sl
;
1089 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_SERVICE_LEVEL_AL
, 1);
1091 if (ah_mult
< ehca_mult
)
1092 mqpcb
->max_static_rate
= (ah_mult
> 0) ?
1093 ((ehca_mult
- 1) / ah_mult
) : 0;
1095 mqpcb
->max_static_rate_al
= 0;
1097 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_MAX_STATIC_RATE_AL
, 1);
1100 * only if GRH is TRUE we might consider SOURCE_GID_IDX
1101 * and DEST_GID otherwise phype will return H_ATTR_PARM!!!
1103 if (attr
->alt_ah_attr
.ah_flags
== IB_AH_GRH
) {
1104 mqpcb
->send_grh_flag_al
= 1 << 31;
1106 EHCA_BMASK_SET(MQPCB_MASK_SEND_GRH_FLAG_AL
, 1);
1107 mqpcb
->source_gid_idx_al
=
1108 attr
->alt_ah_attr
.grh
.sgid_index
;
1110 EHCA_BMASK_SET(MQPCB_MASK_SOURCE_GID_IDX_AL
, 1);
1112 for (cnt
= 0; cnt
< 16; cnt
++)
1113 mqpcb
->dest_gid_al
.byte
[cnt
] =
1114 attr
->alt_ah_attr
.grh
.dgid
.raw
[cnt
];
1117 EHCA_BMASK_SET(MQPCB_MASK_DEST_GID_AL
, 1);
1118 mqpcb
->flow_label_al
= attr
->alt_ah_attr
.grh
.flow_label
;
1120 EHCA_BMASK_SET(MQPCB_MASK_FLOW_LABEL_AL
, 1);
1121 mqpcb
->hop_limit_al
= attr
->alt_ah_attr
.grh
.hop_limit
;
1123 EHCA_BMASK_SET(MQPCB_MASK_HOP_LIMIT_AL
, 1);
1124 mqpcb
->traffic_class_al
=
1125 attr
->alt_ah_attr
.grh
.traffic_class
;
1127 EHCA_BMASK_SET(MQPCB_MASK_TRAFFIC_CLASS_AL
, 1);
1131 if (attr_mask
& IB_QP_MIN_RNR_TIMER
) {
1132 mqpcb
->min_rnr_nak_timer_field
= attr
->min_rnr_timer
;
1134 EHCA_BMASK_SET(MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD
, 1);
1137 if (attr_mask
& IB_QP_SQ_PSN
) {
1138 mqpcb
->send_psn
= attr
->sq_psn
;
1139 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_SEND_PSN
, 1);
1142 if (attr_mask
& IB_QP_DEST_QPN
) {
1143 mqpcb
->dest_qp_nr
= attr
->dest_qp_num
;
1144 update_mask
|= EHCA_BMASK_SET(MQPCB_MASK_DEST_QP_NR
, 1);
1147 if (attr_mask
& IB_QP_PATH_MIG_STATE
) {
1148 mqpcb
->path_migration_state
= attr
->path_mig_state
;
1150 EHCA_BMASK_SET(MQPCB_MASK_PATH_MIGRATION_STATE
, 1);
1153 if (attr_mask
& IB_QP_CAP
) {
1154 mqpcb
->max_nr_outst_send_wr
= attr
->cap
.max_send_wr
+1;
1156 EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_SEND_WR
, 1);
1157 mqpcb
->max_nr_outst_recv_wr
= attr
->cap
.max_recv_wr
+1;
1159 EHCA_BMASK_SET(MQPCB_MASK_MAX_NR_OUTST_RECV_WR
, 1);
1160 /* no support for max_send/recv_sge yet */
1163 if (ehca_debug_level
)
1164 ehca_dmp(mqpcb
, 4*70, "qp_num=%x", ibqp
->qp_num
);
1166 h_ret
= hipz_h_modify_qp(shca
->ipz_hca_handle
,
1167 my_qp
->ipz_qp_handle
,
1170 mqpcb
, my_qp
->galpas
.kernel
);
1172 if (h_ret
!= H_SUCCESS
) {
1173 ret
= ehca2ib_return_code(h_ret
);
1174 ehca_err(ibqp
->device
, "hipz_h_modify_qp() failed rc=%lx "
1175 "ehca_qp=%p qp_num=%x",h_ret
, my_qp
, ibqp
->qp_num
);
1176 goto modify_qp_exit2
;
1179 if ((my_qp
->qp_type
== IB_QPT_UD
||
1180 my_qp
->qp_type
== IB_QPT_GSI
||
1181 my_qp
->qp_type
== IB_QPT_SMI
) &&
1182 statetrans
== IB_QPST_SQE2RTS
) {
1183 /* doorbell to reprocessing wqes */
1184 iosync(); /* serialize GAL register access */
1185 hipz_update_sqa(my_qp
, bad_wqe_cnt
-1);
1186 ehca_gen_dbg("doorbell for %x wqes", bad_wqe_cnt
);
1189 if (statetrans
== IB_QPST_RESET2INIT
||
1190 statetrans
== IB_QPST_INIT2INIT
) {
1191 mqpcb
->qp_enable
= 1;
1192 mqpcb
->qp_state
= EHCA_QPS_INIT
;
1194 update_mask
= EHCA_BMASK_SET(MQPCB_MASK_QP_ENABLE
, 1);
1196 h_ret
= hipz_h_modify_qp(shca
->ipz_hca_handle
,
1197 my_qp
->ipz_qp_handle
,
1201 my_qp
->galpas
.kernel
);
1203 if (h_ret
!= H_SUCCESS
) {
1204 ret
= ehca2ib_return_code(h_ret
);
1205 ehca_err(ibqp
->device
, "ENABLE in context of "
1206 "RESET_2_INIT failed! Maybe you didn't get "
1207 "a LID h_ret=%lx ehca_qp=%p qp_num=%x",
1208 h_ret
, my_qp
, ibqp
->qp_num
);
1209 goto modify_qp_exit2
;
1213 if (statetrans
== IB_QPST_ANY2RESET
) {
1214 ipz_qeit_reset(&my_qp
->ipz_rqueue
);
1215 ipz_qeit_reset(&my_qp
->ipz_squeue
);
1218 if (attr_mask
& IB_QP_QKEY
)
1219 my_qp
->qkey
= attr
->qkey
;
1222 if (squeue_locked
) { /* this means: sqe -> rts */
1223 spin_unlock_irqrestore(&my_qp
->spinlock_s
, spl_flags
);
1224 my_qp
->sqerr_purgeflag
= 1;
1233 int ehca_modify_qp(struct ib_qp
*ibqp
, struct ib_qp_attr
*attr
, int attr_mask
,
1234 struct ib_udata
*udata
)
1236 struct ehca_qp
*my_qp
= container_of(ibqp
, struct ehca_qp
, ib_qp
);
1237 struct ehca_pd
*my_pd
= container_of(my_qp
->ib_qp
.pd
, struct ehca_pd
,
1239 u32 cur_pid
= current
->tgid
;
1241 if (my_pd
->ib_pd
.uobject
&& my_pd
->ib_pd
.uobject
->context
&&
1242 my_pd
->ownpid
!= cur_pid
) {
1243 ehca_err(ibqp
->pd
->device
, "Invalid caller pid=%x ownpid=%x",
1244 cur_pid
, my_pd
->ownpid
);
1248 return internal_modify_qp(ibqp
, attr
, attr_mask
, 0);
1251 int ehca_query_qp(struct ib_qp
*qp
,
1252 struct ib_qp_attr
*qp_attr
,
1253 int qp_attr_mask
, struct ib_qp_init_attr
*qp_init_attr
)
1255 struct ehca_qp
*my_qp
= container_of(qp
, struct ehca_qp
, ib_qp
);
1256 struct ehca_pd
*my_pd
= container_of(my_qp
->ib_qp
.pd
, struct ehca_pd
,
1258 struct ehca_shca
*shca
= container_of(qp
->device
, struct ehca_shca
,
1260 struct ipz_adapter_handle adapter_handle
= shca
->ipz_hca_handle
;
1261 struct hcp_modify_qp_control_block
*qpcb
;
1262 u32 cur_pid
= current
->tgid
;
1266 if (my_pd
->ib_pd
.uobject
&& my_pd
->ib_pd
.uobject
->context
&&
1267 my_pd
->ownpid
!= cur_pid
) {
1268 ehca_err(qp
->device
, "Invalid caller pid=%x ownpid=%x",
1269 cur_pid
, my_pd
->ownpid
);
1273 if (qp_attr_mask
& QP_ATTR_QUERY_NOT_SUPPORTED
) {
1274 ehca_err(qp
->device
,"Invalid attribute mask "
1275 "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1276 my_qp
, qp
->qp_num
, qp_attr_mask
);
1280 qpcb
= kzalloc(H_CB_ALIGNMENT
, GFP_KERNEL
);
1282 ehca_err(qp
->device
,"Out of memory for qpcb "
1283 "ehca_qp=%p qp_num=%x", my_qp
, qp
->qp_num
);
1287 h_ret
= hipz_h_query_qp(adapter_handle
,
1288 my_qp
->ipz_qp_handle
,
1290 qpcb
, my_qp
->galpas
.kernel
);
1292 if (h_ret
!= H_SUCCESS
) {
1293 ret
= ehca2ib_return_code(h_ret
);
1294 ehca_err(qp
->device
,"hipz_h_query_qp() failed "
1295 "ehca_qp=%p qp_num=%x h_ret=%lx",
1296 my_qp
, qp
->qp_num
, h_ret
);
1297 goto query_qp_exit1
;
1300 qp_attr
->cur_qp_state
= ehca2ib_qp_state(qpcb
->qp_state
);
1301 qp_attr
->qp_state
= qp_attr
->cur_qp_state
;
1303 if (qp_attr
->cur_qp_state
== -EINVAL
) {
1305 ehca_err(qp
->device
,"Got invalid ehca_qp_state=%x "
1306 "ehca_qp=%p qp_num=%x",
1307 qpcb
->qp_state
, my_qp
, qp
->qp_num
);
1308 goto query_qp_exit1
;
1311 if (qp_attr
->qp_state
== IB_QPS_SQD
)
1312 qp_attr
->sq_draining
= 1;
1314 qp_attr
->qkey
= qpcb
->qkey
;
1315 qp_attr
->path_mtu
= qpcb
->path_mtu
;
1316 qp_attr
->path_mig_state
= qpcb
->path_migration_state
;
1317 qp_attr
->rq_psn
= qpcb
->receive_psn
;
1318 qp_attr
->sq_psn
= qpcb
->send_psn
;
1319 qp_attr
->min_rnr_timer
= qpcb
->min_rnr_nak_timer_field
;
1320 qp_attr
->cap
.max_send_wr
= qpcb
->max_nr_outst_send_wr
-1;
1321 qp_attr
->cap
.max_recv_wr
= qpcb
->max_nr_outst_recv_wr
-1;
1322 /* UD_AV CIRCUMVENTION */
1323 if (my_qp
->qp_type
== IB_QPT_UD
) {
1324 qp_attr
->cap
.max_send_sge
=
1325 qpcb
->actual_nr_sges_in_sq_wqe
- 2;
1326 qp_attr
->cap
.max_recv_sge
=
1327 qpcb
->actual_nr_sges_in_rq_wqe
- 2;
1329 qp_attr
->cap
.max_send_sge
=
1330 qpcb
->actual_nr_sges_in_sq_wqe
;
1331 qp_attr
->cap
.max_recv_sge
=
1332 qpcb
->actual_nr_sges_in_rq_wqe
;
1335 qp_attr
->cap
.max_inline_data
= my_qp
->sq_max_inline_data_size
;
1336 qp_attr
->dest_qp_num
= qpcb
->dest_qp_nr
;
1338 qp_attr
->pkey_index
=
1339 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX
, qpcb
->prim_p_key_idx
);
1342 EHCA_BMASK_GET(MQPCB_PRIM_PHYS_PORT
, qpcb
->prim_phys_port
);
1344 qp_attr
->timeout
= qpcb
->timeout
;
1345 qp_attr
->retry_cnt
= qpcb
->retry_count
;
1346 qp_attr
->rnr_retry
= qpcb
->rnr_retry_count
;
1348 qp_attr
->alt_pkey_index
=
1349 EHCA_BMASK_GET(MQPCB_PRIM_P_KEY_IDX
, qpcb
->alt_p_key_idx
);
1351 qp_attr
->alt_port_num
= qpcb
->alt_phys_port
;
1352 qp_attr
->alt_timeout
= qpcb
->timeout_al
;
1355 qp_attr
->ah_attr
.sl
= qpcb
->service_level
;
1357 if (qpcb
->send_grh_flag
) {
1358 qp_attr
->ah_attr
.ah_flags
= IB_AH_GRH
;
1361 qp_attr
->ah_attr
.static_rate
= qpcb
->max_static_rate
;
1362 qp_attr
->ah_attr
.dlid
= qpcb
->dlid
;
1363 qp_attr
->ah_attr
.src_path_bits
= qpcb
->source_path_bits
;
1364 qp_attr
->ah_attr
.port_num
= qp_attr
->port_num
;
1367 qp_attr
->ah_attr
.grh
.traffic_class
= qpcb
->traffic_class
;
1368 qp_attr
->ah_attr
.grh
.hop_limit
= qpcb
->hop_limit
;
1369 qp_attr
->ah_attr
.grh
.sgid_index
= qpcb
->source_gid_idx
;
1370 qp_attr
->ah_attr
.grh
.flow_label
= qpcb
->flow_label
;
1372 for (cnt
= 0; cnt
< 16; cnt
++)
1373 qp_attr
->ah_attr
.grh
.dgid
.raw
[cnt
] =
1374 qpcb
->dest_gid
.byte
[cnt
];
1377 qp_attr
->alt_ah_attr
.sl
= qpcb
->service_level_al
;
1378 if (qpcb
->send_grh_flag_al
) {
1379 qp_attr
->alt_ah_attr
.ah_flags
= IB_AH_GRH
;
1382 qp_attr
->alt_ah_attr
.static_rate
= qpcb
->max_static_rate_al
;
1383 qp_attr
->alt_ah_attr
.dlid
= qpcb
->dlid_al
;
1384 qp_attr
->alt_ah_attr
.src_path_bits
= qpcb
->source_path_bits_al
;
1387 qp_attr
->alt_ah_attr
.grh
.traffic_class
= qpcb
->traffic_class_al
;
1388 qp_attr
->alt_ah_attr
.grh
.hop_limit
= qpcb
->hop_limit_al
;
1389 qp_attr
->alt_ah_attr
.grh
.sgid_index
= qpcb
->source_gid_idx_al
;
1390 qp_attr
->alt_ah_attr
.grh
.flow_label
= qpcb
->flow_label_al
;
1392 for (cnt
= 0; cnt
< 16; cnt
++)
1393 qp_attr
->alt_ah_attr
.grh
.dgid
.raw
[cnt
] =
1394 qpcb
->dest_gid_al
.byte
[cnt
];
1396 /* return init attributes given in ehca_create_qp */
1398 *qp_init_attr
= my_qp
->init_attr
;
1400 if (ehca_debug_level
)
1401 ehca_dmp(qpcb
, 4*70, "qp_num=%x", qp
->qp_num
);
1409 int ehca_destroy_qp(struct ib_qp
*ibqp
)
1411 struct ehca_qp
*my_qp
= container_of(ibqp
, struct ehca_qp
, ib_qp
);
1412 struct ehca_shca
*shca
= container_of(ibqp
->device
, struct ehca_shca
,
1414 struct ehca_pd
*my_pd
= container_of(my_qp
->ib_qp
.pd
, struct ehca_pd
,
1416 u32 cur_pid
= current
->tgid
;
1417 u32 qp_num
= ibqp
->qp_num
;
1421 enum ib_qp_type qp_type
;
1422 unsigned long flags
;
1424 if (my_pd
->ib_pd
.uobject
&& my_pd
->ib_pd
.uobject
->context
&&
1425 my_pd
->ownpid
!= cur_pid
) {
1426 ehca_err(ibqp
->device
, "Invalid caller pid=%x ownpid=%x",
1427 cur_pid
, my_pd
->ownpid
);
1431 if (my_qp
->send_cq
) {
1432 ret
= ehca_cq_unassign_qp(my_qp
->send_cq
,
1433 my_qp
->real_qp_num
);
1435 ehca_err(ibqp
->device
, "Couldn't unassign qp from "
1436 "send_cq ret=%x qp_num=%x cq_num=%x", ret
,
1437 my_qp
->ib_qp
.qp_num
, my_qp
->send_cq
->cq_number
);
1442 spin_lock_irqsave(&ehca_qp_idr_lock
, flags
);
1443 idr_remove(&ehca_qp_idr
, my_qp
->token
);
1444 spin_unlock_irqrestore(&ehca_qp_idr_lock
, flags
);
1446 /* un-mmap if vma alloc */
1447 if (my_qp
->uspace_rqueue
) {
1448 ret
= ehca_munmap(my_qp
->uspace_rqueue
,
1449 my_qp
->ipz_rqueue
.queue_length
);
1451 ehca_err(ibqp
->device
, "Could not munmap rqueue "
1452 "qp_num=%x", qp_num
);
1453 ret
= ehca_munmap(my_qp
->uspace_squeue
,
1454 my_qp
->ipz_squeue
.queue_length
);
1456 ehca_err(ibqp
->device
, "Could not munmap squeue "
1457 "qp_num=%x", qp_num
);
1458 ret
= ehca_munmap(my_qp
->uspace_fwh
, EHCA_PAGESIZE
);
1460 ehca_err(ibqp
->device
, "Could not munmap fwh qp_num=%x",
1464 h_ret
= hipz_h_destroy_qp(shca
->ipz_hca_handle
, my_qp
);
1465 if (h_ret
!= H_SUCCESS
) {
1466 ehca_err(ibqp
->device
, "hipz_h_destroy_qp() failed rc=%lx "
1467 "ehca_qp=%p qp_num=%x", h_ret
, my_qp
, qp_num
);
1468 return ehca2ib_return_code(h_ret
);
1471 port_num
= my_qp
->init_attr
.port_num
;
1472 qp_type
= my_qp
->init_attr
.qp_type
;
1474 /* no support for IB_QPT_SMI yet */
1475 if (qp_type
== IB_QPT_GSI
) {
1476 struct ib_event event
;
1477 ehca_info(ibqp
->device
, "device %s: port %x is inactive.",
1478 shca
->ib_device
.name
, port_num
);
1479 event
.device
= &shca
->ib_device
;
1480 event
.event
= IB_EVENT_PORT_ERR
;
1481 event
.element
.port_num
= port_num
;
1482 shca
->sport
[port_num
- 1].port_state
= IB_PORT_DOWN
;
1483 ib_dispatch_event(&event
);
1486 ipz_queue_dtor(&my_qp
->ipz_rqueue
);
1487 ipz_queue_dtor(&my_qp
->ipz_squeue
);
1488 kmem_cache_free(qp_cache
, my_qp
);
1492 int ehca_init_qp_cache(void)
1494 qp_cache
= kmem_cache_create("ehca_cache_qp",
1495 sizeof(struct ehca_qp
), 0,
1503 void ehca_cleanup_qp_cache(void)
1506 kmem_cache_destroy(qp_cache
);