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Merge branch 'nvmf-4.8-rc' of git://git.infradead.org/nvme-fabrics into for-linus
[deliverable/linux.git] / drivers / infiniband / hw / hfi1 / platform.c
1 /*
2 * Copyright(c) 2015, 2016 Intel Corporation.
3 *
4 * This file is provided under a dual BSD/GPLv2 license. When using or
5 * redistributing this file, you may do so under either license.
6 *
7 * GPL LICENSE SUMMARY
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of version 2 of the GNU General Public License as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * BSD LICENSE
19 *
20 * Redistribution and use in source and binary forms, with or without
21 * modification, are permitted provided that the following conditions
22 * are met:
23 *
24 * - Redistributions of source code must retain the above copyright
25 * notice, this list of conditions and the following disclaimer.
26 * - Redistributions in binary form must reproduce the above copyright
27 * notice, this list of conditions and the following disclaimer in
28 * the documentation and/or other materials provided with the
29 * distribution.
30 * - Neither the name of Intel Corporation nor the names of its
31 * contributors may be used to endorse or promote products derived
32 * from this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 *
46 */
47
48 #include "hfi.h"
49 #include "efivar.h"
50
51 void get_platform_config(struct hfi1_devdata *dd)
52 {
53 int ret = 0;
54 unsigned long size = 0;
55 u8 *temp_platform_config = NULL;
56
57 ret = read_hfi1_efi_var(dd, "configuration", &size,
58 (void **)&temp_platform_config);
59 if (ret) {
60 dd_dev_info(dd,
61 "%s: Failed to get platform config from UEFI, falling back to request firmware\n",
62 __func__);
63 /* fall back to request firmware */
64 platform_config_load = 1;
65 goto bail;
66 }
67
68 dd->platform_config.data = temp_platform_config;
69 dd->platform_config.size = size;
70
71 bail:
72 /* exit */;
73 }
74
75 void free_platform_config(struct hfi1_devdata *dd)
76 {
77 if (!platform_config_load) {
78 /*
79 * was loaded from EFI, release memory
80 * allocated by read_efi_var
81 */
82 kfree(dd->platform_config.data);
83 }
84 /*
85 * else do nothing, dispose_firmware will release
86 * struct firmware platform_config on driver exit
87 */
88 }
89
90 void get_port_type(struct hfi1_pportdata *ppd)
91 {
92 int ret;
93
94 ret = get_platform_config_field(ppd->dd, PLATFORM_CONFIG_PORT_TABLE, 0,
95 PORT_TABLE_PORT_TYPE, &ppd->port_type,
96 4);
97 if (ret)
98 ppd->port_type = PORT_TYPE_UNKNOWN;
99 }
100
101 int set_qsfp_tx(struct hfi1_pportdata *ppd, int on)
102 {
103 u8 tx_ctrl_byte = on ? 0x0 : 0xF;
104 int ret = 0;
105
106 ret = qsfp_write(ppd, ppd->dd->hfi1_id, QSFP_TX_CTRL_BYTE_OFFS,
107 &tx_ctrl_byte, 1);
108 /* we expected 1, so consider 0 an error */
109 if (ret == 0)
110 ret = -EIO;
111 else if (ret == 1)
112 ret = 0;
113 return ret;
114 }
115
116 static int qual_power(struct hfi1_pportdata *ppd)
117 {
118 u32 cable_power_class = 0, power_class_max = 0;
119 u8 *cache = ppd->qsfp_info.cache;
120 int ret = 0;
121
122 ret = get_platform_config_field(
123 ppd->dd, PLATFORM_CONFIG_SYSTEM_TABLE, 0,
124 SYSTEM_TABLE_QSFP_POWER_CLASS_MAX, &power_class_max, 4);
125 if (ret)
126 return ret;
127
128 cable_power_class = get_qsfp_power_class(cache[QSFP_MOD_PWR_OFFS]);
129
130 if (cable_power_class > power_class_max)
131 ppd->offline_disabled_reason =
132 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_POWER_POLICY);
133
134 if (ppd->offline_disabled_reason ==
135 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_POWER_POLICY)) {
136 dd_dev_info(
137 ppd->dd,
138 "%s: Port disabled due to system power restrictions\n",
139 __func__);
140 ret = -EPERM;
141 }
142 return ret;
143 }
144
145 static int qual_bitrate(struct hfi1_pportdata *ppd)
146 {
147 u16 lss = ppd->link_speed_supported, lse = ppd->link_speed_enabled;
148 u8 *cache = ppd->qsfp_info.cache;
149
150 if ((lss & OPA_LINK_SPEED_25G) && (lse & OPA_LINK_SPEED_25G) &&
151 cache[QSFP_NOM_BIT_RATE_250_OFFS] < 0x64)
152 ppd->offline_disabled_reason =
153 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_LINKSPEED_POLICY);
154
155 if ((lss & OPA_LINK_SPEED_12_5G) && (lse & OPA_LINK_SPEED_12_5G) &&
156 cache[QSFP_NOM_BIT_RATE_100_OFFS] < 0x7D)
157 ppd->offline_disabled_reason =
158 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_LINKSPEED_POLICY);
159
160 if (ppd->offline_disabled_reason ==
161 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_LINKSPEED_POLICY)) {
162 dd_dev_info(
163 ppd->dd,
164 "%s: Cable failed bitrate check, disabling port\n",
165 __func__);
166 return -EPERM;
167 }
168 return 0;
169 }
170
171 static int set_qsfp_high_power(struct hfi1_pportdata *ppd)
172 {
173 u8 cable_power_class = 0, power_ctrl_byte = 0;
174 u8 *cache = ppd->qsfp_info.cache;
175 int ret;
176
177 cable_power_class = get_qsfp_power_class(cache[QSFP_MOD_PWR_OFFS]);
178
179 if (cable_power_class > QSFP_POWER_CLASS_1) {
180 power_ctrl_byte = cache[QSFP_PWR_CTRL_BYTE_OFFS];
181
182 power_ctrl_byte |= 1;
183 power_ctrl_byte &= ~(0x2);
184
185 ret = qsfp_write(ppd, ppd->dd->hfi1_id,
186 QSFP_PWR_CTRL_BYTE_OFFS,
187 &power_ctrl_byte, 1);
188 if (ret != 1)
189 return -EIO;
190
191 if (cable_power_class > QSFP_POWER_CLASS_4) {
192 power_ctrl_byte |= (1 << 2);
193 ret = qsfp_write(ppd, ppd->dd->hfi1_id,
194 QSFP_PWR_CTRL_BYTE_OFFS,
195 &power_ctrl_byte, 1);
196 if (ret != 1)
197 return -EIO;
198 }
199
200 /* SFF 8679 rev 1.7 LPMode Deassert time */
201 msleep(300);
202 }
203 return 0;
204 }
205
206 static void apply_rx_cdr(struct hfi1_pportdata *ppd,
207 u32 rx_preset_index,
208 u8 *cdr_ctrl_byte)
209 {
210 u32 rx_preset;
211 u8 *cache = ppd->qsfp_info.cache;
212 int cable_power_class;
213
214 if (!((cache[QSFP_MOD_PWR_OFFS] & 0x4) &&
215 (cache[QSFP_CDR_INFO_OFFS] & 0x40)))
216 return;
217
218 /* RX CDR present, bypass supported */
219 cable_power_class = get_qsfp_power_class(cache[QSFP_MOD_PWR_OFFS]);
220
221 if (cable_power_class <= QSFP_POWER_CLASS_3) {
222 /* Power class <= 3, ignore config & turn RX CDR on */
223 *cdr_ctrl_byte |= 0xF;
224 return;
225 }
226
227 get_platform_config_field(
228 ppd->dd, PLATFORM_CONFIG_RX_PRESET_TABLE,
229 rx_preset_index, RX_PRESET_TABLE_QSFP_RX_CDR_APPLY,
230 &rx_preset, 4);
231
232 if (!rx_preset) {
233 dd_dev_info(
234 ppd->dd,
235 "%s: RX_CDR_APPLY is set to disabled\n",
236 __func__);
237 return;
238 }
239 get_platform_config_field(
240 ppd->dd, PLATFORM_CONFIG_RX_PRESET_TABLE,
241 rx_preset_index, RX_PRESET_TABLE_QSFP_RX_CDR,
242 &rx_preset, 4);
243
244 /* Expand cdr setting to all 4 lanes */
245 rx_preset = (rx_preset | (rx_preset << 1) |
246 (rx_preset << 2) | (rx_preset << 3));
247
248 if (rx_preset) {
249 *cdr_ctrl_byte |= rx_preset;
250 } else {
251 *cdr_ctrl_byte &= rx_preset;
252 /* Preserve current TX CDR status */
253 *cdr_ctrl_byte |= (cache[QSFP_CDR_CTRL_BYTE_OFFS] & 0xF0);
254 }
255 }
256
257 static void apply_tx_cdr(struct hfi1_pportdata *ppd,
258 u32 tx_preset_index,
259 u8 *cdr_ctrl_byte)
260 {
261 u32 tx_preset;
262 u8 *cache = ppd->qsfp_info.cache;
263 int cable_power_class;
264
265 if (!((cache[QSFP_MOD_PWR_OFFS] & 0x8) &&
266 (cache[QSFP_CDR_INFO_OFFS] & 0x80)))
267 return;
268
269 /* TX CDR present, bypass supported */
270 cable_power_class = get_qsfp_power_class(cache[QSFP_MOD_PWR_OFFS]);
271
272 if (cable_power_class <= QSFP_POWER_CLASS_3) {
273 /* Power class <= 3, ignore config & turn TX CDR on */
274 *cdr_ctrl_byte |= 0xF0;
275 return;
276 }
277
278 get_platform_config_field(
279 ppd->dd,
280 PLATFORM_CONFIG_TX_PRESET_TABLE, tx_preset_index,
281 TX_PRESET_TABLE_QSFP_TX_CDR_APPLY, &tx_preset, 4);
282
283 if (!tx_preset) {
284 dd_dev_info(
285 ppd->dd,
286 "%s: TX_CDR_APPLY is set to disabled\n",
287 __func__);
288 return;
289 }
290 get_platform_config_field(
291 ppd->dd,
292 PLATFORM_CONFIG_TX_PRESET_TABLE,
293 tx_preset_index,
294 TX_PRESET_TABLE_QSFP_TX_CDR, &tx_preset, 4);
295
296 /* Expand cdr setting to all 4 lanes */
297 tx_preset = (tx_preset | (tx_preset << 1) |
298 (tx_preset << 2) | (tx_preset << 3));
299
300 if (tx_preset)
301 *cdr_ctrl_byte |= (tx_preset << 4);
302 else
303 /* Preserve current/determined RX CDR status */
304 *cdr_ctrl_byte &= ((tx_preset << 4) | 0xF);
305 }
306
307 static void apply_cdr_settings(
308 struct hfi1_pportdata *ppd, u32 rx_preset_index,
309 u32 tx_preset_index)
310 {
311 u8 *cache = ppd->qsfp_info.cache;
312 u8 cdr_ctrl_byte = cache[QSFP_CDR_CTRL_BYTE_OFFS];
313
314 apply_rx_cdr(ppd, rx_preset_index, &cdr_ctrl_byte);
315
316 apply_tx_cdr(ppd, tx_preset_index, &cdr_ctrl_byte);
317
318 qsfp_write(ppd, ppd->dd->hfi1_id, QSFP_CDR_CTRL_BYTE_OFFS,
319 &cdr_ctrl_byte, 1);
320 }
321
322 static void apply_tx_eq_auto(struct hfi1_pportdata *ppd)
323 {
324 u8 *cache = ppd->qsfp_info.cache;
325 u8 tx_eq;
326
327 if (!(cache[QSFP_EQ_INFO_OFFS] & 0x8))
328 return;
329 /* Disable adaptive TX EQ if present */
330 tx_eq = cache[(128 * 3) + 241];
331 tx_eq &= 0xF0;
332 qsfp_write(ppd, ppd->dd->hfi1_id, (256 * 3) + 241, &tx_eq, 1);
333 }
334
335 static void apply_tx_eq_prog(struct hfi1_pportdata *ppd, u32 tx_preset_index)
336 {
337 u8 *cache = ppd->qsfp_info.cache;
338 u32 tx_preset;
339 u8 tx_eq;
340
341 if (!(cache[QSFP_EQ_INFO_OFFS] & 0x4))
342 return;
343
344 get_platform_config_field(
345 ppd->dd, PLATFORM_CONFIG_TX_PRESET_TABLE,
346 tx_preset_index, TX_PRESET_TABLE_QSFP_TX_EQ_APPLY,
347 &tx_preset, 4);
348 if (!tx_preset) {
349 dd_dev_info(
350 ppd->dd,
351 "%s: TX_EQ_APPLY is set to disabled\n",
352 __func__);
353 return;
354 }
355 get_platform_config_field(
356 ppd->dd, PLATFORM_CONFIG_TX_PRESET_TABLE,
357 tx_preset_index, TX_PRESET_TABLE_QSFP_TX_EQ,
358 &tx_preset, 4);
359
360 if (((cache[(128 * 3) + 224] & 0xF0) >> 4) < tx_preset) {
361 dd_dev_info(
362 ppd->dd,
363 "%s: TX EQ %x unsupported\n",
364 __func__, tx_preset);
365
366 dd_dev_info(
367 ppd->dd,
368 "%s: Applying EQ %x\n",
369 __func__, cache[608] & 0xF0);
370
371 tx_preset = (cache[608] & 0xF0) >> 4;
372 }
373
374 tx_eq = tx_preset | (tx_preset << 4);
375 qsfp_write(ppd, ppd->dd->hfi1_id, (256 * 3) + 234, &tx_eq, 1);
376 qsfp_write(ppd, ppd->dd->hfi1_id, (256 * 3) + 235, &tx_eq, 1);
377 }
378
379 static void apply_rx_eq_emp(struct hfi1_pportdata *ppd, u32 rx_preset_index)
380 {
381 u32 rx_preset;
382 u8 rx_eq, *cache = ppd->qsfp_info.cache;
383
384 if (!(cache[QSFP_EQ_INFO_OFFS] & 0x2))
385 return;
386 get_platform_config_field(
387 ppd->dd, PLATFORM_CONFIG_RX_PRESET_TABLE,
388 rx_preset_index, RX_PRESET_TABLE_QSFP_RX_EMP_APPLY,
389 &rx_preset, 4);
390
391 if (!rx_preset) {
392 dd_dev_info(
393 ppd->dd,
394 "%s: RX_EMP_APPLY is set to disabled\n",
395 __func__);
396 return;
397 }
398 get_platform_config_field(
399 ppd->dd, PLATFORM_CONFIG_RX_PRESET_TABLE,
400 rx_preset_index, RX_PRESET_TABLE_QSFP_RX_EMP,
401 &rx_preset, 4);
402
403 if ((cache[(128 * 3) + 224] & 0xF) < rx_preset) {
404 dd_dev_info(
405 ppd->dd,
406 "%s: Requested RX EMP %x\n",
407 __func__, rx_preset);
408
409 dd_dev_info(
410 ppd->dd,
411 "%s: Applying supported EMP %x\n",
412 __func__, cache[608] & 0xF);
413
414 rx_preset = cache[608] & 0xF;
415 }
416
417 rx_eq = rx_preset | (rx_preset << 4);
418
419 qsfp_write(ppd, ppd->dd->hfi1_id, (256 * 3) + 236, &rx_eq, 1);
420 qsfp_write(ppd, ppd->dd->hfi1_id, (256 * 3) + 237, &rx_eq, 1);
421 }
422
423 static void apply_eq_settings(struct hfi1_pportdata *ppd,
424 u32 rx_preset_index, u32 tx_preset_index)
425 {
426 u8 *cache = ppd->qsfp_info.cache;
427
428 /* no point going on w/o a page 3 */
429 if (cache[2] & 4) {
430 dd_dev_info(ppd->dd,
431 "%s: Upper page 03 not present\n",
432 __func__);
433 return;
434 }
435
436 apply_tx_eq_auto(ppd);
437
438 apply_tx_eq_prog(ppd, tx_preset_index);
439
440 apply_rx_eq_emp(ppd, rx_preset_index);
441 }
442
443 static void apply_rx_amplitude_settings(
444 struct hfi1_pportdata *ppd, u32 rx_preset_index,
445 u32 tx_preset_index)
446 {
447 u32 rx_preset;
448 u8 rx_amp = 0, i = 0, preferred = 0, *cache = ppd->qsfp_info.cache;
449
450 /* no point going on w/o a page 3 */
451 if (cache[2] & 4) {
452 dd_dev_info(ppd->dd,
453 "%s: Upper page 03 not present\n",
454 __func__);
455 return;
456 }
457 if (!(cache[QSFP_EQ_INFO_OFFS] & 0x1)) {
458 dd_dev_info(ppd->dd,
459 "%s: RX_AMP_APPLY is set to disabled\n",
460 __func__);
461 return;
462 }
463
464 get_platform_config_field(ppd->dd,
465 PLATFORM_CONFIG_RX_PRESET_TABLE,
466 rx_preset_index,
467 RX_PRESET_TABLE_QSFP_RX_AMP_APPLY,
468 &rx_preset, 4);
469
470 if (!rx_preset) {
471 dd_dev_info(ppd->dd,
472 "%s: RX_AMP_APPLY is set to disabled\n",
473 __func__);
474 return;
475 }
476 get_platform_config_field(ppd->dd,
477 PLATFORM_CONFIG_RX_PRESET_TABLE,
478 rx_preset_index,
479 RX_PRESET_TABLE_QSFP_RX_AMP,
480 &rx_preset, 4);
481
482 dd_dev_info(ppd->dd,
483 "%s: Requested RX AMP %x\n",
484 __func__,
485 rx_preset);
486
487 for (i = 0; i < 4; i++) {
488 if (cache[(128 * 3) + 225] & (1 << i)) {
489 preferred = i;
490 if (preferred == rx_preset)
491 break;
492 }
493 }
494
495 /*
496 * Verify that preferred RX amplitude is not just a
497 * fall through of the default
498 */
499 if (!preferred && !(cache[(128 * 3) + 225] & 0x1)) {
500 dd_dev_info(ppd->dd, "No supported RX AMP, not applying\n");
501 return;
502 }
503
504 dd_dev_info(ppd->dd,
505 "%s: Applying RX AMP %x\n", __func__, preferred);
506
507 rx_amp = preferred | (preferred << 4);
508 qsfp_write(ppd, ppd->dd->hfi1_id, (256 * 3) + 238, &rx_amp, 1);
509 qsfp_write(ppd, ppd->dd->hfi1_id, (256 * 3) + 239, &rx_amp, 1);
510 }
511
512 #define OPA_INVALID_INDEX 0xFFF
513
514 static void apply_tx_lanes(struct hfi1_pportdata *ppd, u8 field_id,
515 u32 config_data, const char *message)
516 {
517 u8 i;
518 int ret = HCMD_SUCCESS;
519
520 for (i = 0; i < 4; i++) {
521 ret = load_8051_config(ppd->dd, field_id, i, config_data);
522 if (ret != HCMD_SUCCESS) {
523 dd_dev_err(
524 ppd->dd,
525 "%s: %s for lane %u failed\n",
526 message, __func__, i);
527 }
528 }
529 }
530
531 static void apply_tunings(
532 struct hfi1_pportdata *ppd, u32 tx_preset_index,
533 u8 tuning_method, u32 total_atten, u8 limiting_active)
534 {
535 int ret = 0;
536 u32 config_data = 0, tx_preset = 0;
537 u8 precur = 0, attn = 0, postcur = 0, external_device_config = 0;
538 u8 *cache = ppd->qsfp_info.cache;
539
540 /* Pass tuning method to 8051 */
541 read_8051_config(ppd->dd, LINK_TUNING_PARAMETERS, GENERAL_CONFIG,
542 &config_data);
543 config_data &= ~(0xff << TUNING_METHOD_SHIFT);
544 config_data |= ((u32)tuning_method << TUNING_METHOD_SHIFT);
545 ret = load_8051_config(ppd->dd, LINK_TUNING_PARAMETERS, GENERAL_CONFIG,
546 config_data);
547 if (ret != HCMD_SUCCESS)
548 dd_dev_err(ppd->dd, "%s: Failed to set tuning method\n",
549 __func__);
550
551 /* Set same channel loss for both TX and RX */
552 config_data = 0 | (total_atten << 16) | (total_atten << 24);
553 apply_tx_lanes(ppd, CHANNEL_LOSS_SETTINGS, config_data,
554 "Setting channel loss");
555
556 /* Inform 8051 of cable capabilities */
557 if (ppd->qsfp_info.cache_valid) {
558 external_device_config =
559 ((cache[QSFP_MOD_PWR_OFFS] & 0x4) << 3) |
560 ((cache[QSFP_MOD_PWR_OFFS] & 0x8) << 2) |
561 ((cache[QSFP_EQ_INFO_OFFS] & 0x2) << 1) |
562 (cache[QSFP_EQ_INFO_OFFS] & 0x4);
563 ret = read_8051_config(ppd->dd, DC_HOST_COMM_SETTINGS,
564 GENERAL_CONFIG, &config_data);
565 /* Clear, then set the external device config field */
566 config_data &= ~(u32)0xFF;
567 config_data |= external_device_config;
568 ret = load_8051_config(ppd->dd, DC_HOST_COMM_SETTINGS,
569 GENERAL_CONFIG, config_data);
570 if (ret != HCMD_SUCCESS)
571 dd_dev_info(ppd->dd,
572 "%s: Failed set ext device config params\n",
573 __func__);
574 }
575
576 if (tx_preset_index == OPA_INVALID_INDEX) {
577 if (ppd->port_type == PORT_TYPE_QSFP && limiting_active)
578 dd_dev_info(ppd->dd, "%s: Invalid Tx preset index\n",
579 __func__);
580 return;
581 }
582
583 /* Following for limiting active channels only */
584 get_platform_config_field(
585 ppd->dd, PLATFORM_CONFIG_TX_PRESET_TABLE, tx_preset_index,
586 TX_PRESET_TABLE_PRECUR, &tx_preset, 4);
587 precur = tx_preset;
588
589 get_platform_config_field(
590 ppd->dd, PLATFORM_CONFIG_TX_PRESET_TABLE,
591 tx_preset_index, TX_PRESET_TABLE_ATTN, &tx_preset, 4);
592 attn = tx_preset;
593
594 get_platform_config_field(
595 ppd->dd, PLATFORM_CONFIG_TX_PRESET_TABLE,
596 tx_preset_index, TX_PRESET_TABLE_POSTCUR, &tx_preset, 4);
597 postcur = tx_preset;
598
599 config_data = precur | (attn << 8) | (postcur << 16);
600
601 apply_tx_lanes(ppd, TX_EQ_SETTINGS, config_data,
602 "Applying TX settings");
603 }
604
605 /* Must be holding the QSFP i2c resource */
606 static int tune_active_qsfp(struct hfi1_pportdata *ppd, u32 *ptr_tx_preset,
607 u32 *ptr_rx_preset, u32 *ptr_total_atten)
608 {
609 int ret;
610 u16 lss = ppd->link_speed_supported, lse = ppd->link_speed_enabled;
611 u8 *cache = ppd->qsfp_info.cache;
612
613 ppd->qsfp_info.limiting_active = 1;
614
615 ret = set_qsfp_tx(ppd, 0);
616 if (ret)
617 return ret;
618
619 ret = qual_power(ppd);
620 if (ret)
621 return ret;
622
623 ret = qual_bitrate(ppd);
624 if (ret)
625 return ret;
626
627 /*
628 * We'll change the QSFP memory contents from here on out, thus we set a
629 * flag here to remind ourselves to reset the QSFP module. This prevents
630 * reuse of stale settings established in our previous pass through.
631 */
632 if (ppd->qsfp_info.reset_needed) {
633 reset_qsfp(ppd);
634 refresh_qsfp_cache(ppd, &ppd->qsfp_info);
635 } else {
636 ppd->qsfp_info.reset_needed = 1;
637 }
638
639 ret = set_qsfp_high_power(ppd);
640 if (ret)
641 return ret;
642
643 if (cache[QSFP_EQ_INFO_OFFS] & 0x4) {
644 ret = get_platform_config_field(
645 ppd->dd,
646 PLATFORM_CONFIG_PORT_TABLE, 0,
647 PORT_TABLE_TX_PRESET_IDX_ACTIVE_EQ,
648 ptr_tx_preset, 4);
649 if (ret) {
650 *ptr_tx_preset = OPA_INVALID_INDEX;
651 return ret;
652 }
653 } else {
654 ret = get_platform_config_field(
655 ppd->dd,
656 PLATFORM_CONFIG_PORT_TABLE, 0,
657 PORT_TABLE_TX_PRESET_IDX_ACTIVE_NO_EQ,
658 ptr_tx_preset, 4);
659 if (ret) {
660 *ptr_tx_preset = OPA_INVALID_INDEX;
661 return ret;
662 }
663 }
664
665 ret = get_platform_config_field(
666 ppd->dd, PLATFORM_CONFIG_PORT_TABLE, 0,
667 PORT_TABLE_RX_PRESET_IDX, ptr_rx_preset, 4);
668 if (ret) {
669 *ptr_rx_preset = OPA_INVALID_INDEX;
670 return ret;
671 }
672
673 if ((lss & OPA_LINK_SPEED_25G) && (lse & OPA_LINK_SPEED_25G))
674 get_platform_config_field(
675 ppd->dd, PLATFORM_CONFIG_PORT_TABLE, 0,
676 PORT_TABLE_LOCAL_ATTEN_25G, ptr_total_atten, 4);
677 else if ((lss & OPA_LINK_SPEED_12_5G) && (lse & OPA_LINK_SPEED_12_5G))
678 get_platform_config_field(
679 ppd->dd, PLATFORM_CONFIG_PORT_TABLE, 0,
680 PORT_TABLE_LOCAL_ATTEN_12G, ptr_total_atten, 4);
681
682 apply_cdr_settings(ppd, *ptr_rx_preset, *ptr_tx_preset);
683
684 apply_eq_settings(ppd, *ptr_rx_preset, *ptr_tx_preset);
685
686 apply_rx_amplitude_settings(ppd, *ptr_rx_preset, *ptr_tx_preset);
687
688 ret = set_qsfp_tx(ppd, 1);
689
690 return ret;
691 }
692
693 static int tune_qsfp(struct hfi1_pportdata *ppd,
694 u32 *ptr_tx_preset, u32 *ptr_rx_preset,
695 u8 *ptr_tuning_method, u32 *ptr_total_atten)
696 {
697 u32 cable_atten = 0, remote_atten = 0, platform_atten = 0;
698 u16 lss = ppd->link_speed_supported, lse = ppd->link_speed_enabled;
699 int ret = 0;
700 u8 *cache = ppd->qsfp_info.cache;
701
702 switch ((cache[QSFP_MOD_TECH_OFFS] & 0xF0) >> 4) {
703 case 0xA ... 0xB:
704 ret = get_platform_config_field(
705 ppd->dd,
706 PLATFORM_CONFIG_PORT_TABLE, 0,
707 PORT_TABLE_LOCAL_ATTEN_25G,
708 &platform_atten, 4);
709 if (ret)
710 return ret;
711
712 if ((lss & OPA_LINK_SPEED_25G) && (lse & OPA_LINK_SPEED_25G))
713 cable_atten = cache[QSFP_CU_ATTEN_12G_OFFS];
714 else if ((lss & OPA_LINK_SPEED_12_5G) &&
715 (lse & OPA_LINK_SPEED_12_5G))
716 cable_atten = cache[QSFP_CU_ATTEN_7G_OFFS];
717
718 /* Fallback to configured attenuation if cable memory is bad */
719 if (cable_atten == 0 || cable_atten > 36) {
720 ret = get_platform_config_field(
721 ppd->dd,
722 PLATFORM_CONFIG_SYSTEM_TABLE, 0,
723 SYSTEM_TABLE_QSFP_ATTENUATION_DEFAULT_25G,
724 &cable_atten, 4);
725 if (ret)
726 return ret;
727 }
728
729 ret = get_platform_config_field(
730 ppd->dd, PLATFORM_CONFIG_PORT_TABLE, 0,
731 PORT_TABLE_REMOTE_ATTEN_25G, &remote_atten, 4);
732 if (ret)
733 return ret;
734
735 *ptr_total_atten = platform_atten + cable_atten + remote_atten;
736
737 *ptr_tuning_method = OPA_PASSIVE_TUNING;
738 break;
739 case 0x0 ... 0x9: /* fallthrough */
740 case 0xC: /* fallthrough */
741 case 0xE:
742 ret = tune_active_qsfp(ppd, ptr_tx_preset, ptr_rx_preset,
743 ptr_total_atten);
744 if (ret)
745 return ret;
746
747 *ptr_tuning_method = OPA_ACTIVE_TUNING;
748 break;
749 case 0xD: /* fallthrough */
750 case 0xF:
751 default:
752 dd_dev_info(ppd->dd, "%s: Unknown/unsupported cable\n",
753 __func__);
754 break;
755 }
756 return ret;
757 }
758
759 /*
760 * This function communicates its success or failure via ppd->driver_link_ready
761 * Thus, it depends on its association with start_link(...) which checks
762 * driver_link_ready before proceeding with the link negotiation and
763 * initialization process.
764 */
765 void tune_serdes(struct hfi1_pportdata *ppd)
766 {
767 int ret = 0;
768 u32 total_atten = 0;
769 u32 remote_atten = 0, platform_atten = 0;
770 u32 rx_preset_index, tx_preset_index;
771 u8 tuning_method = 0, limiting_active = 0;
772 struct hfi1_devdata *dd = ppd->dd;
773
774 rx_preset_index = OPA_INVALID_INDEX;
775 tx_preset_index = OPA_INVALID_INDEX;
776
777 /* the link defaults to enabled */
778 ppd->link_enabled = 1;
779 /* the driver link ready state defaults to not ready */
780 ppd->driver_link_ready = 0;
781 ppd->offline_disabled_reason = HFI1_ODR_MASK(OPA_LINKDOWN_REASON_NONE);
782
783 /* Skip the tuning for testing (loopback != none) and simulations */
784 if (loopback != LOOPBACK_NONE ||
785 ppd->dd->icode == ICODE_FUNCTIONAL_SIMULATOR) {
786 ppd->driver_link_ready = 1;
787 return;
788 }
789
790 switch (ppd->port_type) {
791 case PORT_TYPE_DISCONNECTED:
792 ppd->offline_disabled_reason =
793 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_DISCONNECTED);
794 dd_dev_info(dd, "%s: Port disconnected, disabling port\n",
795 __func__);
796 goto bail;
797 case PORT_TYPE_FIXED:
798 /* platform_atten, remote_atten pre-zeroed to catch error */
799 get_platform_config_field(
800 ppd->dd, PLATFORM_CONFIG_PORT_TABLE, 0,
801 PORT_TABLE_LOCAL_ATTEN_25G, &platform_atten, 4);
802
803 get_platform_config_field(
804 ppd->dd, PLATFORM_CONFIG_PORT_TABLE, 0,
805 PORT_TABLE_REMOTE_ATTEN_25G, &remote_atten, 4);
806
807 total_atten = platform_atten + remote_atten;
808
809 tuning_method = OPA_PASSIVE_TUNING;
810 break;
811 case PORT_TYPE_VARIABLE:
812 if (qsfp_mod_present(ppd)) {
813 /*
814 * platform_atten, remote_atten pre-zeroed to
815 * catch error
816 */
817 get_platform_config_field(
818 ppd->dd, PLATFORM_CONFIG_PORT_TABLE, 0,
819 PORT_TABLE_LOCAL_ATTEN_25G,
820 &platform_atten, 4);
821
822 get_platform_config_field(
823 ppd->dd, PLATFORM_CONFIG_PORT_TABLE, 0,
824 PORT_TABLE_REMOTE_ATTEN_25G,
825 &remote_atten, 4);
826
827 total_atten = platform_atten + remote_atten;
828
829 tuning_method = OPA_PASSIVE_TUNING;
830 } else {
831 ppd->offline_disabled_reason =
832 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_CHASSIS_CONFIG);
833 goto bail;
834 }
835 break;
836 case PORT_TYPE_QSFP:
837 if (qsfp_mod_present(ppd)) {
838 ret = acquire_chip_resource(ppd->dd,
839 qsfp_resource(ppd->dd),
840 QSFP_WAIT);
841 if (ret) {
842 dd_dev_err(ppd->dd, "%s: hfi%d: cannot lock i2c chain\n",
843 __func__, (int)ppd->dd->hfi1_id);
844 goto bail;
845 }
846 refresh_qsfp_cache(ppd, &ppd->qsfp_info);
847
848 if (ppd->qsfp_info.cache_valid) {
849 ret = tune_qsfp(ppd,
850 &tx_preset_index,
851 &rx_preset_index,
852 &tuning_method,
853 &total_atten);
854
855 /*
856 * We may have modified the QSFP memory, so
857 * update the cache to reflect the changes
858 */
859 refresh_qsfp_cache(ppd, &ppd->qsfp_info);
860 limiting_active =
861 ppd->qsfp_info.limiting_active;
862 } else {
863 dd_dev_err(dd,
864 "%s: Reading QSFP memory failed\n",
865 __func__);
866 ret = -EINVAL; /* a fail indication */
867 }
868 release_chip_resource(ppd->dd, qsfp_resource(ppd->dd));
869 if (ret)
870 goto bail;
871 } else {
872 ppd->offline_disabled_reason =
873 HFI1_ODR_MASK(
874 OPA_LINKDOWN_REASON_LOCAL_MEDIA_NOT_INSTALLED);
875 goto bail;
876 }
877 break;
878 default:
879 dd_dev_info(ppd->dd, "%s: Unknown port type\n", __func__);
880 ppd->port_type = PORT_TYPE_UNKNOWN;
881 tuning_method = OPA_UNKNOWN_TUNING;
882 total_atten = 0;
883 limiting_active = 0;
884 tx_preset_index = OPA_INVALID_INDEX;
885 break;
886 }
887
888 if (ppd->offline_disabled_reason ==
889 HFI1_ODR_MASK(OPA_LINKDOWN_REASON_NONE))
890 apply_tunings(ppd, tx_preset_index, tuning_method,
891 total_atten, limiting_active);
892
893 if (!ret)
894 ppd->driver_link_ready = 1;
895
896 return;
897 bail:
898 ppd->driver_link_ready = 0;
899 }
Linux kernel - Deliverables
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