drivers/infiniband/hw/ipath/ipath_kernel.h

   1 #ifndef _IPATH_KERNEL_H
   2 #define _IPATH_KERNEL_H
   3 /*
   4  * Copyright (c) 2006 QLogic, Inc. All rights reserved.
   5  * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
   6  *
   7  * This software is available to you under a choice of one of two
   8  * licenses.  You may choose to be licensed under the terms of the GNU
   9  * General Public License (GPL) Version 2, available from the file
  10  * COPYING in the main directory of this source tree, or the
  11  * OpenIB.org BSD license below:
  12  *
  13  *     Redistribution and use in source and binary forms, with or
  14  *     without modification, are permitted provided that the following
  15  *     conditions are met:
  16  *
  17  *      - Redistributions of source code must retain the above
  18  *        copyright notice, this list of conditions and the following
  19  *        disclaimer.
  20  *
  21  *      - Redistributions in binary form must reproduce the above
  22  *        copyright notice, this list of conditions and the following
  23  *        disclaimer in the documentation and/or other materials
  24  *        provided with the distribution.
  25  *
  26  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  27  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  28  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  29  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  30  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  31  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  32  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  33  * SOFTWARE.
  34  */
  35
  36 /*
  37  * This header file is the base header file for infinipath kernel code
  38  * ipath_user.h serves a similar purpose for user code.
  39  */
  40
  41 #include <linux/interrupt.h>
  42 #include <asm/io.h>
  43
  44 #include "ipath_common.h"
  45 #include "ipath_debug.h"
  46 #include "ipath_registers.h"
  47
  48 /* only s/w major version of InfiniPath we can handle */
  49 #define IPATH_CHIP_VERS_MAJ 2U
  50
  51 /* don't care about this except printing */
  52 #define IPATH_CHIP_VERS_MIN 0U
  53
  54 /* temporary, maybe always */
  55 extern struct infinipath_stats ipath_stats;
  56
  57 #define IPATH_CHIP_SWVERSION IPATH_CHIP_VERS_MAJ
  58
  59 struct ipath_portdata {
  60         void **port_rcvegrbuf;
  61         dma_addr_t *port_rcvegrbuf_phys;
  62         /* rcvhdrq base, needs mmap before useful */
  63         void *port_rcvhdrq;
  64         /* kernel virtual address where hdrqtail is updated */
  65         volatile __le64 *port_rcvhdrtail_kvaddr;
  66         /*
  67          * temp buffer for expected send setup, allocated at open, instead
  68          * of each setup call
  69          */
  70         void *port_tid_pg_list;
  71         /* when waiting for rcv or pioavail */
  72         wait_queue_head_t port_wait;
  73         /*
  74          * rcvegr bufs base, physical, must fit
  75          * in 44 bits so 32 bit programs mmap64 44 bit works)
  76          */
  77         dma_addr_t port_rcvegr_phys;
  78         /* mmap of hdrq, must fit in 44 bits */
  79         dma_addr_t port_rcvhdrq_phys;
  80         dma_addr_t port_rcvhdrqtailaddr_phys;
  81         /*
  82          * number of opens on this instance (0 or 1; ignoring forks, dup,
  83          * etc. for now)
  84          */
  85         int port_cnt;
  86         /*
  87          * how much space to leave at start of eager TID entries for
  88          * protocol use, on each TID
  89          */
  90         /* instead of calculating it */
  91         unsigned port_port;
  92         /* chip offset of PIO buffers for this port */
  93         u32 port_piobufs;
  94         /* how many alloc_pages() chunks in port_rcvegrbuf_pages */
  95         u32 port_rcvegrbuf_chunks;
  96         /* how many egrbufs per chunk */
  97         u32 port_rcvegrbufs_perchunk;
  98         /* order for port_rcvegrbuf_pages */
  99         size_t port_rcvegrbuf_size;
 100         /* rcvhdrq size (for freeing) */
 101         size_t port_rcvhdrq_size;
 102         /* next expected TID to check when looking for free */
 103         u32 port_tidcursor;
 104         /* next expected TID to check */
 105         unsigned long port_flag;
 106         /* WAIT_RCV that timed out, no interrupt */
 107         u32 port_rcvwait_to;
 108         /* WAIT_PIO that timed out, no interrupt */
 109         u32 port_piowait_to;
 110         /* WAIT_RCV already happened, no wait */
 111         u32 port_rcvnowait;
 112         /* WAIT_PIO already happened, no wait */
 113         u32 port_pionowait;
 114         /* total number of rcvhdrqfull errors */
 115         u32 port_hdrqfull;
 116         /* pid of process using this port */
 117         pid_t port_pid;
 118         /* same size as task_struct .comm[] */
 119         char port_comm[16];
 120         /* pkeys set by this use of this port */
 121         u16 port_pkeys[4];
 122         /* so file ops can get at unit */
 123         struct ipath_devdata *port_dd;
 124 };
 125
 126 struct sk_buff;
 127
 128 /*
 129  * control information for layered drivers
 130  */
 131 struct _ipath_layer {
 132         void *l_arg;
 133 };
 134
 135 struct ipath_devdata {
 136         struct list_head ipath_list;
 137
 138         struct ipath_kregs const *ipath_kregs;
 139         struct ipath_cregs const *ipath_cregs;
 140
 141         /* mem-mapped pointer to base of chip regs */
 142         u64 __iomem *ipath_kregbase;
 143         /* end of mem-mapped chip space; range checking */
 144         u64 __iomem *ipath_kregend;
 145         /* physical address of chip for io_remap, etc. */
 146         unsigned long ipath_physaddr;
 147         /* base of memory alloced for ipath_kregbase, for free */
 148         u64 *ipath_kregalloc;
 149         /*
 150          * virtual address where port0 rcvhdrqtail updated for this unit.
 151          * only written to by the chip, not the driver.
 152          */
 153         volatile __le64 *ipath_hdrqtailptr;
 154         /* ipath_cfgports pointers */
 155         struct ipath_portdata **ipath_pd;
 156         /* sk_buffs used by port 0 eager receive queue */
 157         struct sk_buff **ipath_port0_skbs;
 158         /* kvirt address of 1st 2k pio buffer */
 159         void __iomem *ipath_pio2kbase;
 160         /* kvirt address of 1st 4k pio buffer */
 161         void __iomem *ipath_pio4kbase;
 162         /*
 163          * points to area where PIOavail registers will be DMA'ed.
 164          * Has to be on a page of it's own, because the page will be
 165          * mapped into user program space.  This copy is *ONLY* ever
 166          * written by DMA, not by the driver!  Need a copy per device
 167          * when we get to multiple devices
 168          */
 169         volatile __le64 *ipath_pioavailregs_dma;
 170         /* physical address where updates occur */
 171         dma_addr_t ipath_pioavailregs_phys;
 172         struct _ipath_layer ipath_layer;
 173         /* setup intr */
 174         int (*ipath_f_intrsetup)(struct ipath_devdata *);
 175         /* setup on-chip bus config */
 176         int (*ipath_f_bus)(struct ipath_devdata *, struct pci_dev *);
 177         /* hard reset chip */
 178         int (*ipath_f_reset)(struct ipath_devdata *);
 179         int (*ipath_f_get_boardname)(struct ipath_devdata *, char *,
 180                                      size_t);
 181         void (*ipath_f_init_hwerrors)(struct ipath_devdata *);
 182         void (*ipath_f_handle_hwerrors)(struct ipath_devdata *, char *,
 183                                         size_t);
 184         void (*ipath_f_quiet_serdes)(struct ipath_devdata *);
 185         int (*ipath_f_bringup_serdes)(struct ipath_devdata *);
 186         int (*ipath_f_early_init)(struct ipath_devdata *);
 187         void (*ipath_f_clear_tids)(struct ipath_devdata *, unsigned);
 188         void (*ipath_f_put_tid)(struct ipath_devdata *, u64 __iomem*,
 189                                 u32, unsigned long);
 190         void (*ipath_f_tidtemplate)(struct ipath_devdata *);
 191         void (*ipath_f_cleanup)(struct ipath_devdata *);
 192         void (*ipath_f_setextled)(struct ipath_devdata *, u64, u64);
 193         /* fill out chip-specific fields */
 194         int (*ipath_f_get_base_info)(struct ipath_portdata *, void *);
 195         struct ipath_ibdev *verbs_dev;
 196         struct timer_list verbs_timer;
 197         /* total dwords sent (summed from counter) */
 198         u64 ipath_sword;
 199         /* total dwords rcvd (summed from counter) */
 200         u64 ipath_rword;
 201         /* total packets sent (summed from counter) */
 202         u64 ipath_spkts;
 203         /* total packets rcvd (summed from counter) */
 204         u64 ipath_rpkts;
 205         /* ipath_statusp initially points to this. */
 206         u64 _ipath_status;
 207         /* GUID for this interface, in network order */
 208         __be64 ipath_guid;
 209         /*
 210          * aggregrate of error bits reported since last cleared, for
 211          * limiting of error reporting
 212          */
 213         ipath_err_t ipath_lasterror;
 214         /*
 215          * aggregrate of error bits reported since last cleared, for
 216          * limiting of hwerror reporting
 217          */
 218         ipath_err_t ipath_lasthwerror;
 219         /*
 220          * errors masked because they occur too fast, also includes errors
 221          * that are always ignored (ipath_ignorederrs)
 222          */
 223         ipath_err_t ipath_maskederrs;
 224         /* time in jiffies at which to re-enable maskederrs */
 225         unsigned long ipath_unmasktime;
 226         /*
 227          * errors always ignored (masked), at least for a given
 228          * chip/device, because they are wrong or not useful
 229          */
 230         ipath_err_t ipath_ignorederrs;
 231         /* count of egrfull errors, combined for all ports */
 232         u64 ipath_last_tidfull;
 233         /* for ipath_qcheck() */
 234         u64 ipath_lastport0rcv_cnt;
 235         /* template for writing TIDs  */
 236         u64 ipath_tidtemplate;
 237         /* value to write to free TIDs */
 238         u64 ipath_tidinvalid;
 239         /* IBA6120 rcv interrupt setup */
 240         u64 ipath_rhdrhead_intr_off;
 241
 242         /* size of memory at ipath_kregbase */
 243         u32 ipath_kregsize;
 244         /* number of registers used for pioavail */
 245         u32 ipath_pioavregs;
 246         /* IPATH_POLL, etc. */
 247         u32 ipath_flags;
 248         /* ipath_flags driver is waiting for */
 249         u32 ipath_state_wanted;
 250         /* last buffer for user use, first buf for kernel use is this
 251          * index. */
 252         u32 ipath_lastport_piobuf;
 253         /* is a stats timer active */
 254         u32 ipath_stats_timer_active;
 255         /* dwords sent read from counter */
 256         u32 ipath_lastsword;
 257         /* dwords received read from counter */
 258         u32 ipath_lastrword;
 259         /* sent packets read from counter */
 260         u32 ipath_lastspkts;
 261         /* received packets read from counter */
 262         u32 ipath_lastrpkts;
 263         /* pio bufs allocated per port */
 264         u32 ipath_pbufsport;
 265         /*
 266          * number of ports configured as max; zero is set to number chip
 267          * supports, less gives more pio bufs/port, etc.
 268          */
 269         u32 ipath_cfgports;
 270         /* port0 rcvhdrq head offset */
 271         u32 ipath_port0head;
 272         /* count of port 0 hdrqfull errors */
 273         u32 ipath_p0_hdrqfull;
 274
 275         /*
 276          * (*cfgports) used to suppress multiple instances of same
 277          * port staying stuck at same point
 278          */
 279         u32 *ipath_lastrcvhdrqtails;
 280         /*
 281          * (*cfgports) used to suppress multiple instances of same
 282          * port staying stuck at same point
 283          */
 284         u32 *ipath_lastegrheads;
 285         /*
 286          * index of last piobuffer we used.  Speeds up searching, by
 287          * starting at this point.  Doesn't matter if multiple cpu's use and
 288          * update, last updater is only write that matters.  Whenever it
 289          * wraps, we update shadow copies.  Need a copy per device when we
 290          * get to multiple devices
 291          */
 292         u32 ipath_lastpioindex;
 293         /* max length of freezemsg */
 294         u32 ipath_freezelen;
 295         /*
 296          * consecutive times we wanted a PIO buffer but were unable to
 297          * get one
 298          */
 299         u32 ipath_consec_nopiobuf;
 300         /*
 301          * hint that we should update ipath_pioavailshadow before
 302          * looking for a PIO buffer
 303          */
 304         u32 ipath_upd_pio_shadow;
 305         /* so we can rewrite it after a chip reset */
 306         u32 ipath_pcibar0;
 307         /* so we can rewrite it after a chip reset */
 308         u32 ipath_pcibar1;
 309
 310         /* HT/PCI Vendor ID (here for NodeInfo) */
 311         u16 ipath_vendorid;
 312         /* HT/PCI Device ID (here for NodeInfo) */
 313         u16 ipath_deviceid;
 314         /* offset in HT config space of slave/primary interface block */
 315         u8 ipath_ht_slave_off;
 316         /* for write combining settings */
 317         unsigned long ipath_wc_cookie;
 318         /* ref count for each pkey */
 319         atomic_t ipath_pkeyrefs[4];
 320         /* shadow copy of all exptids physaddr; used only by funcsim */
 321         u64 *ipath_tidsimshadow;
 322         /* shadow copy of struct page *'s for exp tid pages */
 323         struct page **ipath_pageshadow;
 324         /* lock to workaround chip bug 9437 */
 325         spinlock_t ipath_tid_lock;
 326
 327         /*
 328          * IPATH_STATUS_*,
 329          * this address is mapped readonly into user processes so they can
 330          * get status cheaply, whenever they want.
 331          */
 332         u64 *ipath_statusp;
 333         /* freeze msg if hw error put chip in freeze */
 334         char *ipath_freezemsg;
 335         /* pci access data structure */
 336         struct pci_dev *pcidev;
 337         struct cdev *user_cdev;
 338         struct cdev *diag_cdev;
 339         struct class_device *user_class_dev;
 340         struct class_device *diag_class_dev;
 341         /* timer used to prevent stats overflow, error throttling, etc. */
 342         struct timer_list ipath_stats_timer;
 343         /* check for stale messages in rcv queue */
 344         /* only allow one intr at a time. */
 345         unsigned long ipath_rcv_pending;
 346         void *ipath_dummy_hdrq; /* used after port close */
 347         dma_addr_t ipath_dummy_hdrq_phys;
 348
 349         /*
 350          * Shadow copies of registers; size indicates read access size.
 351          * Most of them are readonly, but some are write-only register,
 352          * where we manipulate the bits in the shadow copy, and then write
 353          * the shadow copy to infinipath.
 354          *
 355          * We deliberately make most of these 32 bits, since they have
 356          * restricted range.  For any that we read, we won't to generate 32
 357          * bit accesses, since Opteron will generate 2 separate 32 bit HT
 358          * transactions for a 64 bit read, and we want to avoid unnecessary
 359          * HT transactions.
 360          */
 361
 362         /* This is the 64 bit group */
 363
 364         /*
 365          * shadow of pioavail, check to be sure it's large enough at
 366          * init time.
 367          */
 368         unsigned long ipath_pioavailshadow[8];
 369         /* shadow of kr_gpio_out, for rmw ops */
 370         u64 ipath_gpio_out;
 371         /* kr_revision shadow */
 372         u64 ipath_revision;
 373         /*
 374          * shadow of ibcctrl, for interrupt handling of link changes,
 375          * etc.
 376          */
 377         u64 ipath_ibcctrl;
 378         /*
 379          * last ibcstatus, to suppress "duplicate" status change messages,
 380          * mostly from 2 to 3
 381          */
 382         u64 ipath_lastibcstat;
 383         /* hwerrmask shadow */
 384         ipath_err_t ipath_hwerrmask;
 385         /* interrupt config reg shadow */
 386         u64 ipath_intconfig;
 387         /* kr_sendpiobufbase value */
 388         u64 ipath_piobufbase;
 389
 390         /* these are the "32 bit" regs */
 391
 392         /*
 393          * number of GUIDs in the flash for this interface; may need some
 394          * rethinking for setting on other ifaces
 395          */
 396         u32 ipath_nguid;
 397         /*
 398          * the following two are 32-bit bitmasks, but {test,clear,set}_bit
 399          * all expect bit fields to be "unsigned long"
 400          */
 401         /* shadow kr_rcvctrl */
 402         unsigned long ipath_rcvctrl;
 403         /* shadow kr_sendctrl */
 404         unsigned long ipath_sendctrl;
 405
 406         /* value we put in kr_rcvhdrcnt */
 407         u32 ipath_rcvhdrcnt;
 408         /* value we put in kr_rcvhdrsize */
 409         u32 ipath_rcvhdrsize;
 410         /* value we put in kr_rcvhdrentsize */
 411         u32 ipath_rcvhdrentsize;
 412         /* offset of last entry in rcvhdrq */
 413         u32 ipath_hdrqlast;
 414         /* kr_portcnt value */
 415         u32 ipath_portcnt;
 416         /* kr_pagealign value */
 417         u32 ipath_palign;
 418         /* number of "2KB" PIO buffers */
 419         u32 ipath_piobcnt2k;
 420         /* size in bytes of "2KB" PIO buffers */
 421         u32 ipath_piosize2k;
 422         /* number of "4KB" PIO buffers */
 423         u32 ipath_piobcnt4k;
 424         /* size in bytes of "4KB" PIO buffers */
 425         u32 ipath_piosize4k;
 426         /* kr_rcvegrbase value */
 427         u32 ipath_rcvegrbase;
 428         /* kr_rcvegrcnt value */
 429         u32 ipath_rcvegrcnt;
 430         /* kr_rcvtidbase value */
 431         u32 ipath_rcvtidbase;
 432         /* kr_rcvtidcnt value */
 433         u32 ipath_rcvtidcnt;
 434         /* kr_sendregbase */
 435         u32 ipath_sregbase;
 436         /* kr_userregbase */
 437         u32 ipath_uregbase;
 438         /* kr_counterregbase */
 439         u32 ipath_cregbase;
 440         /* shadow the control register contents */
 441         u32 ipath_control;
 442         /* shadow the gpio output contents */
 443         u32 ipath_extctrl;
 444         /* PCI revision register (HTC rev on FPGA) */
 445         u32 ipath_pcirev;
 446
 447         /* chip address space used by 4k pio buffers */
 448         u32 ipath_4kalign;
 449         /* The MTU programmed for this unit */
 450         u32 ipath_ibmtu;
 451         /*
 452          * The max size IB packet, included IB headers that we can send.
 453          * Starts same as ipath_piosize, but is affected when ibmtu is
 454          * changed, or by size of eager buffers
 455          */
 456         u32 ipath_ibmaxlen;
 457         /*
 458          * ibmaxlen at init time, limited by chip and by receive buffer
 459          * size.  Not changed after init.
 460          */
 461         u32 ipath_init_ibmaxlen;
 462         /* size of each rcvegrbuffer */
 463         u32 ipath_rcvegrbufsize;
 464         /* width (2,4,8,16,32) from HT config reg */
 465         u32 ipath_htwidth;
 466         /* HT speed (200,400,800,1000) from HT config */
 467         u32 ipath_htspeed;
 468         /* ports waiting for PIOavail intr */
 469         unsigned long ipath_portpiowait;
 470         /*
 471          * number of sequential ibcstatus change for polling active/quiet
 472          * (i.e., link not coming up).
 473          */
 474         u32 ipath_ibpollcnt;
 475         /* low and high portions of MSI capability/vector */
 476         u32 ipath_msi_lo;
 477         /* saved after PCIe init for restore after reset */
 478         u32 ipath_msi_hi;
 479         /* MSI data (vector) saved for restore */
 480         u16 ipath_msi_data;
 481         /* MLID programmed for this instance */
 482         u16 ipath_mlid;
 483         /* LID programmed for this instance */
 484         u16 ipath_lid;
 485         /* list of pkeys programmed; 0 if not set */
 486         u16 ipath_pkeys[4];
 487         /*
 488          * ASCII serial number, from flash, large enough for original
 489          * all digit strings, and longer QLogic serial number format
 490          */
 491         u8 ipath_serial[16];
 492         /* human readable board version */
 493         u8 ipath_boardversion[80];
 494         /* chip major rev, from ipath_revision */
 495         u8 ipath_majrev;
 496         /* chip minor rev, from ipath_revision */
 497         u8 ipath_minrev;
 498         /* board rev, from ipath_revision */
 499         u8 ipath_boardrev;
 500         /* unit # of this chip, if present */
 501         int ipath_unit;
 502         /* saved for restore after reset */
 503         u8 ipath_pci_cacheline;
 504         /* LID mask control */
 505         u8 ipath_lmc;
 506         /* Rx Polarity inversion (compensate for ~tx on partner) */
 507         u8 ipath_rx_pol_inv;
 508
 509         /* local link integrity counter */
 510         u32 ipath_lli_counter;
 511         /* local link integrity errors */
 512         u32 ipath_lli_errors;
 513 };
 514
 515 extern struct list_head ipath_dev_list;
 516 extern spinlock_t ipath_devs_lock;
 517 extern struct ipath_devdata *ipath_lookup(int unit);
 518
 519 int ipath_init_chip(struct ipath_devdata *, int);
 520 int ipath_enable_wc(struct ipath_devdata *dd);
 521 void ipath_disable_wc(struct ipath_devdata *dd);
 522 int ipath_count_units(int *npresentp, int *nupp, u32 *maxportsp);
 523 void ipath_shutdown_device(struct ipath_devdata *);
 524
 525 struct file_operations;
 526 int ipath_cdev_init(int minor, char *name, struct file_operations *fops,
 527                     struct cdev **cdevp, struct class_device **class_devp);
 528 void ipath_cdev_cleanup(struct cdev **cdevp,
 529                         struct class_device **class_devp);
 530
 531 int ipath_diag_add(struct ipath_devdata *);
 532 void ipath_diag_remove(struct ipath_devdata *);
 533
 534 extern wait_queue_head_t ipath_state_wait;
 535
 536 int ipath_user_add(struct ipath_devdata *dd);
 537 void ipath_user_remove(struct ipath_devdata *dd);
 538
 539 struct sk_buff *ipath_alloc_skb(struct ipath_devdata *dd, gfp_t);
 540
 541 extern int ipath_diag_inuse;
 542
 543 irqreturn_t ipath_intr(int irq, void *devid, struct pt_regs *regs);
 544 void ipath_decode_err(char *buf, size_t blen, ipath_err_t err);
 545 #if __IPATH_INFO || __IPATH_DBG
 546 extern const char *ipath_ibcstatus_str[];
 547 #endif
 548
 549 /* clean up any per-chip chip-specific stuff */
 550 void ipath_chip_cleanup(struct ipath_devdata *);
 551 /* clean up any chip type-specific stuff */
 552 void ipath_chip_done(void);
 553
 554 /* check to see if we have to force ordering for write combining */
 555 int ipath_unordered_wc(void);
 556
 557 void ipath_disarm_piobufs(struct ipath_devdata *, unsigned first,
 558                           unsigned cnt);
 559
 560 int ipath_create_rcvhdrq(struct ipath_devdata *, struct ipath_portdata *);
 561 void ipath_free_pddata(struct ipath_devdata *, struct ipath_portdata *);
 562
 563 int ipath_parse_ushort(const char *str, unsigned short *valp);
 564
 565 void ipath_kreceive(struct ipath_devdata *);
 566 int ipath_setrcvhdrsize(struct ipath_devdata *, unsigned);
 567 int ipath_reset_device(int);
 568 void ipath_get_faststats(unsigned long);
 569 int ipath_set_linkstate(struct ipath_devdata *, u8);
 570 int ipath_set_mtu(struct ipath_devdata *, u16);
 571 int ipath_set_lid(struct ipath_devdata *, u32, u8);
 572 int ipath_set_rx_pol_inv(struct ipath_devdata *dd, u8 new_pol_inv);
 573
 574 /* for use in system calls, where we want to know device type, etc. */
 575 #define port_fp(fp) ((struct ipath_portdata *) (fp)->private_data)
 576
 577 /*
 578  * values for ipath_flags
 579  */
 580 /* The chip is up and initted */
 581 #define IPATH_INITTED       0x2
 582                 /* set if any user code has set kr_rcvhdrsize */
 583 #define IPATH_RCVHDRSZ_SET  0x4
 584                 /* The chip is present and valid for accesses */
 585 #define IPATH_PRESENT       0x8
 586                 /* HT link0 is only 8 bits wide, ignore upper byte crc
 587                  * errors, etc. */
 588 #define IPATH_8BIT_IN_HT0   0x10
 589                 /* HT link1 is only 8 bits wide, ignore upper byte crc
 590                  * errors, etc. */
 591 #define IPATH_8BIT_IN_HT1   0x20
 592                 /* The link is down */
 593 #define IPATH_LINKDOWN      0x40
 594                 /* The link level is up (0x11) */
 595 #define IPATH_LINKINIT      0x80
 596                 /* The link is in the armed (0x21) state */
 597 #define IPATH_LINKARMED     0x100
 598                 /* The link is in the active (0x31) state */
 599 #define IPATH_LINKACTIVE    0x200
 600                 /* link current state is unknown */
 601 #define IPATH_LINKUNK       0x400
 602                 /* no IB cable, or no device on IB cable */
 603 #define IPATH_NOCABLE       0x4000
 604                 /* Supports port zero per packet receive interrupts via
 605                  * GPIO */
 606 #define IPATH_GPIO_INTR     0x8000
 607                 /* uses the coded 4byte TID, not 8 byte */
 608 #define IPATH_4BYTE_TID     0x10000
 609                 /* packet/word counters are 32 bit, else those 4 counters
 610                  * are 64bit */
 611 #define IPATH_32BITCOUNTERS 0x20000
 612                 /* can miss port0 rx interrupts */
 613 #define IPATH_POLL_RX_INTR  0x40000
 614 #define IPATH_DISABLED      0x80000 /* administratively disabled */
 615
 616 /* portdata flag bit offsets */
 617                 /* waiting for a packet to arrive */
 618 #define IPATH_PORT_WAITING_RCV   2
 619                 /* waiting for a PIO buffer to be available */
 620 #define IPATH_PORT_WAITING_PIO   3
 621
 622 /* free up any allocated data at closes */
 623 void ipath_free_data(struct ipath_portdata *dd);
 624 int ipath_waitfor_mdio_cmdready(struct ipath_devdata *);
 625 int ipath_waitfor_complete(struct ipath_devdata *, ipath_kreg, u64, u64 *);
 626 u32 __iomem *ipath_getpiobuf(struct ipath_devdata *, u32 *);
 627 void ipath_init_iba6120_funcs(struct ipath_devdata *);
 628 void ipath_init_iba6110_funcs(struct ipath_devdata *);
 629 void ipath_get_eeprom_info(struct ipath_devdata *);
 630 u64 ipath_snap_cntr(struct ipath_devdata *, ipath_creg);
 631
 632 /*
 633  * number of words used for protocol header if not set by ipath_userinit();
 634  */
 635 #define IPATH_DFLT_RCVHDRSIZE 9
 636
 637 #define IPATH_MDIO_CMD_WRITE   1
 638 #define IPATH_MDIO_CMD_READ    2
 639 #define IPATH_MDIO_CLD_DIV     25       /* to get 2.5 Mhz mdio clock */
 640 #define IPATH_MDIO_CMDVALID    0x40000000       /* bit 30 */
 641 #define IPATH_MDIO_DATAVALID   0x80000000       /* bit 31 */
 642 #define IPATH_MDIO_CTRL_STD    0x0
 643
 644 static inline u64 ipath_mdio_req(int cmd, int dev, int reg, int data)
 645 {
 646         return (((u64) IPATH_MDIO_CLD_DIV) << 32) |
 647                 (cmd << 26) |
 648                 (dev << 21) |
 649                 (reg << 16) |
 650                 (data & 0xFFFF);
 651 }
 652
 653                 /* signal and fifo status, in bank 31 */
 654 #define IPATH_MDIO_CTRL_XGXS_REG_8  0x8
 655                 /* controls loopback, redundancy */
 656 #define IPATH_MDIO_CTRL_8355_REG_1  0x10
 657                 /* premph, encdec, etc. */
 658 #define IPATH_MDIO_CTRL_8355_REG_2  0x11
 659                 /* Kchars, etc. */
 660 #define IPATH_MDIO_CTRL_8355_REG_6  0x15
 661 #define IPATH_MDIO_CTRL_8355_REG_9  0x18
 662 #define IPATH_MDIO_CTRL_8355_REG_10 0x1D
 663
 664 int ipath_get_user_pages(unsigned long, size_t, struct page **);
 665 int ipath_get_user_pages_nocopy(unsigned long, struct page **);
 666 void ipath_release_user_pages(struct page **, size_t);
 667 void ipath_release_user_pages_on_close(struct page **, size_t);
 668 int ipath_eeprom_read(struct ipath_devdata *, u8, void *, int);
 669 int ipath_eeprom_write(struct ipath_devdata *, u8, const void *, int);
 670
 671 /* these are used for the registers that vary with port */
 672 void ipath_write_kreg_port(const struct ipath_devdata *, ipath_kreg,
 673                            unsigned, u64);
 674 u64 ipath_read_kreg64_port(const struct ipath_devdata *, ipath_kreg,
 675                            unsigned);
 676
 677 /*
 678  * We could have a single register get/put routine, that takes a group type,
 679  * but this is somewhat clearer and cleaner.  It also gives us some error
 680  * checking.  64 bit register reads should always work, but are inefficient
 681  * on opteron (the northbridge always generates 2 separate HT 32 bit reads),
 682  * so we use kreg32 wherever possible.  User register and counter register
 683  * reads are always 32 bit reads, so only one form of those routines.
 684  */
 685
 686 /*
 687  * At the moment, none of the s-registers are writable, so no
 688  * ipath_write_sreg(), and none of the c-registers are writable, so no
 689  * ipath_write_creg().
 690  */
 691
 692 /**
 693  * ipath_read_ureg32 - read 32-bit virtualized per-port register
 694  * @dd: device
 695  * @regno: register number
 696  * @port: port number
 697  *
 698  * Return the contents of a register that is virtualized to be per port.
 699  * Returns -1 on errors (not distinguishable from valid contents at
 700  * runtime; we may add a separate error variable at some point).
 701  */
 702 static inline u32 ipath_read_ureg32(const struct ipath_devdata *dd,
 703                                     ipath_ureg regno, int port)
 704 {
 705         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
 706                 return 0;
 707
 708         return readl(regno + (u64 __iomem *)
 709                      (dd->ipath_uregbase +
 710                       (char __iomem *)dd->ipath_kregbase +
 711                       dd->ipath_palign * port));
 712 }
 713
 714 /**
 715  * ipath_write_ureg - write 32-bit virtualized per-port register
 716  * @dd: device
 717  * @regno: register number
 718  * @value: value
 719  * @port: port
 720  *
 721  * Write the contents of a register that is virtualized to be per port.
 722  */
 723 static inline void ipath_write_ureg(const struct ipath_devdata *dd,
 724                                     ipath_ureg regno, u64 value, int port)
 725 {
 726         u64 __iomem *ubase = (u64 __iomem *)
 727                 (dd->ipath_uregbase + (char __iomem *) dd->ipath_kregbase +
 728                  dd->ipath_palign * port);
 729         if (dd->ipath_kregbase)
 730                 writeq(value, &ubase[regno]);
 731 }
 732
 733 static inline u32 ipath_read_kreg32(const struct ipath_devdata *dd,
 734                                     ipath_kreg regno)
 735 {
 736         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
 737                 return -1;
 738         return readl((u32 __iomem *) & dd->ipath_kregbase[regno]);
 739 }
 740
 741 static inline u64 ipath_read_kreg64(const struct ipath_devdata *dd,
 742                                     ipath_kreg regno)
 743 {
 744         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
 745                 return -1;
 746
 747         return readq(&dd->ipath_kregbase[regno]);
 748 }
 749
 750 static inline void ipath_write_kreg(const struct ipath_devdata *dd,
 751                                     ipath_kreg regno, u64 value)
 752 {
 753         if (dd->ipath_kregbase)
 754                 writeq(value, &dd->ipath_kregbase[regno]);
 755 }
 756
 757 static inline u64 ipath_read_creg(const struct ipath_devdata *dd,
 758                                   ipath_sreg regno)
 759 {
 760         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
 761                 return 0;
 762
 763         return readq(regno + (u64 __iomem *)
 764                      (dd->ipath_cregbase +
 765                       (char __iomem *)dd->ipath_kregbase));
 766 }
 767
 768 static inline u32 ipath_read_creg32(const struct ipath_devdata *dd,
 769                                          ipath_sreg regno)
 770 {
 771         if (!dd->ipath_kregbase || !(dd->ipath_flags & IPATH_PRESENT))
 772                 return 0;
 773         return readl(regno + (u64 __iomem *)
 774                      (dd->ipath_cregbase +
 775                       (char __iomem *)dd->ipath_kregbase));
 776 }
 777
 778 /*
 779  * sysfs interface.
 780  */
 781
 782 struct device_driver;
 783
 784 extern const char ib_ipath_version[];
 785
 786 int ipath_driver_create_group(struct device_driver *);
 787 void ipath_driver_remove_group(struct device_driver *);
 788
 789 int ipath_device_create_group(struct device *, struct ipath_devdata *);
 790 void ipath_device_remove_group(struct device *, struct ipath_devdata *);
 791 int ipath_expose_reset(struct device *);
 792
 793 int ipath_diagpkt_add(void);
 794 void ipath_diagpkt_remove(void);
 795
 796 int ipath_init_ipathfs(void);
 797 void ipath_exit_ipathfs(void);
 798 int ipathfs_add_device(struct ipath_devdata *);
 799 int ipathfs_remove_device(struct ipath_devdata *);
 800
 801 /*
 802  * Flush write combining store buffers (if present) and perform a write
 803  * barrier.
 804  */
 805 #if defined(CONFIG_X86_64)
 806 #define ipath_flush_wc() asm volatile("sfence" ::: "memory")
 807 #else
 808 #define ipath_flush_wc() wmb()
 809 #endif
 810
 811 extern unsigned ipath_debug; /* debugging bit mask */
 812
 813 const char *ipath_get_unit_name(int unit);
 814
 815 extern struct mutex ipath_mutex;
 816
 817 #define IPATH_DRV_NAME          "ib_ipath"
 818 #define IPATH_MAJOR             233
 819 #define IPATH_USER_MINOR_BASE   0
 820 #define IPATH_DIAGPKT_MINOR     127
 821 #define IPATH_DIAG_MINOR_BASE   129
 822 #define IPATH_NMINORS           255
 823
 824 #define ipath_dev_err(dd,fmt,...) \
 825         do { \
 826                 const struct ipath_devdata *__dd = (dd); \
 827                 if (__dd->pcidev) \
 828                         dev_err(&__dd->pcidev->dev, "%s: " fmt, \
 829                                 ipath_get_unit_name(__dd->ipath_unit), \
 830                                 ##__VA_ARGS__); \
 831                 else \
 832                         printk(KERN_ERR IPATH_DRV_NAME ": %s: " fmt, \
 833                                ipath_get_unit_name(__dd->ipath_unit), \
 834                                ##__VA_ARGS__); \
 835         } while (0)
 836
 837 #if _IPATH_DEBUGGING
 838
 839 # define __IPATH_DBG_WHICH(which,fmt,...) \
 840         do { \
 841                 if(unlikely(ipath_debug&(which))) \
 842                         printk(KERN_DEBUG IPATH_DRV_NAME ": %s: " fmt, \
 843                                __func__,##__VA_ARGS__); \
 844         } while(0)
 845
 846 # define ipath_dbg(fmt,...) \
 847         __IPATH_DBG_WHICH(__IPATH_DBG,fmt,##__VA_ARGS__)
 848 # define ipath_cdbg(which,fmt,...) \
 849         __IPATH_DBG_WHICH(__IPATH_##which##DBG,fmt,##__VA_ARGS__)
 850
 851 #else /* ! _IPATH_DEBUGGING */
 852
 853 # define ipath_dbg(fmt,...)
 854 # define ipath_cdbg(which,fmt,...)
 855
 856 #endif /* _IPATH_DEBUGGING */
 857
 858 #endif                          /* _IPATH_KERNEL_H */