2 * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <rdma/ib_mad.h>
34 #include <rdma/ib_smi.h>
35 #include <rdma/ib_sa.h>
36 #include <rdma/ib_cache.h>
38 #include <linux/random.h>
39 #include <linux/mlx4/cmd.h>
40 #include <linux/gfp.h>
41 #include <rdma/ib_pma.h>
46 MLX4_IB_VENDOR_CLASS1
= 0x9,
47 MLX4_IB_VENDOR_CLASS2
= 0xa
50 #define MLX4_TUN_SEND_WRID_SHIFT 34
51 #define MLX4_TUN_QPN_SHIFT 32
52 #define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
53 #define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
55 #define MLX4_TUN_IS_RECV(a) (((a) >> MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
56 #define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
58 /* Port mgmt change event handling */
60 #define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
61 #define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
62 #define NUM_IDX_IN_PKEY_TBL_BLK 32
63 #define GUID_TBL_ENTRY_SIZE 8 /* size in bytes */
64 #define GUID_TBL_BLK_NUM_ENTRIES 8
65 #define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
67 struct mlx4_mad_rcv_buf
{
72 struct mlx4_mad_snd_buf
{
76 struct mlx4_tunnel_mad
{
78 struct mlx4_ib_tunnel_header hdr
;
82 struct mlx4_rcv_tunnel_mad
{
83 struct mlx4_rcv_tunnel_hdr hdr
;
88 static void handle_client_rereg_event(struct mlx4_ib_dev
*dev
, u8 port_num
);
89 static void handle_lid_change_event(struct mlx4_ib_dev
*dev
, u8 port_num
);
90 static void __propagate_pkey_ev(struct mlx4_ib_dev
*dev
, int port_num
,
91 int block
, u32 change_bitmap
);
93 __be64
mlx4_ib_gen_node_guid(void)
95 #define NODE_GUID_HI ((u64) (((u64)IB_OPENIB_OUI) << 40))
96 return cpu_to_be64(NODE_GUID_HI
| prandom_u32());
99 __be64
mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx
*ctx
)
101 return cpu_to_be64(atomic_inc_return(&ctx
->tid
)) |
102 cpu_to_be64(0xff00000000000000LL
);
105 int mlx4_MAD_IFC(struct mlx4_ib_dev
*dev
, int mad_ifc_flags
,
106 int port
, const struct ib_wc
*in_wc
,
107 const struct ib_grh
*in_grh
,
108 const void *in_mad
, void *response_mad
)
110 struct mlx4_cmd_mailbox
*inmailbox
, *outmailbox
;
113 u32 in_modifier
= port
;
116 inmailbox
= mlx4_alloc_cmd_mailbox(dev
->dev
);
117 if (IS_ERR(inmailbox
))
118 return PTR_ERR(inmailbox
);
119 inbox
= inmailbox
->buf
;
121 outmailbox
= mlx4_alloc_cmd_mailbox(dev
->dev
);
122 if (IS_ERR(outmailbox
)) {
123 mlx4_free_cmd_mailbox(dev
->dev
, inmailbox
);
124 return PTR_ERR(outmailbox
);
127 memcpy(inbox
, in_mad
, 256);
130 * Key check traps can't be generated unless we have in_wc to
131 * tell us where to send the trap.
133 if ((mad_ifc_flags
& MLX4_MAD_IFC_IGNORE_MKEY
) || !in_wc
)
135 if ((mad_ifc_flags
& MLX4_MAD_IFC_IGNORE_BKEY
) || !in_wc
)
137 if (mlx4_is_mfunc(dev
->dev
) &&
138 (mad_ifc_flags
& MLX4_MAD_IFC_NET_VIEW
|| in_wc
))
154 memset(inbox
+ 256, 0, 256);
155 ext_info
= inbox
+ 256;
157 ext_info
->my_qpn
= cpu_to_be32(in_wc
->qp
->qp_num
);
158 ext_info
->rqpn
= cpu_to_be32(in_wc
->src_qp
);
159 ext_info
->sl
= in_wc
->sl
<< 4;
160 ext_info
->g_path
= in_wc
->dlid_path_bits
|
161 (in_wc
->wc_flags
& IB_WC_GRH
? 0x80 : 0);
162 ext_info
->pkey
= cpu_to_be16(in_wc
->pkey_index
);
165 memcpy(ext_info
->grh
, in_grh
, 40);
169 in_modifier
|= in_wc
->slid
<< 16;
172 err
= mlx4_cmd_box(dev
->dev
, inmailbox
->dma
, outmailbox
->dma
, in_modifier
,
173 mlx4_is_master(dev
->dev
) ? (op_modifier
& ~0x8) : op_modifier
,
174 MLX4_CMD_MAD_IFC
, MLX4_CMD_TIME_CLASS_C
,
175 (op_modifier
& 0x8) ? MLX4_CMD_NATIVE
: MLX4_CMD_WRAPPED
);
178 memcpy(response_mad
, outmailbox
->buf
, 256);
180 mlx4_free_cmd_mailbox(dev
->dev
, inmailbox
);
181 mlx4_free_cmd_mailbox(dev
->dev
, outmailbox
);
186 static void update_sm_ah(struct mlx4_ib_dev
*dev
, u8 port_num
, u16 lid
, u8 sl
)
188 struct ib_ah
*new_ah
;
189 struct ib_ah_attr ah_attr
;
192 if (!dev
->send_agent
[port_num
- 1][0])
195 memset(&ah_attr
, 0, sizeof ah_attr
);
198 ah_attr
.port_num
= port_num
;
200 new_ah
= ib_create_ah(dev
->send_agent
[port_num
- 1][0]->qp
->pd
,
205 spin_lock_irqsave(&dev
->sm_lock
, flags
);
206 if (dev
->sm_ah
[port_num
- 1])
207 ib_destroy_ah(dev
->sm_ah
[port_num
- 1]);
208 dev
->sm_ah
[port_num
- 1] = new_ah
;
209 spin_unlock_irqrestore(&dev
->sm_lock
, flags
);
213 * Snoop SM MADs for port info, GUID info, and P_Key table sets, so we can
214 * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
216 static void smp_snoop(struct ib_device
*ibdev
, u8 port_num
, const struct ib_mad
*mad
,
219 struct ib_port_info
*pinfo
;
222 u32 bn
, pkey_change_bitmap
;
226 struct mlx4_ib_dev
*dev
= to_mdev(ibdev
);
227 if ((mad
->mad_hdr
.mgmt_class
== IB_MGMT_CLASS_SUBN_LID_ROUTED
||
228 mad
->mad_hdr
.mgmt_class
== IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE
) &&
229 mad
->mad_hdr
.method
== IB_MGMT_METHOD_SET
)
230 switch (mad
->mad_hdr
.attr_id
) {
231 case IB_SMP_ATTR_PORT_INFO
:
232 pinfo
= (struct ib_port_info
*) ((struct ib_smp
*) mad
)->data
;
233 lid
= be16_to_cpu(pinfo
->lid
);
235 update_sm_ah(dev
, port_num
,
236 be16_to_cpu(pinfo
->sm_lid
),
237 pinfo
->neighbormtu_mastersmsl
& 0xf);
239 if (pinfo
->clientrereg_resv_subnetto
& 0x80)
240 handle_client_rereg_event(dev
, port_num
);
243 handle_lid_change_event(dev
, port_num
);
246 case IB_SMP_ATTR_PKEY_TABLE
:
247 if (!mlx4_is_mfunc(dev
->dev
)) {
248 mlx4_ib_dispatch_event(dev
, port_num
,
249 IB_EVENT_PKEY_CHANGE
);
253 /* at this point, we are running in the master.
254 * Slaves do not receive SMPs.
256 bn
= be32_to_cpu(((struct ib_smp
*)mad
)->attr_mod
) & 0xFFFF;
257 base
= (__be16
*) &(((struct ib_smp
*)mad
)->data
[0]);
258 pkey_change_bitmap
= 0;
259 for (i
= 0; i
< 32; i
++) {
260 pr_debug("PKEY[%d] = x%x\n",
261 i
+ bn
*32, be16_to_cpu(base
[i
]));
262 if (be16_to_cpu(base
[i
]) !=
263 dev
->pkeys
.phys_pkey_cache
[port_num
- 1][i
+ bn
*32]) {
264 pkey_change_bitmap
|= (1 << i
);
265 dev
->pkeys
.phys_pkey_cache
[port_num
- 1][i
+ bn
*32] =
266 be16_to_cpu(base
[i
]);
269 pr_debug("PKEY Change event: port=%d, "
270 "block=0x%x, change_bitmap=0x%x\n",
271 port_num
, bn
, pkey_change_bitmap
);
273 if (pkey_change_bitmap
) {
274 mlx4_ib_dispatch_event(dev
, port_num
,
275 IB_EVENT_PKEY_CHANGE
);
276 if (!dev
->sriov
.is_going_down
)
277 __propagate_pkey_ev(dev
, port_num
, bn
,
282 case IB_SMP_ATTR_GUID_INFO
:
283 /* paravirtualized master's guid is guid 0 -- does not change */
284 if (!mlx4_is_master(dev
->dev
))
285 mlx4_ib_dispatch_event(dev
, port_num
,
286 IB_EVENT_GID_CHANGE
);
287 /*if master, notify relevant slaves*/
288 if (mlx4_is_master(dev
->dev
) &&
289 !dev
->sriov
.is_going_down
) {
290 bn
= be32_to_cpu(((struct ib_smp
*)mad
)->attr_mod
);
291 mlx4_ib_update_cache_on_guid_change(dev
, bn
, port_num
,
292 (u8
*)(&((struct ib_smp
*)mad
)->data
));
293 mlx4_ib_notify_slaves_on_guid_change(dev
, bn
, port_num
,
294 (u8
*)(&((struct ib_smp
*)mad
)->data
));
303 static void __propagate_pkey_ev(struct mlx4_ib_dev
*dev
, int port_num
,
304 int block
, u32 change_bitmap
)
306 int i
, ix
, slave
, err
;
309 for (slave
= 0; slave
< dev
->dev
->caps
.sqp_demux
; slave
++) {
310 if (slave
== mlx4_master_func_num(dev
->dev
))
312 if (!mlx4_is_slave_active(dev
->dev
, slave
))
316 for (i
= 0; i
< 32; i
++) {
317 if (!(change_bitmap
& (1 << i
)))
320 ix
< dev
->dev
->caps
.pkey_table_len
[port_num
]; ix
++) {
321 if (dev
->pkeys
.virt2phys_pkey
[slave
][port_num
- 1]
322 [ix
] == i
+ 32 * block
) {
323 err
= mlx4_gen_pkey_eqe(dev
->dev
, slave
, port_num
);
324 pr_debug("propagate_pkey_ev: slave %d,"
325 " port %d, ix %d (%d)\n",
326 slave
, port_num
, ix
, err
);
337 static void node_desc_override(struct ib_device
*dev
,
342 if ((mad
->mad_hdr
.mgmt_class
== IB_MGMT_CLASS_SUBN_LID_ROUTED
||
343 mad
->mad_hdr
.mgmt_class
== IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE
) &&
344 mad
->mad_hdr
.method
== IB_MGMT_METHOD_GET_RESP
&&
345 mad
->mad_hdr
.attr_id
== IB_SMP_ATTR_NODE_DESC
) {
346 spin_lock_irqsave(&to_mdev(dev
)->sm_lock
, flags
);
347 memcpy(((struct ib_smp
*) mad
)->data
, dev
->node_desc
, 64);
348 spin_unlock_irqrestore(&to_mdev(dev
)->sm_lock
, flags
);
352 static void forward_trap(struct mlx4_ib_dev
*dev
, u8 port_num
, const struct ib_mad
*mad
)
354 int qpn
= mad
->mad_hdr
.mgmt_class
!= IB_MGMT_CLASS_SUBN_LID_ROUTED
;
355 struct ib_mad_send_buf
*send_buf
;
356 struct ib_mad_agent
*agent
= dev
->send_agent
[port_num
- 1][qpn
];
361 send_buf
= ib_create_send_mad(agent
, qpn
, 0, 0, IB_MGMT_MAD_HDR
,
362 IB_MGMT_MAD_DATA
, GFP_ATOMIC
,
363 IB_MGMT_BASE_VERSION
);
364 if (IS_ERR(send_buf
))
367 * We rely here on the fact that MLX QPs don't use the
368 * address handle after the send is posted (this is
369 * wrong following the IB spec strictly, but we know
370 * it's OK for our devices).
372 spin_lock_irqsave(&dev
->sm_lock
, flags
);
373 memcpy(send_buf
->mad
, mad
, sizeof *mad
);
374 if ((send_buf
->ah
= dev
->sm_ah
[port_num
- 1]))
375 ret
= ib_post_send_mad(send_buf
, NULL
);
378 spin_unlock_irqrestore(&dev
->sm_lock
, flags
);
381 ib_free_send_mad(send_buf
);
385 static int mlx4_ib_demux_sa_handler(struct ib_device
*ibdev
, int port
, int slave
,
386 struct ib_sa_mad
*sa_mad
)
390 /* dispatch to different sa handlers */
391 switch (be16_to_cpu(sa_mad
->mad_hdr
.attr_id
)) {
392 case IB_SA_ATTR_MC_MEMBER_REC
:
393 ret
= mlx4_ib_mcg_demux_handler(ibdev
, port
, slave
, sa_mad
);
401 int mlx4_ib_find_real_gid(struct ib_device
*ibdev
, u8 port
, __be64 guid
)
403 struct mlx4_ib_dev
*dev
= to_mdev(ibdev
);
406 for (i
= 0; i
< dev
->dev
->caps
.sqp_demux
; i
++) {
407 if (dev
->sriov
.demux
[port
- 1].guid_cache
[i
] == guid
)
414 static int find_slave_port_pkey_ix(struct mlx4_ib_dev
*dev
, int slave
,
415 u8 port
, u16 pkey
, u16
*ix
)
418 u8 unassigned_pkey_ix
, pkey_ix
, partial_ix
= 0xFF;
421 if (slave
== mlx4_master_func_num(dev
->dev
))
422 return ib_find_cached_pkey(&dev
->ib_dev
, port
, pkey
, ix
);
424 unassigned_pkey_ix
= dev
->dev
->phys_caps
.pkey_phys_table_len
[port
] - 1;
426 for (i
= 0; i
< dev
->dev
->caps
.pkey_table_len
[port
]; i
++) {
427 if (dev
->pkeys
.virt2phys_pkey
[slave
][port
- 1][i
] == unassigned_pkey_ix
)
430 pkey_ix
= dev
->pkeys
.virt2phys_pkey
[slave
][port
- 1][i
];
432 ret
= ib_get_cached_pkey(&dev
->ib_dev
, port
, pkey_ix
, &slot_pkey
);
435 if ((slot_pkey
& 0x7FFF) == (pkey
& 0x7FFF)) {
436 if (slot_pkey
& 0x8000) {
440 /* take first partial pkey index found */
441 if (partial_ix
== 0xFF)
442 partial_ix
= pkey_ix
;
447 if (partial_ix
< 0xFF) {
448 *ix
= (u16
) partial_ix
;
455 int mlx4_ib_send_to_slave(struct mlx4_ib_dev
*dev
, int slave
, u8 port
,
456 enum ib_qp_type dest_qpt
, struct ib_wc
*wc
,
457 struct ib_grh
*grh
, struct ib_mad
*mad
)
460 struct ib_send_wr wr
, *bad_wr
;
461 struct mlx4_ib_demux_pv_ctx
*tun_ctx
;
462 struct mlx4_ib_demux_pv_qp
*tun_qp
;
463 struct mlx4_rcv_tunnel_mad
*tun_mad
;
464 struct ib_ah_attr attr
;
466 struct ib_qp
*src_qp
= NULL
;
467 unsigned tun_tx_ix
= 0;
472 u8 is_eth
= dev
->dev
->caps
.port_type
[port
] == MLX4_PORT_TYPE_ETH
;
474 if (dest_qpt
> IB_QPT_GSI
)
477 tun_ctx
= dev
->sriov
.demux
[port
-1].tun
[slave
];
479 /* check if proxy qp created */
480 if (!tun_ctx
|| tun_ctx
->state
!= DEMUX_PV_STATE_ACTIVE
)
484 tun_qp
= &tun_ctx
->qp
[0];
486 tun_qp
= &tun_ctx
->qp
[1];
488 /* compute P_Key index to put in tunnel header for slave */
491 ret
= ib_get_cached_pkey(&dev
->ib_dev
, port
, wc
->pkey_index
, &cached_pkey
);
495 ret
= find_slave_port_pkey_ix(dev
, slave
, port
, cached_pkey
, &pkey_ix
);
498 tun_pkey_ix
= pkey_ix
;
500 tun_pkey_ix
= dev
->pkeys
.virt2phys_pkey
[slave
][port
- 1][0];
502 dqpn
= dev
->dev
->phys_caps
.base_proxy_sqpn
+ 8 * slave
+ port
+ (dest_qpt
* 2) - 1;
504 /* get tunnel tx data buf for slave */
507 /* create ah. Just need an empty one with the port num for the post send.
508 * The driver will set the force loopback bit in post_send */
509 memset(&attr
, 0, sizeof attr
);
510 attr
.port_num
= port
;
512 memcpy(&attr
.grh
.dgid
.raw
[0], &grh
->dgid
.raw
[0], 16);
513 attr
.ah_flags
= IB_AH_GRH
;
515 ah
= ib_create_ah(tun_ctx
->pd
, &attr
);
519 /* allocate tunnel tx buf after pass failure returns */
520 spin_lock(&tun_qp
->tx_lock
);
521 if (tun_qp
->tx_ix_head
- tun_qp
->tx_ix_tail
>=
522 (MLX4_NUM_TUNNEL_BUFS
- 1))
525 tun_tx_ix
= (++tun_qp
->tx_ix_head
) & (MLX4_NUM_TUNNEL_BUFS
- 1);
526 spin_unlock(&tun_qp
->tx_lock
);
530 tun_mad
= (struct mlx4_rcv_tunnel_mad
*) (tun_qp
->tx_ring
[tun_tx_ix
].buf
.addr
);
531 if (tun_qp
->tx_ring
[tun_tx_ix
].ah
)
532 ib_destroy_ah(tun_qp
->tx_ring
[tun_tx_ix
].ah
);
533 tun_qp
->tx_ring
[tun_tx_ix
].ah
= ah
;
534 ib_dma_sync_single_for_cpu(&dev
->ib_dev
,
535 tun_qp
->tx_ring
[tun_tx_ix
].buf
.map
,
536 sizeof (struct mlx4_rcv_tunnel_mad
),
539 /* copy over to tunnel buffer */
541 memcpy(&tun_mad
->grh
, grh
, sizeof *grh
);
542 memcpy(&tun_mad
->mad
, mad
, sizeof *mad
);
544 /* adjust tunnel data */
545 tun_mad
->hdr
.pkey_index
= cpu_to_be16(tun_pkey_ix
);
546 tun_mad
->hdr
.flags_src_qp
= cpu_to_be32(wc
->src_qp
& 0xFFFFFF);
547 tun_mad
->hdr
.g_ml_path
= (grh
&& (wc
->wc_flags
& IB_WC_GRH
)) ? 0x80 : 0;
551 if (mlx4_get_slave_default_vlan(dev
->dev
, port
, slave
, &vlan
,
554 if (vlan
!= wc
->vlan_id
)
555 /* Packet vlan is not the VST-assigned vlan.
560 /* Remove the vlan tag before forwarding
561 * the packet to the VF.
568 tun_mad
->hdr
.sl_vid
= cpu_to_be16(vlan
);
569 memcpy((char *)&tun_mad
->hdr
.mac_31_0
, &(wc
->smac
[0]), 4);
570 memcpy((char *)&tun_mad
->hdr
.slid_mac_47_32
, &(wc
->smac
[4]), 2);
572 tun_mad
->hdr
.sl_vid
= cpu_to_be16(((u16
)(wc
->sl
)) << 12);
573 tun_mad
->hdr
.slid_mac_47_32
= cpu_to_be16(wc
->slid
);
576 ib_dma_sync_single_for_device(&dev
->ib_dev
,
577 tun_qp
->tx_ring
[tun_tx_ix
].buf
.map
,
578 sizeof (struct mlx4_rcv_tunnel_mad
),
581 list
.addr
= tun_qp
->tx_ring
[tun_tx_ix
].buf
.map
;
582 list
.length
= sizeof (struct mlx4_rcv_tunnel_mad
);
583 list
.lkey
= tun_ctx
->mr
->lkey
;
586 wr
.wr
.ud
.port_num
= port
;
587 wr
.wr
.ud
.remote_qkey
= IB_QP_SET_QKEY
;
588 wr
.wr
.ud
.remote_qpn
= dqpn
;
590 wr
.wr_id
= ((u64
) tun_tx_ix
) | MLX4_TUN_SET_WRID_QPN(dest_qpt
);
593 wr
.opcode
= IB_WR_SEND
;
594 wr
.send_flags
= IB_SEND_SIGNALED
;
596 ret
= ib_post_send(src_qp
, &wr
, &bad_wr
);
603 static int mlx4_ib_demux_mad(struct ib_device
*ibdev
, u8 port
,
604 struct ib_wc
*wc
, struct ib_grh
*grh
,
607 struct mlx4_ib_dev
*dev
= to_mdev(ibdev
);
613 if (rdma_port_get_link_layer(ibdev
, port
) == IB_LINK_LAYER_INFINIBAND
)
619 if (!(wc
->wc_flags
& IB_WC_GRH
)) {
620 mlx4_ib_warn(ibdev
, "RoCE grh not present.\n");
623 if (mad
->mad_hdr
.mgmt_class
!= IB_MGMT_CLASS_CM
) {
624 mlx4_ib_warn(ibdev
, "RoCE mgmt class is not CM\n");
627 if (mlx4_get_slave_from_roce_gid(dev
->dev
, port
, grh
->dgid
.raw
, &slave
)) {
628 mlx4_ib_warn(ibdev
, "failed matching grh\n");
631 if (slave
>= dev
->dev
->caps
.sqp_demux
) {
632 mlx4_ib_warn(ibdev
, "slave id: %d is bigger than allowed:%d\n",
633 slave
, dev
->dev
->caps
.sqp_demux
);
637 if (mlx4_ib_demux_cm_handler(ibdev
, port
, NULL
, mad
))
640 err
= mlx4_ib_send_to_slave(dev
, slave
, port
, wc
->qp
->qp_type
, wc
, grh
, mad
);
642 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
647 /* Initially assume that this mad is for us */
648 slave
= mlx4_master_func_num(dev
->dev
);
650 /* See if the slave id is encoded in a response mad */
651 if (mad
->mad_hdr
.method
& 0x80) {
652 slave_id
= (u8
*) &mad
->mad_hdr
.tid
;
654 if (slave
!= 255) /*255 indicates the dom0*/
655 *slave_id
= 0; /* remap tid */
658 /* If a grh is present, we demux according to it */
659 if (wc
->wc_flags
& IB_WC_GRH
) {
660 slave
= mlx4_ib_find_real_gid(ibdev
, port
, grh
->dgid
.global
.interface_id
);
662 mlx4_ib_warn(ibdev
, "failed matching grh\n");
666 /* Class-specific handling */
667 switch (mad
->mad_hdr
.mgmt_class
) {
668 case IB_MGMT_CLASS_SUBN_LID_ROUTED
:
669 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE
:
670 /* 255 indicates the dom0 */
671 if (slave
!= 255 && slave
!= mlx4_master_func_num(dev
->dev
)) {
672 if (!mlx4_vf_smi_enabled(dev
->dev
, slave
, port
))
674 /* for a VF. drop unsolicited MADs */
675 if (!(mad
->mad_hdr
.method
& IB_MGMT_METHOD_RESP
)) {
676 mlx4_ib_warn(ibdev
, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
677 slave
, mad
->mad_hdr
.mgmt_class
,
678 mad
->mad_hdr
.method
);
683 case IB_MGMT_CLASS_SUBN_ADM
:
684 if (mlx4_ib_demux_sa_handler(ibdev
, port
, slave
,
685 (struct ib_sa_mad
*) mad
))
688 case IB_MGMT_CLASS_CM
:
689 if (mlx4_ib_demux_cm_handler(ibdev
, port
, &slave
, mad
))
692 case IB_MGMT_CLASS_DEVICE_MGMT
:
693 if (mad
->mad_hdr
.method
!= IB_MGMT_METHOD_GET_RESP
)
697 /* Drop unsupported classes for slaves in tunnel mode */
698 if (slave
!= mlx4_master_func_num(dev
->dev
)) {
699 pr_debug("dropping unsupported ingress mad from class:%d "
700 "for slave:%d\n", mad
->mad_hdr
.mgmt_class
, slave
);
704 /*make sure that no slave==255 was not handled yet.*/
705 if (slave
>= dev
->dev
->caps
.sqp_demux
) {
706 mlx4_ib_warn(ibdev
, "slave id: %d is bigger than allowed:%d\n",
707 slave
, dev
->dev
->caps
.sqp_demux
);
711 err
= mlx4_ib_send_to_slave(dev
, slave
, port
, wc
->qp
->qp_type
, wc
, grh
, mad
);
713 pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
718 static int ib_process_mad(struct ib_device
*ibdev
, int mad_flags
, u8 port_num
,
719 const struct ib_wc
*in_wc
, const struct ib_grh
*in_grh
,
720 const struct ib_mad
*in_mad
, struct ib_mad
*out_mad
)
722 u16 slid
, prev_lid
= 0;
724 struct ib_port_attr pattr
;
726 if (in_wc
&& in_wc
->qp
->qp_num
) {
727 pr_debug("received MAD: slid:%d sqpn:%d "
728 "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
729 in_wc
->slid
, in_wc
->src_qp
,
730 in_wc
->dlid_path_bits
,
733 in_mad
->mad_hdr
.mgmt_class
, in_mad
->mad_hdr
.method
,
734 be16_to_cpu(in_mad
->mad_hdr
.attr_id
));
735 if (in_wc
->wc_flags
& IB_WC_GRH
) {
736 pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
737 be64_to_cpu(in_grh
->sgid
.global
.subnet_prefix
),
738 be64_to_cpu(in_grh
->sgid
.global
.interface_id
));
739 pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
740 be64_to_cpu(in_grh
->dgid
.global
.subnet_prefix
),
741 be64_to_cpu(in_grh
->dgid
.global
.interface_id
));
745 slid
= in_wc
? in_wc
->slid
: be16_to_cpu(IB_LID_PERMISSIVE
);
747 if (in_mad
->mad_hdr
.method
== IB_MGMT_METHOD_TRAP
&& slid
== 0) {
748 forward_trap(to_mdev(ibdev
), port_num
, in_mad
);
749 return IB_MAD_RESULT_SUCCESS
| IB_MAD_RESULT_CONSUMED
;
752 if (in_mad
->mad_hdr
.mgmt_class
== IB_MGMT_CLASS_SUBN_LID_ROUTED
||
753 in_mad
->mad_hdr
.mgmt_class
== IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE
) {
754 if (in_mad
->mad_hdr
.method
!= IB_MGMT_METHOD_GET
&&
755 in_mad
->mad_hdr
.method
!= IB_MGMT_METHOD_SET
&&
756 in_mad
->mad_hdr
.method
!= IB_MGMT_METHOD_TRAP_REPRESS
)
757 return IB_MAD_RESULT_SUCCESS
;
760 * Don't process SMInfo queries -- the SMA can't handle them.
762 if (in_mad
->mad_hdr
.attr_id
== IB_SMP_ATTR_SM_INFO
)
763 return IB_MAD_RESULT_SUCCESS
;
764 } else if (in_mad
->mad_hdr
.mgmt_class
== IB_MGMT_CLASS_PERF_MGMT
||
765 in_mad
->mad_hdr
.mgmt_class
== MLX4_IB_VENDOR_CLASS1
||
766 in_mad
->mad_hdr
.mgmt_class
== MLX4_IB_VENDOR_CLASS2
||
767 in_mad
->mad_hdr
.mgmt_class
== IB_MGMT_CLASS_CONG_MGMT
) {
768 if (in_mad
->mad_hdr
.method
!= IB_MGMT_METHOD_GET
&&
769 in_mad
->mad_hdr
.method
!= IB_MGMT_METHOD_SET
)
770 return IB_MAD_RESULT_SUCCESS
;
772 return IB_MAD_RESULT_SUCCESS
;
774 if ((in_mad
->mad_hdr
.mgmt_class
== IB_MGMT_CLASS_SUBN_LID_ROUTED
||
775 in_mad
->mad_hdr
.mgmt_class
== IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE
) &&
776 in_mad
->mad_hdr
.method
== IB_MGMT_METHOD_SET
&&
777 in_mad
->mad_hdr
.attr_id
== IB_SMP_ATTR_PORT_INFO
&&
778 !ib_query_port(ibdev
, port_num
, &pattr
))
779 prev_lid
= pattr
.lid
;
781 err
= mlx4_MAD_IFC(to_mdev(ibdev
),
782 (mad_flags
& IB_MAD_IGNORE_MKEY
? MLX4_MAD_IFC_IGNORE_MKEY
: 0) |
783 (mad_flags
& IB_MAD_IGNORE_BKEY
? MLX4_MAD_IFC_IGNORE_BKEY
: 0) |
784 MLX4_MAD_IFC_NET_VIEW
,
785 port_num
, in_wc
, in_grh
, in_mad
, out_mad
);
787 return IB_MAD_RESULT_FAILURE
;
789 if (!out_mad
->mad_hdr
.status
) {
790 if (!(to_mdev(ibdev
)->dev
->caps
.flags
& MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV
))
791 smp_snoop(ibdev
, port_num
, in_mad
, prev_lid
);
792 /* slaves get node desc from FW */
793 if (!mlx4_is_slave(to_mdev(ibdev
)->dev
))
794 node_desc_override(ibdev
, out_mad
);
797 /* set return bit in status of directed route responses */
798 if (in_mad
->mad_hdr
.mgmt_class
== IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE
)
799 out_mad
->mad_hdr
.status
|= cpu_to_be16(1 << 15);
801 if (in_mad
->mad_hdr
.method
== IB_MGMT_METHOD_TRAP_REPRESS
)
802 /* no response for trap repress */
803 return IB_MAD_RESULT_SUCCESS
| IB_MAD_RESULT_CONSUMED
;
805 return IB_MAD_RESULT_SUCCESS
| IB_MAD_RESULT_REPLY
;
808 static void edit_counter(struct mlx4_counter
*cnt
,
809 struct ib_pma_portcounters
*pma_cnt
)
811 ASSIGN_32BIT_COUNTER(pma_cnt
->port_xmit_data
,
812 (be64_to_cpu(cnt
->tx_bytes
) >> 2));
813 ASSIGN_32BIT_COUNTER(pma_cnt
->port_rcv_data
,
814 (be64_to_cpu(cnt
->rx_bytes
) >> 2));
815 ASSIGN_32BIT_COUNTER(pma_cnt
->port_xmit_packets
,
816 be64_to_cpu(cnt
->tx_frames
));
817 ASSIGN_32BIT_COUNTER(pma_cnt
->port_rcv_packets
,
818 be64_to_cpu(cnt
->rx_frames
));
821 static int iboe_process_mad(struct ib_device
*ibdev
, int mad_flags
, u8 port_num
,
822 const struct ib_wc
*in_wc
, const struct ib_grh
*in_grh
,
823 const struct ib_mad
*in_mad
, struct ib_mad
*out_mad
)
825 struct mlx4_counter counter_stats
;
826 struct mlx4_ib_dev
*dev
= to_mdev(ibdev
);
829 if (in_mad
->mad_hdr
.mgmt_class
!= IB_MGMT_CLASS_PERF_MGMT
)
832 memset(&counter_stats
, 0, sizeof(counter_stats
));
833 err
= mlx4_get_counter_stats(dev
->dev
,
834 dev
->counters
[port_num
- 1].index
,
837 err
= IB_MAD_RESULT_FAILURE
;
839 memset(out_mad
->data
, 0, sizeof out_mad
->data
);
840 switch (counter_stats
.counter_mode
& 0xf) {
842 edit_counter(&counter_stats
,
843 (void *)(out_mad
->data
+ 40));
844 err
= IB_MAD_RESULT_SUCCESS
| IB_MAD_RESULT_REPLY
;
847 err
= IB_MAD_RESULT_FAILURE
;
854 int mlx4_ib_process_mad(struct ib_device
*ibdev
, int mad_flags
, u8 port_num
,
855 const struct ib_wc
*in_wc
, const struct ib_grh
*in_grh
,
856 const struct ib_mad_hdr
*in
, size_t in_mad_size
,
857 struct ib_mad_hdr
*out
, size_t *out_mad_size
,
858 u16
*out_mad_pkey_index
)
860 struct mlx4_ib_dev
*dev
= to_mdev(ibdev
);
861 const struct ib_mad
*in_mad
= (const struct ib_mad
*)in
;
862 struct ib_mad
*out_mad
= (struct ib_mad
*)out
;
863 enum rdma_link_layer link
= rdma_port_get_link_layer(ibdev
, port_num
);
865 if (WARN_ON_ONCE(in_mad_size
!= sizeof(*in_mad
) ||
866 *out_mad_size
!= sizeof(*out_mad
)))
867 return IB_MAD_RESULT_FAILURE
;
869 /* iboe_process_mad() which uses the HCA flow-counters to implement IB PMA
870 * queries, should be called only by VFs and for that specific purpose
872 if (link
== IB_LINK_LAYER_INFINIBAND
) {
873 if (mlx4_is_slave(dev
->dev
) &&
874 in_mad
->mad_hdr
.mgmt_class
== IB_MGMT_CLASS_PERF_MGMT
&&
875 in_mad
->mad_hdr
.attr_id
== IB_PMA_PORT_COUNTERS
)
876 return iboe_process_mad(ibdev
, mad_flags
, port_num
, in_wc
,
877 in_grh
, in_mad
, out_mad
);
879 return ib_process_mad(ibdev
, mad_flags
, port_num
, in_wc
,
880 in_grh
, in_mad
, out_mad
);
883 if (link
== IB_LINK_LAYER_ETHERNET
)
884 return iboe_process_mad(ibdev
, mad_flags
, port_num
, in_wc
,
885 in_grh
, in_mad
, out_mad
);
890 static void send_handler(struct ib_mad_agent
*agent
,
891 struct ib_mad_send_wc
*mad_send_wc
)
893 if (mad_send_wc
->send_buf
->context
[0])
894 ib_destroy_ah(mad_send_wc
->send_buf
->context
[0]);
895 ib_free_send_mad(mad_send_wc
->send_buf
);
898 int mlx4_ib_mad_init(struct mlx4_ib_dev
*dev
)
900 struct ib_mad_agent
*agent
;
903 enum rdma_link_layer ll
;
905 for (p
= 0; p
< dev
->num_ports
; ++p
) {
906 ll
= rdma_port_get_link_layer(&dev
->ib_dev
, p
+ 1);
907 for (q
= 0; q
<= 1; ++q
) {
908 if (ll
== IB_LINK_LAYER_INFINIBAND
) {
909 agent
= ib_register_mad_agent(&dev
->ib_dev
, p
+ 1,
910 q
? IB_QPT_GSI
: IB_QPT_SMI
,
911 NULL
, 0, send_handler
,
914 ret
= PTR_ERR(agent
);
917 dev
->send_agent
[p
][q
] = agent
;
919 dev
->send_agent
[p
][q
] = NULL
;
926 for (p
= 0; p
< dev
->num_ports
; ++p
)
927 for (q
= 0; q
<= 1; ++q
)
928 if (dev
->send_agent
[p
][q
])
929 ib_unregister_mad_agent(dev
->send_agent
[p
][q
]);
934 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev
*dev
)
936 struct ib_mad_agent
*agent
;
939 for (p
= 0; p
< dev
->num_ports
; ++p
) {
940 for (q
= 0; q
<= 1; ++q
) {
941 agent
= dev
->send_agent
[p
][q
];
943 dev
->send_agent
[p
][q
] = NULL
;
944 ib_unregister_mad_agent(agent
);
949 ib_destroy_ah(dev
->sm_ah
[p
]);
953 static void handle_lid_change_event(struct mlx4_ib_dev
*dev
, u8 port_num
)
955 mlx4_ib_dispatch_event(dev
, port_num
, IB_EVENT_LID_CHANGE
);
957 if (mlx4_is_master(dev
->dev
) && !dev
->sriov
.is_going_down
)
958 mlx4_gen_slaves_port_mgt_ev(dev
->dev
, port_num
,
959 MLX4_EQ_PORT_INFO_LID_CHANGE_MASK
);
962 static void handle_client_rereg_event(struct mlx4_ib_dev
*dev
, u8 port_num
)
964 /* re-configure the alias-guid and mcg's */
965 if (mlx4_is_master(dev
->dev
)) {
966 mlx4_ib_invalidate_all_guid_record(dev
, port_num
);
968 if (!dev
->sriov
.is_going_down
) {
969 mlx4_ib_mcg_port_cleanup(&dev
->sriov
.demux
[port_num
- 1], 0);
970 mlx4_gen_slaves_port_mgt_ev(dev
->dev
, port_num
,
971 MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK
);
974 mlx4_ib_dispatch_event(dev
, port_num
, IB_EVENT_CLIENT_REREGISTER
);
977 static void propagate_pkey_ev(struct mlx4_ib_dev
*dev
, int port_num
,
978 struct mlx4_eqe
*eqe
)
980 __propagate_pkey_ev(dev
, port_num
, GET_BLK_PTR_FROM_EQE(eqe
),
981 GET_MASK_FROM_EQE(eqe
));
984 static void handle_slaves_guid_change(struct mlx4_ib_dev
*dev
, u8 port_num
,
985 u32 guid_tbl_blk_num
, u32 change_bitmap
)
987 struct ib_smp
*in_mad
= NULL
;
988 struct ib_smp
*out_mad
= NULL
;
991 if (!mlx4_is_mfunc(dev
->dev
) || !mlx4_is_master(dev
->dev
))
994 in_mad
= kmalloc(sizeof *in_mad
, GFP_KERNEL
);
995 out_mad
= kmalloc(sizeof *out_mad
, GFP_KERNEL
);
996 if (!in_mad
|| !out_mad
) {
997 mlx4_ib_warn(&dev
->ib_dev
, "failed to allocate memory for guid info mads\n");
1001 guid_tbl_blk_num
*= 4;
1003 for (i
= 0; i
< 4; i
++) {
1004 if (change_bitmap
&& (!((change_bitmap
>> (8 * i
)) & 0xff)))
1006 memset(in_mad
, 0, sizeof *in_mad
);
1007 memset(out_mad
, 0, sizeof *out_mad
);
1009 in_mad
->base_version
= 1;
1010 in_mad
->mgmt_class
= IB_MGMT_CLASS_SUBN_LID_ROUTED
;
1011 in_mad
->class_version
= 1;
1012 in_mad
->method
= IB_MGMT_METHOD_GET
;
1013 in_mad
->attr_id
= IB_SMP_ATTR_GUID_INFO
;
1014 in_mad
->attr_mod
= cpu_to_be32(guid_tbl_blk_num
+ i
);
1016 if (mlx4_MAD_IFC(dev
,
1017 MLX4_MAD_IFC_IGNORE_KEYS
| MLX4_MAD_IFC_NET_VIEW
,
1018 port_num
, NULL
, NULL
, in_mad
, out_mad
)) {
1019 mlx4_ib_warn(&dev
->ib_dev
, "Failed in get GUID INFO MAD_IFC\n");
1023 mlx4_ib_update_cache_on_guid_change(dev
, guid_tbl_blk_num
+ i
,
1025 (u8
*)(&((struct ib_smp
*)out_mad
)->data
));
1026 mlx4_ib_notify_slaves_on_guid_change(dev
, guid_tbl_blk_num
+ i
,
1028 (u8
*)(&((struct ib_smp
*)out_mad
)->data
));
1037 void handle_port_mgmt_change_event(struct work_struct
*work
)
1039 struct ib_event_work
*ew
= container_of(work
, struct ib_event_work
, work
);
1040 struct mlx4_ib_dev
*dev
= ew
->ib_dev
;
1041 struct mlx4_eqe
*eqe
= &(ew
->ib_eqe
);
1042 u8 port
= eqe
->event
.port_mgmt_change
.port
;
1047 switch (eqe
->subtype
) {
1048 case MLX4_DEV_PMC_SUBTYPE_PORT_INFO
:
1049 changed_attr
= be32_to_cpu(eqe
->event
.port_mgmt_change
.params
.port_info
.changed_attr
);
1051 /* Update the SM ah - This should be done before handling
1052 the other changed attributes so that MADs can be sent to the SM */
1053 if (changed_attr
& MSTR_SM_CHANGE_MASK
) {
1054 u16 lid
= be16_to_cpu(eqe
->event
.port_mgmt_change
.params
.port_info
.mstr_sm_lid
);
1055 u8 sl
= eqe
->event
.port_mgmt_change
.params
.port_info
.mstr_sm_sl
& 0xf;
1056 update_sm_ah(dev
, port
, lid
, sl
);
1059 /* Check if it is a lid change event */
1060 if (changed_attr
& MLX4_EQ_PORT_INFO_LID_CHANGE_MASK
)
1061 handle_lid_change_event(dev
, port
);
1063 /* Generate GUID changed event */
1064 if (changed_attr
& MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK
) {
1065 mlx4_ib_dispatch_event(dev
, port
, IB_EVENT_GID_CHANGE
);
1066 /*if master, notify all slaves*/
1067 if (mlx4_is_master(dev
->dev
))
1068 mlx4_gen_slaves_port_mgt_ev(dev
->dev
, port
,
1069 MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK
);
1072 if (changed_attr
& MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK
)
1073 handle_client_rereg_event(dev
, port
);
1076 case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE
:
1077 mlx4_ib_dispatch_event(dev
, port
, IB_EVENT_PKEY_CHANGE
);
1078 if (mlx4_is_master(dev
->dev
) && !dev
->sriov
.is_going_down
)
1079 propagate_pkey_ev(dev
, port
, eqe
);
1081 case MLX4_DEV_PMC_SUBTYPE_GUID_INFO
:
1082 /* paravirtualized master's guid is guid 0 -- does not change */
1083 if (!mlx4_is_master(dev
->dev
))
1084 mlx4_ib_dispatch_event(dev
, port
, IB_EVENT_GID_CHANGE
);
1085 /*if master, notify relevant slaves*/
1086 else if (!dev
->sriov
.is_going_down
) {
1087 tbl_block
= GET_BLK_PTR_FROM_EQE(eqe
);
1088 change_bitmap
= GET_MASK_FROM_EQE(eqe
);
1089 handle_slaves_guid_change(dev
, port
, tbl_block
, change_bitmap
);
1093 pr_warn("Unsupported subtype 0x%x for "
1094 "Port Management Change event\n", eqe
->subtype
);
1100 void mlx4_ib_dispatch_event(struct mlx4_ib_dev
*dev
, u8 port_num
,
1101 enum ib_event_type type
)
1103 struct ib_event event
;
1105 event
.device
= &dev
->ib_dev
;
1106 event
.element
.port_num
= port_num
;
1109 ib_dispatch_event(&event
);
1112 static void mlx4_ib_tunnel_comp_handler(struct ib_cq
*cq
, void *arg
)
1114 unsigned long flags
;
1115 struct mlx4_ib_demux_pv_ctx
*ctx
= cq
->cq_context
;
1116 struct mlx4_ib_dev
*dev
= to_mdev(ctx
->ib_dev
);
1117 spin_lock_irqsave(&dev
->sriov
.going_down_lock
, flags
);
1118 if (!dev
->sriov
.is_going_down
&& ctx
->state
== DEMUX_PV_STATE_ACTIVE
)
1119 queue_work(ctx
->wq
, &ctx
->work
);
1120 spin_unlock_irqrestore(&dev
->sriov
.going_down_lock
, flags
);
1123 static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx
*ctx
,
1124 struct mlx4_ib_demux_pv_qp
*tun_qp
,
1127 struct ib_sge sg_list
;
1128 struct ib_recv_wr recv_wr
, *bad_recv_wr
;
1131 size
= (tun_qp
->qp
->qp_type
== IB_QPT_UD
) ?
1132 sizeof (struct mlx4_tunnel_mad
) : sizeof (struct mlx4_mad_rcv_buf
);
1134 sg_list
.addr
= tun_qp
->ring
[index
].map
;
1135 sg_list
.length
= size
;
1136 sg_list
.lkey
= ctx
->mr
->lkey
;
1138 recv_wr
.next
= NULL
;
1139 recv_wr
.sg_list
= &sg_list
;
1140 recv_wr
.num_sge
= 1;
1141 recv_wr
.wr_id
= (u64
) index
| MLX4_TUN_WRID_RECV
|
1142 MLX4_TUN_SET_WRID_QPN(tun_qp
->proxy_qpt
);
1143 ib_dma_sync_single_for_device(ctx
->ib_dev
, tun_qp
->ring
[index
].map
,
1144 size
, DMA_FROM_DEVICE
);
1145 return ib_post_recv(tun_qp
->qp
, &recv_wr
, &bad_recv_wr
);
1148 static int mlx4_ib_multiplex_sa_handler(struct ib_device
*ibdev
, int port
,
1149 int slave
, struct ib_sa_mad
*sa_mad
)
1153 /* dispatch to different sa handlers */
1154 switch (be16_to_cpu(sa_mad
->mad_hdr
.attr_id
)) {
1155 case IB_SA_ATTR_MC_MEMBER_REC
:
1156 ret
= mlx4_ib_mcg_multiplex_handler(ibdev
, port
, slave
, sa_mad
);
1164 static int is_proxy_qp0(struct mlx4_ib_dev
*dev
, int qpn
, int slave
)
1166 int proxy_start
= dev
->dev
->phys_caps
.base_proxy_sqpn
+ 8 * slave
;
1168 return (qpn
>= proxy_start
&& qpn
<= proxy_start
+ 1);
1172 int mlx4_ib_send_to_wire(struct mlx4_ib_dev
*dev
, int slave
, u8 port
,
1173 enum ib_qp_type dest_qpt
, u16 pkey_index
,
1174 u32 remote_qpn
, u32 qkey
, struct ib_ah_attr
*attr
,
1175 u8
*s_mac
, struct ib_mad
*mad
)
1178 struct ib_send_wr wr
, *bad_wr
;
1179 struct mlx4_ib_demux_pv_ctx
*sqp_ctx
;
1180 struct mlx4_ib_demux_pv_qp
*sqp
;
1181 struct mlx4_mad_snd_buf
*sqp_mad
;
1183 struct ib_qp
*send_qp
= NULL
;
1184 unsigned wire_tx_ix
= 0;
1191 sqp_ctx
= dev
->sriov
.sqps
[port
-1];
1193 /* check if proxy qp created */
1194 if (!sqp_ctx
|| sqp_ctx
->state
!= DEMUX_PV_STATE_ACTIVE
)
1197 if (dest_qpt
== IB_QPT_SMI
) {
1199 sqp
= &sqp_ctx
->qp
[0];
1200 wire_pkey_ix
= dev
->pkeys
.virt2phys_pkey
[slave
][port
- 1][0];
1203 sqp
= &sqp_ctx
->qp
[1];
1204 wire_pkey_ix
= dev
->pkeys
.virt2phys_pkey
[slave
][port
- 1][pkey_index
];
1210 sgid_index
= attr
->grh
.sgid_index
;
1211 attr
->grh
.sgid_index
= 0;
1212 ah
= ib_create_ah(sqp_ctx
->pd
, attr
);
1215 attr
->grh
.sgid_index
= sgid_index
;
1216 to_mah(ah
)->av
.ib
.gid_index
= sgid_index
;
1217 /* get rid of force-loopback bit */
1218 to_mah(ah
)->av
.ib
.port_pd
&= cpu_to_be32(0x7FFFFFFF);
1219 spin_lock(&sqp
->tx_lock
);
1220 if (sqp
->tx_ix_head
- sqp
->tx_ix_tail
>=
1221 (MLX4_NUM_TUNNEL_BUFS
- 1))
1224 wire_tx_ix
= (++sqp
->tx_ix_head
) & (MLX4_NUM_TUNNEL_BUFS
- 1);
1225 spin_unlock(&sqp
->tx_lock
);
1229 sqp_mad
= (struct mlx4_mad_snd_buf
*) (sqp
->tx_ring
[wire_tx_ix
].buf
.addr
);
1230 if (sqp
->tx_ring
[wire_tx_ix
].ah
)
1231 ib_destroy_ah(sqp
->tx_ring
[wire_tx_ix
].ah
);
1232 sqp
->tx_ring
[wire_tx_ix
].ah
= ah
;
1233 ib_dma_sync_single_for_cpu(&dev
->ib_dev
,
1234 sqp
->tx_ring
[wire_tx_ix
].buf
.map
,
1235 sizeof (struct mlx4_mad_snd_buf
),
1238 memcpy(&sqp_mad
->payload
, mad
, sizeof *mad
);
1240 ib_dma_sync_single_for_device(&dev
->ib_dev
,
1241 sqp
->tx_ring
[wire_tx_ix
].buf
.map
,
1242 sizeof (struct mlx4_mad_snd_buf
),
1245 list
.addr
= sqp
->tx_ring
[wire_tx_ix
].buf
.map
;
1246 list
.length
= sizeof (struct mlx4_mad_snd_buf
);
1247 list
.lkey
= sqp_ctx
->mr
->lkey
;
1250 wr
.wr
.ud
.port_num
= port
;
1251 wr
.wr
.ud
.pkey_index
= wire_pkey_ix
;
1252 wr
.wr
.ud
.remote_qkey
= qkey
;
1253 wr
.wr
.ud
.remote_qpn
= remote_qpn
;
1255 wr
.wr_id
= ((u64
) wire_tx_ix
) | MLX4_TUN_SET_WRID_QPN(src_qpnum
);
1258 wr
.opcode
= IB_WR_SEND
;
1259 wr
.send_flags
= IB_SEND_SIGNALED
;
1261 memcpy(to_mah(ah
)->av
.eth
.s_mac
, s_mac
, 6);
1264 ret
= ib_post_send(send_qp
, &wr
, &bad_wr
);
1271 static int get_slave_base_gid_ix(struct mlx4_ib_dev
*dev
, int slave
, int port
)
1273 if (rdma_port_get_link_layer(&dev
->ib_dev
, port
) == IB_LINK_LAYER_INFINIBAND
)
1275 return mlx4_get_base_gid_ix(dev
->dev
, slave
, port
);
1278 static void fill_in_real_sgid_index(struct mlx4_ib_dev
*dev
, int slave
, int port
,
1279 struct ib_ah_attr
*ah_attr
)
1281 if (rdma_port_get_link_layer(&dev
->ib_dev
, port
) == IB_LINK_LAYER_INFINIBAND
)
1282 ah_attr
->grh
.sgid_index
= slave
;
1284 ah_attr
->grh
.sgid_index
+= get_slave_base_gid_ix(dev
, slave
, port
);
1287 static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx
*ctx
, struct ib_wc
*wc
)
1289 struct mlx4_ib_dev
*dev
= to_mdev(ctx
->ib_dev
);
1290 struct mlx4_ib_demux_pv_qp
*tun_qp
= &ctx
->qp
[MLX4_TUN_WRID_QPN(wc
->wr_id
)];
1291 int wr_ix
= wc
->wr_id
& (MLX4_NUM_TUNNEL_BUFS
- 1);
1292 struct mlx4_tunnel_mad
*tunnel
= tun_qp
->ring
[wr_ix
].addr
;
1293 struct mlx4_ib_ah ah
;
1294 struct ib_ah_attr ah_attr
;
1299 /* Get slave that sent this packet */
1300 if (wc
->src_qp
< dev
->dev
->phys_caps
.base_proxy_sqpn
||
1301 wc
->src_qp
>= dev
->dev
->phys_caps
.base_proxy_sqpn
+ 8 * MLX4_MFUNC_MAX
||
1302 (wc
->src_qp
& 0x1) != ctx
->port
- 1 ||
1304 mlx4_ib_warn(ctx
->ib_dev
, "can't multiplex bad sqp:%d\n", wc
->src_qp
);
1307 slave
= ((wc
->src_qp
& ~0x7) - dev
->dev
->phys_caps
.base_proxy_sqpn
) / 8;
1308 if (slave
!= ctx
->slave
) {
1309 mlx4_ib_warn(ctx
->ib_dev
, "can't multiplex bad sqp:%d: "
1310 "belongs to another slave\n", wc
->src_qp
);
1314 /* Map transaction ID */
1315 ib_dma_sync_single_for_cpu(ctx
->ib_dev
, tun_qp
->ring
[wr_ix
].map
,
1316 sizeof (struct mlx4_tunnel_mad
),
1318 switch (tunnel
->mad
.mad_hdr
.method
) {
1319 case IB_MGMT_METHOD_SET
:
1320 case IB_MGMT_METHOD_GET
:
1321 case IB_MGMT_METHOD_REPORT
:
1322 case IB_SA_METHOD_GET_TABLE
:
1323 case IB_SA_METHOD_DELETE
:
1324 case IB_SA_METHOD_GET_MULTI
:
1325 case IB_SA_METHOD_GET_TRACE_TBL
:
1326 slave_id
= (u8
*) &tunnel
->mad
.mad_hdr
.tid
;
1328 mlx4_ib_warn(ctx
->ib_dev
, "egress mad has non-null tid msb:%d "
1329 "class:%d slave:%d\n", *slave_id
,
1330 tunnel
->mad
.mad_hdr
.mgmt_class
, slave
);
1338 /* Class-specific handling */
1339 switch (tunnel
->mad
.mad_hdr
.mgmt_class
) {
1340 case IB_MGMT_CLASS_SUBN_LID_ROUTED
:
1341 case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE
:
1342 if (slave
!= mlx4_master_func_num(dev
->dev
) &&
1343 !mlx4_vf_smi_enabled(dev
->dev
, slave
, ctx
->port
))
1346 case IB_MGMT_CLASS_SUBN_ADM
:
1347 if (mlx4_ib_multiplex_sa_handler(ctx
->ib_dev
, ctx
->port
, slave
,
1348 (struct ib_sa_mad
*) &tunnel
->mad
))
1351 case IB_MGMT_CLASS_CM
:
1352 if (mlx4_ib_multiplex_cm_handler(ctx
->ib_dev
, ctx
->port
, slave
,
1353 (struct ib_mad
*) &tunnel
->mad
))
1356 case IB_MGMT_CLASS_DEVICE_MGMT
:
1357 if (tunnel
->mad
.mad_hdr
.method
!= IB_MGMT_METHOD_GET
&&
1358 tunnel
->mad
.mad_hdr
.method
!= IB_MGMT_METHOD_SET
)
1362 /* Drop unsupported classes for slaves in tunnel mode */
1363 if (slave
!= mlx4_master_func_num(dev
->dev
)) {
1364 mlx4_ib_warn(ctx
->ib_dev
, "dropping unsupported egress mad from class:%d "
1365 "for slave:%d\n", tunnel
->mad
.mad_hdr
.mgmt_class
, slave
);
1370 /* We are using standard ib_core services to send the mad, so generate a
1371 * stadard address handle by decoding the tunnelled mlx4_ah fields */
1372 memcpy(&ah
.av
, &tunnel
->hdr
.av
, sizeof (struct mlx4_av
));
1373 ah
.ibah
.device
= ctx
->ib_dev
;
1375 port
= be32_to_cpu(ah
.av
.ib
.port_pd
) >> 24;
1376 port
= mlx4_slave_convert_port(dev
->dev
, slave
, port
);
1379 ah
.av
.ib
.port_pd
= cpu_to_be32(port
<< 24 | (be32_to_cpu(ah
.av
.ib
.port_pd
) & 0xffffff));
1381 mlx4_ib_query_ah(&ah
.ibah
, &ah_attr
);
1382 if (ah_attr
.ah_flags
& IB_AH_GRH
)
1383 fill_in_real_sgid_index(dev
, slave
, ctx
->port
, &ah_attr
);
1385 memcpy(ah_attr
.dmac
, tunnel
->hdr
.mac
, 6);
1386 ah_attr
.vlan_id
= be16_to_cpu(tunnel
->hdr
.vlan
);
1387 /* if slave have default vlan use it */
1388 mlx4_get_slave_default_vlan(dev
->dev
, ctx
->port
, slave
,
1389 &ah_attr
.vlan_id
, &ah_attr
.sl
);
1391 mlx4_ib_send_to_wire(dev
, slave
, ctx
->port
,
1392 is_proxy_qp0(dev
, wc
->src_qp
, slave
) ?
1393 IB_QPT_SMI
: IB_QPT_GSI
,
1394 be16_to_cpu(tunnel
->hdr
.pkey_index
),
1395 be32_to_cpu(tunnel
->hdr
.remote_qpn
),
1396 be32_to_cpu(tunnel
->hdr
.qkey
),
1397 &ah_attr
, wc
->smac
, &tunnel
->mad
);
1400 static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx
*ctx
,
1401 enum ib_qp_type qp_type
, int is_tun
)
1404 struct mlx4_ib_demux_pv_qp
*tun_qp
;
1405 int rx_buf_size
, tx_buf_size
;
1407 if (qp_type
> IB_QPT_GSI
)
1410 tun_qp
= &ctx
->qp
[qp_type
];
1412 tun_qp
->ring
= kzalloc(sizeof (struct mlx4_ib_buf
) * MLX4_NUM_TUNNEL_BUFS
,
1417 tun_qp
->tx_ring
= kcalloc(MLX4_NUM_TUNNEL_BUFS
,
1418 sizeof (struct mlx4_ib_tun_tx_buf
),
1420 if (!tun_qp
->tx_ring
) {
1421 kfree(tun_qp
->ring
);
1422 tun_qp
->ring
= NULL
;
1427 rx_buf_size
= sizeof (struct mlx4_tunnel_mad
);
1428 tx_buf_size
= sizeof (struct mlx4_rcv_tunnel_mad
);
1430 rx_buf_size
= sizeof (struct mlx4_mad_rcv_buf
);
1431 tx_buf_size
= sizeof (struct mlx4_mad_snd_buf
);
1434 for (i
= 0; i
< MLX4_NUM_TUNNEL_BUFS
; i
++) {
1435 tun_qp
->ring
[i
].addr
= kmalloc(rx_buf_size
, GFP_KERNEL
);
1436 if (!tun_qp
->ring
[i
].addr
)
1438 tun_qp
->ring
[i
].map
= ib_dma_map_single(ctx
->ib_dev
,
1439 tun_qp
->ring
[i
].addr
,
1442 if (ib_dma_mapping_error(ctx
->ib_dev
, tun_qp
->ring
[i
].map
)) {
1443 kfree(tun_qp
->ring
[i
].addr
);
1448 for (i
= 0; i
< MLX4_NUM_TUNNEL_BUFS
; i
++) {
1449 tun_qp
->tx_ring
[i
].buf
.addr
=
1450 kmalloc(tx_buf_size
, GFP_KERNEL
);
1451 if (!tun_qp
->tx_ring
[i
].buf
.addr
)
1453 tun_qp
->tx_ring
[i
].buf
.map
=
1454 ib_dma_map_single(ctx
->ib_dev
,
1455 tun_qp
->tx_ring
[i
].buf
.addr
,
1458 if (ib_dma_mapping_error(ctx
->ib_dev
,
1459 tun_qp
->tx_ring
[i
].buf
.map
)) {
1460 kfree(tun_qp
->tx_ring
[i
].buf
.addr
);
1463 tun_qp
->tx_ring
[i
].ah
= NULL
;
1465 spin_lock_init(&tun_qp
->tx_lock
);
1466 tun_qp
->tx_ix_head
= 0;
1467 tun_qp
->tx_ix_tail
= 0;
1468 tun_qp
->proxy_qpt
= qp_type
;
1475 ib_dma_unmap_single(ctx
->ib_dev
, tun_qp
->tx_ring
[i
].buf
.map
,
1476 tx_buf_size
, DMA_TO_DEVICE
);
1477 kfree(tun_qp
->tx_ring
[i
].buf
.addr
);
1479 kfree(tun_qp
->tx_ring
);
1480 tun_qp
->tx_ring
= NULL
;
1481 i
= MLX4_NUM_TUNNEL_BUFS
;
1485 ib_dma_unmap_single(ctx
->ib_dev
, tun_qp
->ring
[i
].map
,
1486 rx_buf_size
, DMA_FROM_DEVICE
);
1487 kfree(tun_qp
->ring
[i
].addr
);
1489 kfree(tun_qp
->ring
);
1490 tun_qp
->ring
= NULL
;
1494 static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx
*ctx
,
1495 enum ib_qp_type qp_type
, int is_tun
)
1498 struct mlx4_ib_demux_pv_qp
*tun_qp
;
1499 int rx_buf_size
, tx_buf_size
;
1501 if (qp_type
> IB_QPT_GSI
)
1504 tun_qp
= &ctx
->qp
[qp_type
];
1506 rx_buf_size
= sizeof (struct mlx4_tunnel_mad
);
1507 tx_buf_size
= sizeof (struct mlx4_rcv_tunnel_mad
);
1509 rx_buf_size
= sizeof (struct mlx4_mad_rcv_buf
);
1510 tx_buf_size
= sizeof (struct mlx4_mad_snd_buf
);
1514 for (i
= 0; i
< MLX4_NUM_TUNNEL_BUFS
; i
++) {
1515 ib_dma_unmap_single(ctx
->ib_dev
, tun_qp
->ring
[i
].map
,
1516 rx_buf_size
, DMA_FROM_DEVICE
);
1517 kfree(tun_qp
->ring
[i
].addr
);
1520 for (i
= 0; i
< MLX4_NUM_TUNNEL_BUFS
; i
++) {
1521 ib_dma_unmap_single(ctx
->ib_dev
, tun_qp
->tx_ring
[i
].buf
.map
,
1522 tx_buf_size
, DMA_TO_DEVICE
);
1523 kfree(tun_qp
->tx_ring
[i
].buf
.addr
);
1524 if (tun_qp
->tx_ring
[i
].ah
)
1525 ib_destroy_ah(tun_qp
->tx_ring
[i
].ah
);
1527 kfree(tun_qp
->tx_ring
);
1528 kfree(tun_qp
->ring
);
1531 static void mlx4_ib_tunnel_comp_worker(struct work_struct
*work
)
1533 struct mlx4_ib_demux_pv_ctx
*ctx
;
1534 struct mlx4_ib_demux_pv_qp
*tun_qp
;
1537 ctx
= container_of(work
, struct mlx4_ib_demux_pv_ctx
, work
);
1538 ib_req_notify_cq(ctx
->cq
, IB_CQ_NEXT_COMP
);
1540 while (ib_poll_cq(ctx
->cq
, 1, &wc
) == 1) {
1541 tun_qp
= &ctx
->qp
[MLX4_TUN_WRID_QPN(wc
.wr_id
)];
1542 if (wc
.status
== IB_WC_SUCCESS
) {
1543 switch (wc
.opcode
) {
1545 mlx4_ib_multiplex_mad(ctx
, &wc
);
1546 ret
= mlx4_ib_post_pv_qp_buf(ctx
, tun_qp
,
1548 (MLX4_NUM_TUNNEL_BUFS
- 1));
1550 pr_err("Failed reposting tunnel "
1551 "buf:%lld\n", wc
.wr_id
);
1554 pr_debug("received tunnel send completion:"
1555 "wrid=0x%llx, status=0x%x\n",
1556 wc
.wr_id
, wc
.status
);
1557 ib_destroy_ah(tun_qp
->tx_ring
[wc
.wr_id
&
1558 (MLX4_NUM_TUNNEL_BUFS
- 1)].ah
);
1559 tun_qp
->tx_ring
[wc
.wr_id
& (MLX4_NUM_TUNNEL_BUFS
- 1)].ah
1561 spin_lock(&tun_qp
->tx_lock
);
1562 tun_qp
->tx_ix_tail
++;
1563 spin_unlock(&tun_qp
->tx_lock
);
1570 pr_debug("mlx4_ib: completion error in tunnel: %d."
1571 " status = %d, wrid = 0x%llx\n",
1572 ctx
->slave
, wc
.status
, wc
.wr_id
);
1573 if (!MLX4_TUN_IS_RECV(wc
.wr_id
)) {
1574 ib_destroy_ah(tun_qp
->tx_ring
[wc
.wr_id
&
1575 (MLX4_NUM_TUNNEL_BUFS
- 1)].ah
);
1576 tun_qp
->tx_ring
[wc
.wr_id
& (MLX4_NUM_TUNNEL_BUFS
- 1)].ah
1578 spin_lock(&tun_qp
->tx_lock
);
1579 tun_qp
->tx_ix_tail
++;
1580 spin_unlock(&tun_qp
->tx_lock
);
1586 static void pv_qp_event_handler(struct ib_event
*event
, void *qp_context
)
1588 struct mlx4_ib_demux_pv_ctx
*sqp
= qp_context
;
1590 /* It's worse than that! He's dead, Jim! */
1591 pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1592 event
->event
, sqp
->port
);
1595 static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx
*ctx
,
1596 enum ib_qp_type qp_type
, int create_tun
)
1599 struct mlx4_ib_demux_pv_qp
*tun_qp
;
1600 struct mlx4_ib_qp_tunnel_init_attr qp_init_attr
;
1601 struct ib_qp_attr attr
;
1602 int qp_attr_mask_INIT
;
1604 if (qp_type
> IB_QPT_GSI
)
1607 tun_qp
= &ctx
->qp
[qp_type
];
1609 memset(&qp_init_attr
, 0, sizeof qp_init_attr
);
1610 qp_init_attr
.init_attr
.send_cq
= ctx
->cq
;
1611 qp_init_attr
.init_attr
.recv_cq
= ctx
->cq
;
1612 qp_init_attr
.init_attr
.sq_sig_type
= IB_SIGNAL_ALL_WR
;
1613 qp_init_attr
.init_attr
.cap
.max_send_wr
= MLX4_NUM_TUNNEL_BUFS
;
1614 qp_init_attr
.init_attr
.cap
.max_recv_wr
= MLX4_NUM_TUNNEL_BUFS
;
1615 qp_init_attr
.init_attr
.cap
.max_send_sge
= 1;
1616 qp_init_attr
.init_attr
.cap
.max_recv_sge
= 1;
1618 qp_init_attr
.init_attr
.qp_type
= IB_QPT_UD
;
1619 qp_init_attr
.init_attr
.create_flags
= MLX4_IB_SRIOV_TUNNEL_QP
;
1620 qp_init_attr
.port
= ctx
->port
;
1621 qp_init_attr
.slave
= ctx
->slave
;
1622 qp_init_attr
.proxy_qp_type
= qp_type
;
1623 qp_attr_mask_INIT
= IB_QP_STATE
| IB_QP_PKEY_INDEX
|
1624 IB_QP_QKEY
| IB_QP_PORT
;
1626 qp_init_attr
.init_attr
.qp_type
= qp_type
;
1627 qp_init_attr
.init_attr
.create_flags
= MLX4_IB_SRIOV_SQP
;
1628 qp_attr_mask_INIT
= IB_QP_STATE
| IB_QP_PKEY_INDEX
| IB_QP_QKEY
;
1630 qp_init_attr
.init_attr
.port_num
= ctx
->port
;
1631 qp_init_attr
.init_attr
.qp_context
= ctx
;
1632 qp_init_attr
.init_attr
.event_handler
= pv_qp_event_handler
;
1633 tun_qp
->qp
= ib_create_qp(ctx
->pd
, &qp_init_attr
.init_attr
);
1634 if (IS_ERR(tun_qp
->qp
)) {
1635 ret
= PTR_ERR(tun_qp
->qp
);
1637 pr_err("Couldn't create %s QP (%d)\n",
1638 create_tun
? "tunnel" : "special", ret
);
1642 memset(&attr
, 0, sizeof attr
);
1643 attr
.qp_state
= IB_QPS_INIT
;
1646 ret
= find_slave_port_pkey_ix(to_mdev(ctx
->ib_dev
), ctx
->slave
,
1647 ctx
->port
, IB_DEFAULT_PKEY_FULL
,
1649 if (ret
|| !create_tun
)
1651 to_mdev(ctx
->ib_dev
)->pkeys
.virt2phys_pkey
[ctx
->slave
][ctx
->port
- 1][0];
1652 attr
.qkey
= IB_QP1_QKEY
;
1653 attr
.port_num
= ctx
->port
;
1654 ret
= ib_modify_qp(tun_qp
->qp
, &attr
, qp_attr_mask_INIT
);
1656 pr_err("Couldn't change %s qp state to INIT (%d)\n",
1657 create_tun
? "tunnel" : "special", ret
);
1660 attr
.qp_state
= IB_QPS_RTR
;
1661 ret
= ib_modify_qp(tun_qp
->qp
, &attr
, IB_QP_STATE
);
1663 pr_err("Couldn't change %s qp state to RTR (%d)\n",
1664 create_tun
? "tunnel" : "special", ret
);
1667 attr
.qp_state
= IB_QPS_RTS
;
1669 ret
= ib_modify_qp(tun_qp
->qp
, &attr
, IB_QP_STATE
| IB_QP_SQ_PSN
);
1671 pr_err("Couldn't change %s qp state to RTS (%d)\n",
1672 create_tun
? "tunnel" : "special", ret
);
1676 for (i
= 0; i
< MLX4_NUM_TUNNEL_BUFS
; i
++) {
1677 ret
= mlx4_ib_post_pv_qp_buf(ctx
, tun_qp
, i
);
1679 pr_err(" mlx4_ib_post_pv_buf error"
1680 " (err = %d, i = %d)\n", ret
, i
);
1687 ib_destroy_qp(tun_qp
->qp
);
1693 * IB MAD completion callback for real SQPs
1695 static void mlx4_ib_sqp_comp_worker(struct work_struct
*work
)
1697 struct mlx4_ib_demux_pv_ctx
*ctx
;
1698 struct mlx4_ib_demux_pv_qp
*sqp
;
1703 ctx
= container_of(work
, struct mlx4_ib_demux_pv_ctx
, work
);
1704 ib_req_notify_cq(ctx
->cq
, IB_CQ_NEXT_COMP
);
1706 while (mlx4_ib_poll_cq(ctx
->cq
, 1, &wc
) == 1) {
1707 sqp
= &ctx
->qp
[MLX4_TUN_WRID_QPN(wc
.wr_id
)];
1708 if (wc
.status
== IB_WC_SUCCESS
) {
1709 switch (wc
.opcode
) {
1711 ib_destroy_ah(sqp
->tx_ring
[wc
.wr_id
&
1712 (MLX4_NUM_TUNNEL_BUFS
- 1)].ah
);
1713 sqp
->tx_ring
[wc
.wr_id
& (MLX4_NUM_TUNNEL_BUFS
- 1)].ah
1715 spin_lock(&sqp
->tx_lock
);
1717 spin_unlock(&sqp
->tx_lock
);
1720 mad
= (struct ib_mad
*) &(((struct mlx4_mad_rcv_buf
*)
1721 (sqp
->ring
[wc
.wr_id
&
1722 (MLX4_NUM_TUNNEL_BUFS
- 1)].addr
))->payload
);
1723 grh
= &(((struct mlx4_mad_rcv_buf
*)
1724 (sqp
->ring
[wc
.wr_id
&
1725 (MLX4_NUM_TUNNEL_BUFS
- 1)].addr
))->grh
);
1726 mlx4_ib_demux_mad(ctx
->ib_dev
, ctx
->port
, &wc
, grh
, mad
);
1727 if (mlx4_ib_post_pv_qp_buf(ctx
, sqp
, wc
.wr_id
&
1728 (MLX4_NUM_TUNNEL_BUFS
- 1)))
1729 pr_err("Failed reposting SQP "
1730 "buf:%lld\n", wc
.wr_id
);
1737 pr_debug("mlx4_ib: completion error in tunnel: %d."
1738 " status = %d, wrid = 0x%llx\n",
1739 ctx
->slave
, wc
.status
, wc
.wr_id
);
1740 if (!MLX4_TUN_IS_RECV(wc
.wr_id
)) {
1741 ib_destroy_ah(sqp
->tx_ring
[wc
.wr_id
&
1742 (MLX4_NUM_TUNNEL_BUFS
- 1)].ah
);
1743 sqp
->tx_ring
[wc
.wr_id
& (MLX4_NUM_TUNNEL_BUFS
- 1)].ah
1745 spin_lock(&sqp
->tx_lock
);
1747 spin_unlock(&sqp
->tx_lock
);
1753 static int alloc_pv_object(struct mlx4_ib_dev
*dev
, int slave
, int port
,
1754 struct mlx4_ib_demux_pv_ctx
**ret_ctx
)
1756 struct mlx4_ib_demux_pv_ctx
*ctx
;
1759 ctx
= kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx
), GFP_KERNEL
);
1761 pr_err("failed allocating pv resource context "
1762 "for port %d, slave %d\n", port
, slave
);
1766 ctx
->ib_dev
= &dev
->ib_dev
;
1773 static void free_pv_object(struct mlx4_ib_dev
*dev
, int slave
, int port
)
1775 if (dev
->sriov
.demux
[port
- 1].tun
[slave
]) {
1776 kfree(dev
->sriov
.demux
[port
- 1].tun
[slave
]);
1777 dev
->sriov
.demux
[port
- 1].tun
[slave
] = NULL
;
1781 static int create_pv_resources(struct ib_device
*ibdev
, int slave
, int port
,
1782 int create_tun
, struct mlx4_ib_demux_pv_ctx
*ctx
)
1785 struct ib_cq_init_attr cq_attr
= {};
1787 if (ctx
->state
!= DEMUX_PV_STATE_DOWN
)
1790 ctx
->state
= DEMUX_PV_STATE_STARTING
;
1791 /* have QP0 only if link layer is IB */
1792 if (rdma_port_get_link_layer(ibdev
, ctx
->port
) ==
1793 IB_LINK_LAYER_INFINIBAND
)
1797 ret
= mlx4_ib_alloc_pv_bufs(ctx
, IB_QPT_SMI
, create_tun
);
1799 pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret
);
1804 ret
= mlx4_ib_alloc_pv_bufs(ctx
, IB_QPT_GSI
, create_tun
);
1806 pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret
);
1810 cq_size
= 2 * MLX4_NUM_TUNNEL_BUFS
;
1814 cq_attr
.cqe
= cq_size
;
1815 ctx
->cq
= ib_create_cq(ctx
->ib_dev
, mlx4_ib_tunnel_comp_handler
,
1816 NULL
, ctx
, &cq_attr
);
1817 if (IS_ERR(ctx
->cq
)) {
1818 ret
= PTR_ERR(ctx
->cq
);
1819 pr_err("Couldn't create tunnel CQ (%d)\n", ret
);
1823 ctx
->pd
= ib_alloc_pd(ctx
->ib_dev
);
1824 if (IS_ERR(ctx
->pd
)) {
1825 ret
= PTR_ERR(ctx
->pd
);
1826 pr_err("Couldn't create tunnel PD (%d)\n", ret
);
1830 ctx
->mr
= ib_get_dma_mr(ctx
->pd
, IB_ACCESS_LOCAL_WRITE
);
1831 if (IS_ERR(ctx
->mr
)) {
1832 ret
= PTR_ERR(ctx
->mr
);
1833 pr_err("Couldn't get tunnel DMA MR (%d)\n", ret
);
1838 ret
= create_pv_sqp(ctx
, IB_QPT_SMI
, create_tun
);
1840 pr_err("Couldn't create %s QP0 (%d)\n",
1841 create_tun
? "tunnel for" : "", ret
);
1846 ret
= create_pv_sqp(ctx
, IB_QPT_GSI
, create_tun
);
1848 pr_err("Couldn't create %s QP1 (%d)\n",
1849 create_tun
? "tunnel for" : "", ret
);
1854 INIT_WORK(&ctx
->work
, mlx4_ib_tunnel_comp_worker
);
1856 INIT_WORK(&ctx
->work
, mlx4_ib_sqp_comp_worker
);
1858 ctx
->wq
= to_mdev(ibdev
)->sriov
.demux
[port
- 1].wq
;
1860 ret
= ib_req_notify_cq(ctx
->cq
, IB_CQ_NEXT_COMP
);
1862 pr_err("Couldn't arm tunnel cq (%d)\n", ret
);
1865 ctx
->state
= DEMUX_PV_STATE_ACTIVE
;
1870 ib_destroy_qp(ctx
->qp
[1].qp
);
1871 ctx
->qp
[1].qp
= NULL
;
1876 ib_destroy_qp(ctx
->qp
[0].qp
);
1877 ctx
->qp
[0].qp
= NULL
;
1880 ib_dereg_mr(ctx
->mr
);
1884 ib_dealloc_pd(ctx
->pd
);
1888 ib_destroy_cq(ctx
->cq
);
1892 mlx4_ib_free_pv_qp_bufs(ctx
, IB_QPT_GSI
, create_tun
);
1896 mlx4_ib_free_pv_qp_bufs(ctx
, IB_QPT_SMI
, create_tun
);
1898 ctx
->state
= DEMUX_PV_STATE_DOWN
;
1902 static void destroy_pv_resources(struct mlx4_ib_dev
*dev
, int slave
, int port
,
1903 struct mlx4_ib_demux_pv_ctx
*ctx
, int flush
)
1907 if (ctx
->state
> DEMUX_PV_STATE_DOWN
) {
1908 ctx
->state
= DEMUX_PV_STATE_DOWNING
;
1910 flush_workqueue(ctx
->wq
);
1912 ib_destroy_qp(ctx
->qp
[0].qp
);
1913 ctx
->qp
[0].qp
= NULL
;
1914 mlx4_ib_free_pv_qp_bufs(ctx
, IB_QPT_SMI
, 1);
1916 ib_destroy_qp(ctx
->qp
[1].qp
);
1917 ctx
->qp
[1].qp
= NULL
;
1918 mlx4_ib_free_pv_qp_bufs(ctx
, IB_QPT_GSI
, 1);
1919 ib_dereg_mr(ctx
->mr
);
1921 ib_dealloc_pd(ctx
->pd
);
1923 ib_destroy_cq(ctx
->cq
);
1925 ctx
->state
= DEMUX_PV_STATE_DOWN
;
1929 static int mlx4_ib_tunnels_update(struct mlx4_ib_dev
*dev
, int slave
,
1930 int port
, int do_init
)
1935 clean_vf_mcast(&dev
->sriov
.demux
[port
- 1], slave
);
1936 /* for master, destroy real sqp resources */
1937 if (slave
== mlx4_master_func_num(dev
->dev
))
1938 destroy_pv_resources(dev
, slave
, port
,
1939 dev
->sriov
.sqps
[port
- 1], 1);
1940 /* destroy the tunnel qp resources */
1941 destroy_pv_resources(dev
, slave
, port
,
1942 dev
->sriov
.demux
[port
- 1].tun
[slave
], 1);
1946 /* create the tunnel qp resources */
1947 ret
= create_pv_resources(&dev
->ib_dev
, slave
, port
, 1,
1948 dev
->sriov
.demux
[port
- 1].tun
[slave
]);
1950 /* for master, create the real sqp resources */
1951 if (!ret
&& slave
== mlx4_master_func_num(dev
->dev
))
1952 ret
= create_pv_resources(&dev
->ib_dev
, slave
, port
, 0,
1953 dev
->sriov
.sqps
[port
- 1]);
1957 void mlx4_ib_tunnels_update_work(struct work_struct
*work
)
1959 struct mlx4_ib_demux_work
*dmxw
;
1961 dmxw
= container_of(work
, struct mlx4_ib_demux_work
, work
);
1962 mlx4_ib_tunnels_update(dmxw
->dev
, dmxw
->slave
, (int) dmxw
->port
,
1968 static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev
*dev
,
1969 struct mlx4_ib_demux_ctx
*ctx
,
1976 ctx
->tun
= kcalloc(dev
->dev
->caps
.sqp_demux
,
1977 sizeof (struct mlx4_ib_demux_pv_ctx
*), GFP_KERNEL
);
1983 ctx
->ib_dev
= &dev
->ib_dev
;
1986 i
< min(dev
->dev
->caps
.sqp_demux
,
1987 (u16
)(dev
->dev
->persist
->num_vfs
+ 1));
1989 struct mlx4_active_ports actv_ports
=
1990 mlx4_get_active_ports(dev
->dev
, i
);
1992 if (!test_bit(port
- 1, actv_ports
.ports
))
1995 ret
= alloc_pv_object(dev
, i
, port
, &ctx
->tun
[i
]);
2002 ret
= mlx4_ib_mcg_port_init(ctx
);
2004 pr_err("Failed initializing mcg para-virt (%d)\n", ret
);
2008 snprintf(name
, sizeof name
, "mlx4_ibt%d", port
);
2009 ctx
->wq
= create_singlethread_workqueue(name
);
2011 pr_err("Failed to create tunnelling WQ for port %d\n", port
);
2016 snprintf(name
, sizeof name
, "mlx4_ibud%d", port
);
2017 ctx
->ud_wq
= create_singlethread_workqueue(name
);
2019 pr_err("Failed to create up/down WQ for port %d\n", port
);
2027 destroy_workqueue(ctx
->wq
);
2031 mlx4_ib_mcg_port_cleanup(ctx
, 1);
2033 for (i
= 0; i
< dev
->dev
->caps
.sqp_demux
; i
++)
2034 free_pv_object(dev
, i
, port
);
2040 static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx
*sqp_ctx
)
2042 if (sqp_ctx
->state
> DEMUX_PV_STATE_DOWN
) {
2043 sqp_ctx
->state
= DEMUX_PV_STATE_DOWNING
;
2044 flush_workqueue(sqp_ctx
->wq
);
2045 if (sqp_ctx
->has_smi
) {
2046 ib_destroy_qp(sqp_ctx
->qp
[0].qp
);
2047 sqp_ctx
->qp
[0].qp
= NULL
;
2048 mlx4_ib_free_pv_qp_bufs(sqp_ctx
, IB_QPT_SMI
, 0);
2050 ib_destroy_qp(sqp_ctx
->qp
[1].qp
);
2051 sqp_ctx
->qp
[1].qp
= NULL
;
2052 mlx4_ib_free_pv_qp_bufs(sqp_ctx
, IB_QPT_GSI
, 0);
2053 ib_dereg_mr(sqp_ctx
->mr
);
2055 ib_dealloc_pd(sqp_ctx
->pd
);
2057 ib_destroy_cq(sqp_ctx
->cq
);
2059 sqp_ctx
->state
= DEMUX_PV_STATE_DOWN
;
2063 static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx
*ctx
)
2067 struct mlx4_ib_dev
*dev
= to_mdev(ctx
->ib_dev
);
2068 mlx4_ib_mcg_port_cleanup(ctx
, 1);
2069 for (i
= 0; i
< dev
->dev
->caps
.sqp_demux
; i
++) {
2072 if (ctx
->tun
[i
]->state
> DEMUX_PV_STATE_DOWN
)
2073 ctx
->tun
[i
]->state
= DEMUX_PV_STATE_DOWNING
;
2075 flush_workqueue(ctx
->wq
);
2076 for (i
= 0; i
< dev
->dev
->caps
.sqp_demux
; i
++) {
2077 destroy_pv_resources(dev
, i
, ctx
->port
, ctx
->tun
[i
], 0);
2078 free_pv_object(dev
, i
, ctx
->port
);
2081 destroy_workqueue(ctx
->ud_wq
);
2082 destroy_workqueue(ctx
->wq
);
2086 static void mlx4_ib_master_tunnels(struct mlx4_ib_dev
*dev
, int do_init
)
2090 if (!mlx4_is_master(dev
->dev
))
2092 /* initialize or tear down tunnel QPs for the master */
2093 for (i
= 0; i
< dev
->dev
->caps
.num_ports
; i
++)
2094 mlx4_ib_tunnels_update(dev
, mlx4_master_func_num(dev
->dev
), i
+ 1, do_init
);
2098 int mlx4_ib_init_sriov(struct mlx4_ib_dev
*dev
)
2103 if (!mlx4_is_mfunc(dev
->dev
))
2106 dev
->sriov
.is_going_down
= 0;
2107 spin_lock_init(&dev
->sriov
.going_down_lock
);
2108 mlx4_ib_cm_paravirt_init(dev
);
2110 mlx4_ib_warn(&dev
->ib_dev
, "multi-function enabled\n");
2112 if (mlx4_is_slave(dev
->dev
)) {
2113 mlx4_ib_warn(&dev
->ib_dev
, "operating in qp1 tunnel mode\n");
2117 for (i
= 0; i
< dev
->dev
->caps
.sqp_demux
; i
++) {
2118 if (i
== mlx4_master_func_num(dev
->dev
))
2119 mlx4_put_slave_node_guid(dev
->dev
, i
, dev
->ib_dev
.node_guid
);
2121 mlx4_put_slave_node_guid(dev
->dev
, i
, mlx4_ib_gen_node_guid());
2124 err
= mlx4_ib_init_alias_guid_service(dev
);
2126 mlx4_ib_warn(&dev
->ib_dev
, "Failed init alias guid process.\n");
2129 err
= mlx4_ib_device_register_sysfs(dev
);
2131 mlx4_ib_warn(&dev
->ib_dev
, "Failed to register sysfs\n");
2135 mlx4_ib_warn(&dev
->ib_dev
, "initializing demux service for %d qp1 clients\n",
2136 dev
->dev
->caps
.sqp_demux
);
2137 for (i
= 0; i
< dev
->num_ports
; i
++) {
2139 err
= __mlx4_ib_query_gid(&dev
->ib_dev
, i
+ 1, 0, &gid
, 1);
2142 dev
->sriov
.demux
[i
].guid_cache
[0] = gid
.global
.interface_id
;
2143 err
= alloc_pv_object(dev
, mlx4_master_func_num(dev
->dev
), i
+ 1,
2144 &dev
->sriov
.sqps
[i
]);
2147 err
= mlx4_ib_alloc_demux_ctx(dev
, &dev
->sriov
.demux
[i
], i
+ 1);
2151 mlx4_ib_master_tunnels(dev
, 1);
2155 free_pv_object(dev
, mlx4_master_func_num(dev
->dev
), i
+ 1);
2158 free_pv_object(dev
, mlx4_master_func_num(dev
->dev
), i
+ 1);
2159 mlx4_ib_free_demux_ctx(&dev
->sriov
.demux
[i
]);
2161 mlx4_ib_device_unregister_sysfs(dev
);
2164 mlx4_ib_destroy_alias_guid_service(dev
);
2167 mlx4_ib_cm_paravirt_clean(dev
, -1);
2172 void mlx4_ib_close_sriov(struct mlx4_ib_dev
*dev
)
2175 unsigned long flags
;
2177 if (!mlx4_is_mfunc(dev
->dev
))
2180 spin_lock_irqsave(&dev
->sriov
.going_down_lock
, flags
);
2181 dev
->sriov
.is_going_down
= 1;
2182 spin_unlock_irqrestore(&dev
->sriov
.going_down_lock
, flags
);
2183 if (mlx4_is_master(dev
->dev
)) {
2184 for (i
= 0; i
< dev
->num_ports
; i
++) {
2185 flush_workqueue(dev
->sriov
.demux
[i
].ud_wq
);
2186 mlx4_ib_free_sqp_ctx(dev
->sriov
.sqps
[i
]);
2187 kfree(dev
->sriov
.sqps
[i
]);
2188 dev
->sriov
.sqps
[i
] = NULL
;
2189 mlx4_ib_free_demux_ctx(&dev
->sriov
.demux
[i
]);
2192 mlx4_ib_cm_paravirt_clean(dev
, -1);
2193 mlx4_ib_destroy_alias_guid_service(dev
);
2194 mlx4_ib_device_unregister_sysfs(dev
);