6cd8cd5bf1c5b92a67c2785455b866014a753bed
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / main.c
1 /*
2 * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/slab.h>
37 #include <linux/errno.h>
38 #include <linux/netdevice.h>
39 #include <linux/inetdevice.h>
40 #include <linux/rtnetlink.h>
41 #include <linux/if_vlan.h>
42 #include <net/ipv6.h>
43 #include <net/addrconf.h>
44
45 #include <rdma/ib_smi.h>
46 #include <rdma/ib_user_verbs.h>
47 #include <rdma/ib_addr.h>
48
49 #include <linux/mlx4/driver.h>
50 #include <linux/mlx4/cmd.h>
51 #include <linux/mlx4/qp.h>
52
53 #include "mlx4_ib.h"
54 #include "user.h"
55
56 #define DRV_NAME MLX4_IB_DRV_NAME
57 #define DRV_VERSION "2.2-1"
58 #define DRV_RELDATE "Feb 2014"
59
60 #define MLX4_IB_FLOW_MAX_PRIO 0xFFF
61 #define MLX4_IB_FLOW_QPN_MASK 0xFFFFFF
62 #define MLX4_IB_CARD_REV_A0 0xA0
63
64 MODULE_AUTHOR("Roland Dreier");
65 MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
66 MODULE_LICENSE("Dual BSD/GPL");
67 MODULE_VERSION(DRV_VERSION);
68
69 int mlx4_ib_sm_guid_assign = 0;
70 module_param_named(sm_guid_assign, mlx4_ib_sm_guid_assign, int, 0444);
71 MODULE_PARM_DESC(sm_guid_assign, "Enable SM alias_GUID assignment if sm_guid_assign > 0 (Default: 0)");
72
73 static const char mlx4_ib_version[] =
74 DRV_NAME ": Mellanox ConnectX InfiniBand driver v"
75 DRV_VERSION " (" DRV_RELDATE ")\n";
76
77 struct update_gid_work {
78 struct work_struct work;
79 union ib_gid gids[128];
80 struct mlx4_ib_dev *dev;
81 int port;
82 };
83
84 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init);
85
86 static struct workqueue_struct *wq;
87
88 static void init_query_mad(struct ib_smp *mad)
89 {
90 mad->base_version = 1;
91 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
92 mad->class_version = 1;
93 mad->method = IB_MGMT_METHOD_GET;
94 }
95
96 static union ib_gid zgid;
97
98 static int check_flow_steering_support(struct mlx4_dev *dev)
99 {
100 int eth_num_ports = 0;
101 int ib_num_ports = 0;
102
103 int dmfs = dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED;
104
105 if (dmfs) {
106 int i;
107 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH)
108 eth_num_ports++;
109 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
110 ib_num_ports++;
111 dmfs &= (!ib_num_ports ||
112 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_DMFS_IPOIB)) &&
113 (!eth_num_ports ||
114 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN));
115 if (ib_num_ports && mlx4_is_mfunc(dev)) {
116 pr_warn("Device managed flow steering is unavailable for IB port in multifunction env.\n");
117 dmfs = 0;
118 }
119 }
120 return dmfs;
121 }
122
123 static int num_ib_ports(struct mlx4_dev *dev)
124 {
125 int ib_ports = 0;
126 int i;
127
128 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
129 ib_ports++;
130
131 return ib_ports;
132 }
133
134 static int mlx4_ib_query_device(struct ib_device *ibdev,
135 struct ib_device_attr *props,
136 struct ib_udata *uhw)
137 {
138 struct mlx4_ib_dev *dev = to_mdev(ibdev);
139 struct ib_smp *in_mad = NULL;
140 struct ib_smp *out_mad = NULL;
141 int err = -ENOMEM;
142 int have_ib_ports;
143
144 if (uhw->inlen || uhw->outlen)
145 return -EINVAL;
146
147 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
148 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
149 if (!in_mad || !out_mad)
150 goto out;
151
152 init_query_mad(in_mad);
153 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
154
155 err = mlx4_MAD_IFC(to_mdev(ibdev), MLX4_MAD_IFC_IGNORE_KEYS,
156 1, NULL, NULL, in_mad, out_mad);
157 if (err)
158 goto out;
159
160 memset(props, 0, sizeof *props);
161
162 have_ib_ports = num_ib_ports(dev->dev);
163
164 props->fw_ver = dev->dev->caps.fw_ver;
165 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
166 IB_DEVICE_PORT_ACTIVE_EVENT |
167 IB_DEVICE_SYS_IMAGE_GUID |
168 IB_DEVICE_RC_RNR_NAK_GEN |
169 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
170 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR)
171 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
172 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR)
173 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
174 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_APM && have_ib_ports)
175 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
176 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UD_AV_PORT)
177 props->device_cap_flags |= IB_DEVICE_UD_AV_PORT_ENFORCE;
178 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_IPOIB_CSUM)
179 props->device_cap_flags |= IB_DEVICE_UD_IP_CSUM;
180 if (dev->dev->caps.max_gso_sz &&
181 (dev->dev->rev_id != MLX4_IB_CARD_REV_A0) &&
182 (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_BLH))
183 props->device_cap_flags |= IB_DEVICE_UD_TSO;
184 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_RESERVED_LKEY)
185 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
186 if ((dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_LOCAL_INV) &&
187 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_REMOTE_INV) &&
188 (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_FAST_REG_WR))
189 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
190 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC)
191 props->device_cap_flags |= IB_DEVICE_XRC;
192 if (dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW)
193 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW;
194 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
195 if (dev->dev->caps.bmme_flags & MLX4_BMME_FLAG_WIN_TYPE_2B)
196 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
197 else
198 props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
199 if (dev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
200 props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
201 }
202
203 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
204 0xffffff;
205 props->vendor_part_id = dev->dev->persist->pdev->device;
206 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
207 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
208
209 props->max_mr_size = ~0ull;
210 props->page_size_cap = dev->dev->caps.page_size_cap;
211 props->max_qp = dev->dev->quotas.qp;
212 props->max_qp_wr = dev->dev->caps.max_wqes - MLX4_IB_SQ_MAX_SPARE;
213 props->max_sge = min(dev->dev->caps.max_sq_sg,
214 dev->dev->caps.max_rq_sg);
215 props->max_cq = dev->dev->quotas.cq;
216 props->max_cqe = dev->dev->caps.max_cqes;
217 props->max_mr = dev->dev->quotas.mpt;
218 props->max_pd = dev->dev->caps.num_pds - dev->dev->caps.reserved_pds;
219 props->max_qp_rd_atom = dev->dev->caps.max_qp_dest_rdma;
220 props->max_qp_init_rd_atom = dev->dev->caps.max_qp_init_rdma;
221 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
222 props->max_srq = dev->dev->quotas.srq;
223 props->max_srq_wr = dev->dev->caps.max_srq_wqes - 1;
224 props->max_srq_sge = dev->dev->caps.max_srq_sge;
225 props->max_fast_reg_page_list_len = MLX4_MAX_FAST_REG_PAGES;
226 props->local_ca_ack_delay = dev->dev->caps.local_ca_ack_delay;
227 props->atomic_cap = dev->dev->caps.flags & MLX4_DEV_CAP_FLAG_ATOMIC ?
228 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
229 props->masked_atomic_cap = props->atomic_cap;
230 props->max_pkeys = dev->dev->caps.pkey_table_len[1];
231 props->max_mcast_grp = dev->dev->caps.num_mgms + dev->dev->caps.num_amgms;
232 props->max_mcast_qp_attach = dev->dev->caps.num_qp_per_mgm;
233 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
234 props->max_mcast_grp;
235 props->max_map_per_fmr = dev->dev->caps.max_fmr_maps;
236
237 out:
238 kfree(in_mad);
239 kfree(out_mad);
240
241 return err;
242 }
243
244 static enum rdma_link_layer
245 mlx4_ib_port_link_layer(struct ib_device *device, u8 port_num)
246 {
247 struct mlx4_dev *dev = to_mdev(device)->dev;
248
249 return dev->caps.port_mask[port_num] == MLX4_PORT_TYPE_IB ?
250 IB_LINK_LAYER_INFINIBAND : IB_LINK_LAYER_ETHERNET;
251 }
252
253 static int ib_link_query_port(struct ib_device *ibdev, u8 port,
254 struct ib_port_attr *props, int netw_view)
255 {
256 struct ib_smp *in_mad = NULL;
257 struct ib_smp *out_mad = NULL;
258 int ext_active_speed;
259 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
260 int err = -ENOMEM;
261
262 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
263 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
264 if (!in_mad || !out_mad)
265 goto out;
266
267 init_query_mad(in_mad);
268 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
269 in_mad->attr_mod = cpu_to_be32(port);
270
271 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
272 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
273
274 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
275 in_mad, out_mad);
276 if (err)
277 goto out;
278
279
280 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
281 props->lmc = out_mad->data[34] & 0x7;
282 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
283 props->sm_sl = out_mad->data[36] & 0xf;
284 props->state = out_mad->data[32] & 0xf;
285 props->phys_state = out_mad->data[33] >> 4;
286 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
287 if (netw_view)
288 props->gid_tbl_len = out_mad->data[50];
289 else
290 props->gid_tbl_len = to_mdev(ibdev)->dev->caps.gid_table_len[port];
291 props->max_msg_sz = to_mdev(ibdev)->dev->caps.max_msg_sz;
292 props->pkey_tbl_len = to_mdev(ibdev)->dev->caps.pkey_table_len[port];
293 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
294 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
295 props->active_width = out_mad->data[31] & 0xf;
296 props->active_speed = out_mad->data[35] >> 4;
297 props->max_mtu = out_mad->data[41] & 0xf;
298 props->active_mtu = out_mad->data[36] >> 4;
299 props->subnet_timeout = out_mad->data[51] & 0x1f;
300 props->max_vl_num = out_mad->data[37] >> 4;
301 props->init_type_reply = out_mad->data[41] >> 4;
302
303 /* Check if extended speeds (EDR/FDR/...) are supported */
304 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
305 ext_active_speed = out_mad->data[62] >> 4;
306
307 switch (ext_active_speed) {
308 case 1:
309 props->active_speed = IB_SPEED_FDR;
310 break;
311 case 2:
312 props->active_speed = IB_SPEED_EDR;
313 break;
314 }
315 }
316
317 /* If reported active speed is QDR, check if is FDR-10 */
318 if (props->active_speed == IB_SPEED_QDR) {
319 init_query_mad(in_mad);
320 in_mad->attr_id = MLX4_ATTR_EXTENDED_PORT_INFO;
321 in_mad->attr_mod = cpu_to_be32(port);
322
323 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port,
324 NULL, NULL, in_mad, out_mad);
325 if (err)
326 goto out;
327
328 /* Checking LinkSpeedActive for FDR-10 */
329 if (out_mad->data[15] & 0x1)
330 props->active_speed = IB_SPEED_FDR10;
331 }
332
333 /* Avoid wrong speed value returned by FW if the IB link is down. */
334 if (props->state == IB_PORT_DOWN)
335 props->active_speed = IB_SPEED_SDR;
336
337 out:
338 kfree(in_mad);
339 kfree(out_mad);
340 return err;
341 }
342
343 static u8 state_to_phys_state(enum ib_port_state state)
344 {
345 return state == IB_PORT_ACTIVE ? 5 : 3;
346 }
347
348 static int eth_link_query_port(struct ib_device *ibdev, u8 port,
349 struct ib_port_attr *props, int netw_view)
350 {
351
352 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
353 struct mlx4_ib_iboe *iboe = &mdev->iboe;
354 struct net_device *ndev;
355 enum ib_mtu tmp;
356 struct mlx4_cmd_mailbox *mailbox;
357 int err = 0;
358 int is_bonded = mlx4_is_bonded(mdev->dev);
359
360 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
361 if (IS_ERR(mailbox))
362 return PTR_ERR(mailbox);
363
364 err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
365 MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
366 MLX4_CMD_WRAPPED);
367 if (err)
368 goto out;
369
370 props->active_width = (((u8 *)mailbox->buf)[5] == 0x40) ?
371 IB_WIDTH_4X : IB_WIDTH_1X;
372 props->active_speed = IB_SPEED_QDR;
373 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_IP_BASED_GIDS;
374 props->gid_tbl_len = mdev->dev->caps.gid_table_len[port];
375 props->max_msg_sz = mdev->dev->caps.max_msg_sz;
376 props->pkey_tbl_len = 1;
377 props->max_mtu = IB_MTU_4096;
378 props->max_vl_num = 2;
379 props->state = IB_PORT_DOWN;
380 props->phys_state = state_to_phys_state(props->state);
381 props->active_mtu = IB_MTU_256;
382 if (is_bonded)
383 rtnl_lock(); /* required to get upper dev */
384 spin_lock_bh(&iboe->lock);
385 ndev = iboe->netdevs[port - 1];
386 if (ndev && is_bonded)
387 ndev = netdev_master_upper_dev_get(ndev);
388 if (!ndev)
389 goto out_unlock;
390
391 tmp = iboe_get_mtu(ndev->mtu);
392 props->active_mtu = tmp ? min(props->max_mtu, tmp) : IB_MTU_256;
393
394 props->state = (netif_running(ndev) && netif_carrier_ok(ndev)) ?
395 IB_PORT_ACTIVE : IB_PORT_DOWN;
396 props->phys_state = state_to_phys_state(props->state);
397 out_unlock:
398 spin_unlock_bh(&iboe->lock);
399 if (is_bonded)
400 rtnl_unlock();
401 out:
402 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
403 return err;
404 }
405
406 int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
407 struct ib_port_attr *props, int netw_view)
408 {
409 int err;
410
411 memset(props, 0, sizeof *props);
412
413 err = mlx4_ib_port_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND ?
414 ib_link_query_port(ibdev, port, props, netw_view) :
415 eth_link_query_port(ibdev, port, props, netw_view);
416
417 return err;
418 }
419
420 static int mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
421 struct ib_port_attr *props)
422 {
423 /* returns host view */
424 return __mlx4_ib_query_port(ibdev, port, props, 0);
425 }
426
427 int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
428 union ib_gid *gid, int netw_view)
429 {
430 struct ib_smp *in_mad = NULL;
431 struct ib_smp *out_mad = NULL;
432 int err = -ENOMEM;
433 struct mlx4_ib_dev *dev = to_mdev(ibdev);
434 int clear = 0;
435 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
436
437 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
438 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
439 if (!in_mad || !out_mad)
440 goto out;
441
442 init_query_mad(in_mad);
443 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
444 in_mad->attr_mod = cpu_to_be32(port);
445
446 if (mlx4_is_mfunc(dev->dev) && netw_view)
447 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
448
449 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port, NULL, NULL, in_mad, out_mad);
450 if (err)
451 goto out;
452
453 memcpy(gid->raw, out_mad->data + 8, 8);
454
455 if (mlx4_is_mfunc(dev->dev) && !netw_view) {
456 if (index) {
457 /* For any index > 0, return the null guid */
458 err = 0;
459 clear = 1;
460 goto out;
461 }
462 }
463
464 init_query_mad(in_mad);
465 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
466 in_mad->attr_mod = cpu_to_be32(index / 8);
467
468 err = mlx4_MAD_IFC(dev, mad_ifc_flags, port,
469 NULL, NULL, in_mad, out_mad);
470 if (err)
471 goto out;
472
473 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
474
475 out:
476 if (clear)
477 memset(gid->raw + 8, 0, 8);
478 kfree(in_mad);
479 kfree(out_mad);
480 return err;
481 }
482
483 static int iboe_query_gid(struct ib_device *ibdev, u8 port, int index,
484 union ib_gid *gid)
485 {
486 struct mlx4_ib_dev *dev = to_mdev(ibdev);
487
488 *gid = dev->iboe.gid_table[port - 1][index];
489
490 return 0;
491 }
492
493 static int mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
494 union ib_gid *gid)
495 {
496 if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
497 return __mlx4_ib_query_gid(ibdev, port, index, gid, 0);
498 else
499 return iboe_query_gid(ibdev, port, index, gid);
500 }
501
502 int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
503 u16 *pkey, int netw_view)
504 {
505 struct ib_smp *in_mad = NULL;
506 struct ib_smp *out_mad = NULL;
507 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
508 int err = -ENOMEM;
509
510 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
511 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
512 if (!in_mad || !out_mad)
513 goto out;
514
515 init_query_mad(in_mad);
516 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
517 in_mad->attr_mod = cpu_to_be32(index / 32);
518
519 if (mlx4_is_mfunc(to_mdev(ibdev)->dev) && netw_view)
520 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
521
522 err = mlx4_MAD_IFC(to_mdev(ibdev), mad_ifc_flags, port, NULL, NULL,
523 in_mad, out_mad);
524 if (err)
525 goto out;
526
527 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
528
529 out:
530 kfree(in_mad);
531 kfree(out_mad);
532 return err;
533 }
534
535 static int mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
536 {
537 return __mlx4_ib_query_pkey(ibdev, port, index, pkey, 0);
538 }
539
540 static int mlx4_ib_modify_device(struct ib_device *ibdev, int mask,
541 struct ib_device_modify *props)
542 {
543 struct mlx4_cmd_mailbox *mailbox;
544 unsigned long flags;
545
546 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
547 return -EOPNOTSUPP;
548
549 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
550 return 0;
551
552 if (mlx4_is_slave(to_mdev(ibdev)->dev))
553 return -EOPNOTSUPP;
554
555 spin_lock_irqsave(&to_mdev(ibdev)->sm_lock, flags);
556 memcpy(ibdev->node_desc, props->node_desc, 64);
557 spin_unlock_irqrestore(&to_mdev(ibdev)->sm_lock, flags);
558
559 /*
560 * If possible, pass node desc to FW, so it can generate
561 * a 144 trap. If cmd fails, just ignore.
562 */
563 mailbox = mlx4_alloc_cmd_mailbox(to_mdev(ibdev)->dev);
564 if (IS_ERR(mailbox))
565 return 0;
566
567 memcpy(mailbox->buf, props->node_desc, 64);
568 mlx4_cmd(to_mdev(ibdev)->dev, mailbox->dma, 1, 0,
569 MLX4_CMD_SET_NODE, MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE);
570
571 mlx4_free_cmd_mailbox(to_mdev(ibdev)->dev, mailbox);
572
573 return 0;
574 }
575
576 static int mlx4_ib_SET_PORT(struct mlx4_ib_dev *dev, u8 port, int reset_qkey_viols,
577 u32 cap_mask)
578 {
579 struct mlx4_cmd_mailbox *mailbox;
580 int err;
581
582 mailbox = mlx4_alloc_cmd_mailbox(dev->dev);
583 if (IS_ERR(mailbox))
584 return PTR_ERR(mailbox);
585
586 if (dev->dev->flags & MLX4_FLAG_OLD_PORT_CMDS) {
587 *(u8 *) mailbox->buf = !!reset_qkey_viols << 6;
588 ((__be32 *) mailbox->buf)[2] = cpu_to_be32(cap_mask);
589 } else {
590 ((u8 *) mailbox->buf)[3] = !!reset_qkey_viols;
591 ((__be32 *) mailbox->buf)[1] = cpu_to_be32(cap_mask);
592 }
593
594 err = mlx4_cmd(dev->dev, mailbox->dma, port, MLX4_SET_PORT_IB_OPCODE,
595 MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B,
596 MLX4_CMD_WRAPPED);
597
598 mlx4_free_cmd_mailbox(dev->dev, mailbox);
599 return err;
600 }
601
602 static int mlx4_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
603 struct ib_port_modify *props)
604 {
605 struct mlx4_ib_dev *mdev = to_mdev(ibdev);
606 u8 is_eth = mdev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
607 struct ib_port_attr attr;
608 u32 cap_mask;
609 int err;
610
611 /* return OK if this is RoCE. CM calls ib_modify_port() regardless
612 * of whether port link layer is ETH or IB. For ETH ports, qkey
613 * violations and port capabilities are not meaningful.
614 */
615 if (is_eth)
616 return 0;
617
618 mutex_lock(&mdev->cap_mask_mutex);
619
620 err = mlx4_ib_query_port(ibdev, port, &attr);
621 if (err)
622 goto out;
623
624 cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
625 ~props->clr_port_cap_mask;
626
627 err = mlx4_ib_SET_PORT(mdev, port,
628 !!(mask & IB_PORT_RESET_QKEY_CNTR),
629 cap_mask);
630
631 out:
632 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
633 return err;
634 }
635
636 static struct ib_ucontext *mlx4_ib_alloc_ucontext(struct ib_device *ibdev,
637 struct ib_udata *udata)
638 {
639 struct mlx4_ib_dev *dev = to_mdev(ibdev);
640 struct mlx4_ib_ucontext *context;
641 struct mlx4_ib_alloc_ucontext_resp_v3 resp_v3;
642 struct mlx4_ib_alloc_ucontext_resp resp;
643 int err;
644
645 if (!dev->ib_active)
646 return ERR_PTR(-EAGAIN);
647
648 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION) {
649 resp_v3.qp_tab_size = dev->dev->caps.num_qps;
650 resp_v3.bf_reg_size = dev->dev->caps.bf_reg_size;
651 resp_v3.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
652 } else {
653 resp.dev_caps = dev->dev->caps.userspace_caps;
654 resp.qp_tab_size = dev->dev->caps.num_qps;
655 resp.bf_reg_size = dev->dev->caps.bf_reg_size;
656 resp.bf_regs_per_page = dev->dev->caps.bf_regs_per_page;
657 resp.cqe_size = dev->dev->caps.cqe_size;
658 }
659
660 context = kmalloc(sizeof *context, GFP_KERNEL);
661 if (!context)
662 return ERR_PTR(-ENOMEM);
663
664 err = mlx4_uar_alloc(to_mdev(ibdev)->dev, &context->uar);
665 if (err) {
666 kfree(context);
667 return ERR_PTR(err);
668 }
669
670 INIT_LIST_HEAD(&context->db_page_list);
671 mutex_init(&context->db_page_mutex);
672
673 if (ibdev->uverbs_abi_ver == MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION)
674 err = ib_copy_to_udata(udata, &resp_v3, sizeof(resp_v3));
675 else
676 err = ib_copy_to_udata(udata, &resp, sizeof(resp));
677
678 if (err) {
679 mlx4_uar_free(to_mdev(ibdev)->dev, &context->uar);
680 kfree(context);
681 return ERR_PTR(-EFAULT);
682 }
683
684 return &context->ibucontext;
685 }
686
687 static int mlx4_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
688 {
689 struct mlx4_ib_ucontext *context = to_mucontext(ibcontext);
690
691 mlx4_uar_free(to_mdev(ibcontext->device)->dev, &context->uar);
692 kfree(context);
693
694 return 0;
695 }
696
697 static int mlx4_ib_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
698 {
699 struct mlx4_ib_dev *dev = to_mdev(context->device);
700
701 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
702 return -EINVAL;
703
704 if (vma->vm_pgoff == 0) {
705 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
706
707 if (io_remap_pfn_range(vma, vma->vm_start,
708 to_mucontext(context)->uar.pfn,
709 PAGE_SIZE, vma->vm_page_prot))
710 return -EAGAIN;
711 } else if (vma->vm_pgoff == 1 && dev->dev->caps.bf_reg_size != 0) {
712 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
713
714 if (io_remap_pfn_range(vma, vma->vm_start,
715 to_mucontext(context)->uar.pfn +
716 dev->dev->caps.num_uars,
717 PAGE_SIZE, vma->vm_page_prot))
718 return -EAGAIN;
719 } else
720 return -EINVAL;
721
722 return 0;
723 }
724
725 static struct ib_pd *mlx4_ib_alloc_pd(struct ib_device *ibdev,
726 struct ib_ucontext *context,
727 struct ib_udata *udata)
728 {
729 struct mlx4_ib_pd *pd;
730 int err;
731
732 pd = kmalloc(sizeof *pd, GFP_KERNEL);
733 if (!pd)
734 return ERR_PTR(-ENOMEM);
735
736 err = mlx4_pd_alloc(to_mdev(ibdev)->dev, &pd->pdn);
737 if (err) {
738 kfree(pd);
739 return ERR_PTR(err);
740 }
741
742 if (context)
743 if (ib_copy_to_udata(udata, &pd->pdn, sizeof (__u32))) {
744 mlx4_pd_free(to_mdev(ibdev)->dev, pd->pdn);
745 kfree(pd);
746 return ERR_PTR(-EFAULT);
747 }
748
749 return &pd->ibpd;
750 }
751
752 static int mlx4_ib_dealloc_pd(struct ib_pd *pd)
753 {
754 mlx4_pd_free(to_mdev(pd->device)->dev, to_mpd(pd)->pdn);
755 kfree(pd);
756
757 return 0;
758 }
759
760 static struct ib_xrcd *mlx4_ib_alloc_xrcd(struct ib_device *ibdev,
761 struct ib_ucontext *context,
762 struct ib_udata *udata)
763 {
764 struct mlx4_ib_xrcd *xrcd;
765 struct ib_cq_init_attr cq_attr = {};
766 int err;
767
768 if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
769 return ERR_PTR(-ENOSYS);
770
771 xrcd = kmalloc(sizeof *xrcd, GFP_KERNEL);
772 if (!xrcd)
773 return ERR_PTR(-ENOMEM);
774
775 err = mlx4_xrcd_alloc(to_mdev(ibdev)->dev, &xrcd->xrcdn);
776 if (err)
777 goto err1;
778
779 xrcd->pd = ib_alloc_pd(ibdev);
780 if (IS_ERR(xrcd->pd)) {
781 err = PTR_ERR(xrcd->pd);
782 goto err2;
783 }
784
785 cq_attr.cqe = 1;
786 xrcd->cq = ib_create_cq(ibdev, NULL, NULL, xrcd, &cq_attr);
787 if (IS_ERR(xrcd->cq)) {
788 err = PTR_ERR(xrcd->cq);
789 goto err3;
790 }
791
792 return &xrcd->ibxrcd;
793
794 err3:
795 ib_dealloc_pd(xrcd->pd);
796 err2:
797 mlx4_xrcd_free(to_mdev(ibdev)->dev, xrcd->xrcdn);
798 err1:
799 kfree(xrcd);
800 return ERR_PTR(err);
801 }
802
803 static int mlx4_ib_dealloc_xrcd(struct ib_xrcd *xrcd)
804 {
805 ib_destroy_cq(to_mxrcd(xrcd)->cq);
806 ib_dealloc_pd(to_mxrcd(xrcd)->pd);
807 mlx4_xrcd_free(to_mdev(xrcd->device)->dev, to_mxrcd(xrcd)->xrcdn);
808 kfree(xrcd);
809
810 return 0;
811 }
812
813 static int add_gid_entry(struct ib_qp *ibqp, union ib_gid *gid)
814 {
815 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
816 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
817 struct mlx4_ib_gid_entry *ge;
818
819 ge = kzalloc(sizeof *ge, GFP_KERNEL);
820 if (!ge)
821 return -ENOMEM;
822
823 ge->gid = *gid;
824 if (mlx4_ib_add_mc(mdev, mqp, gid)) {
825 ge->port = mqp->port;
826 ge->added = 1;
827 }
828
829 mutex_lock(&mqp->mutex);
830 list_add_tail(&ge->list, &mqp->gid_list);
831 mutex_unlock(&mqp->mutex);
832
833 return 0;
834 }
835
836 int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
837 union ib_gid *gid)
838 {
839 struct net_device *ndev;
840 int ret = 0;
841
842 if (!mqp->port)
843 return 0;
844
845 spin_lock_bh(&mdev->iboe.lock);
846 ndev = mdev->iboe.netdevs[mqp->port - 1];
847 if (ndev)
848 dev_hold(ndev);
849 spin_unlock_bh(&mdev->iboe.lock);
850
851 if (ndev) {
852 ret = 1;
853 dev_put(ndev);
854 }
855
856 return ret;
857 }
858
859 struct mlx4_ib_steering {
860 struct list_head list;
861 struct mlx4_flow_reg_id reg_id;
862 union ib_gid gid;
863 };
864
865 static int parse_flow_attr(struct mlx4_dev *dev,
866 u32 qp_num,
867 union ib_flow_spec *ib_spec,
868 struct _rule_hw *mlx4_spec)
869 {
870 enum mlx4_net_trans_rule_id type;
871
872 switch (ib_spec->type) {
873 case IB_FLOW_SPEC_ETH:
874 type = MLX4_NET_TRANS_RULE_ID_ETH;
875 memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
876 ETH_ALEN);
877 memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
878 ETH_ALEN);
879 mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
880 mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
881 break;
882 case IB_FLOW_SPEC_IB:
883 type = MLX4_NET_TRANS_RULE_ID_IB;
884 mlx4_spec->ib.l3_qpn =
885 cpu_to_be32(qp_num);
886 mlx4_spec->ib.qpn_mask =
887 cpu_to_be32(MLX4_IB_FLOW_QPN_MASK);
888 break;
889
890
891 case IB_FLOW_SPEC_IPV4:
892 type = MLX4_NET_TRANS_RULE_ID_IPV4;
893 mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
894 mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
895 mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
896 mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
897 break;
898
899 case IB_FLOW_SPEC_TCP:
900 case IB_FLOW_SPEC_UDP:
901 type = ib_spec->type == IB_FLOW_SPEC_TCP ?
902 MLX4_NET_TRANS_RULE_ID_TCP :
903 MLX4_NET_TRANS_RULE_ID_UDP;
904 mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
905 mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
906 mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
907 mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
908 break;
909
910 default:
911 return -EINVAL;
912 }
913 if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
914 mlx4_hw_rule_sz(dev, type) < 0)
915 return -EINVAL;
916 mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
917 mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
918 return mlx4_hw_rule_sz(dev, type);
919 }
920
921 struct default_rules {
922 __u32 mandatory_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
923 __u32 mandatory_not_fields[IB_FLOW_SPEC_SUPPORT_LAYERS];
924 __u32 rules_create_list[IB_FLOW_SPEC_SUPPORT_LAYERS];
925 __u8 link_layer;
926 };
927 static const struct default_rules default_table[] = {
928 {
929 .mandatory_fields = {IB_FLOW_SPEC_IPV4},
930 .mandatory_not_fields = {IB_FLOW_SPEC_ETH},
931 .rules_create_list = {IB_FLOW_SPEC_IB},
932 .link_layer = IB_LINK_LAYER_INFINIBAND
933 }
934 };
935
936 static int __mlx4_ib_default_rules_match(struct ib_qp *qp,
937 struct ib_flow_attr *flow_attr)
938 {
939 int i, j, k;
940 void *ib_flow;
941 const struct default_rules *pdefault_rules = default_table;
942 u8 link_layer = rdma_port_get_link_layer(qp->device, flow_attr->port);
943
944 for (i = 0; i < ARRAY_SIZE(default_table); i++, pdefault_rules++) {
945 __u32 field_types[IB_FLOW_SPEC_SUPPORT_LAYERS];
946 memset(&field_types, 0, sizeof(field_types));
947
948 if (link_layer != pdefault_rules->link_layer)
949 continue;
950
951 ib_flow = flow_attr + 1;
952 /* we assume the specs are sorted */
953 for (j = 0, k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS &&
954 j < flow_attr->num_of_specs; k++) {
955 union ib_flow_spec *current_flow =
956 (union ib_flow_spec *)ib_flow;
957
958 /* same layer but different type */
959 if (((current_flow->type & IB_FLOW_SPEC_LAYER_MASK) ==
960 (pdefault_rules->mandatory_fields[k] &
961 IB_FLOW_SPEC_LAYER_MASK)) &&
962 (current_flow->type !=
963 pdefault_rules->mandatory_fields[k]))
964 goto out;
965
966 /* same layer, try match next one */
967 if (current_flow->type ==
968 pdefault_rules->mandatory_fields[k]) {
969 j++;
970 ib_flow +=
971 ((union ib_flow_spec *)ib_flow)->size;
972 }
973 }
974
975 ib_flow = flow_attr + 1;
976 for (j = 0; j < flow_attr->num_of_specs;
977 j++, ib_flow += ((union ib_flow_spec *)ib_flow)->size)
978 for (k = 0; k < IB_FLOW_SPEC_SUPPORT_LAYERS; k++)
979 /* same layer and same type */
980 if (((union ib_flow_spec *)ib_flow)->type ==
981 pdefault_rules->mandatory_not_fields[k])
982 goto out;
983
984 return i;
985 }
986 out:
987 return -1;
988 }
989
990 static int __mlx4_ib_create_default_rules(
991 struct mlx4_ib_dev *mdev,
992 struct ib_qp *qp,
993 const struct default_rules *pdefault_rules,
994 struct _rule_hw *mlx4_spec) {
995 int size = 0;
996 int i;
997
998 for (i = 0; i < ARRAY_SIZE(pdefault_rules->rules_create_list); i++) {
999 int ret;
1000 union ib_flow_spec ib_spec;
1001 switch (pdefault_rules->rules_create_list[i]) {
1002 case 0:
1003 /* no rule */
1004 continue;
1005 case IB_FLOW_SPEC_IB:
1006 ib_spec.type = IB_FLOW_SPEC_IB;
1007 ib_spec.size = sizeof(struct ib_flow_spec_ib);
1008
1009 break;
1010 default:
1011 /* invalid rule */
1012 return -EINVAL;
1013 }
1014 /* We must put empty rule, qpn is being ignored */
1015 ret = parse_flow_attr(mdev->dev, 0, &ib_spec,
1016 mlx4_spec);
1017 if (ret < 0) {
1018 pr_info("invalid parsing\n");
1019 return -EINVAL;
1020 }
1021
1022 mlx4_spec = (void *)mlx4_spec + ret;
1023 size += ret;
1024 }
1025 return size;
1026 }
1027
1028 static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1029 int domain,
1030 enum mlx4_net_trans_promisc_mode flow_type,
1031 u64 *reg_id)
1032 {
1033 int ret, i;
1034 int size = 0;
1035 void *ib_flow;
1036 struct mlx4_ib_dev *mdev = to_mdev(qp->device);
1037 struct mlx4_cmd_mailbox *mailbox;
1038 struct mlx4_net_trans_rule_hw_ctrl *ctrl;
1039 int default_flow;
1040
1041 static const u16 __mlx4_domain[] = {
1042 [IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
1043 [IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
1044 [IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
1045 [IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
1046 };
1047
1048 if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
1049 pr_err("Invalid priority value %d\n", flow_attr->priority);
1050 return -EINVAL;
1051 }
1052
1053 if (domain >= IB_FLOW_DOMAIN_NUM) {
1054 pr_err("Invalid domain value %d\n", domain);
1055 return -EINVAL;
1056 }
1057
1058 if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
1059 return -EINVAL;
1060
1061 mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
1062 if (IS_ERR(mailbox))
1063 return PTR_ERR(mailbox);
1064 ctrl = mailbox->buf;
1065
1066 ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
1067 flow_attr->priority);
1068 ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
1069 ctrl->port = flow_attr->port;
1070 ctrl->qpn = cpu_to_be32(qp->qp_num);
1071
1072 ib_flow = flow_attr + 1;
1073 size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
1074 /* Add default flows */
1075 default_flow = __mlx4_ib_default_rules_match(qp, flow_attr);
1076 if (default_flow >= 0) {
1077 ret = __mlx4_ib_create_default_rules(
1078 mdev, qp, default_table + default_flow,
1079 mailbox->buf + size);
1080 if (ret < 0) {
1081 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1082 return -EINVAL;
1083 }
1084 size += ret;
1085 }
1086 for (i = 0; i < flow_attr->num_of_specs; i++) {
1087 ret = parse_flow_attr(mdev->dev, qp->qp_num, ib_flow,
1088 mailbox->buf + size);
1089 if (ret < 0) {
1090 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1091 return -EINVAL;
1092 }
1093 ib_flow += ((union ib_flow_spec *) ib_flow)->size;
1094 size += ret;
1095 }
1096
1097 ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
1098 MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
1099 MLX4_CMD_NATIVE);
1100 if (ret == -ENOMEM)
1101 pr_err("mcg table is full. Fail to register network rule.\n");
1102 else if (ret == -ENXIO)
1103 pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
1104 else if (ret)
1105 pr_err("Invalid argumant. Fail to register network rule.\n");
1106
1107 mlx4_free_cmd_mailbox(mdev->dev, mailbox);
1108 return ret;
1109 }
1110
1111 static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
1112 {
1113 int err;
1114 err = mlx4_cmd(dev, reg_id, 0, 0,
1115 MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
1116 MLX4_CMD_NATIVE);
1117 if (err)
1118 pr_err("Fail to detach network rule. registration id = 0x%llx\n",
1119 reg_id);
1120 return err;
1121 }
1122
1123 static int mlx4_ib_tunnel_steer_add(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
1124 u64 *reg_id)
1125 {
1126 void *ib_flow;
1127 union ib_flow_spec *ib_spec;
1128 struct mlx4_dev *dev = to_mdev(qp->device)->dev;
1129 int err = 0;
1130
1131 if (dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
1132 dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
1133 return 0; /* do nothing */
1134
1135 ib_flow = flow_attr + 1;
1136 ib_spec = (union ib_flow_spec *)ib_flow;
1137
1138 if (ib_spec->type != IB_FLOW_SPEC_ETH || flow_attr->num_of_specs != 1)
1139 return 0; /* do nothing */
1140
1141 err = mlx4_tunnel_steer_add(to_mdev(qp->device)->dev, ib_spec->eth.val.dst_mac,
1142 flow_attr->port, qp->qp_num,
1143 MLX4_DOMAIN_UVERBS | (flow_attr->priority & 0xff),
1144 reg_id);
1145 return err;
1146 }
1147
1148 static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
1149 struct ib_flow_attr *flow_attr,
1150 int domain)
1151 {
1152 int err = 0, i = 0, j = 0;
1153 struct mlx4_ib_flow *mflow;
1154 enum mlx4_net_trans_promisc_mode type[2];
1155 struct mlx4_dev *dev = (to_mdev(qp->device))->dev;
1156 int is_bonded = mlx4_is_bonded(dev);
1157
1158 memset(type, 0, sizeof(type));
1159
1160 mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
1161 if (!mflow) {
1162 err = -ENOMEM;
1163 goto err_free;
1164 }
1165
1166 switch (flow_attr->type) {
1167 case IB_FLOW_ATTR_NORMAL:
1168 type[0] = MLX4_FS_REGULAR;
1169 break;
1170
1171 case IB_FLOW_ATTR_ALL_DEFAULT:
1172 type[0] = MLX4_FS_ALL_DEFAULT;
1173 break;
1174
1175 case IB_FLOW_ATTR_MC_DEFAULT:
1176 type[0] = MLX4_FS_MC_DEFAULT;
1177 break;
1178
1179 case IB_FLOW_ATTR_SNIFFER:
1180 type[0] = MLX4_FS_UC_SNIFFER;
1181 type[1] = MLX4_FS_MC_SNIFFER;
1182 break;
1183
1184 default:
1185 err = -EINVAL;
1186 goto err_free;
1187 }
1188
1189 while (i < ARRAY_SIZE(type) && type[i]) {
1190 err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
1191 &mflow->reg_id[i].id);
1192 if (err)
1193 goto err_create_flow;
1194 if (is_bonded) {
1195 /* Application always sees one port so the mirror rule
1196 * must be on port #2
1197 */
1198 flow_attr->port = 2;
1199 err = __mlx4_ib_create_flow(qp, flow_attr,
1200 domain, type[j],
1201 &mflow->reg_id[j].mirror);
1202 flow_attr->port = 1;
1203 if (err)
1204 goto err_create_flow;
1205 j++;
1206 }
1207
1208 i++;
1209 }
1210
1211 if (i < ARRAY_SIZE(type) && flow_attr->type == IB_FLOW_ATTR_NORMAL) {
1212 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1213 &mflow->reg_id[i].id);
1214 if (err)
1215 goto err_create_flow;
1216
1217 if (is_bonded) {
1218 flow_attr->port = 2;
1219 err = mlx4_ib_tunnel_steer_add(qp, flow_attr,
1220 &mflow->reg_id[j].mirror);
1221 flow_attr->port = 1;
1222 if (err)
1223 goto err_create_flow;
1224 j++;
1225 }
1226 /* function to create mirror rule */
1227 i++;
1228 }
1229
1230 return &mflow->ibflow;
1231
1232 err_create_flow:
1233 while (i) {
1234 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1235 mflow->reg_id[i].id);
1236 i--;
1237 }
1238
1239 while (j) {
1240 (void)__mlx4_ib_destroy_flow(to_mdev(qp->device)->dev,
1241 mflow->reg_id[j].mirror);
1242 j--;
1243 }
1244 err_free:
1245 kfree(mflow);
1246 return ERR_PTR(err);
1247 }
1248
1249 static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
1250 {
1251 int err, ret = 0;
1252 int i = 0;
1253 struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
1254 struct mlx4_ib_flow *mflow = to_mflow(flow_id);
1255
1256 while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i].id) {
1257 err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i].id);
1258 if (err)
1259 ret = err;
1260 if (mflow->reg_id[i].mirror) {
1261 err = __mlx4_ib_destroy_flow(mdev->dev,
1262 mflow->reg_id[i].mirror);
1263 if (err)
1264 ret = err;
1265 }
1266 i++;
1267 }
1268
1269 kfree(mflow);
1270 return ret;
1271 }
1272
1273 static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1274 {
1275 int err;
1276 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1277 struct mlx4_dev *dev = mdev->dev;
1278 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1279 struct mlx4_ib_steering *ib_steering = NULL;
1280 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1281 struct mlx4_flow_reg_id reg_id;
1282
1283 if (mdev->dev->caps.steering_mode ==
1284 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1285 ib_steering = kmalloc(sizeof(*ib_steering), GFP_KERNEL);
1286 if (!ib_steering)
1287 return -ENOMEM;
1288 }
1289
1290 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw, mqp->port,
1291 !!(mqp->flags &
1292 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1293 prot, &reg_id.id);
1294 if (err) {
1295 pr_err("multicast attach op failed, err %d\n", err);
1296 goto err_malloc;
1297 }
1298
1299 reg_id.mirror = 0;
1300 if (mlx4_is_bonded(dev)) {
1301 err = mlx4_multicast_attach(mdev->dev, &mqp->mqp, gid->raw,
1302 (mqp->port == 1) ? 2 : 1,
1303 !!(mqp->flags &
1304 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1305 prot, &reg_id.mirror);
1306 if (err)
1307 goto err_add;
1308 }
1309
1310 err = add_gid_entry(ibqp, gid);
1311 if (err)
1312 goto err_add;
1313
1314 if (ib_steering) {
1315 memcpy(ib_steering->gid.raw, gid->raw, 16);
1316 ib_steering->reg_id = reg_id;
1317 mutex_lock(&mqp->mutex);
1318 list_add(&ib_steering->list, &mqp->steering_rules);
1319 mutex_unlock(&mqp->mutex);
1320 }
1321 return 0;
1322
1323 err_add:
1324 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1325 prot, reg_id.id);
1326 if (reg_id.mirror)
1327 mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1328 prot, reg_id.mirror);
1329 err_malloc:
1330 kfree(ib_steering);
1331
1332 return err;
1333 }
1334
1335 static struct mlx4_ib_gid_entry *find_gid_entry(struct mlx4_ib_qp *qp, u8 *raw)
1336 {
1337 struct mlx4_ib_gid_entry *ge;
1338 struct mlx4_ib_gid_entry *tmp;
1339 struct mlx4_ib_gid_entry *ret = NULL;
1340
1341 list_for_each_entry_safe(ge, tmp, &qp->gid_list, list) {
1342 if (!memcmp(raw, ge->gid.raw, 16)) {
1343 ret = ge;
1344 break;
1345 }
1346 }
1347
1348 return ret;
1349 }
1350
1351 static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1352 {
1353 int err;
1354 struct mlx4_ib_dev *mdev = to_mdev(ibqp->device);
1355 struct mlx4_dev *dev = mdev->dev;
1356 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1357 struct net_device *ndev;
1358 struct mlx4_ib_gid_entry *ge;
1359 struct mlx4_flow_reg_id reg_id = {0, 0};
1360 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1361
1362 if (mdev->dev->caps.steering_mode ==
1363 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1364 struct mlx4_ib_steering *ib_steering;
1365
1366 mutex_lock(&mqp->mutex);
1367 list_for_each_entry(ib_steering, &mqp->steering_rules, list) {
1368 if (!memcmp(ib_steering->gid.raw, gid->raw, 16)) {
1369 list_del(&ib_steering->list);
1370 break;
1371 }
1372 }
1373 mutex_unlock(&mqp->mutex);
1374 if (&ib_steering->list == &mqp->steering_rules) {
1375 pr_err("Couldn't find reg_id for mgid. Steering rule is left attached\n");
1376 return -EINVAL;
1377 }
1378 reg_id = ib_steering->reg_id;
1379 kfree(ib_steering);
1380 }
1381
1382 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1383 prot, reg_id.id);
1384 if (err)
1385 return err;
1386
1387 if (mlx4_is_bonded(dev)) {
1388 err = mlx4_multicast_detach(mdev->dev, &mqp->mqp, gid->raw,
1389 prot, reg_id.mirror);
1390 if (err)
1391 return err;
1392 }
1393
1394 mutex_lock(&mqp->mutex);
1395 ge = find_gid_entry(mqp, gid->raw);
1396 if (ge) {
1397 spin_lock_bh(&mdev->iboe.lock);
1398 ndev = ge->added ? mdev->iboe.netdevs[ge->port - 1] : NULL;
1399 if (ndev)
1400 dev_hold(ndev);
1401 spin_unlock_bh(&mdev->iboe.lock);
1402 if (ndev)
1403 dev_put(ndev);
1404 list_del(&ge->list);
1405 kfree(ge);
1406 } else
1407 pr_warn("could not find mgid entry\n");
1408
1409 mutex_unlock(&mqp->mutex);
1410
1411 return 0;
1412 }
1413
1414 static int init_node_data(struct mlx4_ib_dev *dev)
1415 {
1416 struct ib_smp *in_mad = NULL;
1417 struct ib_smp *out_mad = NULL;
1418 int mad_ifc_flags = MLX4_MAD_IFC_IGNORE_KEYS;
1419 int err = -ENOMEM;
1420
1421 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1422 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1423 if (!in_mad || !out_mad)
1424 goto out;
1425
1426 init_query_mad(in_mad);
1427 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
1428 if (mlx4_is_master(dev->dev))
1429 mad_ifc_flags |= MLX4_MAD_IFC_NET_VIEW;
1430
1431 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
1432 if (err)
1433 goto out;
1434
1435 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1436
1437 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1438
1439 err = mlx4_MAD_IFC(dev, mad_ifc_flags, 1, NULL, NULL, in_mad, out_mad);
1440 if (err)
1441 goto out;
1442
1443 dev->dev->rev_id = be32_to_cpup((__be32 *) (out_mad->data + 32));
1444 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1445
1446 out:
1447 kfree(in_mad);
1448 kfree(out_mad);
1449 return err;
1450 }
1451
1452 static ssize_t show_hca(struct device *device, struct device_attribute *attr,
1453 char *buf)
1454 {
1455 struct mlx4_ib_dev *dev =
1456 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1457 return sprintf(buf, "MT%d\n", dev->dev->persist->pdev->device);
1458 }
1459
1460 static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
1461 char *buf)
1462 {
1463 struct mlx4_ib_dev *dev =
1464 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1465 return sprintf(buf, "%d.%d.%d\n", (int) (dev->dev->caps.fw_ver >> 32),
1466 (int) (dev->dev->caps.fw_ver >> 16) & 0xffff,
1467 (int) dev->dev->caps.fw_ver & 0xffff);
1468 }
1469
1470 static ssize_t show_rev(struct device *device, struct device_attribute *attr,
1471 char *buf)
1472 {
1473 struct mlx4_ib_dev *dev =
1474 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1475 return sprintf(buf, "%x\n", dev->dev->rev_id);
1476 }
1477
1478 static ssize_t show_board(struct device *device, struct device_attribute *attr,
1479 char *buf)
1480 {
1481 struct mlx4_ib_dev *dev =
1482 container_of(device, struct mlx4_ib_dev, ib_dev.dev);
1483 return sprintf(buf, "%.*s\n", MLX4_BOARD_ID_LEN,
1484 dev->dev->board_id);
1485 }
1486
1487 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1488 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1489 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1490 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
1491
1492 static struct device_attribute *mlx4_class_attributes[] = {
1493 &dev_attr_hw_rev,
1494 &dev_attr_fw_ver,
1495 &dev_attr_hca_type,
1496 &dev_attr_board_id
1497 };
1498
1499 static void mlx4_addrconf_ifid_eui48(u8 *eui, u16 vlan_id,
1500 struct net_device *dev)
1501 {
1502 memcpy(eui, dev->dev_addr, 3);
1503 memcpy(eui + 5, dev->dev_addr + 3, 3);
1504 if (vlan_id < 0x1000) {
1505 eui[3] = vlan_id >> 8;
1506 eui[4] = vlan_id & 0xff;
1507 } else {
1508 eui[3] = 0xff;
1509 eui[4] = 0xfe;
1510 }
1511 eui[0] ^= 2;
1512 }
1513
1514 static void update_gids_task(struct work_struct *work)
1515 {
1516 struct update_gid_work *gw = container_of(work, struct update_gid_work, work);
1517 struct mlx4_cmd_mailbox *mailbox;
1518 union ib_gid *gids;
1519 int err;
1520 struct mlx4_dev *dev = gw->dev->dev;
1521 int is_bonded = mlx4_is_bonded(dev);
1522
1523 if (!gw->dev->ib_active)
1524 return;
1525
1526 mailbox = mlx4_alloc_cmd_mailbox(dev);
1527 if (IS_ERR(mailbox)) {
1528 pr_warn("update gid table failed %ld\n", PTR_ERR(mailbox));
1529 return;
1530 }
1531
1532 gids = mailbox->buf;
1533 memcpy(gids, gw->gids, sizeof gw->gids);
1534
1535 err = mlx4_cmd(dev, mailbox->dma, MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
1536 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT,
1537 MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
1538 if (err)
1539 pr_warn("set port command failed\n");
1540 else
1541 if ((gw->port == 1) || !is_bonded)
1542 mlx4_ib_dispatch_event(gw->dev,
1543 is_bonded ? 1 : gw->port,
1544 IB_EVENT_GID_CHANGE);
1545
1546 mlx4_free_cmd_mailbox(dev, mailbox);
1547 kfree(gw);
1548 }
1549
1550 static void reset_gids_task(struct work_struct *work)
1551 {
1552 struct update_gid_work *gw =
1553 container_of(work, struct update_gid_work, work);
1554 struct mlx4_cmd_mailbox *mailbox;
1555 union ib_gid *gids;
1556 int err;
1557 struct mlx4_dev *dev = gw->dev->dev;
1558
1559 if (!gw->dev->ib_active)
1560 return;
1561
1562 mailbox = mlx4_alloc_cmd_mailbox(dev);
1563 if (IS_ERR(mailbox)) {
1564 pr_warn("reset gid table failed\n");
1565 goto free;
1566 }
1567
1568 gids = mailbox->buf;
1569 memcpy(gids, gw->gids, sizeof(gw->gids));
1570
1571 if (mlx4_ib_port_link_layer(&gw->dev->ib_dev, gw->port) ==
1572 IB_LINK_LAYER_ETHERNET) {
1573 err = mlx4_cmd(dev, mailbox->dma,
1574 MLX4_SET_PORT_GID_TABLE << 8 | gw->port,
1575 MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT,
1576 MLX4_CMD_TIME_CLASS_B,
1577 MLX4_CMD_WRAPPED);
1578 if (err)
1579 pr_warn("set port %d command failed\n", gw->port);
1580 }
1581
1582 mlx4_free_cmd_mailbox(dev, mailbox);
1583 free:
1584 kfree(gw);
1585 }
1586
1587 static int update_gid_table(struct mlx4_ib_dev *dev, int port,
1588 union ib_gid *gid, int clear,
1589 int default_gid)
1590 {
1591 struct update_gid_work *work;
1592 int i;
1593 int need_update = 0;
1594 int free = -1;
1595 int found = -1;
1596 int max_gids;
1597
1598 if (default_gid) {
1599 free = 0;
1600 } else {
1601 max_gids = dev->dev->caps.gid_table_len[port];
1602 for (i = 1; i < max_gids; ++i) {
1603 if (!memcmp(&dev->iboe.gid_table[port - 1][i], gid,
1604 sizeof(*gid)))
1605 found = i;
1606
1607 if (clear) {
1608 if (found >= 0) {
1609 need_update = 1;
1610 dev->iboe.gid_table[port - 1][found] =
1611 zgid;
1612 break;
1613 }
1614 } else {
1615 if (found >= 0)
1616 break;
1617
1618 if (free < 0 &&
1619 !memcmp(&dev->iboe.gid_table[port - 1][i],
1620 &zgid, sizeof(*gid)))
1621 free = i;
1622 }
1623 }
1624 }
1625
1626 if (found == -1 && !clear && free >= 0) {
1627 dev->iboe.gid_table[port - 1][free] = *gid;
1628 need_update = 1;
1629 }
1630
1631 if (!need_update)
1632 return 0;
1633
1634 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1635 if (!work)
1636 return -ENOMEM;
1637
1638 memcpy(work->gids, dev->iboe.gid_table[port - 1], sizeof(work->gids));
1639 INIT_WORK(&work->work, update_gids_task);
1640 work->port = port;
1641 work->dev = dev;
1642 queue_work(wq, &work->work);
1643
1644 return 0;
1645 }
1646
1647 static void mlx4_make_default_gid(struct net_device *dev, union ib_gid *gid)
1648 {
1649 gid->global.subnet_prefix = cpu_to_be64(0xfe80000000000000LL);
1650 mlx4_addrconf_ifid_eui48(&gid->raw[8], 0xffff, dev);
1651 }
1652
1653
1654 static int reset_gid_table(struct mlx4_ib_dev *dev, u8 port)
1655 {
1656 struct update_gid_work *work;
1657
1658 work = kzalloc(sizeof(*work), GFP_ATOMIC);
1659 if (!work)
1660 return -ENOMEM;
1661
1662 memset(dev->iboe.gid_table[port - 1], 0, sizeof(work->gids));
1663 memset(work->gids, 0, sizeof(work->gids));
1664 INIT_WORK(&work->work, reset_gids_task);
1665 work->dev = dev;
1666 work->port = port;
1667 queue_work(wq, &work->work);
1668 return 0;
1669 }
1670
1671 static int mlx4_ib_addr_event(int event, struct net_device *event_netdev,
1672 struct mlx4_ib_dev *ibdev, union ib_gid *gid)
1673 {
1674 struct mlx4_ib_iboe *iboe;
1675 int port = 0;
1676 struct net_device *real_dev = rdma_vlan_dev_real_dev(event_netdev) ?
1677 rdma_vlan_dev_real_dev(event_netdev) :
1678 event_netdev;
1679 union ib_gid default_gid;
1680
1681 mlx4_make_default_gid(real_dev, &default_gid);
1682
1683 if (!memcmp(gid, &default_gid, sizeof(*gid)))
1684 return 0;
1685
1686 if (event != NETDEV_DOWN && event != NETDEV_UP)
1687 return 0;
1688
1689 if ((real_dev != event_netdev) &&
1690 (event == NETDEV_DOWN) &&
1691 rdma_link_local_addr((struct in6_addr *)gid))
1692 return 0;
1693
1694 iboe = &ibdev->iboe;
1695 spin_lock_bh(&iboe->lock);
1696
1697 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
1698 if ((netif_is_bond_master(real_dev) &&
1699 (real_dev == iboe->masters[port - 1])) ||
1700 (!netif_is_bond_master(real_dev) &&
1701 (real_dev == iboe->netdevs[port - 1])))
1702 update_gid_table(ibdev, port, gid,
1703 event == NETDEV_DOWN, 0);
1704
1705 spin_unlock_bh(&iboe->lock);
1706 return 0;
1707
1708 }
1709
1710 static u8 mlx4_ib_get_dev_port(struct net_device *dev,
1711 struct mlx4_ib_dev *ibdev)
1712 {
1713 u8 port = 0;
1714 struct mlx4_ib_iboe *iboe;
1715 struct net_device *real_dev = rdma_vlan_dev_real_dev(dev) ?
1716 rdma_vlan_dev_real_dev(dev) : dev;
1717
1718 iboe = &ibdev->iboe;
1719
1720 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port)
1721 if ((netif_is_bond_master(real_dev) &&
1722 (real_dev == iboe->masters[port - 1])) ||
1723 (!netif_is_bond_master(real_dev) &&
1724 (real_dev == iboe->netdevs[port - 1])))
1725 break;
1726
1727 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
1728 return 0;
1729 else
1730 return port;
1731 }
1732
1733 static int mlx4_ib_inet_event(struct notifier_block *this, unsigned long event,
1734 void *ptr)
1735 {
1736 struct mlx4_ib_dev *ibdev;
1737 struct in_ifaddr *ifa = ptr;
1738 union ib_gid gid;
1739 struct net_device *event_netdev = ifa->ifa_dev->dev;
1740
1741 ipv6_addr_set_v4mapped(ifa->ifa_address, (struct in6_addr *)&gid);
1742
1743 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet);
1744
1745 mlx4_ib_addr_event(event, event_netdev, ibdev, &gid);
1746 return NOTIFY_DONE;
1747 }
1748
1749 #if IS_ENABLED(CONFIG_IPV6)
1750 static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event,
1751 void *ptr)
1752 {
1753 struct mlx4_ib_dev *ibdev;
1754 struct inet6_ifaddr *ifa = ptr;
1755 union ib_gid *gid = (union ib_gid *)&ifa->addr;
1756 struct net_device *event_netdev = ifa->idev->dev;
1757
1758 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb_inet6);
1759
1760 mlx4_ib_addr_event(event, event_netdev, ibdev, gid);
1761 return NOTIFY_DONE;
1762 }
1763 #endif
1764
1765 #define MLX4_IB_INVALID_MAC ((u64)-1)
1766 static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev,
1767 struct net_device *dev,
1768 int port)
1769 {
1770 u64 new_smac = 0;
1771 u64 release_mac = MLX4_IB_INVALID_MAC;
1772 struct mlx4_ib_qp *qp;
1773
1774 read_lock(&dev_base_lock);
1775 new_smac = mlx4_mac_to_u64(dev->dev_addr);
1776 read_unlock(&dev_base_lock);
1777
1778 atomic64_set(&ibdev->iboe.mac[port - 1], new_smac);
1779
1780 /* no need for update QP1 and mac registration in non-SRIOV */
1781 if (!mlx4_is_mfunc(ibdev->dev))
1782 return;
1783
1784 mutex_lock(&ibdev->qp1_proxy_lock[port - 1]);
1785 qp = ibdev->qp1_proxy[port - 1];
1786 if (qp) {
1787 int new_smac_index;
1788 u64 old_smac;
1789 struct mlx4_update_qp_params update_params;
1790
1791 mutex_lock(&qp->mutex);
1792 old_smac = qp->pri.smac;
1793 if (new_smac == old_smac)
1794 goto unlock;
1795
1796 new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac);
1797
1798 if (new_smac_index < 0)
1799 goto unlock;
1800
1801 update_params.smac_index = new_smac_index;
1802 if (mlx4_update_qp(ibdev->dev, qp->mqp.qpn, MLX4_UPDATE_QP_SMAC,
1803 &update_params)) {
1804 release_mac = new_smac;
1805 goto unlock;
1806 }
1807 /* if old port was zero, no mac was yet registered for this QP */
1808 if (qp->pri.smac_port)
1809 release_mac = old_smac;
1810 qp->pri.smac = new_smac;
1811 qp->pri.smac_port = port;
1812 qp->pri.smac_index = new_smac_index;
1813 }
1814
1815 unlock:
1816 if (release_mac != MLX4_IB_INVALID_MAC)
1817 mlx4_unregister_mac(ibdev->dev, port, release_mac);
1818 if (qp)
1819 mutex_unlock(&qp->mutex);
1820 mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]);
1821 }
1822
1823 static void mlx4_ib_get_dev_addr(struct net_device *dev,
1824 struct mlx4_ib_dev *ibdev, u8 port)
1825 {
1826 struct in_device *in_dev;
1827 #if IS_ENABLED(CONFIG_IPV6)
1828 struct inet6_dev *in6_dev;
1829 union ib_gid *pgid;
1830 struct inet6_ifaddr *ifp;
1831 union ib_gid default_gid;
1832 #endif
1833 union ib_gid gid;
1834
1835
1836 if ((port == 0) || (port > ibdev->dev->caps.num_ports))
1837 return;
1838
1839 /* IPv4 gids */
1840 in_dev = in_dev_get(dev);
1841 if (in_dev) {
1842 for_ifa(in_dev) {
1843 /*ifa->ifa_address;*/
1844 ipv6_addr_set_v4mapped(ifa->ifa_address,
1845 (struct in6_addr *)&gid);
1846 update_gid_table(ibdev, port, &gid, 0, 0);
1847 }
1848 endfor_ifa(in_dev);
1849 in_dev_put(in_dev);
1850 }
1851 #if IS_ENABLED(CONFIG_IPV6)
1852 mlx4_make_default_gid(dev, &default_gid);
1853 /* IPv6 gids */
1854 in6_dev = in6_dev_get(dev);
1855 if (in6_dev) {
1856 read_lock_bh(&in6_dev->lock);
1857 list_for_each_entry(ifp, &in6_dev->addr_list, if_list) {
1858 pgid = (union ib_gid *)&ifp->addr;
1859 if (!memcmp(pgid, &default_gid, sizeof(*pgid)))
1860 continue;
1861 update_gid_table(ibdev, port, pgid, 0, 0);
1862 }
1863 read_unlock_bh(&in6_dev->lock);
1864 in6_dev_put(in6_dev);
1865 }
1866 #endif
1867 }
1868
1869 static void mlx4_ib_set_default_gid(struct mlx4_ib_dev *ibdev,
1870 struct net_device *dev, u8 port)
1871 {
1872 union ib_gid gid;
1873 mlx4_make_default_gid(dev, &gid);
1874 update_gid_table(ibdev, port, &gid, 0, 1);
1875 }
1876
1877 static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev)
1878 {
1879 struct net_device *dev;
1880 struct mlx4_ib_iboe *iboe = &ibdev->iboe;
1881 int i;
1882 int err = 0;
1883
1884 for (i = 1; i <= ibdev->num_ports; ++i) {
1885 if (rdma_port_get_link_layer(&ibdev->ib_dev, i) ==
1886 IB_LINK_LAYER_ETHERNET) {
1887 err = reset_gid_table(ibdev, i);
1888 if (err)
1889 goto out;
1890 }
1891 }
1892
1893 read_lock(&dev_base_lock);
1894 spin_lock_bh(&iboe->lock);
1895
1896 for_each_netdev(&init_net, dev) {
1897 u8 port = mlx4_ib_get_dev_port(dev, ibdev);
1898 /* port will be non-zero only for ETH ports */
1899 if (port) {
1900 mlx4_ib_set_default_gid(ibdev, dev, port);
1901 mlx4_ib_get_dev_addr(dev, ibdev, port);
1902 }
1903 }
1904
1905 spin_unlock_bh(&iboe->lock);
1906 read_unlock(&dev_base_lock);
1907 out:
1908 return err;
1909 }
1910
1911 static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev,
1912 struct net_device *dev,
1913 unsigned long event)
1914
1915 {
1916 struct mlx4_ib_iboe *iboe;
1917 int update_qps_port = -1;
1918 int port;
1919
1920 iboe = &ibdev->iboe;
1921
1922 spin_lock_bh(&iboe->lock);
1923 mlx4_foreach_ib_transport_port(port, ibdev->dev) {
1924 enum ib_port_state port_state = IB_PORT_NOP;
1925 struct net_device *old_master = iboe->masters[port - 1];
1926 struct net_device *curr_netdev;
1927 struct net_device *curr_master;
1928
1929 iboe->netdevs[port - 1] =
1930 mlx4_get_protocol_dev(ibdev->dev, MLX4_PROT_ETH, port);
1931 if (iboe->netdevs[port - 1])
1932 mlx4_ib_set_default_gid(ibdev,
1933 iboe->netdevs[port - 1], port);
1934 curr_netdev = iboe->netdevs[port - 1];
1935
1936 if (iboe->netdevs[port - 1] &&
1937 netif_is_bond_slave(iboe->netdevs[port - 1])) {
1938 iboe->masters[port - 1] = netdev_master_upper_dev_get(
1939 iboe->netdevs[port - 1]);
1940 } else {
1941 iboe->masters[port - 1] = NULL;
1942 }
1943 curr_master = iboe->masters[port - 1];
1944
1945 if (dev == iboe->netdevs[port - 1] &&
1946 (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER ||
1947 event == NETDEV_UP || event == NETDEV_CHANGE))
1948 update_qps_port = port;
1949
1950 if (curr_netdev) {
1951 port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ?
1952 IB_PORT_ACTIVE : IB_PORT_DOWN;
1953 mlx4_ib_set_default_gid(ibdev, curr_netdev, port);
1954 if (curr_master) {
1955 /* if using bonding/team and a slave port is down, we
1956 * don't want the bond IP based gids in the table since
1957 * flows that select port by gid may get the down port.
1958 */
1959 if (port_state == IB_PORT_DOWN &&
1960 !mlx4_is_bonded(ibdev->dev)) {
1961 reset_gid_table(ibdev, port);
1962 mlx4_ib_set_default_gid(ibdev,
1963 curr_netdev,
1964 port);
1965 } else {
1966 /* gids from the upper dev (bond/team)
1967 * should appear in port's gid table
1968 */
1969 mlx4_ib_get_dev_addr(curr_master,
1970 ibdev, port);
1971 }
1972 }
1973 /* if bonding is used it is possible that we add it to
1974 * masters only after IP address is assigned to the
1975 * net bonding interface.
1976 */
1977 if (curr_master && (old_master != curr_master)) {
1978 reset_gid_table(ibdev, port);
1979 mlx4_ib_set_default_gid(ibdev,
1980 curr_netdev, port);
1981 mlx4_ib_get_dev_addr(curr_master, ibdev, port);
1982 }
1983
1984 if (!curr_master && (old_master != curr_master)) {
1985 reset_gid_table(ibdev, port);
1986 mlx4_ib_set_default_gid(ibdev,
1987 curr_netdev, port);
1988 mlx4_ib_get_dev_addr(curr_netdev, ibdev, port);
1989 }
1990 } else {
1991 reset_gid_table(ibdev, port);
1992 }
1993 }
1994
1995 spin_unlock_bh(&iboe->lock);
1996
1997 if (update_qps_port > 0)
1998 mlx4_ib_update_qps(ibdev, dev, update_qps_port);
1999 }
2000
2001 static int mlx4_ib_netdev_event(struct notifier_block *this,
2002 unsigned long event, void *ptr)
2003 {
2004 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
2005 struct mlx4_ib_dev *ibdev;
2006
2007 if (!net_eq(dev_net(dev), &init_net))
2008 return NOTIFY_DONE;
2009
2010 ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb);
2011 mlx4_ib_scan_netdevs(ibdev, dev, event);
2012
2013 return NOTIFY_DONE;
2014 }
2015
2016 static void init_pkeys(struct mlx4_ib_dev *ibdev)
2017 {
2018 int port;
2019 int slave;
2020 int i;
2021
2022 if (mlx4_is_master(ibdev->dev)) {
2023 for (slave = 0; slave <= ibdev->dev->persist->num_vfs;
2024 ++slave) {
2025 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2026 for (i = 0;
2027 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2028 ++i) {
2029 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i] =
2030 /* master has the identity virt2phys pkey mapping */
2031 (slave == mlx4_master_func_num(ibdev->dev) || !i) ? i :
2032 ibdev->dev->phys_caps.pkey_phys_table_len[port] - 1;
2033 mlx4_sync_pkey_table(ibdev->dev, slave, port, i,
2034 ibdev->pkeys.virt2phys_pkey[slave][port - 1][i]);
2035 }
2036 }
2037 }
2038 /* initialize pkey cache */
2039 for (port = 1; port <= ibdev->dev->caps.num_ports; ++port) {
2040 for (i = 0;
2041 i < ibdev->dev->phys_caps.pkey_phys_table_len[port];
2042 ++i)
2043 ibdev->pkeys.phys_pkey_cache[port-1][i] =
2044 (i) ? 0 : 0xFFFF;
2045 }
2046 }
2047 }
2048
2049 static void mlx4_ib_alloc_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2050 {
2051 char name[80];
2052 int eq_per_port = 0;
2053 int added_eqs = 0;
2054 int total_eqs = 0;
2055 int i, j, eq;
2056
2057 /* Legacy mode or comp_pool is not large enough */
2058 if (dev->caps.comp_pool == 0 ||
2059 dev->caps.num_ports > dev->caps.comp_pool)
2060 return;
2061
2062 eq_per_port = dev->caps.comp_pool / dev->caps.num_ports;
2063
2064 /* Init eq table */
2065 added_eqs = 0;
2066 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2067 added_eqs += eq_per_port;
2068
2069 total_eqs = dev->caps.num_comp_vectors + added_eqs;
2070
2071 ibdev->eq_table = kzalloc(total_eqs * sizeof(int), GFP_KERNEL);
2072 if (!ibdev->eq_table)
2073 return;
2074
2075 ibdev->eq_added = added_eqs;
2076
2077 eq = 0;
2078 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) {
2079 for (j = 0; j < eq_per_port; j++) {
2080 snprintf(name, sizeof(name), "mlx4-ib-%d-%d@%s",
2081 i, j, dev->persist->pdev->bus->name);
2082 /* Set IRQ for specific name (per ring) */
2083 if (mlx4_assign_eq(dev, name, NULL,
2084 &ibdev->eq_table[eq])) {
2085 /* Use legacy (same as mlx4_en driver) */
2086 pr_warn("Can't allocate EQ %d; reverting to legacy\n", eq);
2087 ibdev->eq_table[eq] =
2088 (eq % dev->caps.num_comp_vectors);
2089 }
2090 eq++;
2091 }
2092 }
2093
2094 /* Fill the reset of the vector with legacy EQ */
2095 for (i = 0, eq = added_eqs; i < dev->caps.num_comp_vectors; i++)
2096 ibdev->eq_table[eq++] = i;
2097
2098 /* Advertise the new number of EQs to clients */
2099 ibdev->ib_dev.num_comp_vectors = total_eqs;
2100 }
2101
2102 static void mlx4_ib_free_eqs(struct mlx4_dev *dev, struct mlx4_ib_dev *ibdev)
2103 {
2104 int i;
2105
2106 /* no additional eqs were added */
2107 if (!ibdev->eq_table)
2108 return;
2109
2110 /* Reset the advertised EQ number */
2111 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2112
2113 /* Free only the added eqs */
2114 for (i = 0; i < ibdev->eq_added; i++) {
2115 /* Don't free legacy eqs if used */
2116 if (ibdev->eq_table[i] <= dev->caps.num_comp_vectors)
2117 continue;
2118 mlx4_release_eq(dev, ibdev->eq_table[i]);
2119 }
2120
2121 kfree(ibdev->eq_table);
2122 }
2123
2124 static int mlx4_port_immutable(struct ib_device *ibdev, u8 port_num,
2125 struct ib_port_immutable *immutable)
2126 {
2127 struct ib_port_attr attr;
2128 int err;
2129
2130 err = mlx4_ib_query_port(ibdev, port_num, &attr);
2131 if (err)
2132 return err;
2133
2134 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2135 immutable->gid_tbl_len = attr.gid_tbl_len;
2136
2137 if (mlx4_ib_port_link_layer(ibdev, port_num) == IB_LINK_LAYER_INFINIBAND)
2138 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_IB;
2139 else
2140 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
2141
2142 return 0;
2143 }
2144
2145 static void *mlx4_ib_add(struct mlx4_dev *dev)
2146 {
2147 struct mlx4_ib_dev *ibdev;
2148 int num_ports = 0;
2149 int i, j;
2150 int err;
2151 struct mlx4_ib_iboe *iboe;
2152 int ib_num_ports = 0;
2153 int num_req_counters;
2154
2155 pr_info_once("%s", mlx4_ib_version);
2156
2157 num_ports = 0;
2158 mlx4_foreach_ib_transport_port(i, dev)
2159 num_ports++;
2160
2161 /* No point in registering a device with no ports... */
2162 if (num_ports == 0)
2163 return NULL;
2164
2165 ibdev = (struct mlx4_ib_dev *) ib_alloc_device(sizeof *ibdev);
2166 if (!ibdev) {
2167 dev_err(&dev->persist->pdev->dev,
2168 "Device struct alloc failed\n");
2169 return NULL;
2170 }
2171
2172 iboe = &ibdev->iboe;
2173
2174 if (mlx4_pd_alloc(dev, &ibdev->priv_pdn))
2175 goto err_dealloc;
2176
2177 if (mlx4_uar_alloc(dev, &ibdev->priv_uar))
2178 goto err_pd;
2179
2180 ibdev->uar_map = ioremap((phys_addr_t) ibdev->priv_uar.pfn << PAGE_SHIFT,
2181 PAGE_SIZE);
2182 if (!ibdev->uar_map)
2183 goto err_uar;
2184 MLX4_INIT_DOORBELL_LOCK(&ibdev->uar_lock);
2185
2186 ibdev->dev = dev;
2187 ibdev->bond_next_port = 0;
2188
2189 strlcpy(ibdev->ib_dev.name, "mlx4_%d", IB_DEVICE_NAME_MAX);
2190 ibdev->ib_dev.owner = THIS_MODULE;
2191 ibdev->ib_dev.node_type = RDMA_NODE_IB_CA;
2192 ibdev->ib_dev.local_dma_lkey = dev->caps.reserved_lkey;
2193 ibdev->num_ports = num_ports;
2194 ibdev->ib_dev.phys_port_cnt = mlx4_is_bonded(dev) ?
2195 1 : ibdev->num_ports;
2196 ibdev->ib_dev.num_comp_vectors = dev->caps.num_comp_vectors;
2197 ibdev->ib_dev.dma_device = &dev->persist->pdev->dev;
2198
2199 if (dev->caps.userspace_caps)
2200 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_ABI_VERSION;
2201 else
2202 ibdev->ib_dev.uverbs_abi_ver = MLX4_IB_UVERBS_NO_DEV_CAPS_ABI_VERSION;
2203
2204 ibdev->ib_dev.uverbs_cmd_mask =
2205 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2206 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2207 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2208 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2209 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2210 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2211 (1ull << IB_USER_VERBS_CMD_REREG_MR) |
2212 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2213 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2214 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2215 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
2216 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2217 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2218 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2219 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2220 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2221 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
2222 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
2223 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
2224 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
2225 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
2226 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
2227 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
2228 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
2229
2230 ibdev->ib_dev.query_device = mlx4_ib_query_device;
2231 ibdev->ib_dev.query_port = mlx4_ib_query_port;
2232 ibdev->ib_dev.get_link_layer = mlx4_ib_port_link_layer;
2233 ibdev->ib_dev.query_gid = mlx4_ib_query_gid;
2234 ibdev->ib_dev.query_pkey = mlx4_ib_query_pkey;
2235 ibdev->ib_dev.modify_device = mlx4_ib_modify_device;
2236 ibdev->ib_dev.modify_port = mlx4_ib_modify_port;
2237 ibdev->ib_dev.alloc_ucontext = mlx4_ib_alloc_ucontext;
2238 ibdev->ib_dev.dealloc_ucontext = mlx4_ib_dealloc_ucontext;
2239 ibdev->ib_dev.mmap = mlx4_ib_mmap;
2240 ibdev->ib_dev.alloc_pd = mlx4_ib_alloc_pd;
2241 ibdev->ib_dev.dealloc_pd = mlx4_ib_dealloc_pd;
2242 ibdev->ib_dev.create_ah = mlx4_ib_create_ah;
2243 ibdev->ib_dev.query_ah = mlx4_ib_query_ah;
2244 ibdev->ib_dev.destroy_ah = mlx4_ib_destroy_ah;
2245 ibdev->ib_dev.create_srq = mlx4_ib_create_srq;
2246 ibdev->ib_dev.modify_srq = mlx4_ib_modify_srq;
2247 ibdev->ib_dev.query_srq = mlx4_ib_query_srq;
2248 ibdev->ib_dev.destroy_srq = mlx4_ib_destroy_srq;
2249 ibdev->ib_dev.post_srq_recv = mlx4_ib_post_srq_recv;
2250 ibdev->ib_dev.create_qp = mlx4_ib_create_qp;
2251 ibdev->ib_dev.modify_qp = mlx4_ib_modify_qp;
2252 ibdev->ib_dev.query_qp = mlx4_ib_query_qp;
2253 ibdev->ib_dev.destroy_qp = mlx4_ib_destroy_qp;
2254 ibdev->ib_dev.post_send = mlx4_ib_post_send;
2255 ibdev->ib_dev.post_recv = mlx4_ib_post_recv;
2256 ibdev->ib_dev.create_cq = mlx4_ib_create_cq;
2257 ibdev->ib_dev.modify_cq = mlx4_ib_modify_cq;
2258 ibdev->ib_dev.resize_cq = mlx4_ib_resize_cq;
2259 ibdev->ib_dev.destroy_cq = mlx4_ib_destroy_cq;
2260 ibdev->ib_dev.poll_cq = mlx4_ib_poll_cq;
2261 ibdev->ib_dev.req_notify_cq = mlx4_ib_arm_cq;
2262 ibdev->ib_dev.get_dma_mr = mlx4_ib_get_dma_mr;
2263 ibdev->ib_dev.reg_user_mr = mlx4_ib_reg_user_mr;
2264 ibdev->ib_dev.rereg_user_mr = mlx4_ib_rereg_user_mr;
2265 ibdev->ib_dev.dereg_mr = mlx4_ib_dereg_mr;
2266 ibdev->ib_dev.alloc_fast_reg_mr = mlx4_ib_alloc_fast_reg_mr;
2267 ibdev->ib_dev.alloc_fast_reg_page_list = mlx4_ib_alloc_fast_reg_page_list;
2268 ibdev->ib_dev.free_fast_reg_page_list = mlx4_ib_free_fast_reg_page_list;
2269 ibdev->ib_dev.attach_mcast = mlx4_ib_mcg_attach;
2270 ibdev->ib_dev.detach_mcast = mlx4_ib_mcg_detach;
2271 ibdev->ib_dev.process_mad = mlx4_ib_process_mad;
2272 ibdev->ib_dev.get_port_immutable = mlx4_port_immutable;
2273
2274 if (!mlx4_is_slave(ibdev->dev)) {
2275 ibdev->ib_dev.alloc_fmr = mlx4_ib_fmr_alloc;
2276 ibdev->ib_dev.map_phys_fmr = mlx4_ib_map_phys_fmr;
2277 ibdev->ib_dev.unmap_fmr = mlx4_ib_unmap_fmr;
2278 ibdev->ib_dev.dealloc_fmr = mlx4_ib_fmr_dealloc;
2279 }
2280
2281 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW ||
2282 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) {
2283 ibdev->ib_dev.alloc_mw = mlx4_ib_alloc_mw;
2284 ibdev->ib_dev.bind_mw = mlx4_ib_bind_mw;
2285 ibdev->ib_dev.dealloc_mw = mlx4_ib_dealloc_mw;
2286
2287 ibdev->ib_dev.uverbs_cmd_mask |=
2288 (1ull << IB_USER_VERBS_CMD_ALLOC_MW) |
2289 (1ull << IB_USER_VERBS_CMD_DEALLOC_MW);
2290 }
2291
2292 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) {
2293 ibdev->ib_dev.alloc_xrcd = mlx4_ib_alloc_xrcd;
2294 ibdev->ib_dev.dealloc_xrcd = mlx4_ib_dealloc_xrcd;
2295 ibdev->ib_dev.uverbs_cmd_mask |=
2296 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
2297 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
2298 }
2299
2300 if (check_flow_steering_support(dev)) {
2301 ibdev->steering_support = MLX4_STEERING_MODE_DEVICE_MANAGED;
2302 ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
2303 ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
2304
2305 ibdev->ib_dev.uverbs_ex_cmd_mask |=
2306 (1ull << IB_USER_VERBS_EX_CMD_CREATE_FLOW) |
2307 (1ull << IB_USER_VERBS_EX_CMD_DESTROY_FLOW);
2308 }
2309
2310 mlx4_ib_alloc_eqs(dev, ibdev);
2311
2312 spin_lock_init(&iboe->lock);
2313
2314 if (init_node_data(ibdev))
2315 goto err_map;
2316
2317 num_req_counters = mlx4_is_bonded(dev) ? 1 : ibdev->num_ports;
2318 for (i = 0; i < num_req_counters; ++i) {
2319 mutex_init(&ibdev->qp1_proxy_lock[i]);
2320 if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) ==
2321 IB_LINK_LAYER_ETHERNET) {
2322 err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]);
2323 if (err)
2324 ibdev->counters[i] = -1;
2325 } else {
2326 ibdev->counters[i] = -1;
2327 }
2328 }
2329 if (mlx4_is_bonded(dev))
2330 for (i = 1; i < ibdev->num_ports ; ++i)
2331 ibdev->counters[i] = ibdev->counters[0];
2332
2333
2334 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
2335 ib_num_ports++;
2336
2337 spin_lock_init(&ibdev->sm_lock);
2338 mutex_init(&ibdev->cap_mask_mutex);
2339 INIT_LIST_HEAD(&ibdev->qp_list);
2340 spin_lock_init(&ibdev->reset_flow_resource_lock);
2341
2342 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED &&
2343 ib_num_ports) {
2344 ibdev->steer_qpn_count = MLX4_IB_UC_MAX_NUM_QPS;
2345 err = mlx4_qp_reserve_range(dev, ibdev->steer_qpn_count,
2346 MLX4_IB_UC_STEER_QPN_ALIGN,
2347 &ibdev->steer_qpn_base, 0);
2348 if (err)
2349 goto err_counter;
2350
2351 ibdev->ib_uc_qpns_bitmap =
2352 kmalloc(BITS_TO_LONGS(ibdev->steer_qpn_count) *
2353 sizeof(long),
2354 GFP_KERNEL);
2355 if (!ibdev->ib_uc_qpns_bitmap) {
2356 dev_err(&dev->persist->pdev->dev,
2357 "bit map alloc failed\n");
2358 goto err_steer_qp_release;
2359 }
2360
2361 bitmap_zero(ibdev->ib_uc_qpns_bitmap, ibdev->steer_qpn_count);
2362
2363 err = mlx4_FLOW_STEERING_IB_UC_QP_RANGE(
2364 dev, ibdev->steer_qpn_base,
2365 ibdev->steer_qpn_base +
2366 ibdev->steer_qpn_count - 1);
2367 if (err)
2368 goto err_steer_free_bitmap;
2369 }
2370
2371 for (j = 1; j <= ibdev->dev->caps.num_ports; j++)
2372 atomic64_set(&iboe->mac[j - 1], ibdev->dev->caps.def_mac[j]);
2373
2374 if (ib_register_device(&ibdev->ib_dev, NULL))
2375 goto err_steer_free_bitmap;
2376
2377 if (mlx4_ib_mad_init(ibdev))
2378 goto err_reg;
2379
2380 if (mlx4_ib_init_sriov(ibdev))
2381 goto err_mad;
2382
2383 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE) {
2384 if (!iboe->nb.notifier_call) {
2385 iboe->nb.notifier_call = mlx4_ib_netdev_event;
2386 err = register_netdevice_notifier(&iboe->nb);
2387 if (err) {
2388 iboe->nb.notifier_call = NULL;
2389 goto err_notif;
2390 }
2391 }
2392 if (!iboe->nb_inet.notifier_call) {
2393 iboe->nb_inet.notifier_call = mlx4_ib_inet_event;
2394 err = register_inetaddr_notifier(&iboe->nb_inet);
2395 if (err) {
2396 iboe->nb_inet.notifier_call = NULL;
2397 goto err_notif;
2398 }
2399 }
2400 #if IS_ENABLED(CONFIG_IPV6)
2401 if (!iboe->nb_inet6.notifier_call) {
2402 iboe->nb_inet6.notifier_call = mlx4_ib_inet6_event;
2403 err = register_inet6addr_notifier(&iboe->nb_inet6);
2404 if (err) {
2405 iboe->nb_inet6.notifier_call = NULL;
2406 goto err_notif;
2407 }
2408 }
2409 #endif
2410 if (mlx4_ib_init_gid_table(ibdev))
2411 goto err_notif;
2412 }
2413
2414 for (j = 0; j < ARRAY_SIZE(mlx4_class_attributes); ++j) {
2415 if (device_create_file(&ibdev->ib_dev.dev,
2416 mlx4_class_attributes[j]))
2417 goto err_notif;
2418 }
2419
2420 ibdev->ib_active = true;
2421
2422 if (mlx4_is_mfunc(ibdev->dev))
2423 init_pkeys(ibdev);
2424
2425 /* create paravirt contexts for any VFs which are active */
2426 if (mlx4_is_master(ibdev->dev)) {
2427 for (j = 0; j < MLX4_MFUNC_MAX; j++) {
2428 if (j == mlx4_master_func_num(ibdev->dev))
2429 continue;
2430 if (mlx4_is_slave_active(ibdev->dev, j))
2431 do_slave_init(ibdev, j, 1);
2432 }
2433 }
2434 return ibdev;
2435
2436 err_notif:
2437 if (ibdev->iboe.nb.notifier_call) {
2438 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2439 pr_warn("failure unregistering notifier\n");
2440 ibdev->iboe.nb.notifier_call = NULL;
2441 }
2442 if (ibdev->iboe.nb_inet.notifier_call) {
2443 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2444 pr_warn("failure unregistering notifier\n");
2445 ibdev->iboe.nb_inet.notifier_call = NULL;
2446 }
2447 #if IS_ENABLED(CONFIG_IPV6)
2448 if (ibdev->iboe.nb_inet6.notifier_call) {
2449 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2450 pr_warn("failure unregistering notifier\n");
2451 ibdev->iboe.nb_inet6.notifier_call = NULL;
2452 }
2453 #endif
2454 flush_workqueue(wq);
2455
2456 mlx4_ib_close_sriov(ibdev);
2457
2458 err_mad:
2459 mlx4_ib_mad_cleanup(ibdev);
2460
2461 err_reg:
2462 ib_unregister_device(&ibdev->ib_dev);
2463
2464 err_steer_free_bitmap:
2465 kfree(ibdev->ib_uc_qpns_bitmap);
2466
2467 err_steer_qp_release:
2468 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED)
2469 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2470 ibdev->steer_qpn_count);
2471 err_counter:
2472 for (; i; --i)
2473 if (ibdev->counters[i - 1] != -1)
2474 mlx4_counter_free(ibdev->dev, ibdev->counters[i - 1]);
2475
2476 err_map:
2477 iounmap(ibdev->uar_map);
2478
2479 err_uar:
2480 mlx4_uar_free(dev, &ibdev->priv_uar);
2481
2482 err_pd:
2483 mlx4_pd_free(dev, ibdev->priv_pdn);
2484
2485 err_dealloc:
2486 ib_dealloc_device(&ibdev->ib_dev);
2487
2488 return NULL;
2489 }
2490
2491 int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn)
2492 {
2493 int offset;
2494
2495 WARN_ON(!dev->ib_uc_qpns_bitmap);
2496
2497 offset = bitmap_find_free_region(dev->ib_uc_qpns_bitmap,
2498 dev->steer_qpn_count,
2499 get_count_order(count));
2500 if (offset < 0)
2501 return offset;
2502
2503 *qpn = dev->steer_qpn_base + offset;
2504 return 0;
2505 }
2506
2507 void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count)
2508 {
2509 if (!qpn ||
2510 dev->steering_support != MLX4_STEERING_MODE_DEVICE_MANAGED)
2511 return;
2512
2513 BUG_ON(qpn < dev->steer_qpn_base);
2514
2515 bitmap_release_region(dev->ib_uc_qpns_bitmap,
2516 qpn - dev->steer_qpn_base,
2517 get_count_order(count));
2518 }
2519
2520 int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
2521 int is_attach)
2522 {
2523 int err;
2524 size_t flow_size;
2525 struct ib_flow_attr *flow = NULL;
2526 struct ib_flow_spec_ib *ib_spec;
2527
2528 if (is_attach) {
2529 flow_size = sizeof(struct ib_flow_attr) +
2530 sizeof(struct ib_flow_spec_ib);
2531 flow = kzalloc(flow_size, GFP_KERNEL);
2532 if (!flow)
2533 return -ENOMEM;
2534 flow->port = mqp->port;
2535 flow->num_of_specs = 1;
2536 flow->size = flow_size;
2537 ib_spec = (struct ib_flow_spec_ib *)(flow + 1);
2538 ib_spec->type = IB_FLOW_SPEC_IB;
2539 ib_spec->size = sizeof(struct ib_flow_spec_ib);
2540 /* Add an empty rule for IB L2 */
2541 memset(&ib_spec->mask, 0, sizeof(ib_spec->mask));
2542
2543 err = __mlx4_ib_create_flow(&mqp->ibqp, flow,
2544 IB_FLOW_DOMAIN_NIC,
2545 MLX4_FS_REGULAR,
2546 &mqp->reg_id);
2547 } else {
2548 err = __mlx4_ib_destroy_flow(mdev->dev, mqp->reg_id);
2549 }
2550 kfree(flow);
2551 return err;
2552 }
2553
2554 static void mlx4_ib_remove(struct mlx4_dev *dev, void *ibdev_ptr)
2555 {
2556 struct mlx4_ib_dev *ibdev = ibdev_ptr;
2557 int p;
2558
2559 ibdev->ib_active = false;
2560 flush_workqueue(wq);
2561
2562 mlx4_ib_close_sriov(ibdev);
2563 mlx4_ib_mad_cleanup(ibdev);
2564 ib_unregister_device(&ibdev->ib_dev);
2565 if (ibdev->iboe.nb.notifier_call) {
2566 if (unregister_netdevice_notifier(&ibdev->iboe.nb))
2567 pr_warn("failure unregistering notifier\n");
2568 ibdev->iboe.nb.notifier_call = NULL;
2569 }
2570
2571 if (ibdev->steering_support == MLX4_STEERING_MODE_DEVICE_MANAGED) {
2572 mlx4_qp_release_range(dev, ibdev->steer_qpn_base,
2573 ibdev->steer_qpn_count);
2574 kfree(ibdev->ib_uc_qpns_bitmap);
2575 }
2576
2577 if (ibdev->iboe.nb_inet.notifier_call) {
2578 if (unregister_inetaddr_notifier(&ibdev->iboe.nb_inet))
2579 pr_warn("failure unregistering notifier\n");
2580 ibdev->iboe.nb_inet.notifier_call = NULL;
2581 }
2582 #if IS_ENABLED(CONFIG_IPV6)
2583 if (ibdev->iboe.nb_inet6.notifier_call) {
2584 if (unregister_inet6addr_notifier(&ibdev->iboe.nb_inet6))
2585 pr_warn("failure unregistering notifier\n");
2586 ibdev->iboe.nb_inet6.notifier_call = NULL;
2587 }
2588 #endif
2589
2590 iounmap(ibdev->uar_map);
2591 for (p = 0; p < ibdev->num_ports; ++p)
2592 if (ibdev->counters[p] != -1)
2593 mlx4_counter_free(ibdev->dev, ibdev->counters[p]);
2594 mlx4_foreach_port(p, dev, MLX4_PORT_TYPE_IB)
2595 mlx4_CLOSE_PORT(dev, p);
2596
2597 mlx4_ib_free_eqs(dev, ibdev);
2598
2599 mlx4_uar_free(dev, &ibdev->priv_uar);
2600 mlx4_pd_free(dev, ibdev->priv_pdn);
2601 ib_dealloc_device(&ibdev->ib_dev);
2602 }
2603
2604 static void do_slave_init(struct mlx4_ib_dev *ibdev, int slave, int do_init)
2605 {
2606 struct mlx4_ib_demux_work **dm = NULL;
2607 struct mlx4_dev *dev = ibdev->dev;
2608 int i;
2609 unsigned long flags;
2610 struct mlx4_active_ports actv_ports;
2611 unsigned int ports;
2612 unsigned int first_port;
2613
2614 if (!mlx4_is_master(dev))
2615 return;
2616
2617 actv_ports = mlx4_get_active_ports(dev, slave);
2618 ports = bitmap_weight(actv_ports.ports, dev->caps.num_ports);
2619 first_port = find_first_bit(actv_ports.ports, dev->caps.num_ports);
2620
2621 dm = kcalloc(ports, sizeof(*dm), GFP_ATOMIC);
2622 if (!dm) {
2623 pr_err("failed to allocate memory for tunneling qp update\n");
2624 goto out;
2625 }
2626
2627 for (i = 0; i < ports; i++) {
2628 dm[i] = kmalloc(sizeof (struct mlx4_ib_demux_work), GFP_ATOMIC);
2629 if (!dm[i]) {
2630 pr_err("failed to allocate memory for tunneling qp update work struct\n");
2631 for (i = 0; i < dev->caps.num_ports; i++) {
2632 if (dm[i])
2633 kfree(dm[i]);
2634 }
2635 goto out;
2636 }
2637 }
2638 /* initialize or tear down tunnel QPs for the slave */
2639 for (i = 0; i < ports; i++) {
2640 INIT_WORK(&dm[i]->work, mlx4_ib_tunnels_update_work);
2641 dm[i]->port = first_port + i + 1;
2642 dm[i]->slave = slave;
2643 dm[i]->do_init = do_init;
2644 dm[i]->dev = ibdev;
2645 spin_lock_irqsave(&ibdev->sriov.going_down_lock, flags);
2646 if (!ibdev->sriov.is_going_down)
2647 queue_work(ibdev->sriov.demux[i].ud_wq, &dm[i]->work);
2648 spin_unlock_irqrestore(&ibdev->sriov.going_down_lock, flags);
2649 }
2650 out:
2651 kfree(dm);
2652 return;
2653 }
2654
2655 static void mlx4_ib_handle_catas_error(struct mlx4_ib_dev *ibdev)
2656 {
2657 struct mlx4_ib_qp *mqp;
2658 unsigned long flags_qp;
2659 unsigned long flags_cq;
2660 struct mlx4_ib_cq *send_mcq, *recv_mcq;
2661 struct list_head cq_notify_list;
2662 struct mlx4_cq *mcq;
2663 unsigned long flags;
2664
2665 pr_warn("mlx4_ib_handle_catas_error was started\n");
2666 INIT_LIST_HEAD(&cq_notify_list);
2667
2668 /* Go over qp list reside on that ibdev, sync with create/destroy qp.*/
2669 spin_lock_irqsave(&ibdev->reset_flow_resource_lock, flags);
2670
2671 list_for_each_entry(mqp, &ibdev->qp_list, qps_list) {
2672 spin_lock_irqsave(&mqp->sq.lock, flags_qp);
2673 if (mqp->sq.tail != mqp->sq.head) {
2674 send_mcq = to_mcq(mqp->ibqp.send_cq);
2675 spin_lock_irqsave(&send_mcq->lock, flags_cq);
2676 if (send_mcq->mcq.comp &&
2677 mqp->ibqp.send_cq->comp_handler) {
2678 if (!send_mcq->mcq.reset_notify_added) {
2679 send_mcq->mcq.reset_notify_added = 1;
2680 list_add_tail(&send_mcq->mcq.reset_notify,
2681 &cq_notify_list);
2682 }
2683 }
2684 spin_unlock_irqrestore(&send_mcq->lock, flags_cq);
2685 }
2686 spin_unlock_irqrestore(&mqp->sq.lock, flags_qp);
2687 /* Now, handle the QP's receive queue */
2688 spin_lock_irqsave(&mqp->rq.lock, flags_qp);
2689 /* no handling is needed for SRQ */
2690 if (!mqp->ibqp.srq) {
2691 if (mqp->rq.tail != mqp->rq.head) {
2692 recv_mcq = to_mcq(mqp->ibqp.recv_cq);
2693 spin_lock_irqsave(&recv_mcq->lock, flags_cq);
2694 if (recv_mcq->mcq.comp &&
2695 mqp->ibqp.recv_cq->comp_handler) {
2696 if (!recv_mcq->mcq.reset_notify_added) {
2697 recv_mcq->mcq.reset_notify_added = 1;
2698 list_add_tail(&recv_mcq->mcq.reset_notify,
2699 &cq_notify_list);
2700 }
2701 }
2702 spin_unlock_irqrestore(&recv_mcq->lock,
2703 flags_cq);
2704 }
2705 }
2706 spin_unlock_irqrestore(&mqp->rq.lock, flags_qp);
2707 }
2708
2709 list_for_each_entry(mcq, &cq_notify_list, reset_notify) {
2710 mcq->comp(mcq);
2711 }
2712 spin_unlock_irqrestore(&ibdev->reset_flow_resource_lock, flags);
2713 pr_warn("mlx4_ib_handle_catas_error ended\n");
2714 }
2715
2716 static void handle_bonded_port_state_event(struct work_struct *work)
2717 {
2718 struct ib_event_work *ew =
2719 container_of(work, struct ib_event_work, work);
2720 struct mlx4_ib_dev *ibdev = ew->ib_dev;
2721 enum ib_port_state bonded_port_state = IB_PORT_NOP;
2722 int i;
2723 struct ib_event ibev;
2724
2725 kfree(ew);
2726 spin_lock_bh(&ibdev->iboe.lock);
2727 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
2728 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
2729 enum ib_port_state curr_port_state;
2730
2731 if (!curr_netdev)
2732 continue;
2733
2734 curr_port_state =
2735 (netif_running(curr_netdev) &&
2736 netif_carrier_ok(curr_netdev)) ?
2737 IB_PORT_ACTIVE : IB_PORT_DOWN;
2738
2739 bonded_port_state = (bonded_port_state != IB_PORT_ACTIVE) ?
2740 curr_port_state : IB_PORT_ACTIVE;
2741 }
2742 spin_unlock_bh(&ibdev->iboe.lock);
2743
2744 ibev.device = &ibdev->ib_dev;
2745 ibev.element.port_num = 1;
2746 ibev.event = (bonded_port_state == IB_PORT_ACTIVE) ?
2747 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2748
2749 ib_dispatch_event(&ibev);
2750 }
2751
2752 static void mlx4_ib_event(struct mlx4_dev *dev, void *ibdev_ptr,
2753 enum mlx4_dev_event event, unsigned long param)
2754 {
2755 struct ib_event ibev;
2756 struct mlx4_ib_dev *ibdev = to_mdev((struct ib_device *) ibdev_ptr);
2757 struct mlx4_eqe *eqe = NULL;
2758 struct ib_event_work *ew;
2759 int p = 0;
2760
2761 if (mlx4_is_bonded(dev) &&
2762 ((event == MLX4_DEV_EVENT_PORT_UP) ||
2763 (event == MLX4_DEV_EVENT_PORT_DOWN))) {
2764 ew = kmalloc(sizeof(*ew), GFP_ATOMIC);
2765 if (!ew)
2766 return;
2767 INIT_WORK(&ew->work, handle_bonded_port_state_event);
2768 ew->ib_dev = ibdev;
2769 queue_work(wq, &ew->work);
2770 return;
2771 }
2772
2773 if (event == MLX4_DEV_EVENT_PORT_MGMT_CHANGE)
2774 eqe = (struct mlx4_eqe *)param;
2775 else
2776 p = (int) param;
2777
2778 switch (event) {
2779 case MLX4_DEV_EVENT_PORT_UP:
2780 if (p > ibdev->num_ports)
2781 return;
2782 if (mlx4_is_master(dev) &&
2783 rdma_port_get_link_layer(&ibdev->ib_dev, p) ==
2784 IB_LINK_LAYER_INFINIBAND) {
2785 mlx4_ib_invalidate_all_guid_record(ibdev, p);
2786 }
2787 ibev.event = IB_EVENT_PORT_ACTIVE;
2788 break;
2789
2790 case MLX4_DEV_EVENT_PORT_DOWN:
2791 if (p > ibdev->num_ports)
2792 return;
2793 ibev.event = IB_EVENT_PORT_ERR;
2794 break;
2795
2796 case MLX4_DEV_EVENT_CATASTROPHIC_ERROR:
2797 ibdev->ib_active = false;
2798 ibev.event = IB_EVENT_DEVICE_FATAL;
2799 mlx4_ib_handle_catas_error(ibdev);
2800 break;
2801
2802 case MLX4_DEV_EVENT_PORT_MGMT_CHANGE:
2803 ew = kmalloc(sizeof *ew, GFP_ATOMIC);
2804 if (!ew) {
2805 pr_err("failed to allocate memory for events work\n");
2806 break;
2807 }
2808
2809 INIT_WORK(&ew->work, handle_port_mgmt_change_event);
2810 memcpy(&ew->ib_eqe, eqe, sizeof *eqe);
2811 ew->ib_dev = ibdev;
2812 /* need to queue only for port owner, which uses GEN_EQE */
2813 if (mlx4_is_master(dev))
2814 queue_work(wq, &ew->work);
2815 else
2816 handle_port_mgmt_change_event(&ew->work);
2817 return;
2818
2819 case MLX4_DEV_EVENT_SLAVE_INIT:
2820 /* here, p is the slave id */
2821 do_slave_init(ibdev, p, 1);
2822 if (mlx4_is_master(dev)) {
2823 int i;
2824
2825 for (i = 1; i <= ibdev->num_ports; i++) {
2826 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2827 == IB_LINK_LAYER_INFINIBAND)
2828 mlx4_ib_slave_alias_guid_event(ibdev,
2829 p, i,
2830 1);
2831 }
2832 }
2833 return;
2834
2835 case MLX4_DEV_EVENT_SLAVE_SHUTDOWN:
2836 if (mlx4_is_master(dev)) {
2837 int i;
2838
2839 for (i = 1; i <= ibdev->num_ports; i++) {
2840 if (rdma_port_get_link_layer(&ibdev->ib_dev, i)
2841 == IB_LINK_LAYER_INFINIBAND)
2842 mlx4_ib_slave_alias_guid_event(ibdev,
2843 p, i,
2844 0);
2845 }
2846 }
2847 /* here, p is the slave id */
2848 do_slave_init(ibdev, p, 0);
2849 return;
2850
2851 default:
2852 return;
2853 }
2854
2855 ibev.device = ibdev_ptr;
2856 ibev.element.port_num = mlx4_is_bonded(ibdev->dev) ? 1 : (u8)p;
2857
2858 ib_dispatch_event(&ibev);
2859 }
2860
2861 static struct mlx4_interface mlx4_ib_interface = {
2862 .add = mlx4_ib_add,
2863 .remove = mlx4_ib_remove,
2864 .event = mlx4_ib_event,
2865 .protocol = MLX4_PROT_IB_IPV6,
2866 .flags = MLX4_INTFF_BONDING
2867 };
2868
2869 static int __init mlx4_ib_init(void)
2870 {
2871 int err;
2872
2873 wq = create_singlethread_workqueue("mlx4_ib");
2874 if (!wq)
2875 return -ENOMEM;
2876
2877 err = mlx4_ib_mcg_init();
2878 if (err)
2879 goto clean_wq;
2880
2881 err = mlx4_register_interface(&mlx4_ib_interface);
2882 if (err)
2883 goto clean_mcg;
2884
2885 return 0;
2886
2887 clean_mcg:
2888 mlx4_ib_mcg_destroy();
2889
2890 clean_wq:
2891 destroy_workqueue(wq);
2892 return err;
2893 }
2894
2895 static void __exit mlx4_ib_cleanup(void)
2896 {
2897 mlx4_unregister_interface(&mlx4_ib_interface);
2898 mlx4_ib_mcg_destroy();
2899 destroy_workqueue(wq);
2900 }
2901
2902 module_init(mlx4_ib_init);
2903 module_exit(mlx4_ib_cleanup);
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