IB/ehca: Bump version number to 0026
[deliverable/linux.git] / drivers / infiniband / hw / mlx4 / mlx4_ib.h
1 /*
2 * Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #ifndef MLX4_IB_H
34 #define MLX4_IB_H
35
36 #include <linux/compiler.h>
37 #include <linux/list.h>
38 #include <linux/mutex.h>
39
40 #include <rdma/ib_verbs.h>
41 #include <rdma/ib_umem.h>
42
43 #include <linux/mlx4/device.h>
44 #include <linux/mlx4/doorbell.h>
45
46 enum {
47 MLX4_IB_DB_PER_PAGE = PAGE_SIZE / 4
48 };
49
50 struct mlx4_ib_db_pgdir;
51 struct mlx4_ib_user_db_page;
52
53 struct mlx4_ib_db {
54 __be32 *db;
55 union {
56 struct mlx4_ib_db_pgdir *pgdir;
57 struct mlx4_ib_user_db_page *user_page;
58 } u;
59 dma_addr_t dma;
60 int index;
61 int order;
62 };
63
64 struct mlx4_ib_ucontext {
65 struct ib_ucontext ibucontext;
66 struct mlx4_uar uar;
67 struct list_head db_page_list;
68 struct mutex db_page_mutex;
69 };
70
71 struct mlx4_ib_pd {
72 struct ib_pd ibpd;
73 u32 pdn;
74 };
75
76 struct mlx4_ib_cq_buf {
77 struct mlx4_buf buf;
78 struct mlx4_mtt mtt;
79 };
80
81 struct mlx4_ib_cq_resize {
82 struct mlx4_ib_cq_buf buf;
83 int cqe;
84 };
85
86 struct mlx4_ib_cq {
87 struct ib_cq ibcq;
88 struct mlx4_cq mcq;
89 struct mlx4_ib_cq_buf buf;
90 struct mlx4_ib_cq_resize *resize_buf;
91 struct mlx4_ib_db db;
92 spinlock_t lock;
93 struct mutex resize_mutex;
94 struct ib_umem *umem;
95 struct ib_umem *resize_umem;
96 };
97
98 struct mlx4_ib_mr {
99 struct ib_mr ibmr;
100 struct mlx4_mr mmr;
101 struct ib_umem *umem;
102 };
103
104 struct mlx4_ib_fmr {
105 struct ib_fmr ibfmr;
106 struct mlx4_fmr mfmr;
107 };
108
109 struct mlx4_ib_wq {
110 u64 *wrid;
111 spinlock_t lock;
112 int wqe_cnt;
113 int max_post;
114 int max_gs;
115 int offset;
116 int wqe_shift;
117 unsigned head;
118 unsigned tail;
119 };
120
121 enum mlx4_ib_qp_flags {
122 MLX4_IB_QP_LSO = 1 << 0
123 };
124
125 struct mlx4_ib_qp {
126 struct ib_qp ibqp;
127 struct mlx4_qp mqp;
128 struct mlx4_buf buf;
129
130 struct mlx4_ib_db db;
131 struct mlx4_ib_wq rq;
132
133 u32 doorbell_qpn;
134 __be32 sq_signal_bits;
135 unsigned sq_next_wqe;
136 int sq_max_wqes_per_wr;
137 int sq_spare_wqes;
138 struct mlx4_ib_wq sq;
139
140 struct ib_umem *umem;
141 struct mlx4_mtt mtt;
142 int buf_size;
143 struct mutex mutex;
144 u32 flags;
145 u8 port;
146 u8 alt_port;
147 u8 atomic_rd_en;
148 u8 resp_depth;
149 u8 sq_no_prefetch;
150 u8 state;
151 };
152
153 struct mlx4_ib_srq {
154 struct ib_srq ibsrq;
155 struct mlx4_srq msrq;
156 struct mlx4_buf buf;
157 struct mlx4_ib_db db;
158 u64 *wrid;
159 spinlock_t lock;
160 int head;
161 int tail;
162 u16 wqe_ctr;
163 struct ib_umem *umem;
164 struct mlx4_mtt mtt;
165 struct mutex mutex;
166 };
167
168 struct mlx4_ib_ah {
169 struct ib_ah ibah;
170 struct mlx4_av av;
171 };
172
173 struct mlx4_ib_dev {
174 struct ib_device ib_dev;
175 struct mlx4_dev *dev;
176 void __iomem *uar_map;
177
178 struct list_head pgdir_list;
179 struct mutex pgdir_mutex;
180
181 struct mlx4_uar priv_uar;
182 u32 priv_pdn;
183 MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
184
185 struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
186 struct ib_ah *sm_ah[MLX4_MAX_PORTS];
187 spinlock_t sm_lock;
188
189 struct mutex cap_mask_mutex;
190 };
191
192 static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
193 {
194 return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
195 }
196
197 static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
198 {
199 return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
200 }
201
202 static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
203 {
204 return container_of(ibpd, struct mlx4_ib_pd, ibpd);
205 }
206
207 static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
208 {
209 return container_of(ibcq, struct mlx4_ib_cq, ibcq);
210 }
211
212 static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
213 {
214 return container_of(mcq, struct mlx4_ib_cq, mcq);
215 }
216
217 static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
218 {
219 return container_of(ibmr, struct mlx4_ib_mr, ibmr);
220 }
221
222 static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
223 {
224 return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
225 }
226 static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
227 {
228 return container_of(ibqp, struct mlx4_ib_qp, ibqp);
229 }
230
231 static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
232 {
233 return container_of(mqp, struct mlx4_ib_qp, mqp);
234 }
235
236 static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
237 {
238 return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
239 }
240
241 static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
242 {
243 return container_of(msrq, struct mlx4_ib_srq, msrq);
244 }
245
246 static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
247 {
248 return container_of(ibah, struct mlx4_ib_ah, ibah);
249 }
250
251 int mlx4_ib_db_alloc(struct mlx4_ib_dev *dev, struct mlx4_ib_db *db, int order);
252 void mlx4_ib_db_free(struct mlx4_ib_dev *dev, struct mlx4_ib_db *db);
253 int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
254 struct mlx4_ib_db *db);
255 void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_ib_db *db);
256
257 struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
258 int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
259 struct ib_umem *umem);
260 struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
261 u64 virt_addr, int access_flags,
262 struct ib_udata *udata);
263 int mlx4_ib_dereg_mr(struct ib_mr *mr);
264
265 int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
266 int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
267 struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev, int entries, int vector,
268 struct ib_ucontext *context,
269 struct ib_udata *udata);
270 int mlx4_ib_destroy_cq(struct ib_cq *cq);
271 int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
272 int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
273 void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
274 void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
275
276 struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
277 int mlx4_ib_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr);
278 int mlx4_ib_destroy_ah(struct ib_ah *ah);
279
280 struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
281 struct ib_srq_init_attr *init_attr,
282 struct ib_udata *udata);
283 int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
284 enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
285 int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
286 int mlx4_ib_destroy_srq(struct ib_srq *srq);
287 void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
288 int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
289 struct ib_recv_wr **bad_wr);
290
291 struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
292 struct ib_qp_init_attr *init_attr,
293 struct ib_udata *udata);
294 int mlx4_ib_destroy_qp(struct ib_qp *qp);
295 int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
296 int attr_mask, struct ib_udata *udata);
297 int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
298 struct ib_qp_init_attr *qp_init_attr);
299 int mlx4_ib_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
300 struct ib_send_wr **bad_wr);
301 int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
302 struct ib_recv_wr **bad_wr);
303
304 int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int ignore_mkey, int ignore_bkey,
305 int port, struct ib_wc *in_wc, struct ib_grh *in_grh,
306 void *in_mad, void *response_mad);
307 int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
308 struct ib_wc *in_wc, struct ib_grh *in_grh,
309 struct ib_mad *in_mad, struct ib_mad *out_mad);
310 int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
311 void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
312
313 struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
314 struct ib_fmr_attr *fmr_attr);
315 int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
316 u64 iova);
317 int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
318 int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
319
320 static inline int mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
321 {
322 return !!(ah->av.g_slid & 0x80);
323 }
324
325 #endif /* MLX4_IB_H */
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