2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 #include <asm-generic/kmap_types.h>
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/errno.h>
37 #include <linux/pci.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/slab.h>
40 #include <linux/io-mapping.h>
41 #include <linux/sched.h>
42 #include <rdma/ib_user_verbs.h>
43 #include <linux/mlx5/vport.h>
44 #include <rdma/ib_smi.h>
45 #include <rdma/ib_umem.h>
49 #define DRIVER_NAME "mlx5_ib"
50 #define DRIVER_VERSION "2.2-1"
51 #define DRIVER_RELDATE "Feb 2014"
53 MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
54 MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver");
55 MODULE_LICENSE("Dual BSD/GPL");
56 MODULE_VERSION(DRIVER_VERSION
);
58 static int deprecated_prof_sel
= 2;
59 module_param_named(prof_sel
, deprecated_prof_sel
, int, 0444);
60 MODULE_PARM_DESC(prof_sel
, "profile selector. Deprecated here. Moved to module mlx5_core");
62 static char mlx5_version
[] =
63 DRIVER_NAME
": Mellanox Connect-IB Infiniband driver v"
64 DRIVER_VERSION
" (" DRIVER_RELDATE
")\n";
66 static enum rdma_link_layer
67 mlx5_ib_port_link_layer(struct ib_device
*device
)
69 struct mlx5_ib_dev
*dev
= to_mdev(device
);
71 switch (MLX5_CAP_GEN(dev
->mdev
, port_type
)) {
72 case MLX5_CAP_PORT_TYPE_IB
:
73 return IB_LINK_LAYER_INFINIBAND
;
74 case MLX5_CAP_PORT_TYPE_ETH
:
75 return IB_LINK_LAYER_ETHERNET
;
77 return IB_LINK_LAYER_UNSPECIFIED
;
81 static int mlx5_use_mad_ifc(struct mlx5_ib_dev
*dev
)
83 return !dev
->mdev
->issi
;
87 MLX5_VPORT_ACCESS_METHOD_MAD
,
88 MLX5_VPORT_ACCESS_METHOD_HCA
,
89 MLX5_VPORT_ACCESS_METHOD_NIC
,
92 static int mlx5_get_vport_access_method(struct ib_device
*ibdev
)
94 if (mlx5_use_mad_ifc(to_mdev(ibdev
)))
95 return MLX5_VPORT_ACCESS_METHOD_MAD
;
97 if (mlx5_ib_port_link_layer(ibdev
) ==
98 IB_LINK_LAYER_ETHERNET
)
99 return MLX5_VPORT_ACCESS_METHOD_NIC
;
101 return MLX5_VPORT_ACCESS_METHOD_HCA
;
104 static int mlx5_query_system_image_guid(struct ib_device
*ibdev
,
105 __be64
*sys_image_guid
)
107 struct mlx5_ib_dev
*dev
= to_mdev(ibdev
);
108 struct mlx5_core_dev
*mdev
= dev
->mdev
;
112 switch (mlx5_get_vport_access_method(ibdev
)) {
113 case MLX5_VPORT_ACCESS_METHOD_MAD
:
114 return mlx5_query_mad_ifc_system_image_guid(ibdev
,
117 case MLX5_VPORT_ACCESS_METHOD_HCA
:
118 err
= mlx5_query_hca_vport_system_image_guid(mdev
, &tmp
);
120 *sys_image_guid
= cpu_to_be64(tmp
);
128 static int mlx5_query_max_pkeys(struct ib_device
*ibdev
,
131 struct mlx5_ib_dev
*dev
= to_mdev(ibdev
);
132 struct mlx5_core_dev
*mdev
= dev
->mdev
;
134 switch (mlx5_get_vport_access_method(ibdev
)) {
135 case MLX5_VPORT_ACCESS_METHOD_MAD
:
136 return mlx5_query_mad_ifc_max_pkeys(ibdev
, max_pkeys
);
138 case MLX5_VPORT_ACCESS_METHOD_HCA
:
139 case MLX5_VPORT_ACCESS_METHOD_NIC
:
140 *max_pkeys
= mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev
,
149 static int mlx5_query_vendor_id(struct ib_device
*ibdev
,
152 struct mlx5_ib_dev
*dev
= to_mdev(ibdev
);
154 switch (mlx5_get_vport_access_method(ibdev
)) {
155 case MLX5_VPORT_ACCESS_METHOD_MAD
:
156 return mlx5_query_mad_ifc_vendor_id(ibdev
, vendor_id
);
158 case MLX5_VPORT_ACCESS_METHOD_HCA
:
159 case MLX5_VPORT_ACCESS_METHOD_NIC
:
160 return mlx5_core_query_vendor_id(dev
->mdev
, vendor_id
);
167 static int mlx5_query_node_guid(struct mlx5_ib_dev
*dev
,
173 switch (mlx5_get_vport_access_method(&dev
->ib_dev
)) {
174 case MLX5_VPORT_ACCESS_METHOD_MAD
:
175 return mlx5_query_mad_ifc_node_guid(dev
, node_guid
);
177 case MLX5_VPORT_ACCESS_METHOD_HCA
:
178 err
= mlx5_query_hca_vport_node_guid(dev
->mdev
, &tmp
);
180 *node_guid
= cpu_to_be64(tmp
);
188 struct mlx5_reg_node_desc
{
192 static int mlx5_query_node_desc(struct mlx5_ib_dev
*dev
, char *node_desc
)
194 struct mlx5_reg_node_desc in
;
196 if (mlx5_use_mad_ifc(dev
))
197 return mlx5_query_mad_ifc_node_desc(dev
, node_desc
);
199 memset(&in
, 0, sizeof(in
));
201 return mlx5_core_access_reg(dev
->mdev
, &in
, sizeof(in
), node_desc
,
202 sizeof(struct mlx5_reg_node_desc
),
203 MLX5_REG_NODE_DESC
, 0, 0);
206 static int mlx5_ib_query_device(struct ib_device
*ibdev
,
207 struct ib_device_attr
*props
)
209 struct mlx5_ib_dev
*dev
= to_mdev(ibdev
);
210 struct mlx5_core_dev
*mdev
= dev
->mdev
;
215 memset(props
, 0, sizeof(*props
));
216 err
= mlx5_query_system_image_guid(ibdev
,
217 &props
->sys_image_guid
);
221 err
= mlx5_query_max_pkeys(ibdev
, &props
->max_pkeys
);
225 err
= mlx5_query_vendor_id(ibdev
, &props
->vendor_id
);
229 props
->fw_ver
= ((u64
)fw_rev_maj(dev
->mdev
) << 32) |
230 (fw_rev_min(dev
->mdev
) << 16) |
231 fw_rev_sub(dev
->mdev
);
232 props
->device_cap_flags
= IB_DEVICE_CHANGE_PHY_PORT
|
233 IB_DEVICE_PORT_ACTIVE_EVENT
|
234 IB_DEVICE_SYS_IMAGE_GUID
|
235 IB_DEVICE_RC_RNR_NAK_GEN
;
237 if (MLX5_CAP_GEN(mdev
, pkv
))
238 props
->device_cap_flags
|= IB_DEVICE_BAD_PKEY_CNTR
;
239 if (MLX5_CAP_GEN(mdev
, qkv
))
240 props
->device_cap_flags
|= IB_DEVICE_BAD_QKEY_CNTR
;
241 if (MLX5_CAP_GEN(mdev
, apm
))
242 props
->device_cap_flags
|= IB_DEVICE_AUTO_PATH_MIG
;
243 props
->device_cap_flags
|= IB_DEVICE_LOCAL_DMA_LKEY
;
244 if (MLX5_CAP_GEN(mdev
, xrc
))
245 props
->device_cap_flags
|= IB_DEVICE_XRC
;
246 props
->device_cap_flags
|= IB_DEVICE_MEM_MGT_EXTENSIONS
;
247 if (MLX5_CAP_GEN(mdev
, sho
)) {
248 props
->device_cap_flags
|= IB_DEVICE_SIGNATURE_HANDOVER
;
249 /* At this stage no support for signature handover */
250 props
->sig_prot_cap
= IB_PROT_T10DIF_TYPE_1
|
251 IB_PROT_T10DIF_TYPE_2
|
252 IB_PROT_T10DIF_TYPE_3
;
253 props
->sig_guard_cap
= IB_GUARD_T10DIF_CRC
|
254 IB_GUARD_T10DIF_CSUM
;
256 if (MLX5_CAP_GEN(mdev
, block_lb_mc
))
257 props
->device_cap_flags
|= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK
;
259 props
->vendor_part_id
= mdev
->pdev
->device
;
260 props
->hw_ver
= mdev
->pdev
->revision
;
262 props
->max_mr_size
= ~0ull;
263 props
->page_size_cap
= 1ull << MLX5_CAP_GEN(mdev
, log_pg_sz
);
264 props
->max_qp
= 1 << MLX5_CAP_GEN(mdev
, log_max_qp
);
265 props
->max_qp_wr
= 1 << MLX5_CAP_GEN(mdev
, log_max_qp_sz
);
266 max_rq_sg
= MLX5_CAP_GEN(mdev
, max_wqe_sz_rq
) /
267 sizeof(struct mlx5_wqe_data_seg
);
268 max_sq_sg
= (MLX5_CAP_GEN(mdev
, max_wqe_sz_sq
) -
269 sizeof(struct mlx5_wqe_ctrl_seg
)) /
270 sizeof(struct mlx5_wqe_data_seg
);
271 props
->max_sge
= min(max_rq_sg
, max_sq_sg
);
272 props
->max_cq
= 1 << MLX5_CAP_GEN(mdev
, log_max_cq
);
273 props
->max_cqe
= (1 << MLX5_CAP_GEN(mdev
, log_max_eq_sz
)) - 1;
274 props
->max_mr
= 1 << MLX5_CAP_GEN(mdev
, log_max_mkey
);
275 props
->max_pd
= 1 << MLX5_CAP_GEN(mdev
, log_max_pd
);
276 props
->max_qp_rd_atom
= 1 << MLX5_CAP_GEN(mdev
, log_max_ra_req_qp
);
277 props
->max_qp_init_rd_atom
= 1 << MLX5_CAP_GEN(mdev
, log_max_ra_res_qp
);
278 props
->max_srq
= 1 << MLX5_CAP_GEN(mdev
, log_max_srq
);
279 props
->max_srq_wr
= (1 << MLX5_CAP_GEN(mdev
, log_max_srq_sz
)) - 1;
280 props
->local_ca_ack_delay
= MLX5_CAP_GEN(mdev
, local_ca_ack_delay
);
281 props
->max_res_rd_atom
= props
->max_qp_rd_atom
* props
->max_qp
;
282 props
->max_srq_sge
= max_rq_sg
- 1;
283 props
->max_fast_reg_page_list_len
= (unsigned int)-1;
284 props
->atomic_cap
= IB_ATOMIC_NONE
;
285 props
->masked_atomic_cap
= IB_ATOMIC_NONE
;
286 props
->max_mcast_grp
= 1 << MLX5_CAP_GEN(mdev
, log_max_mcg
);
287 props
->max_mcast_qp_attach
= MLX5_CAP_GEN(mdev
, max_qp_mcg
);
288 props
->max_total_mcast_qp_attach
= props
->max_mcast_qp_attach
*
289 props
->max_mcast_grp
;
290 props
->max_map_per_fmr
= INT_MAX
; /* no limit in ConnectIB */
292 #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
293 if (MLX5_CAP_GEN(mdev
, pg
))
294 props
->device_cap_flags
|= IB_DEVICE_ON_DEMAND_PAGING
;
295 props
->odp_caps
= dev
->odp_caps
;
302 MLX5_IB_WIDTH_1X
= 1 << 0,
303 MLX5_IB_WIDTH_2X
= 1 << 1,
304 MLX5_IB_WIDTH_4X
= 1 << 2,
305 MLX5_IB_WIDTH_8X
= 1 << 3,
306 MLX5_IB_WIDTH_12X
= 1 << 4
309 static int translate_active_width(struct ib_device
*ibdev
, u8 active_width
,
312 struct mlx5_ib_dev
*dev
= to_mdev(ibdev
);
315 if (active_width
& MLX5_IB_WIDTH_1X
) {
316 *ib_width
= IB_WIDTH_1X
;
317 } else if (active_width
& MLX5_IB_WIDTH_2X
) {
318 mlx5_ib_dbg(dev
, "active_width %d is not supported by IB spec\n",
321 } else if (active_width
& MLX5_IB_WIDTH_4X
) {
322 *ib_width
= IB_WIDTH_4X
;
323 } else if (active_width
& MLX5_IB_WIDTH_8X
) {
324 *ib_width
= IB_WIDTH_8X
;
325 } else if (active_width
& MLX5_IB_WIDTH_12X
) {
326 *ib_width
= IB_WIDTH_12X
;
328 mlx5_ib_dbg(dev
, "Invalid active_width %d\n",
336 static int mlx5_mtu_to_ib_mtu(int mtu
)
345 pr_warn("invalid mtu\n");
355 __IB_MAX_VL_0_14
= 5,
358 enum mlx5_vl_hw_cap
{
370 static int translate_max_vl_num(struct ib_device
*ibdev
, u8 vl_hw_cap
,
375 *max_vl_num
= __IB_MAX_VL_0
;
378 *max_vl_num
= __IB_MAX_VL_0_1
;
381 *max_vl_num
= __IB_MAX_VL_0_3
;
384 *max_vl_num
= __IB_MAX_VL_0_7
;
386 case MLX5_VL_HW_0_14
:
387 *max_vl_num
= __IB_MAX_VL_0_14
;
397 static int mlx5_query_hca_port(struct ib_device
*ibdev
, u8 port
,
398 struct ib_port_attr
*props
)
400 struct mlx5_ib_dev
*dev
= to_mdev(ibdev
);
401 struct mlx5_core_dev
*mdev
= dev
->mdev
;
402 struct mlx5_hca_vport_context
*rep
;
406 u8 ib_link_width_oper
;
409 rep
= kzalloc(sizeof(*rep
), GFP_KERNEL
);
415 memset(props
, 0, sizeof(*props
));
417 err
= mlx5_query_hca_vport_context(mdev
, 0, port
, 0, rep
);
421 props
->lid
= rep
->lid
;
422 props
->lmc
= rep
->lmc
;
423 props
->sm_lid
= rep
->sm_lid
;
424 props
->sm_sl
= rep
->sm_sl
;
425 props
->state
= rep
->vport_state
;
426 props
->phys_state
= rep
->port_physical_state
;
427 props
->port_cap_flags
= rep
->cap_mask1
;
428 props
->gid_tbl_len
= mlx5_get_gid_table_len(MLX5_CAP_GEN(mdev
, gid_table_size
));
429 props
->max_msg_sz
= 1 << MLX5_CAP_GEN(mdev
, log_max_msg
);
430 props
->pkey_tbl_len
= mlx5_to_sw_pkey_sz(MLX5_CAP_GEN(mdev
, pkey_table_size
));
431 props
->bad_pkey_cntr
= rep
->pkey_violation_counter
;
432 props
->qkey_viol_cntr
= rep
->qkey_violation_counter
;
433 props
->subnet_timeout
= rep
->subnet_timeout
;
434 props
->init_type_reply
= rep
->init_type_reply
;
436 err
= mlx5_query_port_link_width_oper(mdev
, &ib_link_width_oper
, port
);
440 err
= translate_active_width(ibdev
, ib_link_width_oper
,
441 &props
->active_width
);
444 err
= mlx5_query_port_proto_oper(mdev
, &props
->active_speed
, MLX5_PTYS_IB
,
449 err
= mlx5_query_port_max_mtu(mdev
, &max_mtu
, port
);
453 props
->max_mtu
= mlx5_mtu_to_ib_mtu(max_mtu
);
455 err
= mlx5_query_port_oper_mtu(mdev
, &oper_mtu
, port
);
459 props
->active_mtu
= mlx5_mtu_to_ib_mtu(oper_mtu
);
461 err
= mlx5_query_port_vl_hw_cap(mdev
, &vl_hw_cap
, port
);
465 err
= translate_max_vl_num(ibdev
, vl_hw_cap
,
472 int mlx5_ib_query_port(struct ib_device
*ibdev
, u8 port
,
473 struct ib_port_attr
*props
)
475 switch (mlx5_get_vport_access_method(ibdev
)) {
476 case MLX5_VPORT_ACCESS_METHOD_MAD
:
477 return mlx5_query_mad_ifc_port(ibdev
, port
, props
);
479 case MLX5_VPORT_ACCESS_METHOD_HCA
:
480 return mlx5_query_hca_port(ibdev
, port
, props
);
487 static int mlx5_ib_query_gid(struct ib_device
*ibdev
, u8 port
, int index
,
490 struct mlx5_ib_dev
*dev
= to_mdev(ibdev
);
491 struct mlx5_core_dev
*mdev
= dev
->mdev
;
493 switch (mlx5_get_vport_access_method(ibdev
)) {
494 case MLX5_VPORT_ACCESS_METHOD_MAD
:
495 return mlx5_query_mad_ifc_gids(ibdev
, port
, index
, gid
);
497 case MLX5_VPORT_ACCESS_METHOD_HCA
:
498 return mlx5_query_hca_vport_gid(mdev
, 0, port
, 0, index
, gid
);
506 static int mlx5_ib_query_pkey(struct ib_device
*ibdev
, u8 port
, u16 index
,
509 struct mlx5_ib_dev
*dev
= to_mdev(ibdev
);
510 struct mlx5_core_dev
*mdev
= dev
->mdev
;
512 switch (mlx5_get_vport_access_method(ibdev
)) {
513 case MLX5_VPORT_ACCESS_METHOD_MAD
:
514 return mlx5_query_mad_ifc_pkey(ibdev
, port
, index
, pkey
);
516 case MLX5_VPORT_ACCESS_METHOD_HCA
:
517 case MLX5_VPORT_ACCESS_METHOD_NIC
:
518 return mlx5_query_hca_vport_pkey(mdev
, 0, port
, 0, index
,
525 static int mlx5_ib_modify_device(struct ib_device
*ibdev
, int mask
,
526 struct ib_device_modify
*props
)
528 struct mlx5_ib_dev
*dev
= to_mdev(ibdev
);
529 struct mlx5_reg_node_desc in
;
530 struct mlx5_reg_node_desc out
;
533 if (mask
& ~IB_DEVICE_MODIFY_NODE_DESC
)
536 if (!(mask
& IB_DEVICE_MODIFY_NODE_DESC
))
540 * If possible, pass node desc to FW, so it can generate
541 * a 144 trap. If cmd fails, just ignore.
543 memcpy(&in
, props
->node_desc
, 64);
544 err
= mlx5_core_access_reg(dev
->mdev
, &in
, sizeof(in
), &out
,
545 sizeof(out
), MLX5_REG_NODE_DESC
, 0, 1);
549 memcpy(ibdev
->node_desc
, props
->node_desc
, 64);
554 static int mlx5_ib_modify_port(struct ib_device
*ibdev
, u8 port
, int mask
,
555 struct ib_port_modify
*props
)
557 struct mlx5_ib_dev
*dev
= to_mdev(ibdev
);
558 struct ib_port_attr attr
;
562 mutex_lock(&dev
->cap_mask_mutex
);
564 err
= mlx5_ib_query_port(ibdev
, port
, &attr
);
568 tmp
= (attr
.port_cap_flags
| props
->set_port_cap_mask
) &
569 ~props
->clr_port_cap_mask
;
571 err
= mlx5_set_port_caps(dev
->mdev
, port
, tmp
);
574 mutex_unlock(&dev
->cap_mask_mutex
);
578 static struct ib_ucontext
*mlx5_ib_alloc_ucontext(struct ib_device
*ibdev
,
579 struct ib_udata
*udata
)
581 struct mlx5_ib_dev
*dev
= to_mdev(ibdev
);
582 struct mlx5_ib_alloc_ucontext_req_v2 req
;
583 struct mlx5_ib_alloc_ucontext_resp resp
;
584 struct mlx5_ib_ucontext
*context
;
585 struct mlx5_uuar_info
*uuari
;
586 struct mlx5_uar
*uars
;
596 return ERR_PTR(-EAGAIN
);
598 memset(&req
, 0, sizeof(req
));
599 reqlen
= udata
->inlen
- sizeof(struct ib_uverbs_cmd_hdr
);
600 if (reqlen
== sizeof(struct mlx5_ib_alloc_ucontext_req
))
602 else if (reqlen
== sizeof(struct mlx5_ib_alloc_ucontext_req_v2
))
605 return ERR_PTR(-EINVAL
);
607 err
= ib_copy_from_udata(&req
, udata
, reqlen
);
611 if (req
.flags
|| req
.reserved
)
612 return ERR_PTR(-EINVAL
);
614 if (req
.total_num_uuars
> MLX5_MAX_UUARS
)
615 return ERR_PTR(-ENOMEM
);
617 if (req
.total_num_uuars
== 0)
618 return ERR_PTR(-EINVAL
);
620 req
.total_num_uuars
= ALIGN(req
.total_num_uuars
,
621 MLX5_NON_FP_BF_REGS_PER_PAGE
);
622 if (req
.num_low_latency_uuars
> req
.total_num_uuars
- 1)
623 return ERR_PTR(-EINVAL
);
625 num_uars
= req
.total_num_uuars
/ MLX5_NON_FP_BF_REGS_PER_PAGE
;
626 gross_uuars
= num_uars
* MLX5_BF_REGS_PER_PAGE
;
627 resp
.qp_tab_size
= 1 << MLX5_CAP_GEN(dev
->mdev
, log_max_qp
);
628 resp
.bf_reg_size
= 1 << MLX5_CAP_GEN(dev
->mdev
, log_bf_reg_size
);
629 resp
.cache_line_size
= L1_CACHE_BYTES
;
630 resp
.max_sq_desc_sz
= MLX5_CAP_GEN(dev
->mdev
, max_wqe_sz_sq
);
631 resp
.max_rq_desc_sz
= MLX5_CAP_GEN(dev
->mdev
, max_wqe_sz_rq
);
632 resp
.max_send_wqebb
= 1 << MLX5_CAP_GEN(dev
->mdev
, log_max_qp_sz
);
633 resp
.max_recv_wr
= 1 << MLX5_CAP_GEN(dev
->mdev
, log_max_qp_sz
);
634 resp
.max_srq_recv_wr
= 1 << MLX5_CAP_GEN(dev
->mdev
, log_max_srq_sz
);
636 context
= kzalloc(sizeof(*context
), GFP_KERNEL
);
638 return ERR_PTR(-ENOMEM
);
640 uuari
= &context
->uuari
;
641 mutex_init(&uuari
->lock
);
642 uars
= kcalloc(num_uars
, sizeof(*uars
), GFP_KERNEL
);
648 uuari
->bitmap
= kcalloc(BITS_TO_LONGS(gross_uuars
),
649 sizeof(*uuari
->bitmap
),
651 if (!uuari
->bitmap
) {
656 * clear all fast path uuars
658 for (i
= 0; i
< gross_uuars
; i
++) {
660 if (uuarn
== 2 || uuarn
== 3)
661 set_bit(i
, uuari
->bitmap
);
664 uuari
->count
= kcalloc(gross_uuars
, sizeof(*uuari
->count
), GFP_KERNEL
);
670 for (i
= 0; i
< num_uars
; i
++) {
671 err
= mlx5_cmd_alloc_uar(dev
->mdev
, &uars
[i
].index
);
676 #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
677 context
->ibucontext
.invalidate_range
= &mlx5_ib_invalidate_range
;
680 INIT_LIST_HEAD(&context
->db_page_list
);
681 mutex_init(&context
->db_page_mutex
);
683 resp
.tot_uuars
= req
.total_num_uuars
;
684 resp
.num_ports
= MLX5_CAP_GEN(dev
->mdev
, num_ports
);
685 err
= ib_copy_to_udata(udata
, &resp
,
686 sizeof(resp
) - sizeof(resp
.reserved
));
691 uuari
->num_low_latency_uuars
= req
.num_low_latency_uuars
;
693 uuari
->num_uars
= num_uars
;
694 return &context
->ibucontext
;
697 for (i
--; i
>= 0; i
--)
698 mlx5_cmd_free_uar(dev
->mdev
, uars
[i
].index
);
703 kfree(uuari
->bitmap
);
713 static int mlx5_ib_dealloc_ucontext(struct ib_ucontext
*ibcontext
)
715 struct mlx5_ib_ucontext
*context
= to_mucontext(ibcontext
);
716 struct mlx5_ib_dev
*dev
= to_mdev(ibcontext
->device
);
717 struct mlx5_uuar_info
*uuari
= &context
->uuari
;
720 for (i
= 0; i
< uuari
->num_uars
; i
++) {
721 if (mlx5_cmd_free_uar(dev
->mdev
, uuari
->uars
[i
].index
))
722 mlx5_ib_warn(dev
, "failed to free UAR 0x%x\n", uuari
->uars
[i
].index
);
726 kfree(uuari
->bitmap
);
733 static phys_addr_t
uar_index2pfn(struct mlx5_ib_dev
*dev
, int index
)
735 return (pci_resource_start(dev
->mdev
->pdev
, 0) >> PAGE_SHIFT
) + index
;
738 static int get_command(unsigned long offset
)
740 return (offset
>> MLX5_IB_MMAP_CMD_SHIFT
) & MLX5_IB_MMAP_CMD_MASK
;
743 static int get_arg(unsigned long offset
)
745 return offset
& ((1 << MLX5_IB_MMAP_CMD_SHIFT
) - 1);
748 static int get_index(unsigned long offset
)
750 return get_arg(offset
);
753 static int mlx5_ib_mmap(struct ib_ucontext
*ibcontext
, struct vm_area_struct
*vma
)
755 struct mlx5_ib_ucontext
*context
= to_mucontext(ibcontext
);
756 struct mlx5_ib_dev
*dev
= to_mdev(ibcontext
->device
);
757 struct mlx5_uuar_info
*uuari
= &context
->uuari
;
758 unsigned long command
;
762 command
= get_command(vma
->vm_pgoff
);
764 case MLX5_IB_MMAP_REGULAR_PAGE
:
765 if (vma
->vm_end
- vma
->vm_start
!= PAGE_SIZE
)
768 idx
= get_index(vma
->vm_pgoff
);
769 if (idx
>= uuari
->num_uars
)
772 pfn
= uar_index2pfn(dev
, uuari
->uars
[idx
].index
);
773 mlx5_ib_dbg(dev
, "uar idx 0x%lx, pfn 0x%llx\n", idx
,
774 (unsigned long long)pfn
);
776 vma
->vm_page_prot
= pgprot_writecombine(vma
->vm_page_prot
);
777 if (io_remap_pfn_range(vma
, vma
->vm_start
, pfn
,
778 PAGE_SIZE
, vma
->vm_page_prot
))
781 mlx5_ib_dbg(dev
, "mapped WC at 0x%lx, PA 0x%llx\n",
783 (unsigned long long)pfn
<< PAGE_SHIFT
);
786 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES
:
796 static int alloc_pa_mkey(struct mlx5_ib_dev
*dev
, u32
*key
, u32 pdn
)
798 struct mlx5_create_mkey_mbox_in
*in
;
799 struct mlx5_mkey_seg
*seg
;
800 struct mlx5_core_mr mr
;
803 in
= kzalloc(sizeof(*in
), GFP_KERNEL
);
808 seg
->flags
= MLX5_PERM_LOCAL_READ
| MLX5_ACCESS_MODE_PA
;
809 seg
->flags_pd
= cpu_to_be32(pdn
| MLX5_MKEY_LEN64
);
810 seg
->qpn_mkey7_0
= cpu_to_be32(0xffffff << 8);
813 err
= mlx5_core_create_mkey(dev
->mdev
, &mr
, in
, sizeof(*in
),
816 mlx5_ib_warn(dev
, "failed to create mkey, %d\n", err
);
831 static void free_pa_mkey(struct mlx5_ib_dev
*dev
, u32 key
)
833 struct mlx5_core_mr mr
;
836 memset(&mr
, 0, sizeof(mr
));
838 err
= mlx5_core_destroy_mkey(dev
->mdev
, &mr
);
840 mlx5_ib_warn(dev
, "failed to destroy mkey 0x%x\n", key
);
843 static struct ib_pd
*mlx5_ib_alloc_pd(struct ib_device
*ibdev
,
844 struct ib_ucontext
*context
,
845 struct ib_udata
*udata
)
847 struct mlx5_ib_alloc_pd_resp resp
;
848 struct mlx5_ib_pd
*pd
;
851 pd
= kmalloc(sizeof(*pd
), GFP_KERNEL
);
853 return ERR_PTR(-ENOMEM
);
855 err
= mlx5_core_alloc_pd(to_mdev(ibdev
)->mdev
, &pd
->pdn
);
863 if (ib_copy_to_udata(udata
, &resp
, sizeof(resp
))) {
864 mlx5_core_dealloc_pd(to_mdev(ibdev
)->mdev
, pd
->pdn
);
866 return ERR_PTR(-EFAULT
);
869 err
= alloc_pa_mkey(to_mdev(ibdev
), &pd
->pa_lkey
, pd
->pdn
);
871 mlx5_core_dealloc_pd(to_mdev(ibdev
)->mdev
, pd
->pdn
);
880 static int mlx5_ib_dealloc_pd(struct ib_pd
*pd
)
882 struct mlx5_ib_dev
*mdev
= to_mdev(pd
->device
);
883 struct mlx5_ib_pd
*mpd
= to_mpd(pd
);
886 free_pa_mkey(mdev
, mpd
->pa_lkey
);
888 mlx5_core_dealloc_pd(mdev
->mdev
, mpd
->pdn
);
894 static int mlx5_ib_mcg_attach(struct ib_qp
*ibqp
, union ib_gid
*gid
, u16 lid
)
896 struct mlx5_ib_dev
*dev
= to_mdev(ibqp
->device
);
899 err
= mlx5_core_attach_mcg(dev
->mdev
, gid
, ibqp
->qp_num
);
901 mlx5_ib_warn(dev
, "failed attaching QPN 0x%x, MGID %pI6\n",
902 ibqp
->qp_num
, gid
->raw
);
907 static int mlx5_ib_mcg_detach(struct ib_qp
*ibqp
, union ib_gid
*gid
, u16 lid
)
909 struct mlx5_ib_dev
*dev
= to_mdev(ibqp
->device
);
912 err
= mlx5_core_detach_mcg(dev
->mdev
, gid
, ibqp
->qp_num
);
914 mlx5_ib_warn(dev
, "failed detaching QPN 0x%x, MGID %pI6\n",
915 ibqp
->qp_num
, gid
->raw
);
920 static int init_node_data(struct mlx5_ib_dev
*dev
)
924 err
= mlx5_query_node_desc(dev
, dev
->ib_dev
.node_desc
);
928 dev
->mdev
->rev_id
= dev
->mdev
->pdev
->revision
;
930 return mlx5_query_node_guid(dev
, &dev
->ib_dev
.node_guid
);
933 static ssize_t
show_fw_pages(struct device
*device
, struct device_attribute
*attr
,
936 struct mlx5_ib_dev
*dev
=
937 container_of(device
, struct mlx5_ib_dev
, ib_dev
.dev
);
939 return sprintf(buf
, "%d\n", dev
->mdev
->priv
.fw_pages
);
942 static ssize_t
show_reg_pages(struct device
*device
,
943 struct device_attribute
*attr
, char *buf
)
945 struct mlx5_ib_dev
*dev
=
946 container_of(device
, struct mlx5_ib_dev
, ib_dev
.dev
);
948 return sprintf(buf
, "%d\n", atomic_read(&dev
->mdev
->priv
.reg_pages
));
951 static ssize_t
show_hca(struct device
*device
, struct device_attribute
*attr
,
954 struct mlx5_ib_dev
*dev
=
955 container_of(device
, struct mlx5_ib_dev
, ib_dev
.dev
);
956 return sprintf(buf
, "MT%d\n", dev
->mdev
->pdev
->device
);
959 static ssize_t
show_fw_ver(struct device
*device
, struct device_attribute
*attr
,
962 struct mlx5_ib_dev
*dev
=
963 container_of(device
, struct mlx5_ib_dev
, ib_dev
.dev
);
964 return sprintf(buf
, "%d.%d.%d\n", fw_rev_maj(dev
->mdev
),
965 fw_rev_min(dev
->mdev
), fw_rev_sub(dev
->mdev
));
968 static ssize_t
show_rev(struct device
*device
, struct device_attribute
*attr
,
971 struct mlx5_ib_dev
*dev
=
972 container_of(device
, struct mlx5_ib_dev
, ib_dev
.dev
);
973 return sprintf(buf
, "%x\n", dev
->mdev
->rev_id
);
976 static ssize_t
show_board(struct device
*device
, struct device_attribute
*attr
,
979 struct mlx5_ib_dev
*dev
=
980 container_of(device
, struct mlx5_ib_dev
, ib_dev
.dev
);
981 return sprintf(buf
, "%.*s\n", MLX5_BOARD_ID_LEN
,
982 dev
->mdev
->board_id
);
985 static DEVICE_ATTR(hw_rev
, S_IRUGO
, show_rev
, NULL
);
986 static DEVICE_ATTR(fw_ver
, S_IRUGO
, show_fw_ver
, NULL
);
987 static DEVICE_ATTR(hca_type
, S_IRUGO
, show_hca
, NULL
);
988 static DEVICE_ATTR(board_id
, S_IRUGO
, show_board
, NULL
);
989 static DEVICE_ATTR(fw_pages
, S_IRUGO
, show_fw_pages
, NULL
);
990 static DEVICE_ATTR(reg_pages
, S_IRUGO
, show_reg_pages
, NULL
);
992 static struct device_attribute
*mlx5_class_attributes
[] = {
1001 static void mlx5_ib_event(struct mlx5_core_dev
*dev
, void *context
,
1002 enum mlx5_dev_event event
, unsigned long param
)
1004 struct mlx5_ib_dev
*ibdev
= (struct mlx5_ib_dev
*)context
;
1005 struct ib_event ibev
;
1010 case MLX5_DEV_EVENT_SYS_ERROR
:
1011 ibdev
->ib_active
= false;
1012 ibev
.event
= IB_EVENT_DEVICE_FATAL
;
1015 case MLX5_DEV_EVENT_PORT_UP
:
1016 ibev
.event
= IB_EVENT_PORT_ACTIVE
;
1020 case MLX5_DEV_EVENT_PORT_DOWN
:
1021 ibev
.event
= IB_EVENT_PORT_ERR
;
1025 case MLX5_DEV_EVENT_PORT_INITIALIZED
:
1026 /* not used by ULPs */
1029 case MLX5_DEV_EVENT_LID_CHANGE
:
1030 ibev
.event
= IB_EVENT_LID_CHANGE
;
1034 case MLX5_DEV_EVENT_PKEY_CHANGE
:
1035 ibev
.event
= IB_EVENT_PKEY_CHANGE
;
1039 case MLX5_DEV_EVENT_GUID_CHANGE
:
1040 ibev
.event
= IB_EVENT_GID_CHANGE
;
1044 case MLX5_DEV_EVENT_CLIENT_REREG
:
1045 ibev
.event
= IB_EVENT_CLIENT_REREGISTER
;
1050 ibev
.device
= &ibdev
->ib_dev
;
1051 ibev
.element
.port_num
= port
;
1053 if (port
< 1 || port
> ibdev
->num_ports
) {
1054 mlx5_ib_warn(ibdev
, "warning: event on port %d\n", port
);
1058 if (ibdev
->ib_active
)
1059 ib_dispatch_event(&ibev
);
1062 static void get_ext_port_caps(struct mlx5_ib_dev
*dev
)
1066 for (port
= 1; port
<= MLX5_CAP_GEN(dev
->mdev
, num_ports
); port
++)
1067 mlx5_query_ext_port_caps(dev
, port
);
1070 static int get_port_caps(struct mlx5_ib_dev
*dev
)
1072 struct ib_device_attr
*dprops
= NULL
;
1073 struct ib_port_attr
*pprops
= NULL
;
1077 pprops
= kmalloc(sizeof(*pprops
), GFP_KERNEL
);
1081 dprops
= kmalloc(sizeof(*dprops
), GFP_KERNEL
);
1085 err
= mlx5_ib_query_device(&dev
->ib_dev
, dprops
);
1087 mlx5_ib_warn(dev
, "query_device failed %d\n", err
);
1091 for (port
= 1; port
<= MLX5_CAP_GEN(dev
->mdev
, num_ports
); port
++) {
1092 err
= mlx5_ib_query_port(&dev
->ib_dev
, port
, pprops
);
1094 mlx5_ib_warn(dev
, "query_port %d failed %d\n",
1098 dev
->mdev
->port_caps
[port
- 1].pkey_table_len
=
1100 dev
->mdev
->port_caps
[port
- 1].gid_table_len
=
1101 pprops
->gid_tbl_len
;
1102 mlx5_ib_dbg(dev
, "pkey_table_len %d, gid_table_len %d\n",
1103 dprops
->max_pkeys
, pprops
->gid_tbl_len
);
1113 static void destroy_umrc_res(struct mlx5_ib_dev
*dev
)
1117 err
= mlx5_mr_cache_cleanup(dev
);
1119 mlx5_ib_warn(dev
, "mr cache cleanup failed\n");
1121 mlx5_ib_destroy_qp(dev
->umrc
.qp
);
1122 ib_destroy_cq(dev
->umrc
.cq
);
1123 ib_dereg_mr(dev
->umrc
.mr
);
1124 ib_dealloc_pd(dev
->umrc
.pd
);
1131 static int create_umr_res(struct mlx5_ib_dev
*dev
)
1133 struct ib_qp_init_attr
*init_attr
= NULL
;
1134 struct ib_qp_attr
*attr
= NULL
;
1141 attr
= kzalloc(sizeof(*attr
), GFP_KERNEL
);
1142 init_attr
= kzalloc(sizeof(*init_attr
), GFP_KERNEL
);
1143 if (!attr
|| !init_attr
) {
1148 pd
= ib_alloc_pd(&dev
->ib_dev
);
1150 mlx5_ib_dbg(dev
, "Couldn't create PD for sync UMR QP\n");
1155 mr
= ib_get_dma_mr(pd
, IB_ACCESS_LOCAL_WRITE
);
1157 mlx5_ib_dbg(dev
, "Couldn't create DMA MR for sync UMR QP\n");
1162 cq
= ib_create_cq(&dev
->ib_dev
, mlx5_umr_cq_handler
, NULL
, NULL
, 128,
1165 mlx5_ib_dbg(dev
, "Couldn't create CQ for sync UMR QP\n");
1169 ib_req_notify_cq(cq
, IB_CQ_NEXT_COMP
);
1171 init_attr
->send_cq
= cq
;
1172 init_attr
->recv_cq
= cq
;
1173 init_attr
->sq_sig_type
= IB_SIGNAL_ALL_WR
;
1174 init_attr
->cap
.max_send_wr
= MAX_UMR_WR
;
1175 init_attr
->cap
.max_send_sge
= 1;
1176 init_attr
->qp_type
= MLX5_IB_QPT_REG_UMR
;
1177 init_attr
->port_num
= 1;
1178 qp
= mlx5_ib_create_qp(pd
, init_attr
, NULL
);
1180 mlx5_ib_dbg(dev
, "Couldn't create sync UMR QP\n");
1184 qp
->device
= &dev
->ib_dev
;
1187 qp
->qp_type
= MLX5_IB_QPT_REG_UMR
;
1189 attr
->qp_state
= IB_QPS_INIT
;
1191 ret
= mlx5_ib_modify_qp(qp
, attr
, IB_QP_STATE
| IB_QP_PKEY_INDEX
|
1194 mlx5_ib_dbg(dev
, "Couldn't modify UMR QP\n");
1198 memset(attr
, 0, sizeof(*attr
));
1199 attr
->qp_state
= IB_QPS_RTR
;
1200 attr
->path_mtu
= IB_MTU_256
;
1202 ret
= mlx5_ib_modify_qp(qp
, attr
, IB_QP_STATE
, NULL
);
1204 mlx5_ib_dbg(dev
, "Couldn't modify umr QP to rtr\n");
1208 memset(attr
, 0, sizeof(*attr
));
1209 attr
->qp_state
= IB_QPS_RTS
;
1210 ret
= mlx5_ib_modify_qp(qp
, attr
, IB_QP_STATE
, NULL
);
1212 mlx5_ib_dbg(dev
, "Couldn't modify umr QP to rts\n");
1221 sema_init(&dev
->umrc
.sem
, MAX_UMR_WR
);
1222 ret
= mlx5_mr_cache_init(dev
);
1224 mlx5_ib_warn(dev
, "mr cache init failed %d\n", ret
);
1234 mlx5_ib_destroy_qp(qp
);
1251 static int create_dev_resources(struct mlx5_ib_resources
*devr
)
1253 struct ib_srq_init_attr attr
;
1254 struct mlx5_ib_dev
*dev
;
1257 dev
= container_of(devr
, struct mlx5_ib_dev
, devr
);
1259 devr
->p0
= mlx5_ib_alloc_pd(&dev
->ib_dev
, NULL
, NULL
);
1260 if (IS_ERR(devr
->p0
)) {
1261 ret
= PTR_ERR(devr
->p0
);
1264 devr
->p0
->device
= &dev
->ib_dev
;
1265 devr
->p0
->uobject
= NULL
;
1266 atomic_set(&devr
->p0
->usecnt
, 0);
1268 devr
->c0
= mlx5_ib_create_cq(&dev
->ib_dev
, 1, 0, NULL
, NULL
);
1269 if (IS_ERR(devr
->c0
)) {
1270 ret
= PTR_ERR(devr
->c0
);
1273 devr
->c0
->device
= &dev
->ib_dev
;
1274 devr
->c0
->uobject
= NULL
;
1275 devr
->c0
->comp_handler
= NULL
;
1276 devr
->c0
->event_handler
= NULL
;
1277 devr
->c0
->cq_context
= NULL
;
1278 atomic_set(&devr
->c0
->usecnt
, 0);
1280 devr
->x0
= mlx5_ib_alloc_xrcd(&dev
->ib_dev
, NULL
, NULL
);
1281 if (IS_ERR(devr
->x0
)) {
1282 ret
= PTR_ERR(devr
->x0
);
1285 devr
->x0
->device
= &dev
->ib_dev
;
1286 devr
->x0
->inode
= NULL
;
1287 atomic_set(&devr
->x0
->usecnt
, 0);
1288 mutex_init(&devr
->x0
->tgt_qp_mutex
);
1289 INIT_LIST_HEAD(&devr
->x0
->tgt_qp_list
);
1291 devr
->x1
= mlx5_ib_alloc_xrcd(&dev
->ib_dev
, NULL
, NULL
);
1292 if (IS_ERR(devr
->x1
)) {
1293 ret
= PTR_ERR(devr
->x1
);
1296 devr
->x1
->device
= &dev
->ib_dev
;
1297 devr
->x1
->inode
= NULL
;
1298 atomic_set(&devr
->x1
->usecnt
, 0);
1299 mutex_init(&devr
->x1
->tgt_qp_mutex
);
1300 INIT_LIST_HEAD(&devr
->x1
->tgt_qp_list
);
1302 memset(&attr
, 0, sizeof(attr
));
1303 attr
.attr
.max_sge
= 1;
1304 attr
.attr
.max_wr
= 1;
1305 attr
.srq_type
= IB_SRQT_XRC
;
1306 attr
.ext
.xrc
.cq
= devr
->c0
;
1307 attr
.ext
.xrc
.xrcd
= devr
->x0
;
1309 devr
->s0
= mlx5_ib_create_srq(devr
->p0
, &attr
, NULL
);
1310 if (IS_ERR(devr
->s0
)) {
1311 ret
= PTR_ERR(devr
->s0
);
1314 devr
->s0
->device
= &dev
->ib_dev
;
1315 devr
->s0
->pd
= devr
->p0
;
1316 devr
->s0
->uobject
= NULL
;
1317 devr
->s0
->event_handler
= NULL
;
1318 devr
->s0
->srq_context
= NULL
;
1319 devr
->s0
->srq_type
= IB_SRQT_XRC
;
1320 devr
->s0
->ext
.xrc
.xrcd
= devr
->x0
;
1321 devr
->s0
->ext
.xrc
.cq
= devr
->c0
;
1322 atomic_inc(&devr
->s0
->ext
.xrc
.xrcd
->usecnt
);
1323 atomic_inc(&devr
->s0
->ext
.xrc
.cq
->usecnt
);
1324 atomic_inc(&devr
->p0
->usecnt
);
1325 atomic_set(&devr
->s0
->usecnt
, 0);
1327 memset(&attr
, 0, sizeof(attr
));
1328 attr
.attr
.max_sge
= 1;
1329 attr
.attr
.max_wr
= 1;
1330 attr
.srq_type
= IB_SRQT_BASIC
;
1331 devr
->s1
= mlx5_ib_create_srq(devr
->p0
, &attr
, NULL
);
1332 if (IS_ERR(devr
->s1
)) {
1333 ret
= PTR_ERR(devr
->s1
);
1336 devr
->s1
->device
= &dev
->ib_dev
;
1337 devr
->s1
->pd
= devr
->p0
;
1338 devr
->s1
->uobject
= NULL
;
1339 devr
->s1
->event_handler
= NULL
;
1340 devr
->s1
->srq_context
= NULL
;
1341 devr
->s1
->srq_type
= IB_SRQT_BASIC
;
1342 devr
->s1
->ext
.xrc
.cq
= devr
->c0
;
1343 atomic_inc(&devr
->p0
->usecnt
);
1344 atomic_set(&devr
->s0
->usecnt
, 0);
1349 mlx5_ib_destroy_srq(devr
->s0
);
1351 mlx5_ib_dealloc_xrcd(devr
->x1
);
1353 mlx5_ib_dealloc_xrcd(devr
->x0
);
1355 mlx5_ib_destroy_cq(devr
->c0
);
1357 mlx5_ib_dealloc_pd(devr
->p0
);
1362 static void destroy_dev_resources(struct mlx5_ib_resources
*devr
)
1364 mlx5_ib_destroy_srq(devr
->s1
);
1365 mlx5_ib_destroy_srq(devr
->s0
);
1366 mlx5_ib_dealloc_xrcd(devr
->x0
);
1367 mlx5_ib_dealloc_xrcd(devr
->x1
);
1368 mlx5_ib_destroy_cq(devr
->c0
);
1369 mlx5_ib_dealloc_pd(devr
->p0
);
1372 static void *mlx5_ib_add(struct mlx5_core_dev
*mdev
)
1374 struct mlx5_ib_dev
*dev
;
1378 /* don't create IB instance over Eth ports, no RoCE yet! */
1379 if (MLX5_CAP_GEN(mdev
, port_type
) == MLX5_CAP_PORT_TYPE_ETH
)
1382 printk_once(KERN_INFO
"%s", mlx5_version
);
1384 dev
= (struct mlx5_ib_dev
*)ib_alloc_device(sizeof(*dev
));
1390 err
= get_port_caps(dev
);
1394 if (mlx5_use_mad_ifc(dev
))
1395 get_ext_port_caps(dev
);
1397 MLX5_INIT_DOORBELL_LOCK(&dev
->uar_lock
);
1399 strlcpy(dev
->ib_dev
.name
, "mlx5_%d", IB_DEVICE_NAME_MAX
);
1400 dev
->ib_dev
.owner
= THIS_MODULE
;
1401 dev
->ib_dev
.node_type
= RDMA_NODE_IB_CA
;
1402 dev
->ib_dev
.local_dma_lkey
= 0 /* not supported for now */;
1403 dev
->num_ports
= MLX5_CAP_GEN(mdev
, num_ports
);
1404 dev
->ib_dev
.phys_port_cnt
= dev
->num_ports
;
1405 dev
->ib_dev
.num_comp_vectors
=
1406 dev
->mdev
->priv
.eq_table
.num_comp_vectors
;
1407 dev
->ib_dev
.dma_device
= &mdev
->pdev
->dev
;
1409 dev
->ib_dev
.uverbs_abi_ver
= MLX5_IB_UVERBS_ABI_VERSION
;
1410 dev
->ib_dev
.uverbs_cmd_mask
=
1411 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT
) |
1412 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE
) |
1413 (1ull << IB_USER_VERBS_CMD_QUERY_PORT
) |
1414 (1ull << IB_USER_VERBS_CMD_ALLOC_PD
) |
1415 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD
) |
1416 (1ull << IB_USER_VERBS_CMD_REG_MR
) |
1417 (1ull << IB_USER_VERBS_CMD_DEREG_MR
) |
1418 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL
) |
1419 (1ull << IB_USER_VERBS_CMD_CREATE_CQ
) |
1420 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ
) |
1421 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ
) |
1422 (1ull << IB_USER_VERBS_CMD_CREATE_QP
) |
1423 (1ull << IB_USER_VERBS_CMD_MODIFY_QP
) |
1424 (1ull << IB_USER_VERBS_CMD_QUERY_QP
) |
1425 (1ull << IB_USER_VERBS_CMD_DESTROY_QP
) |
1426 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST
) |
1427 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST
) |
1428 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ
) |
1429 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ
) |
1430 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ
) |
1431 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ
) |
1432 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ
) |
1433 (1ull << IB_USER_VERBS_CMD_OPEN_QP
);
1434 dev
->ib_dev
.uverbs_ex_cmd_mask
=
1435 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE
);
1437 dev
->ib_dev
.query_device
= mlx5_ib_query_device
;
1438 dev
->ib_dev
.query_port
= mlx5_ib_query_port
;
1439 dev
->ib_dev
.query_gid
= mlx5_ib_query_gid
;
1440 dev
->ib_dev
.query_pkey
= mlx5_ib_query_pkey
;
1441 dev
->ib_dev
.modify_device
= mlx5_ib_modify_device
;
1442 dev
->ib_dev
.modify_port
= mlx5_ib_modify_port
;
1443 dev
->ib_dev
.alloc_ucontext
= mlx5_ib_alloc_ucontext
;
1444 dev
->ib_dev
.dealloc_ucontext
= mlx5_ib_dealloc_ucontext
;
1445 dev
->ib_dev
.mmap
= mlx5_ib_mmap
;
1446 dev
->ib_dev
.alloc_pd
= mlx5_ib_alloc_pd
;
1447 dev
->ib_dev
.dealloc_pd
= mlx5_ib_dealloc_pd
;
1448 dev
->ib_dev
.create_ah
= mlx5_ib_create_ah
;
1449 dev
->ib_dev
.query_ah
= mlx5_ib_query_ah
;
1450 dev
->ib_dev
.destroy_ah
= mlx5_ib_destroy_ah
;
1451 dev
->ib_dev
.create_srq
= mlx5_ib_create_srq
;
1452 dev
->ib_dev
.modify_srq
= mlx5_ib_modify_srq
;
1453 dev
->ib_dev
.query_srq
= mlx5_ib_query_srq
;
1454 dev
->ib_dev
.destroy_srq
= mlx5_ib_destroy_srq
;
1455 dev
->ib_dev
.post_srq_recv
= mlx5_ib_post_srq_recv
;
1456 dev
->ib_dev
.create_qp
= mlx5_ib_create_qp
;
1457 dev
->ib_dev
.modify_qp
= mlx5_ib_modify_qp
;
1458 dev
->ib_dev
.query_qp
= mlx5_ib_query_qp
;
1459 dev
->ib_dev
.destroy_qp
= mlx5_ib_destroy_qp
;
1460 dev
->ib_dev
.post_send
= mlx5_ib_post_send
;
1461 dev
->ib_dev
.post_recv
= mlx5_ib_post_recv
;
1462 dev
->ib_dev
.create_cq
= mlx5_ib_create_cq
;
1463 dev
->ib_dev
.modify_cq
= mlx5_ib_modify_cq
;
1464 dev
->ib_dev
.resize_cq
= mlx5_ib_resize_cq
;
1465 dev
->ib_dev
.destroy_cq
= mlx5_ib_destroy_cq
;
1466 dev
->ib_dev
.poll_cq
= mlx5_ib_poll_cq
;
1467 dev
->ib_dev
.req_notify_cq
= mlx5_ib_arm_cq
;
1468 dev
->ib_dev
.get_dma_mr
= mlx5_ib_get_dma_mr
;
1469 dev
->ib_dev
.reg_user_mr
= mlx5_ib_reg_user_mr
;
1470 dev
->ib_dev
.dereg_mr
= mlx5_ib_dereg_mr
;
1471 dev
->ib_dev
.destroy_mr
= mlx5_ib_destroy_mr
;
1472 dev
->ib_dev
.attach_mcast
= mlx5_ib_mcg_attach
;
1473 dev
->ib_dev
.detach_mcast
= mlx5_ib_mcg_detach
;
1474 dev
->ib_dev
.process_mad
= mlx5_ib_process_mad
;
1475 dev
->ib_dev
.create_mr
= mlx5_ib_create_mr
;
1476 dev
->ib_dev
.alloc_fast_reg_mr
= mlx5_ib_alloc_fast_reg_mr
;
1477 dev
->ib_dev
.alloc_fast_reg_page_list
= mlx5_ib_alloc_fast_reg_page_list
;
1478 dev
->ib_dev
.free_fast_reg_page_list
= mlx5_ib_free_fast_reg_page_list
;
1479 dev
->ib_dev
.check_mr_status
= mlx5_ib_check_mr_status
;
1481 mlx5_ib_internal_fill_odp_caps(dev
);
1483 if (MLX5_CAP_GEN(mdev
, xrc
)) {
1484 dev
->ib_dev
.alloc_xrcd
= mlx5_ib_alloc_xrcd
;
1485 dev
->ib_dev
.dealloc_xrcd
= mlx5_ib_dealloc_xrcd
;
1486 dev
->ib_dev
.uverbs_cmd_mask
|=
1487 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD
) |
1488 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD
);
1491 err
= init_node_data(dev
);
1495 mutex_init(&dev
->cap_mask_mutex
);
1497 err
= create_dev_resources(&dev
->devr
);
1501 err
= mlx5_ib_odp_init_one(dev
);
1505 err
= ib_register_device(&dev
->ib_dev
, NULL
);
1509 err
= create_umr_res(dev
);
1513 for (i
= 0; i
< ARRAY_SIZE(mlx5_class_attributes
); i
++) {
1514 err
= device_create_file(&dev
->ib_dev
.dev
,
1515 mlx5_class_attributes
[i
]);
1520 dev
->ib_active
= true;
1525 destroy_umrc_res(dev
);
1528 ib_unregister_device(&dev
->ib_dev
);
1531 mlx5_ib_odp_remove_one(dev
);
1534 destroy_dev_resources(&dev
->devr
);
1537 ib_dealloc_device((struct ib_device
*)dev
);
1542 static void mlx5_ib_remove(struct mlx5_core_dev
*mdev
, void *context
)
1544 struct mlx5_ib_dev
*dev
= context
;
1546 ib_unregister_device(&dev
->ib_dev
);
1547 destroy_umrc_res(dev
);
1548 mlx5_ib_odp_remove_one(dev
);
1549 destroy_dev_resources(&dev
->devr
);
1550 ib_dealloc_device(&dev
->ib_dev
);
1553 static struct mlx5_interface mlx5_ib_interface
= {
1555 .remove
= mlx5_ib_remove
,
1556 .event
= mlx5_ib_event
,
1557 .protocol
= MLX5_INTERFACE_PROTOCOL_IB
,
1560 static int __init
mlx5_ib_init(void)
1564 if (deprecated_prof_sel
!= 2)
1565 pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n");
1567 err
= mlx5_ib_odp_init();
1571 err
= mlx5_register_interface(&mlx5_ib_interface
);
1578 mlx5_ib_odp_cleanup();
1582 static void __exit
mlx5_ib_cleanup(void)
1584 mlx5_unregister_interface(&mlx5_ib_interface
);
1585 mlx5_ib_odp_cleanup();
1588 module_init(mlx5_ib_init
);
1589 module_exit(mlx5_ib_cleanup
);