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Merge branch 'for-linville' of git://github.com/kvalo/ath
[deliverable/linux.git] / drivers / infiniband / hw / mlx5 / main.c
1 /*
2 * Copyright (c) 2013, Mellanox Technologies inc. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include <asm-generic/kmap_types.h>
34 #include <linux/module.h>
35 #include <linux/init.h>
36 #include <linux/errno.h>
37 #include <linux/pci.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/slab.h>
40 #include <linux/io-mapping.h>
41 #include <linux/sched.h>
42 #include <rdma/ib_user_verbs.h>
43 #include <rdma/ib_smi.h>
44 #include <rdma/ib_umem.h>
45 #include "user.h"
46 #include "mlx5_ib.h"
47
48 #define DRIVER_NAME "mlx5_ib"
49 #define DRIVER_VERSION "2.2-1"
50 #define DRIVER_RELDATE "Feb 2014"
51
52 MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
53 MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver");
54 MODULE_LICENSE("Dual BSD/GPL");
55 MODULE_VERSION(DRIVER_VERSION);
56
57 static int prof_sel = 2;
58 module_param_named(prof_sel, prof_sel, int, 0444);
59 MODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2");
60
61 static char mlx5_version[] =
62 DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v"
63 DRIVER_VERSION " (" DRIVER_RELDATE ")\n";
64
65 static struct mlx5_profile profile[] = {
66 [0] = {
67 .mask = 0,
68 },
69 [1] = {
70 .mask = MLX5_PROF_MASK_QP_SIZE,
71 .log_max_qp = 12,
72 },
73 [2] = {
74 .mask = MLX5_PROF_MASK_QP_SIZE |
75 MLX5_PROF_MASK_MR_CACHE,
76 .log_max_qp = 17,
77 .mr_cache[0] = {
78 .size = 500,
79 .limit = 250
80 },
81 .mr_cache[1] = {
82 .size = 500,
83 .limit = 250
84 },
85 .mr_cache[2] = {
86 .size = 500,
87 .limit = 250
88 },
89 .mr_cache[3] = {
90 .size = 500,
91 .limit = 250
92 },
93 .mr_cache[4] = {
94 .size = 500,
95 .limit = 250
96 },
97 .mr_cache[5] = {
98 .size = 500,
99 .limit = 250
100 },
101 .mr_cache[6] = {
102 .size = 500,
103 .limit = 250
104 },
105 .mr_cache[7] = {
106 .size = 500,
107 .limit = 250
108 },
109 .mr_cache[8] = {
110 .size = 500,
111 .limit = 250
112 },
113 .mr_cache[9] = {
114 .size = 500,
115 .limit = 250
116 },
117 .mr_cache[10] = {
118 .size = 500,
119 .limit = 250
120 },
121 .mr_cache[11] = {
122 .size = 500,
123 .limit = 250
124 },
125 .mr_cache[12] = {
126 .size = 64,
127 .limit = 32
128 },
129 .mr_cache[13] = {
130 .size = 32,
131 .limit = 16
132 },
133 .mr_cache[14] = {
134 .size = 16,
135 .limit = 8
136 },
137 .mr_cache[15] = {
138 .size = 8,
139 .limit = 4
140 },
141 },
142 };
143
144 int mlx5_vector2eqn(struct mlx5_ib_dev *dev, int vector, int *eqn, int *irqn)
145 {
146 struct mlx5_eq_table *table = &dev->mdev.priv.eq_table;
147 struct mlx5_eq *eq, *n;
148 int err = -ENOENT;
149
150 spin_lock(&table->lock);
151 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) {
152 if (eq->index == vector) {
153 *eqn = eq->eqn;
154 *irqn = eq->irqn;
155 err = 0;
156 break;
157 }
158 }
159 spin_unlock(&table->lock);
160
161 return err;
162 }
163
164 static int alloc_comp_eqs(struct mlx5_ib_dev *dev)
165 {
166 struct mlx5_eq_table *table = &dev->mdev.priv.eq_table;
167 char name[MLX5_MAX_EQ_NAME];
168 struct mlx5_eq *eq, *n;
169 int ncomp_vec;
170 int nent;
171 int err;
172 int i;
173
174 INIT_LIST_HEAD(&dev->eqs_list);
175 ncomp_vec = table->num_comp_vectors;
176 nent = MLX5_COMP_EQ_SIZE;
177 for (i = 0; i < ncomp_vec; i++) {
178 eq = kzalloc(sizeof(*eq), GFP_KERNEL);
179 if (!eq) {
180 err = -ENOMEM;
181 goto clean;
182 }
183
184 snprintf(name, MLX5_MAX_EQ_NAME, "mlx5_comp%d", i);
185 err = mlx5_create_map_eq(&dev->mdev, eq,
186 i + MLX5_EQ_VEC_COMP_BASE, nent, 0,
187 name, &dev->mdev.priv.uuari.uars[0]);
188 if (err) {
189 kfree(eq);
190 goto clean;
191 }
192 mlx5_ib_dbg(dev, "allocated completion EQN %d\n", eq->eqn);
193 eq->index = i;
194 spin_lock(&table->lock);
195 list_add_tail(&eq->list, &dev->eqs_list);
196 spin_unlock(&table->lock);
197 }
198
199 dev->num_comp_vectors = ncomp_vec;
200 return 0;
201
202 clean:
203 spin_lock(&table->lock);
204 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) {
205 list_del(&eq->list);
206 spin_unlock(&table->lock);
207 if (mlx5_destroy_unmap_eq(&dev->mdev, eq))
208 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn);
209 kfree(eq);
210 spin_lock(&table->lock);
211 }
212 spin_unlock(&table->lock);
213 return err;
214 }
215
216 static void free_comp_eqs(struct mlx5_ib_dev *dev)
217 {
218 struct mlx5_eq_table *table = &dev->mdev.priv.eq_table;
219 struct mlx5_eq *eq, *n;
220
221 spin_lock(&table->lock);
222 list_for_each_entry_safe(eq, n, &dev->eqs_list, list) {
223 list_del(&eq->list);
224 spin_unlock(&table->lock);
225 if (mlx5_destroy_unmap_eq(&dev->mdev, eq))
226 mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn);
227 kfree(eq);
228 spin_lock(&table->lock);
229 }
230 spin_unlock(&table->lock);
231 }
232
233 static int mlx5_ib_query_device(struct ib_device *ibdev,
234 struct ib_device_attr *props)
235 {
236 struct mlx5_ib_dev *dev = to_mdev(ibdev);
237 struct ib_smp *in_mad = NULL;
238 struct ib_smp *out_mad = NULL;
239 int err = -ENOMEM;
240 int max_rq_sg;
241 int max_sq_sg;
242 u64 flags;
243
244 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
245 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
246 if (!in_mad || !out_mad)
247 goto out;
248
249 init_query_mad(in_mad);
250 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
251
252 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad);
253 if (err)
254 goto out;
255
256 memset(props, 0, sizeof(*props));
257
258 props->fw_ver = ((u64)fw_rev_maj(&dev->mdev) << 32) |
259 (fw_rev_min(&dev->mdev) << 16) |
260 fw_rev_sub(&dev->mdev);
261 props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
262 IB_DEVICE_PORT_ACTIVE_EVENT |
263 IB_DEVICE_SYS_IMAGE_GUID |
264 IB_DEVICE_RC_RNR_NAK_GEN;
265 flags = dev->mdev.caps.flags;
266 if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR)
267 props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
268 if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR)
269 props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
270 if (flags & MLX5_DEV_CAP_FLAG_APM)
271 props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
272 props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
273 if (flags & MLX5_DEV_CAP_FLAG_XRC)
274 props->device_cap_flags |= IB_DEVICE_XRC;
275 props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
276 if (flags & MLX5_DEV_CAP_FLAG_SIG_HAND_OVER) {
277 props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER;
278 /* At this stage no support for signature handover */
279 props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 |
280 IB_PROT_T10DIF_TYPE_2 |
281 IB_PROT_T10DIF_TYPE_3;
282 props->sig_guard_cap = IB_GUARD_T10DIF_CRC |
283 IB_GUARD_T10DIF_CSUM;
284 }
285
286 props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) &
287 0xffffff;
288 props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30));
289 props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32));
290 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
291
292 props->max_mr_size = ~0ull;
293 props->page_size_cap = dev->mdev.caps.min_page_sz;
294 props->max_qp = 1 << dev->mdev.caps.log_max_qp;
295 props->max_qp_wr = dev->mdev.caps.max_wqes;
296 max_rq_sg = dev->mdev.caps.max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg);
297 max_sq_sg = (dev->mdev.caps.max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) /
298 sizeof(struct mlx5_wqe_data_seg);
299 props->max_sge = min(max_rq_sg, max_sq_sg);
300 props->max_cq = 1 << dev->mdev.caps.log_max_cq;
301 props->max_cqe = dev->mdev.caps.max_cqes - 1;
302 props->max_mr = 1 << dev->mdev.caps.log_max_mkey;
303 props->max_pd = 1 << dev->mdev.caps.log_max_pd;
304 props->max_qp_rd_atom = dev->mdev.caps.max_ra_req_qp;
305 props->max_qp_init_rd_atom = dev->mdev.caps.max_ra_res_qp;
306 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
307 props->max_srq = 1 << dev->mdev.caps.log_max_srq;
308 props->max_srq_wr = dev->mdev.caps.max_srq_wqes - 1;
309 props->max_srq_sge = max_rq_sg - 1;
310 props->max_fast_reg_page_list_len = (unsigned int)-1;
311 props->local_ca_ack_delay = dev->mdev.caps.local_ca_ack_delay;
312 props->atomic_cap = IB_ATOMIC_NONE;
313 props->masked_atomic_cap = IB_ATOMIC_NONE;
314 props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
315 props->max_mcast_grp = 1 << dev->mdev.caps.log_max_mcg;
316 props->max_mcast_qp_attach = dev->mdev.caps.max_qp_mcg;
317 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
318 props->max_mcast_grp;
319 props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */
320
321 out:
322 kfree(in_mad);
323 kfree(out_mad);
324
325 return err;
326 }
327
328 int mlx5_ib_query_port(struct ib_device *ibdev, u8 port,
329 struct ib_port_attr *props)
330 {
331 struct mlx5_ib_dev *dev = to_mdev(ibdev);
332 struct ib_smp *in_mad = NULL;
333 struct ib_smp *out_mad = NULL;
334 int ext_active_speed;
335 int err = -ENOMEM;
336
337 if (port < 1 || port > dev->mdev.caps.num_ports) {
338 mlx5_ib_warn(dev, "invalid port number %d\n", port);
339 return -EINVAL;
340 }
341
342 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
343 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
344 if (!in_mad || !out_mad)
345 goto out;
346
347 memset(props, 0, sizeof(*props));
348
349 init_query_mad(in_mad);
350 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
351 in_mad->attr_mod = cpu_to_be32(port);
352
353 err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
354 if (err) {
355 mlx5_ib_warn(dev, "err %d\n", err);
356 goto out;
357 }
358
359
360 props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
361 props->lmc = out_mad->data[34] & 0x7;
362 props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
363 props->sm_sl = out_mad->data[36] & 0xf;
364 props->state = out_mad->data[32] & 0xf;
365 props->phys_state = out_mad->data[33] >> 4;
366 props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
367 props->gid_tbl_len = out_mad->data[50];
368 props->max_msg_sz = 1 << to_mdev(ibdev)->mdev.caps.log_max_msg;
369 props->pkey_tbl_len = to_mdev(ibdev)->mdev.caps.port[port - 1].pkey_table_len;
370 props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
371 props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
372 props->active_width = out_mad->data[31] & 0xf;
373 props->active_speed = out_mad->data[35] >> 4;
374 props->max_mtu = out_mad->data[41] & 0xf;
375 props->active_mtu = out_mad->data[36] >> 4;
376 props->subnet_timeout = out_mad->data[51] & 0x1f;
377 props->max_vl_num = out_mad->data[37] >> 4;
378 props->init_type_reply = out_mad->data[41] >> 4;
379
380 /* Check if extended speeds (EDR/FDR/...) are supported */
381 if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
382 ext_active_speed = out_mad->data[62] >> 4;
383
384 switch (ext_active_speed) {
385 case 1:
386 props->active_speed = 16; /* FDR */
387 break;
388 case 2:
389 props->active_speed = 32; /* EDR */
390 break;
391 }
392 }
393
394 /* If reported active speed is QDR, check if is FDR-10 */
395 if (props->active_speed == 4) {
396 if (dev->mdev.caps.ext_port_cap[port - 1] &
397 MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
398 init_query_mad(in_mad);
399 in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
400 in_mad->attr_mod = cpu_to_be32(port);
401
402 err = mlx5_MAD_IFC(dev, 1, 1, port,
403 NULL, NULL, in_mad, out_mad);
404 if (err)
405 goto out;
406
407 /* Checking LinkSpeedActive for FDR-10 */
408 if (out_mad->data[15] & 0x1)
409 props->active_speed = 8;
410 }
411 }
412
413 out:
414 kfree(in_mad);
415 kfree(out_mad);
416
417 return err;
418 }
419
420 static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
421 union ib_gid *gid)
422 {
423 struct ib_smp *in_mad = NULL;
424 struct ib_smp *out_mad = NULL;
425 int err = -ENOMEM;
426
427 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
428 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
429 if (!in_mad || !out_mad)
430 goto out;
431
432 init_query_mad(in_mad);
433 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
434 in_mad->attr_mod = cpu_to_be32(port);
435
436 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
437 if (err)
438 goto out;
439
440 memcpy(gid->raw, out_mad->data + 8, 8);
441
442 init_query_mad(in_mad);
443 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
444 in_mad->attr_mod = cpu_to_be32(index / 8);
445
446 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
447 if (err)
448 goto out;
449
450 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
451
452 out:
453 kfree(in_mad);
454 kfree(out_mad);
455 return err;
456 }
457
458 static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
459 u16 *pkey)
460 {
461 struct ib_smp *in_mad = NULL;
462 struct ib_smp *out_mad = NULL;
463 int err = -ENOMEM;
464
465 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
466 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
467 if (!in_mad || !out_mad)
468 goto out;
469
470 init_query_mad(in_mad);
471 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
472 in_mad->attr_mod = cpu_to_be32(index / 32);
473
474 err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
475 if (err)
476 goto out;
477
478 *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
479
480 out:
481 kfree(in_mad);
482 kfree(out_mad);
483 return err;
484 }
485
486 struct mlx5_reg_node_desc {
487 u8 desc[64];
488 };
489
490 static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask,
491 struct ib_device_modify *props)
492 {
493 struct mlx5_ib_dev *dev = to_mdev(ibdev);
494 struct mlx5_reg_node_desc in;
495 struct mlx5_reg_node_desc out;
496 int err;
497
498 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
499 return -EOPNOTSUPP;
500
501 if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
502 return 0;
503
504 /*
505 * If possible, pass node desc to FW, so it can generate
506 * a 144 trap. If cmd fails, just ignore.
507 */
508 memcpy(&in, props->node_desc, 64);
509 err = mlx5_core_access_reg(&dev->mdev, &in, sizeof(in), &out,
510 sizeof(out), MLX5_REG_NODE_DESC, 0, 1);
511 if (err)
512 return err;
513
514 memcpy(ibdev->node_desc, props->node_desc, 64);
515
516 return err;
517 }
518
519 static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
520 struct ib_port_modify *props)
521 {
522 struct mlx5_ib_dev *dev = to_mdev(ibdev);
523 struct ib_port_attr attr;
524 u32 tmp;
525 int err;
526
527 mutex_lock(&dev->cap_mask_mutex);
528
529 err = mlx5_ib_query_port(ibdev, port, &attr);
530 if (err)
531 goto out;
532
533 tmp = (attr.port_cap_flags | props->set_port_cap_mask) &
534 ~props->clr_port_cap_mask;
535
536 err = mlx5_set_port_caps(&dev->mdev, port, tmp);
537
538 out:
539 mutex_unlock(&dev->cap_mask_mutex);
540 return err;
541 }
542
543 static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev,
544 struct ib_udata *udata)
545 {
546 struct mlx5_ib_dev *dev = to_mdev(ibdev);
547 struct mlx5_ib_alloc_ucontext_req_v2 req;
548 struct mlx5_ib_alloc_ucontext_resp resp;
549 struct mlx5_ib_ucontext *context;
550 struct mlx5_uuar_info *uuari;
551 struct mlx5_uar *uars;
552 int gross_uuars;
553 int num_uars;
554 int ver;
555 int uuarn;
556 int err;
557 int i;
558 int reqlen;
559
560 if (!dev->ib_active)
561 return ERR_PTR(-EAGAIN);
562
563 memset(&req, 0, sizeof(req));
564 reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr);
565 if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req))
566 ver = 0;
567 else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2))
568 ver = 2;
569 else
570 return ERR_PTR(-EINVAL);
571
572 err = ib_copy_from_udata(&req, udata, reqlen);
573 if (err)
574 return ERR_PTR(err);
575
576 if (req.flags || req.reserved)
577 return ERR_PTR(-EINVAL);
578
579 if (req.total_num_uuars > MLX5_MAX_UUARS)
580 return ERR_PTR(-ENOMEM);
581
582 if (req.total_num_uuars == 0)
583 return ERR_PTR(-EINVAL);
584
585 req.total_num_uuars = ALIGN(req.total_num_uuars,
586 MLX5_NON_FP_BF_REGS_PER_PAGE);
587 if (req.num_low_latency_uuars > req.total_num_uuars - 1)
588 return ERR_PTR(-EINVAL);
589
590 num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE;
591 gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE;
592 resp.qp_tab_size = 1 << dev->mdev.caps.log_max_qp;
593 resp.bf_reg_size = dev->mdev.caps.bf_reg_size;
594 resp.cache_line_size = L1_CACHE_BYTES;
595 resp.max_sq_desc_sz = dev->mdev.caps.max_sq_desc_sz;
596 resp.max_rq_desc_sz = dev->mdev.caps.max_rq_desc_sz;
597 resp.max_send_wqebb = dev->mdev.caps.max_wqes;
598 resp.max_recv_wr = dev->mdev.caps.max_wqes;
599 resp.max_srq_recv_wr = dev->mdev.caps.max_srq_wqes;
600
601 context = kzalloc(sizeof(*context), GFP_KERNEL);
602 if (!context)
603 return ERR_PTR(-ENOMEM);
604
605 uuari = &context->uuari;
606 mutex_init(&uuari->lock);
607 uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL);
608 if (!uars) {
609 err = -ENOMEM;
610 goto out_ctx;
611 }
612
613 uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars),
614 sizeof(*uuari->bitmap),
615 GFP_KERNEL);
616 if (!uuari->bitmap) {
617 err = -ENOMEM;
618 goto out_uar_ctx;
619 }
620 /*
621 * clear all fast path uuars
622 */
623 for (i = 0; i < gross_uuars; i++) {
624 uuarn = i & 3;
625 if (uuarn == 2 || uuarn == 3)
626 set_bit(i, uuari->bitmap);
627 }
628
629 uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL);
630 if (!uuari->count) {
631 err = -ENOMEM;
632 goto out_bitmap;
633 }
634
635 for (i = 0; i < num_uars; i++) {
636 err = mlx5_cmd_alloc_uar(&dev->mdev, &uars[i].index);
637 if (err)
638 goto out_count;
639 }
640
641 INIT_LIST_HEAD(&context->db_page_list);
642 mutex_init(&context->db_page_mutex);
643
644 resp.tot_uuars = req.total_num_uuars;
645 resp.num_ports = dev->mdev.caps.num_ports;
646 err = ib_copy_to_udata(udata, &resp,
647 sizeof(resp) - sizeof(resp.reserved));
648 if (err)
649 goto out_uars;
650
651 uuari->ver = ver;
652 uuari->num_low_latency_uuars = req.num_low_latency_uuars;
653 uuari->uars = uars;
654 uuari->num_uars = num_uars;
655 return &context->ibucontext;
656
657 out_uars:
658 for (i--; i >= 0; i--)
659 mlx5_cmd_free_uar(&dev->mdev, uars[i].index);
660 out_count:
661 kfree(uuari->count);
662
663 out_bitmap:
664 kfree(uuari->bitmap);
665
666 out_uar_ctx:
667 kfree(uars);
668
669 out_ctx:
670 kfree(context);
671 return ERR_PTR(err);
672 }
673
674 static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
675 {
676 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
677 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
678 struct mlx5_uuar_info *uuari = &context->uuari;
679 int i;
680
681 for (i = 0; i < uuari->num_uars; i++) {
682 if (mlx5_cmd_free_uar(&dev->mdev, uuari->uars[i].index))
683 mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index);
684 }
685
686 kfree(uuari->count);
687 kfree(uuari->bitmap);
688 kfree(uuari->uars);
689 kfree(context);
690
691 return 0;
692 }
693
694 static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index)
695 {
696 return (pci_resource_start(dev->mdev.pdev, 0) >> PAGE_SHIFT) + index;
697 }
698
699 static int get_command(unsigned long offset)
700 {
701 return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK;
702 }
703
704 static int get_arg(unsigned long offset)
705 {
706 return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1);
707 }
708
709 static int get_index(unsigned long offset)
710 {
711 return get_arg(offset);
712 }
713
714 static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma)
715 {
716 struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
717 struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
718 struct mlx5_uuar_info *uuari = &context->uuari;
719 unsigned long command;
720 unsigned long idx;
721 phys_addr_t pfn;
722
723 command = get_command(vma->vm_pgoff);
724 switch (command) {
725 case MLX5_IB_MMAP_REGULAR_PAGE:
726 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
727 return -EINVAL;
728
729 idx = get_index(vma->vm_pgoff);
730 pfn = uar_index2pfn(dev, uuari->uars[idx].index);
731 mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx,
732 (unsigned long long)pfn);
733
734 if (idx >= uuari->num_uars)
735 return -EINVAL;
736
737 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
738 if (io_remap_pfn_range(vma, vma->vm_start, pfn,
739 PAGE_SIZE, vma->vm_page_prot))
740 return -EAGAIN;
741
742 mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n",
743 vma->vm_start,
744 (unsigned long long)pfn << PAGE_SHIFT);
745 break;
746
747 case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES:
748 return -ENOSYS;
749
750 default:
751 return -EINVAL;
752 }
753
754 return 0;
755 }
756
757 static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn)
758 {
759 struct mlx5_create_mkey_mbox_in *in;
760 struct mlx5_mkey_seg *seg;
761 struct mlx5_core_mr mr;
762 int err;
763
764 in = kzalloc(sizeof(*in), GFP_KERNEL);
765 if (!in)
766 return -ENOMEM;
767
768 seg = &in->seg;
769 seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA;
770 seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64);
771 seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
772 seg->start_addr = 0;
773
774 err = mlx5_core_create_mkey(&dev->mdev, &mr, in, sizeof(*in),
775 NULL, NULL, NULL);
776 if (err) {
777 mlx5_ib_warn(dev, "failed to create mkey, %d\n", err);
778 goto err_in;
779 }
780
781 kfree(in);
782 *key = mr.key;
783
784 return 0;
785
786 err_in:
787 kfree(in);
788
789 return err;
790 }
791
792 static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key)
793 {
794 struct mlx5_core_mr mr;
795 int err;
796
797 memset(&mr, 0, sizeof(mr));
798 mr.key = key;
799 err = mlx5_core_destroy_mkey(&dev->mdev, &mr);
800 if (err)
801 mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key);
802 }
803
804 static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev,
805 struct ib_ucontext *context,
806 struct ib_udata *udata)
807 {
808 struct mlx5_ib_alloc_pd_resp resp;
809 struct mlx5_ib_pd *pd;
810 int err;
811
812 pd = kmalloc(sizeof(*pd), GFP_KERNEL);
813 if (!pd)
814 return ERR_PTR(-ENOMEM);
815
816 err = mlx5_core_alloc_pd(&to_mdev(ibdev)->mdev, &pd->pdn);
817 if (err) {
818 kfree(pd);
819 return ERR_PTR(err);
820 }
821
822 if (context) {
823 resp.pdn = pd->pdn;
824 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
825 mlx5_core_dealloc_pd(&to_mdev(ibdev)->mdev, pd->pdn);
826 kfree(pd);
827 return ERR_PTR(-EFAULT);
828 }
829 } else {
830 err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn);
831 if (err) {
832 mlx5_core_dealloc_pd(&to_mdev(ibdev)->mdev, pd->pdn);
833 kfree(pd);
834 return ERR_PTR(err);
835 }
836 }
837
838 return &pd->ibpd;
839 }
840
841 static int mlx5_ib_dealloc_pd(struct ib_pd *pd)
842 {
843 struct mlx5_ib_dev *mdev = to_mdev(pd->device);
844 struct mlx5_ib_pd *mpd = to_mpd(pd);
845
846 if (!pd->uobject)
847 free_pa_mkey(mdev, mpd->pa_lkey);
848
849 mlx5_core_dealloc_pd(&mdev->mdev, mpd->pdn);
850 kfree(mpd);
851
852 return 0;
853 }
854
855 static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
856 {
857 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
858 int err;
859
860 err = mlx5_core_attach_mcg(&dev->mdev, gid, ibqp->qp_num);
861 if (err)
862 mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n",
863 ibqp->qp_num, gid->raw);
864
865 return err;
866 }
867
868 static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
869 {
870 struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
871 int err;
872
873 err = mlx5_core_detach_mcg(&dev->mdev, gid, ibqp->qp_num);
874 if (err)
875 mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n",
876 ibqp->qp_num, gid->raw);
877
878 return err;
879 }
880
881 static int init_node_data(struct mlx5_ib_dev *dev)
882 {
883 struct ib_smp *in_mad = NULL;
884 struct ib_smp *out_mad = NULL;
885 int err = -ENOMEM;
886
887 in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
888 out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
889 if (!in_mad || !out_mad)
890 goto out;
891
892 init_query_mad(in_mad);
893 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
894
895 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
896 if (err)
897 goto out;
898
899 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
900
901 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
902
903 err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
904 if (err)
905 goto out;
906
907 dev->mdev.rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32));
908 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
909
910 out:
911 kfree(in_mad);
912 kfree(out_mad);
913 return err;
914 }
915
916 static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr,
917 char *buf)
918 {
919 struct mlx5_ib_dev *dev =
920 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
921
922 return sprintf(buf, "%d\n", dev->mdev.priv.fw_pages);
923 }
924
925 static ssize_t show_reg_pages(struct device *device,
926 struct device_attribute *attr, char *buf)
927 {
928 struct mlx5_ib_dev *dev =
929 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
930
931 return sprintf(buf, "%d\n", dev->mdev.priv.reg_pages);
932 }
933
934 static ssize_t show_hca(struct device *device, struct device_attribute *attr,
935 char *buf)
936 {
937 struct mlx5_ib_dev *dev =
938 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
939 return sprintf(buf, "MT%d\n", dev->mdev.pdev->device);
940 }
941
942 static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
943 char *buf)
944 {
945 struct mlx5_ib_dev *dev =
946 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
947 return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(&dev->mdev),
948 fw_rev_min(&dev->mdev), fw_rev_sub(&dev->mdev));
949 }
950
951 static ssize_t show_rev(struct device *device, struct device_attribute *attr,
952 char *buf)
953 {
954 struct mlx5_ib_dev *dev =
955 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
956 return sprintf(buf, "%x\n", dev->mdev.rev_id);
957 }
958
959 static ssize_t show_board(struct device *device, struct device_attribute *attr,
960 char *buf)
961 {
962 struct mlx5_ib_dev *dev =
963 container_of(device, struct mlx5_ib_dev, ib_dev.dev);
964 return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN,
965 dev->mdev.board_id);
966 }
967
968 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
969 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
970 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
971 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
972 static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL);
973 static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL);
974
975 static struct device_attribute *mlx5_class_attributes[] = {
976 &dev_attr_hw_rev,
977 &dev_attr_fw_ver,
978 &dev_attr_hca_type,
979 &dev_attr_board_id,
980 &dev_attr_fw_pages,
981 &dev_attr_reg_pages,
982 };
983
984 static void mlx5_ib_event(struct mlx5_core_dev *dev, enum mlx5_dev_event event,
985 void *data)
986 {
987 struct mlx5_ib_dev *ibdev = container_of(dev, struct mlx5_ib_dev, mdev);
988 struct ib_event ibev;
989 u8 port = 0;
990
991 switch (event) {
992 case MLX5_DEV_EVENT_SYS_ERROR:
993 ibdev->ib_active = false;
994 ibev.event = IB_EVENT_DEVICE_FATAL;
995 break;
996
997 case MLX5_DEV_EVENT_PORT_UP:
998 ibev.event = IB_EVENT_PORT_ACTIVE;
999 port = *(u8 *)data;
1000 break;
1001
1002 case MLX5_DEV_EVENT_PORT_DOWN:
1003 ibev.event = IB_EVENT_PORT_ERR;
1004 port = *(u8 *)data;
1005 break;
1006
1007 case MLX5_DEV_EVENT_PORT_INITIALIZED:
1008 /* not used by ULPs */
1009 return;
1010
1011 case MLX5_DEV_EVENT_LID_CHANGE:
1012 ibev.event = IB_EVENT_LID_CHANGE;
1013 port = *(u8 *)data;
1014 break;
1015
1016 case MLX5_DEV_EVENT_PKEY_CHANGE:
1017 ibev.event = IB_EVENT_PKEY_CHANGE;
1018 port = *(u8 *)data;
1019 break;
1020
1021 case MLX5_DEV_EVENT_GUID_CHANGE:
1022 ibev.event = IB_EVENT_GID_CHANGE;
1023 port = *(u8 *)data;
1024 break;
1025
1026 case MLX5_DEV_EVENT_CLIENT_REREG:
1027 ibev.event = IB_EVENT_CLIENT_REREGISTER;
1028 port = *(u8 *)data;
1029 break;
1030 }
1031
1032 ibev.device = &ibdev->ib_dev;
1033 ibev.element.port_num = port;
1034
1035 if (port < 1 || port > ibdev->num_ports) {
1036 mlx5_ib_warn(ibdev, "warning: event on port %d\n", port);
1037 return;
1038 }
1039
1040 if (ibdev->ib_active)
1041 ib_dispatch_event(&ibev);
1042 }
1043
1044 static void get_ext_port_caps(struct mlx5_ib_dev *dev)
1045 {
1046 int port;
1047
1048 for (port = 1; port <= dev->mdev.caps.num_ports; port++)
1049 mlx5_query_ext_port_caps(dev, port);
1050 }
1051
1052 static int get_port_caps(struct mlx5_ib_dev *dev)
1053 {
1054 struct ib_device_attr *dprops = NULL;
1055 struct ib_port_attr *pprops = NULL;
1056 int err = 0;
1057 int port;
1058
1059 pprops = kmalloc(sizeof(*pprops), GFP_KERNEL);
1060 if (!pprops)
1061 goto out;
1062
1063 dprops = kmalloc(sizeof(*dprops), GFP_KERNEL);
1064 if (!dprops)
1065 goto out;
1066
1067 err = mlx5_ib_query_device(&dev->ib_dev, dprops);
1068 if (err) {
1069 mlx5_ib_warn(dev, "query_device failed %d\n", err);
1070 goto out;
1071 }
1072
1073 for (port = 1; port <= dev->mdev.caps.num_ports; port++) {
1074 err = mlx5_ib_query_port(&dev->ib_dev, port, pprops);
1075 if (err) {
1076 mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err);
1077 break;
1078 }
1079 dev->mdev.caps.port[port - 1].pkey_table_len = dprops->max_pkeys;
1080 dev->mdev.caps.port[port - 1].gid_table_len = pprops->gid_tbl_len;
1081 mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n",
1082 dprops->max_pkeys, pprops->gid_tbl_len);
1083 }
1084
1085 out:
1086 kfree(pprops);
1087 kfree(dprops);
1088
1089 return err;
1090 }
1091
1092 static void destroy_umrc_res(struct mlx5_ib_dev *dev)
1093 {
1094 int err;
1095
1096 err = mlx5_mr_cache_cleanup(dev);
1097 if (err)
1098 mlx5_ib_warn(dev, "mr cache cleanup failed\n");
1099
1100 mlx5_ib_destroy_qp(dev->umrc.qp);
1101 ib_destroy_cq(dev->umrc.cq);
1102 ib_dereg_mr(dev->umrc.mr);
1103 ib_dealloc_pd(dev->umrc.pd);
1104 }
1105
1106 enum {
1107 MAX_UMR_WR = 128,
1108 };
1109
1110 static int create_umr_res(struct mlx5_ib_dev *dev)
1111 {
1112 struct ib_qp_init_attr *init_attr = NULL;
1113 struct ib_qp_attr *attr = NULL;
1114 struct ib_pd *pd;
1115 struct ib_cq *cq;
1116 struct ib_qp *qp;
1117 struct ib_mr *mr;
1118 int ret;
1119
1120 attr = kzalloc(sizeof(*attr), GFP_KERNEL);
1121 init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL);
1122 if (!attr || !init_attr) {
1123 ret = -ENOMEM;
1124 goto error_0;
1125 }
1126
1127 pd = ib_alloc_pd(&dev->ib_dev);
1128 if (IS_ERR(pd)) {
1129 mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n");
1130 ret = PTR_ERR(pd);
1131 goto error_0;
1132 }
1133
1134 mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE);
1135 if (IS_ERR(mr)) {
1136 mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n");
1137 ret = PTR_ERR(mr);
1138 goto error_1;
1139 }
1140
1141 cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 128,
1142 0);
1143 if (IS_ERR(cq)) {
1144 mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n");
1145 ret = PTR_ERR(cq);
1146 goto error_2;
1147 }
1148 ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
1149
1150 init_attr->send_cq = cq;
1151 init_attr->recv_cq = cq;
1152 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
1153 init_attr->cap.max_send_wr = MAX_UMR_WR;
1154 init_attr->cap.max_send_sge = 1;
1155 init_attr->qp_type = MLX5_IB_QPT_REG_UMR;
1156 init_attr->port_num = 1;
1157 qp = mlx5_ib_create_qp(pd, init_attr, NULL);
1158 if (IS_ERR(qp)) {
1159 mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n");
1160 ret = PTR_ERR(qp);
1161 goto error_3;
1162 }
1163 qp->device = &dev->ib_dev;
1164 qp->real_qp = qp;
1165 qp->uobject = NULL;
1166 qp->qp_type = MLX5_IB_QPT_REG_UMR;
1167
1168 attr->qp_state = IB_QPS_INIT;
1169 attr->port_num = 1;
1170 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX |
1171 IB_QP_PORT, NULL);
1172 if (ret) {
1173 mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n");
1174 goto error_4;
1175 }
1176
1177 memset(attr, 0, sizeof(*attr));
1178 attr->qp_state = IB_QPS_RTR;
1179 attr->path_mtu = IB_MTU_256;
1180
1181 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
1182 if (ret) {
1183 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n");
1184 goto error_4;
1185 }
1186
1187 memset(attr, 0, sizeof(*attr));
1188 attr->qp_state = IB_QPS_RTS;
1189 ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
1190 if (ret) {
1191 mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n");
1192 goto error_4;
1193 }
1194
1195 dev->umrc.qp = qp;
1196 dev->umrc.cq = cq;
1197 dev->umrc.mr = mr;
1198 dev->umrc.pd = pd;
1199
1200 sema_init(&dev->umrc.sem, MAX_UMR_WR);
1201 ret = mlx5_mr_cache_init(dev);
1202 if (ret) {
1203 mlx5_ib_warn(dev, "mr cache init failed %d\n", ret);
1204 goto error_4;
1205 }
1206
1207 kfree(attr);
1208 kfree(init_attr);
1209
1210 return 0;
1211
1212 error_4:
1213 mlx5_ib_destroy_qp(qp);
1214
1215 error_3:
1216 ib_destroy_cq(cq);
1217
1218 error_2:
1219 ib_dereg_mr(mr);
1220
1221 error_1:
1222 ib_dealloc_pd(pd);
1223
1224 error_0:
1225 kfree(attr);
1226 kfree(init_attr);
1227 return ret;
1228 }
1229
1230 static int create_dev_resources(struct mlx5_ib_resources *devr)
1231 {
1232 struct ib_srq_init_attr attr;
1233 struct mlx5_ib_dev *dev;
1234 int ret = 0;
1235
1236 dev = container_of(devr, struct mlx5_ib_dev, devr);
1237
1238 devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL);
1239 if (IS_ERR(devr->p0)) {
1240 ret = PTR_ERR(devr->p0);
1241 goto error0;
1242 }
1243 devr->p0->device = &dev->ib_dev;
1244 devr->p0->uobject = NULL;
1245 atomic_set(&devr->p0->usecnt, 0);
1246
1247 devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, 1, 0, NULL, NULL);
1248 if (IS_ERR(devr->c0)) {
1249 ret = PTR_ERR(devr->c0);
1250 goto error1;
1251 }
1252 devr->c0->device = &dev->ib_dev;
1253 devr->c0->uobject = NULL;
1254 devr->c0->comp_handler = NULL;
1255 devr->c0->event_handler = NULL;
1256 devr->c0->cq_context = NULL;
1257 atomic_set(&devr->c0->usecnt, 0);
1258
1259 devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
1260 if (IS_ERR(devr->x0)) {
1261 ret = PTR_ERR(devr->x0);
1262 goto error2;
1263 }
1264 devr->x0->device = &dev->ib_dev;
1265 devr->x0->inode = NULL;
1266 atomic_set(&devr->x0->usecnt, 0);
1267 mutex_init(&devr->x0->tgt_qp_mutex);
1268 INIT_LIST_HEAD(&devr->x0->tgt_qp_list);
1269
1270 devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
1271 if (IS_ERR(devr->x1)) {
1272 ret = PTR_ERR(devr->x1);
1273 goto error3;
1274 }
1275 devr->x1->device = &dev->ib_dev;
1276 devr->x1->inode = NULL;
1277 atomic_set(&devr->x1->usecnt, 0);
1278 mutex_init(&devr->x1->tgt_qp_mutex);
1279 INIT_LIST_HEAD(&devr->x1->tgt_qp_list);
1280
1281 memset(&attr, 0, sizeof(attr));
1282 attr.attr.max_sge = 1;
1283 attr.attr.max_wr = 1;
1284 attr.srq_type = IB_SRQT_XRC;
1285 attr.ext.xrc.cq = devr->c0;
1286 attr.ext.xrc.xrcd = devr->x0;
1287
1288 devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL);
1289 if (IS_ERR(devr->s0)) {
1290 ret = PTR_ERR(devr->s0);
1291 goto error4;
1292 }
1293 devr->s0->device = &dev->ib_dev;
1294 devr->s0->pd = devr->p0;
1295 devr->s0->uobject = NULL;
1296 devr->s0->event_handler = NULL;
1297 devr->s0->srq_context = NULL;
1298 devr->s0->srq_type = IB_SRQT_XRC;
1299 devr->s0->ext.xrc.xrcd = devr->x0;
1300 devr->s0->ext.xrc.cq = devr->c0;
1301 atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt);
1302 atomic_inc(&devr->s0->ext.xrc.cq->usecnt);
1303 atomic_inc(&devr->p0->usecnt);
1304 atomic_set(&devr->s0->usecnt, 0);
1305
1306 return 0;
1307
1308 error4:
1309 mlx5_ib_dealloc_xrcd(devr->x1);
1310 error3:
1311 mlx5_ib_dealloc_xrcd(devr->x0);
1312 error2:
1313 mlx5_ib_destroy_cq(devr->c0);
1314 error1:
1315 mlx5_ib_dealloc_pd(devr->p0);
1316 error0:
1317 return ret;
1318 }
1319
1320 static void destroy_dev_resources(struct mlx5_ib_resources *devr)
1321 {
1322 mlx5_ib_destroy_srq(devr->s0);
1323 mlx5_ib_dealloc_xrcd(devr->x0);
1324 mlx5_ib_dealloc_xrcd(devr->x1);
1325 mlx5_ib_destroy_cq(devr->c0);
1326 mlx5_ib_dealloc_pd(devr->p0);
1327 }
1328
1329 static int init_one(struct pci_dev *pdev,
1330 const struct pci_device_id *id)
1331 {
1332 struct mlx5_core_dev *mdev;
1333 struct mlx5_ib_dev *dev;
1334 int err;
1335 int i;
1336
1337 printk_once(KERN_INFO "%s", mlx5_version);
1338
1339 dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev));
1340 if (!dev)
1341 return -ENOMEM;
1342
1343 mdev = &dev->mdev;
1344 mdev->event = mlx5_ib_event;
1345 if (prof_sel >= ARRAY_SIZE(profile)) {
1346 pr_warn("selected pofile out of range, selceting default\n");
1347 prof_sel = 0;
1348 }
1349 mdev->profile = &profile[prof_sel];
1350 err = mlx5_dev_init(mdev, pdev);
1351 if (err)
1352 goto err_free;
1353
1354 err = get_port_caps(dev);
1355 if (err)
1356 goto err_cleanup;
1357
1358 get_ext_port_caps(dev);
1359
1360 err = alloc_comp_eqs(dev);
1361 if (err)
1362 goto err_cleanup;
1363
1364 MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock);
1365
1366 strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX);
1367 dev->ib_dev.owner = THIS_MODULE;
1368 dev->ib_dev.node_type = RDMA_NODE_IB_CA;
1369 dev->ib_dev.local_dma_lkey = mdev->caps.reserved_lkey;
1370 dev->num_ports = mdev->caps.num_ports;
1371 dev->ib_dev.phys_port_cnt = dev->num_ports;
1372 dev->ib_dev.num_comp_vectors = dev->num_comp_vectors;
1373 dev->ib_dev.dma_device = &mdev->pdev->dev;
1374
1375 dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION;
1376 dev->ib_dev.uverbs_cmd_mask =
1377 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1378 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1379 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1380 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1381 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1382 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1383 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1384 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1385 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
1386 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
1387 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1388 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1389 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
1390 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
1391 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1392 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1393 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
1394 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1395 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
1396 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
1397 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
1398 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
1399 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
1400
1401 dev->ib_dev.query_device = mlx5_ib_query_device;
1402 dev->ib_dev.query_port = mlx5_ib_query_port;
1403 dev->ib_dev.query_gid = mlx5_ib_query_gid;
1404 dev->ib_dev.query_pkey = mlx5_ib_query_pkey;
1405 dev->ib_dev.modify_device = mlx5_ib_modify_device;
1406 dev->ib_dev.modify_port = mlx5_ib_modify_port;
1407 dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext;
1408 dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext;
1409 dev->ib_dev.mmap = mlx5_ib_mmap;
1410 dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd;
1411 dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd;
1412 dev->ib_dev.create_ah = mlx5_ib_create_ah;
1413 dev->ib_dev.query_ah = mlx5_ib_query_ah;
1414 dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah;
1415 dev->ib_dev.create_srq = mlx5_ib_create_srq;
1416 dev->ib_dev.modify_srq = mlx5_ib_modify_srq;
1417 dev->ib_dev.query_srq = mlx5_ib_query_srq;
1418 dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq;
1419 dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv;
1420 dev->ib_dev.create_qp = mlx5_ib_create_qp;
1421 dev->ib_dev.modify_qp = mlx5_ib_modify_qp;
1422 dev->ib_dev.query_qp = mlx5_ib_query_qp;
1423 dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp;
1424 dev->ib_dev.post_send = mlx5_ib_post_send;
1425 dev->ib_dev.post_recv = mlx5_ib_post_recv;
1426 dev->ib_dev.create_cq = mlx5_ib_create_cq;
1427 dev->ib_dev.modify_cq = mlx5_ib_modify_cq;
1428 dev->ib_dev.resize_cq = mlx5_ib_resize_cq;
1429 dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq;
1430 dev->ib_dev.poll_cq = mlx5_ib_poll_cq;
1431 dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq;
1432 dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr;
1433 dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr;
1434 dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr;
1435 dev->ib_dev.destroy_mr = mlx5_ib_destroy_mr;
1436 dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach;
1437 dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach;
1438 dev->ib_dev.process_mad = mlx5_ib_process_mad;
1439 dev->ib_dev.create_mr = mlx5_ib_create_mr;
1440 dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr;
1441 dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list;
1442 dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list;
1443 dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status;
1444
1445 if (mdev->caps.flags & MLX5_DEV_CAP_FLAG_XRC) {
1446 dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd;
1447 dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd;
1448 dev->ib_dev.uverbs_cmd_mask |=
1449 (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
1450 (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
1451 }
1452
1453 err = init_node_data(dev);
1454 if (err)
1455 goto err_eqs;
1456
1457 mutex_init(&dev->cap_mask_mutex);
1458 spin_lock_init(&dev->mr_lock);
1459
1460 err = create_dev_resources(&dev->devr);
1461 if (err)
1462 goto err_eqs;
1463
1464 err = ib_register_device(&dev->ib_dev, NULL);
1465 if (err)
1466 goto err_rsrc;
1467
1468 err = create_umr_res(dev);
1469 if (err)
1470 goto err_dev;
1471
1472 for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) {
1473 err = device_create_file(&dev->ib_dev.dev,
1474 mlx5_class_attributes[i]);
1475 if (err)
1476 goto err_umrc;
1477 }
1478
1479 dev->ib_active = true;
1480
1481 return 0;
1482
1483 err_umrc:
1484 destroy_umrc_res(dev);
1485
1486 err_dev:
1487 ib_unregister_device(&dev->ib_dev);
1488
1489 err_rsrc:
1490 destroy_dev_resources(&dev->devr);
1491
1492 err_eqs:
1493 free_comp_eqs(dev);
1494
1495 err_cleanup:
1496 mlx5_dev_cleanup(mdev);
1497
1498 err_free:
1499 ib_dealloc_device((struct ib_device *)dev);
1500
1501 return err;
1502 }
1503
1504 static void remove_one(struct pci_dev *pdev)
1505 {
1506 struct mlx5_ib_dev *dev = mlx5_pci2ibdev(pdev);
1507
1508 destroy_umrc_res(dev);
1509 ib_unregister_device(&dev->ib_dev);
1510 destroy_dev_resources(&dev->devr);
1511 free_comp_eqs(dev);
1512 mlx5_dev_cleanup(&dev->mdev);
1513 ib_dealloc_device(&dev->ib_dev);
1514 }
1515
1516 static DEFINE_PCI_DEVICE_TABLE(mlx5_ib_pci_table) = {
1517 { PCI_VDEVICE(MELLANOX, 4113) }, /* MT4113 Connect-IB */
1518 { 0, }
1519 };
1520
1521 MODULE_DEVICE_TABLE(pci, mlx5_ib_pci_table);
1522
1523 static struct pci_driver mlx5_ib_driver = {
1524 .name = DRIVER_NAME,
1525 .id_table = mlx5_ib_pci_table,
1526 .probe = init_one,
1527 .remove = remove_one
1528 };
1529
1530 static int __init mlx5_ib_init(void)
1531 {
1532 return pci_register_driver(&mlx5_ib_driver);
1533 }
1534
1535 static void __exit mlx5_ib_cleanup(void)
1536 {
1537 pci_unregister_driver(&mlx5_ib_driver);
1538 }
1539
1540 module_init(mlx5_ib_init);
1541 module_exit(mlx5_ib_cleanup);
Linux kernel - Deliverables
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