[PATCH] IB uverbs: add mthca user PD support
[deliverable/linux.git] / drivers / infiniband / hw / mthca / mthca_dev.h
1 /*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005 Cisco Systems. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 *
34 * $Id: mthca_dev.h 1349 2004-12-16 21:09:43Z roland $
35 */
36
37 #ifndef MTHCA_DEV_H
38 #define MTHCA_DEV_H
39
40 #include <linux/spinlock.h>
41 #include <linux/kernel.h>
42 #include <linux/pci.h>
43 #include <linux/dma-mapping.h>
44 #include <asm/semaphore.h>
45
46 #include "mthca_provider.h"
47 #include "mthca_doorbell.h"
48
49 #define DRV_NAME "ib_mthca"
50 #define PFX DRV_NAME ": "
51 #define DRV_VERSION "0.06"
52 #define DRV_RELDATE "June 23, 2005"
53
54 enum {
55 MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
56 MTHCA_FLAG_SRQ = 1 << 2,
57 MTHCA_FLAG_MSI = 1 << 3,
58 MTHCA_FLAG_MSI_X = 1 << 4,
59 MTHCA_FLAG_NO_LAM = 1 << 5,
60 MTHCA_FLAG_FMR = 1 << 6,
61 MTHCA_FLAG_MEMFREE = 1 << 7,
62 MTHCA_FLAG_PCIE = 1 << 8
63 };
64
65 enum {
66 MTHCA_MAX_PORTS = 2
67 };
68
69 enum {
70 MTHCA_EQ_CONTEXT_SIZE = 0x40,
71 MTHCA_CQ_CONTEXT_SIZE = 0x40,
72 MTHCA_QP_CONTEXT_SIZE = 0x200,
73 MTHCA_RDB_ENTRY_SIZE = 0x20,
74 MTHCA_AV_SIZE = 0x20,
75 MTHCA_MGM_ENTRY_SIZE = 0x40,
76
77 /* Arbel FW gives us these, but we need them for Tavor */
78 MTHCA_MPT_ENTRY_SIZE = 0x40,
79 MTHCA_MTT_SEG_SIZE = 0x40,
80 };
81
82 enum {
83 MTHCA_EQ_CMD,
84 MTHCA_EQ_ASYNC,
85 MTHCA_EQ_COMP,
86 MTHCA_NUM_EQ
87 };
88
89 enum {
90 MTHCA_OPCODE_NOP = 0x00,
91 MTHCA_OPCODE_RDMA_WRITE = 0x08,
92 MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09,
93 MTHCA_OPCODE_SEND = 0x0a,
94 MTHCA_OPCODE_SEND_IMM = 0x0b,
95 MTHCA_OPCODE_RDMA_READ = 0x10,
96 MTHCA_OPCODE_ATOMIC_CS = 0x11,
97 MTHCA_OPCODE_ATOMIC_FA = 0x12,
98 MTHCA_OPCODE_BIND_MW = 0x18,
99 MTHCA_OPCODE_INVALID = 0xff
100 };
101
102 struct mthca_cmd {
103 struct pci_pool *pool;
104 int use_events;
105 struct semaphore hcr_sem;
106 struct semaphore poll_sem;
107 struct semaphore event_sem;
108 int max_cmds;
109 spinlock_t context_lock;
110 int free_head;
111 struct mthca_cmd_context *context;
112 u16 token_mask;
113 };
114
115 struct mthca_limits {
116 int num_ports;
117 int vl_cap;
118 int mtu_cap;
119 int gid_table_len;
120 int pkey_table_len;
121 int local_ca_ack_delay;
122 int num_uars;
123 int max_sg;
124 int num_qps;
125 int reserved_qps;
126 int num_srqs;
127 int reserved_srqs;
128 int num_eecs;
129 int reserved_eecs;
130 int num_cqs;
131 int reserved_cqs;
132 int num_eqs;
133 int reserved_eqs;
134 int num_mpts;
135 int num_mtt_segs;
136 int fmr_reserved_mtts;
137 int reserved_mtts;
138 int reserved_mrws;
139 int reserved_uars;
140 int num_mgms;
141 int num_amgms;
142 int reserved_mcgs;
143 int num_pds;
144 int reserved_pds;
145 };
146
147 struct mthca_alloc {
148 u32 last;
149 u32 top;
150 u32 max;
151 u32 mask;
152 spinlock_t lock;
153 unsigned long *table;
154 };
155
156 struct mthca_array {
157 struct {
158 void **page;
159 int used;
160 } *page_list;
161 };
162
163 struct mthca_uar_table {
164 struct mthca_alloc alloc;
165 u64 uarc_base;
166 int uarc_size;
167 };
168
169 struct mthca_pd_table {
170 struct mthca_alloc alloc;
171 };
172
173 struct mthca_buddy {
174 unsigned long **bits;
175 int max_order;
176 spinlock_t lock;
177 };
178
179 struct mthca_mr_table {
180 struct mthca_alloc mpt_alloc;
181 struct mthca_buddy mtt_buddy;
182 struct mthca_buddy *fmr_mtt_buddy;
183 u64 mtt_base;
184 u64 mpt_base;
185 struct mthca_icm_table *mtt_table;
186 struct mthca_icm_table *mpt_table;
187 struct {
188 void __iomem *mpt_base;
189 void __iomem *mtt_base;
190 struct mthca_buddy mtt_buddy;
191 } tavor_fmr;
192 };
193
194 struct mthca_eq_table {
195 struct mthca_alloc alloc;
196 void __iomem *clr_int;
197 u32 clr_mask;
198 u32 arm_mask;
199 struct mthca_eq eq[MTHCA_NUM_EQ];
200 u64 icm_virt;
201 struct page *icm_page;
202 dma_addr_t icm_dma;
203 int have_irq;
204 u8 inta_pin;
205 };
206
207 struct mthca_cq_table {
208 struct mthca_alloc alloc;
209 spinlock_t lock;
210 struct mthca_array cq;
211 struct mthca_icm_table *table;
212 };
213
214 struct mthca_qp_table {
215 struct mthca_alloc alloc;
216 u32 rdb_base;
217 int rdb_shift;
218 int sqp_start;
219 spinlock_t lock;
220 struct mthca_array qp;
221 struct mthca_icm_table *qp_table;
222 struct mthca_icm_table *eqp_table;
223 struct mthca_icm_table *rdb_table;
224 };
225
226 struct mthca_av_table {
227 struct pci_pool *pool;
228 int num_ddr_avs;
229 u64 ddr_av_base;
230 void __iomem *av_map;
231 struct mthca_alloc alloc;
232 };
233
234 struct mthca_mcg_table {
235 struct semaphore sem;
236 struct mthca_alloc alloc;
237 struct mthca_icm_table *table;
238 };
239
240 struct mthca_dev {
241 struct ib_device ib_dev;
242 struct pci_dev *pdev;
243
244 int hca_type;
245 unsigned long mthca_flags;
246 unsigned long device_cap_flags;
247
248 u32 rev_id;
249
250 /* firmware info */
251 u64 fw_ver;
252 union {
253 struct {
254 u64 fw_start;
255 u64 fw_end;
256 } tavor;
257 struct {
258 u64 clr_int_base;
259 u64 eq_arm_base;
260 u64 eq_set_ci_base;
261 struct mthca_icm *fw_icm;
262 struct mthca_icm *aux_icm;
263 u16 fw_pages;
264 } arbel;
265 } fw;
266
267 u64 ddr_start;
268 u64 ddr_end;
269
270 MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
271 struct semaphore cap_mask_mutex;
272
273 void __iomem *hcr;
274 void __iomem *kar;
275 void __iomem *clr_base;
276 union {
277 struct {
278 void __iomem *ecr_base;
279 } tavor;
280 struct {
281 void __iomem *eq_arm;
282 void __iomem *eq_set_ci_base;
283 } arbel;
284 } eq_regs;
285
286 struct mthca_cmd cmd;
287 struct mthca_limits limits;
288
289 struct mthca_uar_table uar_table;
290 struct mthca_pd_table pd_table;
291 struct mthca_mr_table mr_table;
292 struct mthca_eq_table eq_table;
293 struct mthca_cq_table cq_table;
294 struct mthca_qp_table qp_table;
295 struct mthca_av_table av_table;
296 struct mthca_mcg_table mcg_table;
297
298 struct mthca_uar driver_uar;
299 struct mthca_db_table *db_tab;
300 struct mthca_pd driver_pd;
301 struct mthca_mr driver_mr;
302
303 struct ib_mad_agent *send_agent[MTHCA_MAX_PORTS][2];
304 struct ib_ah *sm_ah[MTHCA_MAX_PORTS];
305 spinlock_t sm_lock;
306 };
307
308 #define mthca_dbg(mdev, format, arg...) \
309 dev_dbg(&mdev->pdev->dev, format, ## arg)
310 #define mthca_err(mdev, format, arg...) \
311 dev_err(&mdev->pdev->dev, format, ## arg)
312 #define mthca_info(mdev, format, arg...) \
313 dev_info(&mdev->pdev->dev, format, ## arg)
314 #define mthca_warn(mdev, format, arg...) \
315 dev_warn(&mdev->pdev->dev, format, ## arg)
316
317 extern void __buggy_use_of_MTHCA_GET(void);
318 extern void __buggy_use_of_MTHCA_PUT(void);
319
320 #define MTHCA_GET(dest, source, offset) \
321 do { \
322 void *__p = (char *) (source) + (offset); \
323 switch (sizeof (dest)) { \
324 case 1: (dest) = *(u8 *) __p; break; \
325 case 2: (dest) = be16_to_cpup(__p); break; \
326 case 4: (dest) = be32_to_cpup(__p); break; \
327 case 8: (dest) = be64_to_cpup(__p); break; \
328 default: __buggy_use_of_MTHCA_GET(); \
329 } \
330 } while (0)
331
332 #define MTHCA_PUT(dest, source, offset) \
333 do { \
334 __typeof__(source) *__p = \
335 (__typeof__(source) *) ((char *) (dest) + (offset)); \
336 switch (sizeof(source)) { \
337 case 1: *__p = (source); break; \
338 case 2: *__p = cpu_to_be16(source); break; \
339 case 4: *__p = cpu_to_be32(source); break; \
340 case 8: *__p = cpu_to_be64(source); break; \
341 default: __buggy_use_of_MTHCA_PUT(); \
342 } \
343 } while (0)
344
345 int mthca_reset(struct mthca_dev *mdev);
346
347 u32 mthca_alloc(struct mthca_alloc *alloc);
348 void mthca_free(struct mthca_alloc *alloc, u32 obj);
349 int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
350 u32 reserved);
351 void mthca_alloc_cleanup(struct mthca_alloc *alloc);
352 void *mthca_array_get(struct mthca_array *array, int index);
353 int mthca_array_set(struct mthca_array *array, int index, void *value);
354 void mthca_array_clear(struct mthca_array *array, int index);
355 int mthca_array_init(struct mthca_array *array, int nent);
356 void mthca_array_cleanup(struct mthca_array *array, int nent);
357
358 int mthca_init_uar_table(struct mthca_dev *dev);
359 int mthca_init_pd_table(struct mthca_dev *dev);
360 int mthca_init_mr_table(struct mthca_dev *dev);
361 int mthca_init_eq_table(struct mthca_dev *dev);
362 int mthca_init_cq_table(struct mthca_dev *dev);
363 int mthca_init_qp_table(struct mthca_dev *dev);
364 int mthca_init_av_table(struct mthca_dev *dev);
365 int mthca_init_mcg_table(struct mthca_dev *dev);
366
367 void mthca_cleanup_uar_table(struct mthca_dev *dev);
368 void mthca_cleanup_pd_table(struct mthca_dev *dev);
369 void mthca_cleanup_mr_table(struct mthca_dev *dev);
370 void mthca_cleanup_eq_table(struct mthca_dev *dev);
371 void mthca_cleanup_cq_table(struct mthca_dev *dev);
372 void mthca_cleanup_qp_table(struct mthca_dev *dev);
373 void mthca_cleanup_av_table(struct mthca_dev *dev);
374 void mthca_cleanup_mcg_table(struct mthca_dev *dev);
375
376 int mthca_register_device(struct mthca_dev *dev);
377 void mthca_unregister_device(struct mthca_dev *dev);
378
379 int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
380 void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
381
382 int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd);
383 void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
384
385 struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size);
386 void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt);
387 int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
388 int start_index, u64 *buffer_list, int list_len);
389 int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
390 u64 iova, u64 total_size, u32 access, struct mthca_mr *mr);
391 int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
392 u32 access, struct mthca_mr *mr);
393 int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
394 u64 *buffer_list, int buffer_size_shift,
395 int list_len, u64 iova, u64 total_size,
396 u32 access, struct mthca_mr *mr);
397 void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr);
398
399 int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
400 u32 access, struct mthca_fmr *fmr);
401 int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
402 int list_len, u64 iova);
403 void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
404 int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
405 int list_len, u64 iova);
406 void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
407 int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr);
408
409 int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
410 void mthca_unmap_eq_icm(struct mthca_dev *dev);
411
412 int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
413 struct ib_wc *entry);
414 int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
415 int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
416 int mthca_init_cq(struct mthca_dev *dev, int nent,
417 struct mthca_cq *cq);
418 void mthca_free_cq(struct mthca_dev *dev,
419 struct mthca_cq *cq);
420 void mthca_cq_event(struct mthca_dev *dev, u32 cqn);
421 void mthca_cq_clean(struct mthca_dev *dev, u32 cqn, u32 qpn);
422
423 void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
424 enum ib_event_type event_type);
425 int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask);
426 int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
427 struct ib_send_wr **bad_wr);
428 int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
429 struct ib_recv_wr **bad_wr);
430 int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
431 struct ib_send_wr **bad_wr);
432 int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
433 struct ib_recv_wr **bad_wr);
434 int mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
435 int index, int *dbd, u32 *new_wqe);
436 int mthca_alloc_qp(struct mthca_dev *dev,
437 struct mthca_pd *pd,
438 struct mthca_cq *send_cq,
439 struct mthca_cq *recv_cq,
440 enum ib_qp_type type,
441 enum ib_sig_type send_policy,
442 struct mthca_qp *qp);
443 int mthca_alloc_sqp(struct mthca_dev *dev,
444 struct mthca_pd *pd,
445 struct mthca_cq *send_cq,
446 struct mthca_cq *recv_cq,
447 enum ib_sig_type send_policy,
448 int qpn,
449 int port,
450 struct mthca_sqp *sqp);
451 void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
452 int mthca_create_ah(struct mthca_dev *dev,
453 struct mthca_pd *pd,
454 struct ib_ah_attr *ah_attr,
455 struct mthca_ah *ah);
456 int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
457 int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
458 struct ib_ud_header *header);
459
460 int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
461 int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
462
463 int mthca_process_mad(struct ib_device *ibdev,
464 int mad_flags,
465 u8 port_num,
466 struct ib_wc *in_wc,
467 struct ib_grh *in_grh,
468 struct ib_mad *in_mad,
469 struct ib_mad *out_mad);
470 int mthca_create_agents(struct mthca_dev *dev);
471 void mthca_free_agents(struct mthca_dev *dev);
472
473 static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
474 {
475 return container_of(ibdev, struct mthca_dev, ib_dev);
476 }
477
478 static inline int mthca_is_memfree(struct mthca_dev *dev)
479 {
480 return dev->mthca_flags & MTHCA_FLAG_MEMFREE;
481 }
482
483 #endif /* MTHCA_DEV_H */
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