projects / deliverable / linux.git / blob
? search:


9acb8c54ce4f14ba470165e72396ce7d24f97f83
[deliverable/linux.git] / drivers / infiniband / hw / mthca / mthca_provider.c
1 /*
2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005 Cisco Systems. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 *
34 * $Id: mthca_provider.c 1397 2004-12-28 05:09:00Z roland $
35 */
36
37 #include <ib_smi.h>
38 #include <linux/mm.h>
39
40 #include "mthca_dev.h"
41 #include "mthca_cmd.h"
42 #include "mthca_user.h"
43 #include "mthca_memfree.h"
44
45 static int mthca_query_device(struct ib_device *ibdev,
46 struct ib_device_attr *props)
47 {
48 struct ib_smp *in_mad = NULL;
49 struct ib_smp *out_mad = NULL;
50 int err = -ENOMEM;
51 struct mthca_dev* mdev = to_mdev(ibdev);
52
53 u8 status;
54
55 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
56 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
57 if (!in_mad || !out_mad)
58 goto out;
59
60 memset(props, 0, sizeof *props);
61
62 props->fw_ver = mdev->fw_ver;
63
64 memset(in_mad, 0, sizeof *in_mad);
65 in_mad->base_version = 1;
66 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
67 in_mad->class_version = 1;
68 in_mad->method = IB_MGMT_METHOD_GET;
69 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
70
71 err = mthca_MAD_IFC(mdev, 1, 1,
72 1, NULL, NULL, in_mad, out_mad,
73 &status);
74 if (err)
75 goto out;
76 if (status) {
77 err = -EINVAL;
78 goto out;
79 }
80
81 props->device_cap_flags = mdev->device_cap_flags;
82 props->vendor_id = be32_to_cpup((u32 *) (out_mad->data + 36)) &
83 0xffffff;
84 props->vendor_part_id = be16_to_cpup((u16 *) (out_mad->data + 30));
85 props->hw_ver = be16_to_cpup((u16 *) (out_mad->data + 32));
86 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
87 memcpy(&props->node_guid, out_mad->data + 12, 8);
88
89 props->max_mr_size = ~0ull;
90 props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
91 props->max_qp_wr = 0xffff;
92 props->max_sge = mdev->limits.max_sg;
93 props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
94 props->max_cqe = 0xffff;
95 props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
96 props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
97 props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
98 props->max_qp_init_rd_atom = 1 << mdev->qp_table.rdb_shift;
99 props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
100
101 err = 0;
102 out:
103 kfree(in_mad);
104 kfree(out_mad);
105 return err;
106 }
107
108 static int mthca_query_port(struct ib_device *ibdev,
109 u8 port, struct ib_port_attr *props)
110 {
111 struct ib_smp *in_mad = NULL;
112 struct ib_smp *out_mad = NULL;
113 int err = -ENOMEM;
114 u8 status;
115
116 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
117 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
118 if (!in_mad || !out_mad)
119 goto out;
120
121 memset(in_mad, 0, sizeof *in_mad);
122 in_mad->base_version = 1;
123 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
124 in_mad->class_version = 1;
125 in_mad->method = IB_MGMT_METHOD_GET;
126 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
127 in_mad->attr_mod = cpu_to_be32(port);
128
129 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
130 port, NULL, NULL, in_mad, out_mad,
131 &status);
132 if (err)
133 goto out;
134 if (status) {
135 err = -EINVAL;
136 goto out;
137 }
138
139 props->lid = be16_to_cpup((u16 *) (out_mad->data + 16));
140 props->lmc = out_mad->data[34] & 0x7;
141 props->sm_lid = be16_to_cpup((u16 *) (out_mad->data + 18));
142 props->sm_sl = out_mad->data[36] & 0xf;
143 props->state = out_mad->data[32] & 0xf;
144 props->phys_state = out_mad->data[33] >> 4;
145 props->port_cap_flags = be32_to_cpup((u32 *) (out_mad->data + 20));
146 props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
147 props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
148 props->qkey_viol_cntr = be16_to_cpup((u16 *) (out_mad->data + 48));
149 props->active_width = out_mad->data[31] & 0xf;
150 props->active_speed = out_mad->data[35] >> 4;
151
152 out:
153 kfree(in_mad);
154 kfree(out_mad);
155 return err;
156 }
157
158 static int mthca_modify_port(struct ib_device *ibdev,
159 u8 port, int port_modify_mask,
160 struct ib_port_modify *props)
161 {
162 struct mthca_set_ib_param set_ib;
163 struct ib_port_attr attr;
164 int err;
165 u8 status;
166
167 if (down_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
168 return -ERESTARTSYS;
169
170 err = mthca_query_port(ibdev, port, &attr);
171 if (err)
172 goto out;
173
174 set_ib.set_si_guid = 0;
175 set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
176
177 set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
178 ~props->clr_port_cap_mask;
179
180 err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
181 if (err)
182 goto out;
183 if (status) {
184 err = -EINVAL;
185 goto out;
186 }
187
188 out:
189 up(&to_mdev(ibdev)->cap_mask_mutex);
190 return err;
191 }
192
193 static int mthca_query_pkey(struct ib_device *ibdev,
194 u8 port, u16 index, u16 *pkey)
195 {
196 struct ib_smp *in_mad = NULL;
197 struct ib_smp *out_mad = NULL;
198 int err = -ENOMEM;
199 u8 status;
200
201 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
202 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
203 if (!in_mad || !out_mad)
204 goto out;
205
206 memset(in_mad, 0, sizeof *in_mad);
207 in_mad->base_version = 1;
208 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
209 in_mad->class_version = 1;
210 in_mad->method = IB_MGMT_METHOD_GET;
211 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
212 in_mad->attr_mod = cpu_to_be32(index / 32);
213
214 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
215 port, NULL, NULL, in_mad, out_mad,
216 &status);
217 if (err)
218 goto out;
219 if (status) {
220 err = -EINVAL;
221 goto out;
222 }
223
224 *pkey = be16_to_cpu(((u16 *) out_mad->data)[index % 32]);
225
226 out:
227 kfree(in_mad);
228 kfree(out_mad);
229 return err;
230 }
231
232 static int mthca_query_gid(struct ib_device *ibdev, u8 port,
233 int index, union ib_gid *gid)
234 {
235 struct ib_smp *in_mad = NULL;
236 struct ib_smp *out_mad = NULL;
237 int err = -ENOMEM;
238 u8 status;
239
240 in_mad = kmalloc(sizeof *in_mad, GFP_KERNEL);
241 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
242 if (!in_mad || !out_mad)
243 goto out;
244
245 memset(in_mad, 0, sizeof *in_mad);
246 in_mad->base_version = 1;
247 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
248 in_mad->class_version = 1;
249 in_mad->method = IB_MGMT_METHOD_GET;
250 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
251 in_mad->attr_mod = cpu_to_be32(port);
252
253 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
254 port, NULL, NULL, in_mad, out_mad,
255 &status);
256 if (err)
257 goto out;
258 if (status) {
259 err = -EINVAL;
260 goto out;
261 }
262
263 memcpy(gid->raw, out_mad->data + 8, 8);
264
265 memset(in_mad, 0, sizeof *in_mad);
266 in_mad->base_version = 1;
267 in_mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
268 in_mad->class_version = 1;
269 in_mad->method = IB_MGMT_METHOD_GET;
270 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
271 in_mad->attr_mod = cpu_to_be32(index / 8);
272
273 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
274 port, NULL, NULL, in_mad, out_mad,
275 &status);
276 if (err)
277 goto out;
278 if (status) {
279 err = -EINVAL;
280 goto out;
281 }
282
283 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
284
285 out:
286 kfree(in_mad);
287 kfree(out_mad);
288 return err;
289 }
290
291 static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
292 struct ib_udata *udata)
293 {
294 struct mthca_alloc_ucontext_resp uresp;
295 struct mthca_ucontext *context;
296 int err;
297
298 memset(&uresp, 0, sizeof uresp);
299
300 uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
301 if (mthca_is_memfree(to_mdev(ibdev)))
302 uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
303 else
304 uresp.uarc_size = 0;
305
306 context = kmalloc(sizeof *context, GFP_KERNEL);
307 if (!context)
308 return ERR_PTR(-ENOMEM);
309
310 err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
311 if (err) {
312 kfree(context);
313 return ERR_PTR(err);
314 }
315
316 context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
317 if (IS_ERR(context->db_tab)) {
318 err = PTR_ERR(context->db_tab);
319 mthca_uar_free(to_mdev(ibdev), &context->uar);
320 kfree(context);
321 return ERR_PTR(err);
322 }
323
324 if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
325 mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
326 mthca_uar_free(to_mdev(ibdev), &context->uar);
327 kfree(context);
328 return ERR_PTR(-EFAULT);
329 }
330
331 return &context->ibucontext;
332 }
333
334 static int mthca_dealloc_ucontext(struct ib_ucontext *context)
335 {
336 mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
337 to_mucontext(context)->db_tab);
338 mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
339 kfree(to_mucontext(context));
340
341 return 0;
342 }
343
344 static int mthca_mmap_uar(struct ib_ucontext *context,
345 struct vm_area_struct *vma)
346 {
347 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
348 return -EINVAL;
349
350 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
351
352 if (remap_pfn_range(vma, vma->vm_start,
353 to_mucontext(context)->uar.pfn,
354 PAGE_SIZE, vma->vm_page_prot))
355 return -EAGAIN;
356
357 return 0;
358 }
359
360 static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
361 struct ib_ucontext *context,
362 struct ib_udata *udata)
363 {
364 struct mthca_pd *pd;
365 int err;
366
367 pd = kmalloc(sizeof *pd, GFP_KERNEL);
368 if (!pd)
369 return ERR_PTR(-ENOMEM);
370
371 err = mthca_pd_alloc(to_mdev(ibdev), pd);
372 if (err) {
373 kfree(pd);
374 return ERR_PTR(err);
375 }
376
377 return &pd->ibpd;
378 }
379
380 static int mthca_dealloc_pd(struct ib_pd *pd)
381 {
382 mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
383 kfree(pd);
384
385 return 0;
386 }
387
388 static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
389 struct ib_ah_attr *ah_attr)
390 {
391 int err;
392 struct mthca_ah *ah;
393
394 ah = kmalloc(sizeof *ah, GFP_ATOMIC);
395 if (!ah)
396 return ERR_PTR(-ENOMEM);
397
398 err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
399 if (err) {
400 kfree(ah);
401 return ERR_PTR(err);
402 }
403
404 return &ah->ibah;
405 }
406
407 static int mthca_ah_destroy(struct ib_ah *ah)
408 {
409 mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
410 kfree(ah);
411
412 return 0;
413 }
414
415 static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
416 struct ib_qp_init_attr *init_attr,
417 struct ib_udata *udata)
418 {
419 struct mthca_qp *qp;
420 int err;
421
422 switch (init_attr->qp_type) {
423 case IB_QPT_RC:
424 case IB_QPT_UC:
425 case IB_QPT_UD:
426 {
427 qp = kmalloc(sizeof *qp, GFP_KERNEL);
428 if (!qp)
429 return ERR_PTR(-ENOMEM);
430
431 qp->sq.max = init_attr->cap.max_send_wr;
432 qp->rq.max = init_attr->cap.max_recv_wr;
433 qp->sq.max_gs = init_attr->cap.max_send_sge;
434 qp->rq.max_gs = init_attr->cap.max_recv_sge;
435
436 err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
437 to_mcq(init_attr->send_cq),
438 to_mcq(init_attr->recv_cq),
439 init_attr->qp_type, init_attr->sq_sig_type,
440 qp);
441 qp->ibqp.qp_num = qp->qpn;
442 break;
443 }
444 case IB_QPT_SMI:
445 case IB_QPT_GSI:
446 {
447 qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
448 if (!qp)
449 return ERR_PTR(-ENOMEM);
450
451 qp->sq.max = init_attr->cap.max_send_wr;
452 qp->rq.max = init_attr->cap.max_recv_wr;
453 qp->sq.max_gs = init_attr->cap.max_send_sge;
454 qp->rq.max_gs = init_attr->cap.max_recv_sge;
455
456 qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
457
458 err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
459 to_mcq(init_attr->send_cq),
460 to_mcq(init_attr->recv_cq),
461 init_attr->sq_sig_type,
462 qp->ibqp.qp_num, init_attr->port_num,
463 to_msqp(qp));
464 break;
465 }
466 default:
467 /* Don't support raw QPs */
468 return ERR_PTR(-ENOSYS);
469 }
470
471 if (err) {
472 kfree(qp);
473 return ERR_PTR(err);
474 }
475
476 init_attr->cap.max_inline_data = 0;
477
478 return &qp->ibqp;
479 }
480
481 static int mthca_destroy_qp(struct ib_qp *qp)
482 {
483 mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
484 kfree(qp);
485 return 0;
486 }
487
488 static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
489 struct ib_ucontext *context,
490 struct ib_udata *udata)
491 {
492 struct mthca_cq *cq;
493 int nent;
494 int err;
495
496 cq = kmalloc(sizeof *cq, GFP_KERNEL);
497 if (!cq)
498 return ERR_PTR(-ENOMEM);
499
500 for (nent = 1; nent <= entries; nent <<= 1)
501 ; /* nothing */
502
503 err = mthca_init_cq(to_mdev(ibdev), nent, cq);
504 if (err) {
505 kfree(cq);
506 cq = ERR_PTR(err);
507 }
508
509 return &cq->ibcq;
510 }
511
512 static int mthca_destroy_cq(struct ib_cq *cq)
513 {
514 mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
515 kfree(cq);
516
517 return 0;
518 }
519
520 static inline u32 convert_access(int acc)
521 {
522 return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
523 (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
524 (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
525 (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
526 MTHCA_MPT_FLAG_LOCAL_READ;
527 }
528
529 static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
530 {
531 struct mthca_mr *mr;
532 int err;
533
534 mr = kmalloc(sizeof *mr, GFP_KERNEL);
535 if (!mr)
536 return ERR_PTR(-ENOMEM);
537
538 err = mthca_mr_alloc_notrans(to_mdev(pd->device),
539 to_mpd(pd)->pd_num,
540 convert_access(acc), mr);
541
542 if (err) {
543 kfree(mr);
544 return ERR_PTR(err);
545 }
546
547 return &mr->ibmr;
548 }
549
550 static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
551 struct ib_phys_buf *buffer_list,
552 int num_phys_buf,
553 int acc,
554 u64 *iova_start)
555 {
556 struct mthca_mr *mr;
557 u64 *page_list;
558 u64 total_size;
559 u64 mask;
560 int shift;
561 int npages;
562 int err;
563 int i, j, n;
564
565 /* First check that we have enough alignment */
566 if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
567 return ERR_PTR(-EINVAL);
568
569 if (num_phys_buf > 1 &&
570 ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK))
571 return ERR_PTR(-EINVAL);
572
573 mask = 0;
574 total_size = 0;
575 for (i = 0; i < num_phys_buf; ++i) {
576 if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
577 return ERR_PTR(-EINVAL);
578 if (i != 0 && i != num_phys_buf - 1 &&
579 (buffer_list[i].size & ~PAGE_MASK))
580 return ERR_PTR(-EINVAL);
581
582 total_size += buffer_list[i].size;
583 if (i > 0)
584 mask |= buffer_list[i].addr;
585 }
586
587 /* Find largest page shift we can use to cover buffers */
588 for (shift = PAGE_SHIFT; shift < 31; ++shift)
589 if (num_phys_buf > 1) {
590 if ((1ULL << shift) & mask)
591 break;
592 } else {
593 if (1ULL << shift >=
594 buffer_list[0].size +
595 (buffer_list[0].addr & ((1ULL << shift) - 1)))
596 break;
597 }
598
599 buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
600 buffer_list[0].addr &= ~0ull << shift;
601
602 mr = kmalloc(sizeof *mr, GFP_KERNEL);
603 if (!mr)
604 return ERR_PTR(-ENOMEM);
605
606 npages = 0;
607 for (i = 0; i < num_phys_buf; ++i)
608 npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
609
610 if (!npages)
611 return &mr->ibmr;
612
613 page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
614 if (!page_list) {
615 kfree(mr);
616 return ERR_PTR(-ENOMEM);
617 }
618
619 n = 0;
620 for (i = 0; i < num_phys_buf; ++i)
621 for (j = 0;
622 j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
623 ++j)
624 page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
625
626 mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
627 "in PD %x; shift %d, npages %d.\n",
628 (unsigned long long) buffer_list[0].addr,
629 (unsigned long long) *iova_start,
630 to_mpd(pd)->pd_num,
631 shift, npages);
632
633 err = mthca_mr_alloc_phys(to_mdev(pd->device),
634 to_mpd(pd)->pd_num,
635 page_list, shift, npages,
636 *iova_start, total_size,
637 convert_access(acc), mr);
638
639 if (err) {
640 kfree(page_list);
641 kfree(mr);
642 return ERR_PTR(err);
643 }
644
645 kfree(page_list);
646 return &mr->ibmr;
647 }
648
649 static int mthca_dereg_mr(struct ib_mr *mr)
650 {
651 struct mthca_mr *mmr = to_mmr(mr);
652 mthca_free_mr(to_mdev(mr->device), mmr);
653 kfree(mmr);
654 return 0;
655 }
656
657 static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
658 struct ib_fmr_attr *fmr_attr)
659 {
660 struct mthca_fmr *fmr;
661 int err;
662
663 fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
664 if (!fmr)
665 return ERR_PTR(-ENOMEM);
666
667 memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
668 err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
669 convert_access(mr_access_flags), fmr);
670
671 if (err) {
672 kfree(fmr);
673 return ERR_PTR(err);
674 }
675
676 return &fmr->ibmr;
677 }
678
679 static int mthca_dealloc_fmr(struct ib_fmr *fmr)
680 {
681 struct mthca_fmr *mfmr = to_mfmr(fmr);
682 int err;
683
684 err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
685 if (err)
686 return err;
687
688 kfree(mfmr);
689 return 0;
690 }
691
692 static int mthca_unmap_fmr(struct list_head *fmr_list)
693 {
694 struct ib_fmr *fmr;
695 int err;
696 u8 status;
697 struct mthca_dev *mdev = NULL;
698
699 list_for_each_entry(fmr, fmr_list, list) {
700 if (mdev && to_mdev(fmr->device) != mdev)
701 return -EINVAL;
702 mdev = to_mdev(fmr->device);
703 }
704
705 if (!mdev)
706 return 0;
707
708 if (mthca_is_memfree(mdev)) {
709 list_for_each_entry(fmr, fmr_list, list)
710 mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
711
712 wmb();
713 } else
714 list_for_each_entry(fmr, fmr_list, list)
715 mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
716
717 err = mthca_SYNC_TPT(mdev, &status);
718 if (err)
719 return err;
720 if (status)
721 return -EINVAL;
722 return 0;
723 }
724
725 static ssize_t show_rev(struct class_device *cdev, char *buf)
726 {
727 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
728 return sprintf(buf, "%x\n", dev->rev_id);
729 }
730
731 static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
732 {
733 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
734 return sprintf(buf, "%x.%x.%x\n", (int) (dev->fw_ver >> 32),
735 (int) (dev->fw_ver >> 16) & 0xffff,
736 (int) dev->fw_ver & 0xffff);
737 }
738
739 static ssize_t show_hca(struct class_device *cdev, char *buf)
740 {
741 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
742 switch (dev->pdev->device) {
743 case PCI_DEVICE_ID_MELLANOX_TAVOR:
744 return sprintf(buf, "MT23108\n");
745 case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
746 return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
747 case PCI_DEVICE_ID_MELLANOX_ARBEL:
748 return sprintf(buf, "MT25208\n");
749 case PCI_DEVICE_ID_MELLANOX_SINAI:
750 case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
751 return sprintf(buf, "MT25204\n");
752 default:
753 return sprintf(buf, "unknown\n");
754 }
755 }
756
757 static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
758 static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
759 static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
760
761 static struct class_device_attribute *mthca_class_attributes[] = {
762 &class_device_attr_hw_rev,
763 &class_device_attr_fw_ver,
764 &class_device_attr_hca_type
765 };
766
767 int mthca_register_device(struct mthca_dev *dev)
768 {
769 int ret;
770 int i;
771
772 strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
773 dev->ib_dev.owner = THIS_MODULE;
774
775 dev->ib_dev.node_type = IB_NODE_CA;
776 dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
777 dev->ib_dev.dma_device = &dev->pdev->dev;
778 dev->ib_dev.class_dev.dev = &dev->pdev->dev;
779 dev->ib_dev.query_device = mthca_query_device;
780 dev->ib_dev.query_port = mthca_query_port;
781 dev->ib_dev.modify_port = mthca_modify_port;
782 dev->ib_dev.query_pkey = mthca_query_pkey;
783 dev->ib_dev.query_gid = mthca_query_gid;
784 dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
785 dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
786 dev->ib_dev.mmap = mthca_mmap_uar;
787 dev->ib_dev.alloc_pd = mthca_alloc_pd;
788 dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
789 dev->ib_dev.create_ah = mthca_ah_create;
790 dev->ib_dev.destroy_ah = mthca_ah_destroy;
791 dev->ib_dev.create_qp = mthca_create_qp;
792 dev->ib_dev.modify_qp = mthca_modify_qp;
793 dev->ib_dev.destroy_qp = mthca_destroy_qp;
794 dev->ib_dev.create_cq = mthca_create_cq;
795 dev->ib_dev.destroy_cq = mthca_destroy_cq;
796 dev->ib_dev.poll_cq = mthca_poll_cq;
797 dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
798 dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
799 dev->ib_dev.dereg_mr = mthca_dereg_mr;
800
801 if (dev->mthca_flags & MTHCA_FLAG_FMR) {
802 dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
803 dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
804 dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
805 if (mthca_is_memfree(dev))
806 dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
807 else
808 dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
809 }
810
811 dev->ib_dev.attach_mcast = mthca_multicast_attach;
812 dev->ib_dev.detach_mcast = mthca_multicast_detach;
813 dev->ib_dev.process_mad = mthca_process_mad;
814
815 if (mthca_is_memfree(dev)) {
816 dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
817 dev->ib_dev.post_send = mthca_arbel_post_send;
818 dev->ib_dev.post_recv = mthca_arbel_post_receive;
819 } else {
820 dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
821 dev->ib_dev.post_send = mthca_tavor_post_send;
822 dev->ib_dev.post_recv = mthca_tavor_post_receive;
823 }
824
825 init_MUTEX(&dev->cap_mask_mutex);
826
827 ret = ib_register_device(&dev->ib_dev);
828 if (ret)
829 return ret;
830
831 for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
832 ret = class_device_create_file(&dev->ib_dev.class_dev,
833 mthca_class_attributes[i]);
834 if (ret) {
835 ib_unregister_device(&dev->ib_dev);
836 return ret;
837 }
838 }
839
840 return 0;
841 }
842
843 void mthca_unregister_device(struct mthca_dev *dev)
844 {
845 ib_unregister_device(&dev->ib_dev);
846 }
Linux kernel - Deliverables
This page took 0.047168 seconds and 4 git commands to generate.