drivers/infiniband/hw/mthca/mthca_srq.c

   1 /*
   2  * Copyright (c) 2005 Cisco Systems. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  * $Id: mthca_srq.c 3047 2005-08-10 03:59:35Z roland $
  33  */
  34
  35 #include <linux/slab.h>
  36 #include <linux/string.h>
  37
  38 #include "mthca_dev.h"
  39 #include "mthca_cmd.h"
  40 #include "mthca_memfree.h"
  41 #include "mthca_wqe.h"
  42
  43 enum {
  44         MTHCA_MAX_DIRECT_SRQ_SIZE = 4 * PAGE_SIZE
  45 };
  46
  47 struct mthca_tavor_srq_context {
  48         __be64 wqe_base_ds;     /* low 6 bits is descriptor size */
  49         __be32 state_pd;
  50         __be32 lkey;
  51         __be32 uar;
  52         __be16 limit_watermark;
  53         __be16 wqe_cnt;
  54         u32    reserved[2];
  55 };
  56
  57 struct mthca_arbel_srq_context {
  58         __be32 state_logsize_srqn;
  59         __be32 lkey;
  60         __be32 db_index;
  61         __be32 logstride_usrpage;
  62         __be64 wqe_base;
  63         __be32 eq_pd;
  64         __be16 limit_watermark;
  65         __be16 wqe_cnt;
  66         u16    reserved1;
  67         __be16 wqe_counter;
  68         u32    reserved2[3];
  69 };
  70
  71 static void *get_wqe(struct mthca_srq *srq, int n)
  72 {
  73         if (srq->is_direct)
  74                 return srq->queue.direct.buf + (n << srq->wqe_shift);
  75         else
  76                 return srq->queue.page_list[(n << srq->wqe_shift) >> PAGE_SHIFT].buf +
  77                         ((n << srq->wqe_shift) & (PAGE_SIZE - 1));
  78 }
  79
  80 /*
  81  * Return a pointer to the location within a WQE that we're using as a
  82  * link when the WQE is in the free list.  We use the imm field
  83  * because in the Tavor case, posting a WQE may overwrite the next
  84  * segment of the previous WQE, but a receive WQE will never touch the
  85  * imm field.  This avoids corrupting our free list if the previous
  86  * WQE has already completed and been put on the free list when we
  87  * post the next WQE.
  88  */
  89 static inline int *wqe_to_link(void *wqe)
  90 {
  91         return (int *) (wqe + offsetof(struct mthca_next_seg, imm));
  92 }
  93
  94 static void mthca_tavor_init_srq_context(struct mthca_dev *dev,
  95                                          struct mthca_pd *pd,
  96                                          struct mthca_srq *srq,
  97                                          struct mthca_tavor_srq_context *context)
  98 {
  99         memset(context, 0, sizeof *context);
 100
 101         context->wqe_base_ds = cpu_to_be64(1 << (srq->wqe_shift - 4));
 102         context->state_pd    = cpu_to_be32(pd->pd_num);
 103         context->lkey        = cpu_to_be32(srq->mr.ibmr.lkey);
 104
 105         if (pd->ibpd.uobject)
 106                 context->uar =
 107                         cpu_to_be32(to_mucontext(pd->ibpd.uobject->context)->uar.index);
 108         else
 109                 context->uar = cpu_to_be32(dev->driver_uar.index);
 110 }
 111
 112 static void mthca_arbel_init_srq_context(struct mthca_dev *dev,
 113                                          struct mthca_pd *pd,
 114                                          struct mthca_srq *srq,
 115                                          struct mthca_arbel_srq_context *context)
 116 {
 117         int logsize;
 118
 119         memset(context, 0, sizeof *context);
 120
 121         logsize = long_log2(srq->max) + srq->wqe_shift;
 122         context->state_logsize_srqn = cpu_to_be32(logsize << 24 | srq->srqn);
 123         context->lkey = cpu_to_be32(srq->mr.ibmr.lkey);
 124         context->db_index = cpu_to_be32(srq->db_index);
 125         context->logstride_usrpage = cpu_to_be32((srq->wqe_shift - 4) << 29);
 126         if (pd->ibpd.uobject)
 127                 context->logstride_usrpage |=
 128                         cpu_to_be32(to_mucontext(pd->ibpd.uobject->context)->uar.index);
 129         else
 130                 context->logstride_usrpage |= cpu_to_be32(dev->driver_uar.index);
 131         context->eq_pd = cpu_to_be32(MTHCA_EQ_ASYNC << 24 | pd->pd_num);
 132 }
 133
 134 static void mthca_free_srq_buf(struct mthca_dev *dev, struct mthca_srq *srq)
 135 {
 136         mthca_buf_free(dev, srq->max << srq->wqe_shift, &srq->queue,
 137                        srq->is_direct, &srq->mr);
 138         kfree(srq->wrid);
 139 }
 140
 141 static int mthca_alloc_srq_buf(struct mthca_dev *dev, struct mthca_pd *pd,
 142                                struct mthca_srq *srq)
 143 {
 144         struct mthca_data_seg *scatter;
 145         void *wqe;
 146         int err;
 147         int i;
 148
 149         if (pd->ibpd.uobject)
 150                 return 0;
 151
 152         srq->wrid = kmalloc(srq->max * sizeof (u64), GFP_KERNEL);
 153         if (!srq->wrid)
 154                 return -ENOMEM;
 155
 156         err = mthca_buf_alloc(dev, srq->max << srq->wqe_shift,
 157                               MTHCA_MAX_DIRECT_SRQ_SIZE,
 158                               &srq->queue, &srq->is_direct, pd, 1, &srq->mr);
 159         if (err) {
 160                 kfree(srq->wrid);
 161                 return err;
 162         }
 163
 164         /*
 165          * Now initialize the SRQ buffer so that all of the WQEs are
 166          * linked into the list of free WQEs.  In addition, set the
 167          * scatter list L_Keys to the sentry value of 0x100.
 168          */
 169         for (i = 0; i < srq->max; ++i) {
 170                 wqe = get_wqe(srq, i);
 171
 172                 *wqe_to_link(wqe) = i < srq->max - 1 ? i + 1 : -1;
 173
 174                 for (scatter = wqe + sizeof (struct mthca_next_seg);
 175                      (void *) scatter < wqe + (1 << srq->wqe_shift);
 176                      ++scatter)
 177                         scatter->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
 178         }
 179
 180         srq->last = get_wqe(srq, srq->max - 1);
 181
 182         return 0;
 183 }
 184
 185 int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
 186                     struct ib_srq_attr *attr, struct mthca_srq *srq)
 187 {
 188         struct mthca_mailbox *mailbox;
 189         u8 status;
 190         int ds;
 191         int err;
 192
 193         /* Sanity check SRQ size before proceeding */
 194         if (attr->max_wr  > dev->limits.max_srq_wqes ||
 195             attr->max_sge > dev->limits.max_srq_sge)
 196                 return -EINVAL;
 197
 198         srq->max      = attr->max_wr;
 199         srq->max_gs   = attr->max_sge;
 200         srq->counter  = 0;
 201
 202         if (mthca_is_memfree(dev))
 203                 srq->max = roundup_pow_of_two(srq->max + 1);
 204         else
 205                 srq->max = srq->max + 1;
 206
 207         ds = max(64UL,
 208                  roundup_pow_of_two(sizeof (struct mthca_next_seg) +
 209                                     srq->max_gs * sizeof (struct mthca_data_seg)));
 210
 211         if (!mthca_is_memfree(dev) && (ds > dev->limits.max_desc_sz))
 212                 return -EINVAL;
 213
 214         srq->wqe_shift = long_log2(ds);
 215
 216         srq->srqn = mthca_alloc(&dev->srq_table.alloc);
 217         if (srq->srqn == -1)
 218                 return -ENOMEM;
 219
 220         if (mthca_is_memfree(dev)) {
 221                 err = mthca_table_get(dev, dev->srq_table.table, srq->srqn);
 222                 if (err)
 223                         goto err_out;
 224
 225                 if (!pd->ibpd.uobject) {
 226                         srq->db_index = mthca_alloc_db(dev, MTHCA_DB_TYPE_SRQ,
 227                                                        srq->srqn, &srq->db);
 228                         if (srq->db_index < 0) {
 229                                 err = -ENOMEM;
 230                                 goto err_out_icm;
 231                         }
 232                 }
 233         }
 234
 235         mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
 236         if (IS_ERR(mailbox)) {
 237                 err = PTR_ERR(mailbox);
 238                 goto err_out_db;
 239         }
 240
 241         err = mthca_alloc_srq_buf(dev, pd, srq);
 242         if (err)
 243                 goto err_out_mailbox;
 244
 245         spin_lock_init(&srq->lock);
 246         srq->refcount = 1;
 247         init_waitqueue_head(&srq->wait);
 248         mutex_init(&srq->mutex);
 249
 250         if (mthca_is_memfree(dev))
 251                 mthca_arbel_init_srq_context(dev, pd, srq, mailbox->buf);
 252         else
 253                 mthca_tavor_init_srq_context(dev, pd, srq, mailbox->buf);
 254
 255         err = mthca_SW2HW_SRQ(dev, mailbox, srq->srqn, &status);
 256
 257         if (err) {
 258                 mthca_warn(dev, "SW2HW_SRQ failed (%d)\n", err);
 259                 goto err_out_free_buf;
 260         }
 261         if (status) {
 262                 mthca_warn(dev, "SW2HW_SRQ returned status 0x%02x\n",
 263                            status);
 264                 err = -EINVAL;
 265                 goto err_out_free_buf;
 266         }
 267
 268         spin_lock_irq(&dev->srq_table.lock);
 269         if (mthca_array_set(&dev->srq_table.srq,
 270                             srq->srqn & (dev->limits.num_srqs - 1),
 271                             srq)) {
 272                 spin_unlock_irq(&dev->srq_table.lock);
 273                 goto err_out_free_srq;
 274         }
 275         spin_unlock_irq(&dev->srq_table.lock);
 276
 277         mthca_free_mailbox(dev, mailbox);
 278
 279         srq->first_free = 0;
 280         srq->last_free  = srq->max - 1;
 281
 282         attr->max_wr    = srq->max - 1;
 283         attr->max_sge   = srq->max_gs;
 284
 285         return 0;
 286
 287 err_out_free_srq:
 288         err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status);
 289         if (err)
 290                 mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err);
 291         else if (status)
 292                 mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status);
 293
 294 err_out_free_buf:
 295         if (!pd->ibpd.uobject)
 296                 mthca_free_srq_buf(dev, srq);
 297
 298 err_out_mailbox:
 299         mthca_free_mailbox(dev, mailbox);
 300
 301 err_out_db:
 302         if (!pd->ibpd.uobject && mthca_is_memfree(dev))
 303                 mthca_free_db(dev, MTHCA_DB_TYPE_SRQ, srq->db_index);
 304
 305 err_out_icm:
 306         mthca_table_put(dev, dev->srq_table.table, srq->srqn);
 307
 308 err_out:
 309         mthca_free(&dev->srq_table.alloc, srq->srqn);
 310
 311         return err;
 312 }
 313
 314 static inline int get_srq_refcount(struct mthca_dev *dev, struct mthca_srq *srq)
 315 {
 316         int c;
 317
 318         spin_lock_irq(&dev->srq_table.lock);
 319         c = srq->refcount;
 320         spin_unlock_irq(&dev->srq_table.lock);
 321
 322         return c;
 323 }
 324
 325 void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq)
 326 {
 327         struct mthca_mailbox *mailbox;
 328         int err;
 329         u8 status;
 330
 331         mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
 332         if (IS_ERR(mailbox)) {
 333                 mthca_warn(dev, "No memory for mailbox to free SRQ.\n");
 334                 return;
 335         }
 336
 337         err = mthca_HW2SW_SRQ(dev, mailbox, srq->srqn, &status);
 338         if (err)
 339                 mthca_warn(dev, "HW2SW_SRQ failed (%d)\n", err);
 340         else if (status)
 341                 mthca_warn(dev, "HW2SW_SRQ returned status 0x%02x\n", status);
 342
 343         spin_lock_irq(&dev->srq_table.lock);
 344         mthca_array_clear(&dev->srq_table.srq,
 345                           srq->srqn & (dev->limits.num_srqs - 1));
 346         --srq->refcount;
 347         spin_unlock_irq(&dev->srq_table.lock);
 348
 349         wait_event(srq->wait, !get_srq_refcount(dev, srq));
 350
 351         if (!srq->ibsrq.uobject) {
 352                 mthca_free_srq_buf(dev, srq);
 353                 if (mthca_is_memfree(dev))
 354                         mthca_free_db(dev, MTHCA_DB_TYPE_SRQ, srq->db_index);
 355         }
 356
 357         mthca_table_put(dev, dev->srq_table.table, srq->srqn);
 358         mthca_free(&dev->srq_table.alloc, srq->srqn);
 359         mthca_free_mailbox(dev, mailbox);
 360 }
 361
 362 int mthca_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
 363                      enum ib_srq_attr_mask attr_mask, struct ib_udata *udata)
 364 {
 365         struct mthca_dev *dev = to_mdev(ibsrq->device);
 366         struct mthca_srq *srq = to_msrq(ibsrq);
 367         int ret;
 368         u8 status;
 369
 370         /* We don't support resizing SRQs (yet?) */
 371         if (attr_mask & IB_SRQ_MAX_WR)
 372                 return -EINVAL;
 373
 374         if (attr_mask & IB_SRQ_LIMIT) {
 375                 u32 max_wr = mthca_is_memfree(dev) ? srq->max - 1 : srq->max;
 376                 if (attr->srq_limit > max_wr)
 377                         return -EINVAL;
 378
 379                 mutex_lock(&srq->mutex);
 380                 ret = mthca_ARM_SRQ(dev, srq->srqn, attr->srq_limit, &status);
 381                 mutex_unlock(&srq->mutex);
 382
 383                 if (ret)
 384                         return ret;
 385                 if (status)
 386                         return -EINVAL;
 387         }
 388
 389         return 0;
 390 }
 391
 392 int mthca_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
 393 {
 394         struct mthca_dev *dev = to_mdev(ibsrq->device);
 395         struct mthca_srq *srq = to_msrq(ibsrq);
 396         struct mthca_mailbox *mailbox;
 397         struct mthca_arbel_srq_context *arbel_ctx;
 398         struct mthca_tavor_srq_context *tavor_ctx;
 399         u8 status;
 400         int err;
 401
 402         mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
 403         if (IS_ERR(mailbox))
 404                 return PTR_ERR(mailbox);
 405
 406         err = mthca_QUERY_SRQ(dev, srq->srqn, mailbox, &status);
 407         if (err)
 408                 goto out;
 409
 410         if (mthca_is_memfree(dev)) {
 411                 arbel_ctx = mailbox->buf;
 412                 srq_attr->srq_limit = be16_to_cpu(arbel_ctx->limit_watermark);
 413         } else {
 414                 tavor_ctx = mailbox->buf;
 415                 srq_attr->srq_limit = be16_to_cpu(tavor_ctx->limit_watermark);
 416         }
 417
 418         srq_attr->max_wr  = srq->max - 1;
 419         srq_attr->max_sge = srq->max_gs;
 420
 421 out:
 422         mthca_free_mailbox(dev, mailbox);
 423
 424         return err;
 425 }
 426
 427 void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
 428                      enum ib_event_type event_type)
 429 {
 430         struct mthca_srq *srq;
 431         struct ib_event event;
 432
 433         spin_lock(&dev->srq_table.lock);
 434         srq = mthca_array_get(&dev->srq_table.srq, srqn & (dev->limits.num_srqs - 1));
 435         if (srq)
 436                 ++srq->refcount;
 437         spin_unlock(&dev->srq_table.lock);
 438
 439         if (!srq) {
 440                 mthca_warn(dev, "Async event for bogus SRQ %08x\n", srqn);
 441                 return;
 442         }
 443
 444         if (!srq->ibsrq.event_handler)
 445                 goto out;
 446
 447         event.device      = &dev->ib_dev;
 448         event.event       = event_type;
 449         event.element.srq = &srq->ibsrq;
 450         srq->ibsrq.event_handler(&event, srq->ibsrq.srq_context);
 451
 452 out:
 453         spin_lock(&dev->srq_table.lock);
 454         if (!--srq->refcount)
 455                 wake_up(&srq->wait);
 456         spin_unlock(&dev->srq_table.lock);
 457 }
 458
 459 /*
 460  * This function must be called with IRQs disabled.
 461  */
 462 void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr)
 463 {
 464         int ind;
 465
 466         ind = wqe_addr >> srq->wqe_shift;
 467
 468         spin_lock(&srq->lock);
 469
 470         if (likely(srq->first_free >= 0))
 471                 *wqe_to_link(get_wqe(srq, srq->last_free)) = ind;
 472         else
 473                 srq->first_free = ind;
 474
 475         *wqe_to_link(get_wqe(srq, ind)) = -1;
 476         srq->last_free = ind;
 477
 478         spin_unlock(&srq->lock);
 479 }
 480
 481 int mthca_tavor_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
 482                               struct ib_recv_wr **bad_wr)
 483 {
 484         struct mthca_dev *dev = to_mdev(ibsrq->device);
 485         struct mthca_srq *srq = to_msrq(ibsrq);
 486         __be32 doorbell[2];
 487         unsigned long flags;
 488         int err = 0;
 489         int first_ind;
 490         int ind;
 491         int next_ind;
 492         int nreq;
 493         int i;
 494         void *wqe;
 495         void *prev_wqe;
 496
 497         spin_lock_irqsave(&srq->lock, flags);
 498
 499         first_ind = srq->first_free;
 500
 501         for (nreq = 0; wr; wr = wr->next) {
 502                 ind = srq->first_free;
 503
 504                 if (ind < 0) {
 505                         mthca_err(dev, "SRQ %06x full\n", srq->srqn);
 506                         err = -ENOMEM;
 507                         *bad_wr = wr;
 508                         break;
 509                 }
 510
 511                 wqe       = get_wqe(srq, ind);
 512                 next_ind  = *wqe_to_link(wqe);
 513
 514                 if (next_ind < 0) {
 515                         mthca_err(dev, "SRQ %06x full\n", srq->srqn);
 516                         err = -ENOMEM;
 517                         *bad_wr = wr;
 518                         break;
 519                 }
 520
 521                 prev_wqe  = srq->last;
 522                 srq->last = wqe;
 523
 524                 ((struct mthca_next_seg *) wqe)->nda_op = 0;
 525                 ((struct mthca_next_seg *) wqe)->ee_nds = 0;
 526                 /* flags field will always remain 0 */
 527
 528                 wqe += sizeof (struct mthca_next_seg);
 529
 530                 if (unlikely(wr->num_sge > srq->max_gs)) {
 531                         err = -EINVAL;
 532                         *bad_wr = wr;
 533                         srq->last = prev_wqe;
 534                         break;
 535                 }
 536
 537                 for (i = 0; i < wr->num_sge; ++i) {
 538                         ((struct mthca_data_seg *) wqe)->byte_count =
 539                                 cpu_to_be32(wr->sg_list[i].length);
 540                         ((struct mthca_data_seg *) wqe)->lkey =
 541                                 cpu_to_be32(wr->sg_list[i].lkey);
 542                         ((struct mthca_data_seg *) wqe)->addr =
 543                                 cpu_to_be64(wr->sg_list[i].addr);
 544                         wqe += sizeof (struct mthca_data_seg);
 545                 }
 546
 547                 if (i < srq->max_gs) {
 548                         ((struct mthca_data_seg *) wqe)->byte_count = 0;
 549                         ((struct mthca_data_seg *) wqe)->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
 550                         ((struct mthca_data_seg *) wqe)->addr = 0;
 551                 }
 552
 553                 ((struct mthca_next_seg *) prev_wqe)->nda_op =
 554                         cpu_to_be32((ind << srq->wqe_shift) | 1);
 555                 wmb();
 556                 ((struct mthca_next_seg *) prev_wqe)->ee_nds =
 557                         cpu_to_be32(MTHCA_NEXT_DBD);
 558
 559                 srq->wrid[ind]  = wr->wr_id;
 560                 srq->first_free = next_ind;
 561
 562                 ++nreq;
 563                 if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) {
 564                         nreq = 0;
 565
 566                         doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
 567                         doorbell[1] = cpu_to_be32(srq->srqn << 8);
 568
 569                         /*
 570                          * Make sure that descriptors are written
 571                          * before doorbell is rung.
 572                          */
 573                         wmb();
 574
 575                         mthca_write64(doorbell,
 576                                       dev->kar + MTHCA_RECEIVE_DOORBELL,
 577                                       MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
 578
 579                         first_ind = srq->first_free;
 580                 }
 581         }
 582
 583         if (likely(nreq)) {
 584                 doorbell[0] = cpu_to_be32(first_ind << srq->wqe_shift);
 585                 doorbell[1] = cpu_to_be32((srq->srqn << 8) | nreq);
 586
 587                 /*
 588                  * Make sure that descriptors are written before
 589                  * doorbell is rung.
 590                  */
 591                 wmb();
 592
 593                 mthca_write64(doorbell,
 594                               dev->kar + MTHCA_RECEIVE_DOORBELL,
 595                               MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
 596         }
 597
 598         spin_unlock_irqrestore(&srq->lock, flags);
 599         return err;
 600 }
 601
 602 int mthca_arbel_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
 603                               struct ib_recv_wr **bad_wr)
 604 {
 605         struct mthca_dev *dev = to_mdev(ibsrq->device);
 606         struct mthca_srq *srq = to_msrq(ibsrq);
 607         unsigned long flags;
 608         int err = 0;
 609         int ind;
 610         int next_ind;
 611         int nreq;
 612         int i;
 613         void *wqe;
 614
 615         spin_lock_irqsave(&srq->lock, flags);
 616
 617         for (nreq = 0; wr; ++nreq, wr = wr->next) {
 618                 ind = srq->first_free;
 619
 620                 if (ind < 0) {
 621                         mthca_err(dev, "SRQ %06x full\n", srq->srqn);
 622                         err = -ENOMEM;
 623                         *bad_wr = wr;
 624                         break;
 625                 }
 626
 627                 wqe       = get_wqe(srq, ind);
 628                 next_ind  = *wqe_to_link(wqe);
 629
 630                 if (next_ind < 0) {
 631                         mthca_err(dev, "SRQ %06x full\n", srq->srqn);
 632                         err = -ENOMEM;
 633                         *bad_wr = wr;
 634                         break;
 635                 }
 636
 637                 ((struct mthca_next_seg *) wqe)->nda_op =
 638                         cpu_to_be32((next_ind << srq->wqe_shift) | 1);
 639                 ((struct mthca_next_seg *) wqe)->ee_nds = 0;
 640                 /* flags field will always remain 0 */
 641
 642                 wqe += sizeof (struct mthca_next_seg);
 643
 644                 if (unlikely(wr->num_sge > srq->max_gs)) {
 645                         err = -EINVAL;
 646                         *bad_wr = wr;
 647                         break;
 648                 }
 649
 650                 for (i = 0; i < wr->num_sge; ++i) {
 651                         ((struct mthca_data_seg *) wqe)->byte_count =
 652                                 cpu_to_be32(wr->sg_list[i].length);
 653                         ((struct mthca_data_seg *) wqe)->lkey =
 654                                 cpu_to_be32(wr->sg_list[i].lkey);
 655                         ((struct mthca_data_seg *) wqe)->addr =
 656                                 cpu_to_be64(wr->sg_list[i].addr);
 657                         wqe += sizeof (struct mthca_data_seg);
 658                 }
 659
 660                 if (i < srq->max_gs) {
 661                         ((struct mthca_data_seg *) wqe)->byte_count = 0;
 662                         ((struct mthca_data_seg *) wqe)->lkey = cpu_to_be32(MTHCA_INVAL_LKEY);
 663                         ((struct mthca_data_seg *) wqe)->addr = 0;
 664                 }
 665
 666                 srq->wrid[ind]  = wr->wr_id;
 667                 srq->first_free = next_ind;
 668         }
 669
 670         if (likely(nreq)) {
 671                 srq->counter += nreq;
 672
 673                 /*
 674                  * Make sure that descriptors are written before
 675                  * we write doorbell record.
 676                  */
 677                 wmb();
 678                 *srq->db = cpu_to_be32(srq->counter);
 679         }
 680
 681         spin_unlock_irqrestore(&srq->lock, flags);
 682         return err;
 683 }
 684
 685 int mthca_max_srq_sge(struct mthca_dev *dev)
 686 {
 687         if (mthca_is_memfree(dev))
 688                 return dev->limits.max_sg;
 689
 690         /*
 691          * SRQ allocations are based on powers of 2 for Tavor,
 692          * (although they only need to be multiples of 16 bytes).
 693          *
 694          * Therefore, we need to base the max number of sg entries on
 695          * the largest power of 2 descriptor size that is <= to the
 696          * actual max WQE descriptor size, rather than return the
 697          * max_sg value given by the firmware (which is based on WQE
 698          * sizes as multiples of 16, not powers of 2).
 699          *
 700          * If SRQ implementation is changed for Tavor to be based on
 701          * multiples of 16, the calculation below can be deleted and
 702          * the FW max_sg value returned.
 703          */
 704         return min_t(int, dev->limits.max_sg,
 705                      ((1 << (fls(dev->limits.max_desc_sz) - 1)) -
 706                       sizeof (struct mthca_next_seg)) /
 707                      sizeof (struct mthca_data_seg));
 708 }
 709
 710 int __devinit mthca_init_srq_table(struct mthca_dev *dev)
 711 {
 712         int err;
 713
 714         if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
 715                 return 0;
 716
 717         spin_lock_init(&dev->srq_table.lock);
 718
 719         err = mthca_alloc_init(&dev->srq_table.alloc,
 720                                dev->limits.num_srqs,
 721                                dev->limits.num_srqs - 1,
 722                                dev->limits.reserved_srqs);
 723         if (err)
 724                 return err;
 725
 726         err = mthca_array_init(&dev->srq_table.srq,
 727                                dev->limits.num_srqs);
 728         if (err)
 729                 mthca_alloc_cleanup(&dev->srq_table.alloc);
 730
 731         return err;
 732 }
 733
 734 void mthca_cleanup_srq_table(struct mthca_dev *dev)
 735 {
 736         if (!(dev->mthca_flags & MTHCA_FLAG_SRQ))
 737                 return;
 738
 739         mthca_array_cleanup(&dev->srq_table.srq, dev->limits.num_srqs);
 740         mthca_alloc_cleanup(&dev->srq_table.alloc);
 741 }