drivers/infiniband/hw/mthca/mthca_wqe.h

   1 /*
   2  * Copyright (c) 2005 Cisco Systems. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  * $Id: mthca_wqe.h 3047 2005-08-10 03:59:35Z roland $
  33  */
  34
  35 #ifndef MTHCA_WQE_H
  36 #define MTHCA_WQE_H
  37
  38 #include <linux/types.h>
  39
  40 enum {
  41         MTHCA_NEXT_DBD       = 1 << 7,
  42         MTHCA_NEXT_FENCE     = 1 << 6,
  43         MTHCA_NEXT_CQ_UPDATE = 1 << 3,
  44         MTHCA_NEXT_EVENT_GEN = 1 << 2,
  45         MTHCA_NEXT_SOLICIT   = 1 << 1,
  46
  47         MTHCA_MLX_VL15       = 1 << 17,
  48         MTHCA_MLX_SLR        = 1 << 16
  49 };
  50
  51 enum {
  52         MTHCA_INVAL_LKEY = 0x100
  53 };
  54
  55 struct mthca_next_seg {
  56         __be32 nda_op;          /* [31:6] next WQE [4:0] next opcode */
  57         __be32 ee_nds;          /* [31:8] next EE  [7] DBD [6] F [5:0] next WQE size */
  58         __be32 flags;           /* [3] CQ [2] Event [1] Solicit */
  59         __be32 imm;             /* immediate data */
  60 };
  61
  62 struct mthca_tavor_ud_seg {
  63         u32    reserved1;
  64         __be32 lkey;
  65         __be64 av_addr;
  66         u32    reserved2[4];
  67         __be32 dqpn;
  68         __be32 qkey;
  69         u32    reserved3[2];
  70 };
  71
  72 struct mthca_arbel_ud_seg {
  73         __be32 av[8];
  74         __be32 dqpn;
  75         __be32 qkey;
  76         u32    reserved[2];
  77 };
  78
  79 struct mthca_bind_seg {
  80         __be32 flags;           /* [31] Atomic [30] rem write [29] rem read */
  81         u32    reserved;
  82         __be32 new_rkey;
  83         __be32 lkey;
  84         __be64 addr;
  85         __be64 length;
  86 };
  87
  88 struct mthca_raddr_seg {
  89         __be64 raddr;
  90         __be32 rkey;
  91         u32    reserved;
  92 };
  93
  94 struct mthca_atomic_seg {
  95         __be64 swap_add;
  96         __be64 compare;
  97 };
  98
  99 struct mthca_data_seg {
 100         __be32 byte_count;
 101         __be32 lkey;
 102         __be64 addr;
 103 };
 104
 105 struct mthca_mlx_seg {
 106         __be32 nda_op;
 107         __be32 nds;
 108         __be32 flags;           /* [17] VL15 [16] SLR [14:12] static rate
 109                                    [11:8] SL [3] C [2] E */
 110         __be16 rlid;
 111         __be16 vcrc;
 112 };
 113
 114 #endif /* MTHCA_WQE_H */