2 * Copyright (c) 2012 Intel Corporation. All rights reserved.
3 * Copyright (c) 2006 - 2012 QLogic Corporation. All rights reserved.
4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
35 #include <linux/pci.h>
36 #include <linux/netdevice.h>
37 #include <linux/vmalloc.h>
38 #include <linux/delay.h>
39 #include <linux/idr.h>
40 #include <linux/module.h>
43 #include "qib_common.h"
46 * min buffers we want to have per context, after driver
48 #define QIB_MIN_USER_CTXT_BUFCNT 7
50 #define QLOGIC_IB_R_SOFTWARE_MASK 0xFF
51 #define QLOGIC_IB_R_SOFTWARE_SHIFT 24
52 #define QLOGIC_IB_R_EMULATOR_MASK (1ULL<<62)
55 * Number of ctxts we are configured to use (to allow for more pio
56 * buffers per ctxt, etc.) Zero means use chip value.
59 module_param_named(cfgctxts
, qib_cfgctxts
, ushort
, S_IRUGO
);
60 MODULE_PARM_DESC(cfgctxts
, "Set max number of contexts to use");
63 * If set, do not write to any regs if avoidable, hack to allow
64 * check for deranged default register values.
67 module_param_named(mini_init
, qib_mini_init
, ushort
, S_IRUGO
);
68 MODULE_PARM_DESC(mini_init
, "If set, do minimal diag init");
70 unsigned qib_n_krcv_queues
;
71 module_param_named(krcvqs
, qib_n_krcv_queues
, uint
, S_IRUGO
);
72 MODULE_PARM_DESC(krcvqs
, "number of kernel receive queues per IB port");
75 * qib_wc_pat parameter:
78 * If PAT initialization fails, code reverts back to MTRR
80 unsigned qib_wc_pat
= 1; /* default (1) is to use PAT, not MTRR */
81 module_param_named(wc_pat
, qib_wc_pat
, uint
, S_IRUGO
);
82 MODULE_PARM_DESC(wc_pat
, "enable write-combining via PAT mechanism");
84 struct workqueue_struct
*qib_cq_wq
;
86 static void verify_interrupt(unsigned long);
88 static struct idr qib_unit_table
;
89 u32 qib_cpulist_count
;
90 unsigned long *qib_cpulist
;
92 /* set number of contexts we'll actually use */
93 void qib_set_ctxtcnt(struct qib_devdata
*dd
)
96 dd
->cfgctxts
= dd
->first_user_ctxt
+ num_online_cpus();
97 if (dd
->cfgctxts
> dd
->ctxtcnt
)
98 dd
->cfgctxts
= dd
->ctxtcnt
;
99 } else if (qib_cfgctxts
< dd
->num_pports
)
100 dd
->cfgctxts
= dd
->ctxtcnt
;
101 else if (qib_cfgctxts
<= dd
->ctxtcnt
)
102 dd
->cfgctxts
= qib_cfgctxts
;
104 dd
->cfgctxts
= dd
->ctxtcnt
;
105 dd
->freectxts
= (dd
->first_user_ctxt
> dd
->cfgctxts
) ? 0 :
106 dd
->cfgctxts
- dd
->first_user_ctxt
;
110 * Common code for creating the receive context array.
112 int qib_create_ctxts(struct qib_devdata
*dd
)
118 * Allocate full ctxtcnt array, rather than just cfgctxts, because
119 * cleanup iterates across all possible ctxts.
121 dd
->rcd
= kzalloc(sizeof(*dd
->rcd
) * dd
->ctxtcnt
, GFP_KERNEL
);
123 qib_dev_err(dd
, "Unable to allocate ctxtdata array, "
129 /* create (one or more) kctxt */
130 for (i
= 0; i
< dd
->first_user_ctxt
; ++i
) {
131 struct qib_pportdata
*ppd
;
132 struct qib_ctxtdata
*rcd
;
134 if (dd
->skip_kctxt_mask
& (1 << i
))
137 ppd
= dd
->pport
+ (i
% dd
->num_pports
);
138 rcd
= qib_create_ctxtdata(ppd
, i
);
140 qib_dev_err(dd
, "Unable to allocate ctxtdata"
141 " for Kernel ctxt, failing\n");
145 rcd
->pkeys
[0] = QIB_DEFAULT_P_KEY
;
154 * Common code for user and kernel context setup.
156 struct qib_ctxtdata
*qib_create_ctxtdata(struct qib_pportdata
*ppd
, u32 ctxt
)
158 struct qib_devdata
*dd
= ppd
->dd
;
159 struct qib_ctxtdata
*rcd
;
161 rcd
= kzalloc(sizeof(*rcd
), GFP_KERNEL
);
163 INIT_LIST_HEAD(&rcd
->qp_wait_list
);
170 dd
->f_init_ctxt(rcd
);
173 * To avoid wasting a lot of memory, we allocate 32KB chunks
174 * of physically contiguous memory, advance through it until
175 * used up and then allocate more. Of course, we need
176 * memory to store those extra pointers, now. 32KB seems to
177 * be the most that is "safe" under memory pressure
178 * (creating large files and then copying them over
179 * NFS while doing lots of MPI jobs). The OOM killer can
180 * get invoked, even though we say we can sleep and this can
181 * cause significant system problems....
183 rcd
->rcvegrbuf_size
= 0x8000;
184 rcd
->rcvegrbufs_perchunk
=
185 rcd
->rcvegrbuf_size
/ dd
->rcvegrbufsize
;
186 rcd
->rcvegrbuf_chunks
= (rcd
->rcvegrcnt
+
187 rcd
->rcvegrbufs_perchunk
- 1) /
188 rcd
->rcvegrbufs_perchunk
;
189 BUG_ON(!is_power_of_2(rcd
->rcvegrbufs_perchunk
));
190 rcd
->rcvegrbufs_perchunk_shift
=
191 ilog2(rcd
->rcvegrbufs_perchunk
);
197 * Common code for initializing the physical port structure.
199 void qib_init_pportdata(struct qib_pportdata
*ppd
, struct qib_devdata
*dd
,
203 ppd
->hw_pidx
= hw_pidx
;
204 ppd
->port
= port
; /* IB port number, not index */
206 spin_lock_init(&ppd
->sdma_lock
);
207 spin_lock_init(&ppd
->lflags_lock
);
208 init_waitqueue_head(&ppd
->state_wait
);
210 init_timer(&ppd
->symerr_clear_timer
);
211 ppd
->symerr_clear_timer
.function
= qib_clear_symerror_on_linkup
;
212 ppd
->symerr_clear_timer
.data
= (unsigned long)ppd
;
217 static int init_pioavailregs(struct qib_devdata
*dd
)
222 dd
->pioavailregs_dma
= dma_alloc_coherent(
223 &dd
->pcidev
->dev
, PAGE_SIZE
, &dd
->pioavailregs_phys
,
225 if (!dd
->pioavailregs_dma
) {
226 qib_dev_err(dd
, "failed to allocate PIOavail reg area "
233 * We really want L2 cache aligned, but for current CPUs of
234 * interest, they are the same.
236 status_page
= (u64
*)
237 ((char *) dd
->pioavailregs_dma
+
238 ((2 * L1_CACHE_BYTES
+
239 dd
->pioavregs
* sizeof(u64
)) & ~L1_CACHE_BYTES
));
240 /* device status comes first, for backwards compatibility */
241 dd
->devstatusp
= status_page
;
243 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
244 dd
->pport
[pidx
].statusp
= status_page
;
249 * Setup buffer to hold freeze and other messages, accessible to
250 * apps, following statusp. This is per-unit, not per port.
252 dd
->freezemsg
= (char *) status_page
;
254 /* length of msg buffer is "whatever is left" */
255 ret
= (char *) status_page
- (char *) dd
->pioavailregs_dma
;
256 dd
->freezelen
= PAGE_SIZE
- ret
;
265 * init_shadow_tids - allocate the shadow TID array
266 * @dd: the qlogic_ib device
268 * allocate the shadow TID array, so we can qib_munlock previous
269 * entries. It may make more sense to move the pageshadow to the
270 * ctxt data structure, so we only allocate memory for ctxts actually
271 * in use, since we at 8k per ctxt, now.
272 * We don't want failures here to prevent use of the driver/chip,
273 * so no return value.
275 static void init_shadow_tids(struct qib_devdata
*dd
)
280 pages
= vzalloc(dd
->cfgctxts
* dd
->rcvtidcnt
* sizeof(struct page
*));
282 qib_dev_err(dd
, "failed to allocate shadow page * "
283 "array, no expected sends!\n");
287 addrs
= vzalloc(dd
->cfgctxts
* dd
->rcvtidcnt
* sizeof(dma_addr_t
));
289 qib_dev_err(dd
, "failed to allocate shadow dma handle "
290 "array, no expected sends!\n");
294 dd
->pageshadow
= pages
;
295 dd
->physshadow
= addrs
;
301 dd
->pageshadow
= NULL
;
305 * Do initialization for device that is only needed on
306 * first detect, not on resets.
308 static int loadtime_init(struct qib_devdata
*dd
)
312 if (((dd
->revision
>> QLOGIC_IB_R_SOFTWARE_SHIFT
) &
313 QLOGIC_IB_R_SOFTWARE_MASK
) != QIB_CHIP_SWVERSION
) {
314 qib_dev_err(dd
, "Driver only handles version %d, "
315 "chip swversion is %d (%llx), failng\n",
317 (int)(dd
->revision
>>
318 QLOGIC_IB_R_SOFTWARE_SHIFT
) &
319 QLOGIC_IB_R_SOFTWARE_MASK
,
320 (unsigned long long) dd
->revision
);
325 if (dd
->revision
& QLOGIC_IB_R_EMULATOR_MASK
)
326 qib_devinfo(dd
->pcidev
, "%s", dd
->boardversion
);
328 spin_lock_init(&dd
->pioavail_lock
);
329 spin_lock_init(&dd
->sendctrl_lock
);
330 spin_lock_init(&dd
->uctxt_lock
);
331 spin_lock_init(&dd
->qib_diag_trans_lock
);
332 spin_lock_init(&dd
->eep_st_lock
);
333 mutex_init(&dd
->eep_lock
);
338 ret
= init_pioavailregs(dd
);
339 init_shadow_tids(dd
);
341 qib_get_eeprom_info(dd
);
343 /* setup time (don't start yet) to verify we got interrupt */
344 init_timer(&dd
->intrchk_timer
);
345 dd
->intrchk_timer
.function
= verify_interrupt
;
346 dd
->intrchk_timer
.data
= (unsigned long) dd
;
353 * init_after_reset - re-initialize after a reset
354 * @dd: the qlogic_ib device
356 * sanity check at least some of the values after reset, and
357 * ensure no receive or transmit (explicitly, in case reset
360 static int init_after_reset(struct qib_devdata
*dd
)
365 * Ensure chip does no sends or receives, tail updates, or
366 * pioavail updates while we re-initialize. This is mostly
367 * for the driver data structures, not chip registers.
369 for (i
= 0; i
< dd
->num_pports
; ++i
) {
371 * ctxt == -1 means "all contexts". Only really safe for
372 * _dis_abling things, as here.
374 dd
->f_rcvctrl(dd
->pport
+ i
, QIB_RCVCTRL_CTXT_DIS
|
375 QIB_RCVCTRL_INTRAVAIL_DIS
|
376 QIB_RCVCTRL_TAILUPD_DIS
, -1);
377 /* Redundant across ports for some, but no big deal. */
378 dd
->f_sendctrl(dd
->pport
+ i
, QIB_SENDCTRL_SEND_DIS
|
379 QIB_SENDCTRL_AVAIL_DIS
);
385 static void enable_chip(struct qib_devdata
*dd
)
391 * Enable PIO send, and update of PIOavail regs to memory.
393 for (i
= 0; i
< dd
->num_pports
; ++i
)
394 dd
->f_sendctrl(dd
->pport
+ i
, QIB_SENDCTRL_SEND_ENB
|
395 QIB_SENDCTRL_AVAIL_ENB
);
397 * Enable kernel ctxts' receive and receive interrupt.
398 * Other ctxts done as user opens and inits them.
400 rcvmask
= QIB_RCVCTRL_CTXT_ENB
| QIB_RCVCTRL_INTRAVAIL_ENB
;
401 rcvmask
|= (dd
->flags
& QIB_NODMA_RTAIL
) ?
402 QIB_RCVCTRL_TAILUPD_DIS
: QIB_RCVCTRL_TAILUPD_ENB
;
403 for (i
= 0; dd
->rcd
&& i
< dd
->first_user_ctxt
; ++i
) {
404 struct qib_ctxtdata
*rcd
= dd
->rcd
[i
];
407 dd
->f_rcvctrl(rcd
->ppd
, rcvmask
, i
);
411 static void verify_interrupt(unsigned long opaque
)
413 struct qib_devdata
*dd
= (struct qib_devdata
*) opaque
;
416 return; /* being torn down */
419 * If we don't have a lid or any interrupts, let the user know and
420 * don't bother checking again.
422 if (dd
->int_counter
== 0) {
423 if (!dd
->f_intr_fallback(dd
))
424 dev_err(&dd
->pcidev
->dev
, "No interrupts detected, "
426 else /* re-arm the timer to see if fallback works */
427 mod_timer(&dd
->intrchk_timer
, jiffies
+ HZ
/2);
431 static void init_piobuf_state(struct qib_devdata
*dd
)
437 * Ensure all buffers are free, and fifos empty. Buffers
438 * are common, so only do once for port 0.
440 * After enable and qib_chg_pioavailkernel so we can safely
441 * enable pioavail updates and PIOENABLE. After this, packets
442 * are ready and able to go out.
444 dd
->f_sendctrl(dd
->pport
, QIB_SENDCTRL_DISARM_ALL
);
445 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
)
446 dd
->f_sendctrl(dd
->pport
+ pidx
, QIB_SENDCTRL_FLUSH
);
449 * If not all sendbufs are used, add the one to each of the lower
450 * numbered contexts. pbufsctxt and lastctxt_piobuf are
451 * calculated in chip-specific code because it may cause some
452 * chip-specific adjustments to be made.
454 uctxts
= dd
->cfgctxts
- dd
->first_user_ctxt
;
455 dd
->ctxts_extrabuf
= dd
->pbufsctxt
?
456 dd
->lastctxt_piobuf
- (dd
->pbufsctxt
* uctxts
) : 0;
459 * Set up the shadow copies of the piobufavail registers,
460 * which we compare against the chip registers for now, and
461 * the in memory DMA'ed copies of the registers.
462 * By now pioavail updates to memory should have occurred, so
463 * copy them into our working/shadow registers; this is in
464 * case something went wrong with abort, but mostly to get the
465 * initial values of the generation bit correct.
467 for (i
= 0; i
< dd
->pioavregs
; i
++) {
470 tmp
= dd
->pioavailregs_dma
[i
];
472 * Don't need to worry about pioavailkernel here
473 * because we will call qib_chg_pioavailkernel() later
474 * in initialization, to busy out buffers as needed.
476 dd
->pioavailshadow
[i
] = le64_to_cpu(tmp
);
478 while (i
< ARRAY_SIZE(dd
->pioavailshadow
))
479 dd
->pioavailshadow
[i
++] = 0; /* for debugging sanity */
481 /* after pioavailshadow is setup */
482 qib_chg_pioavailkernel(dd
, 0, dd
->piobcnt2k
+ dd
->piobcnt4k
,
483 TXCHK_CHG_TYPE_KERN
, NULL
);
484 dd
->f_initvl15_bufs(dd
);
488 * qib_create_workqueues - create per port workqueues
489 * @dd: the qlogic_ib device
491 static int qib_create_workqueues(struct qib_devdata
*dd
)
494 struct qib_pportdata
*ppd
;
496 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
497 ppd
= dd
->pport
+ pidx
;
499 char wq_name
[8]; /* 3 + 2 + 1 + 1 + 1 */
500 snprintf(wq_name
, sizeof(wq_name
), "qib%d_%d",
503 create_singlethread_workqueue(wq_name
);
511 QIB_DRV_NAME
": create_singlethread_workqueue failed for port %d\n",
513 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
514 ppd
= dd
->pport
+ pidx
;
516 destroy_workqueue(ppd
->qib_wq
);
524 * qib_init - do the actual initialization sequence on the chip
525 * @dd: the qlogic_ib device
526 * @reinit: reinitializing, so don't allocate new memory
528 * Do the actual initialization sequence on the chip. This is done
529 * both from the init routine called from the PCI infrastructure, and
530 * when we reset the chip, or detect that it was reset internally,
531 * or it's administratively re-enabled.
533 * Memory allocation here and in called routines is only done in
534 * the first case (reinit == 0). We have to be careful, because even
535 * without memory allocation, we need to re-write all the chip registers
536 * TIDs, etc. after the reset or enable has completed.
538 int qib_init(struct qib_devdata
*dd
, int reinit
)
540 int ret
= 0, pidx
, lastfail
= 0;
543 struct qib_ctxtdata
*rcd
;
544 struct qib_pportdata
*ppd
;
547 /* Set linkstate to unknown, so we can watch for a transition. */
548 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
549 ppd
= dd
->pport
+ pidx
;
550 spin_lock_irqsave(&ppd
->lflags_lock
, flags
);
551 ppd
->lflags
&= ~(QIBL_LINKACTIVE
| QIBL_LINKARMED
|
552 QIBL_LINKDOWN
| QIBL_LINKINIT
|
554 spin_unlock_irqrestore(&ppd
->lflags_lock
, flags
);
558 ret
= init_after_reset(dd
);
560 ret
= loadtime_init(dd
);
564 /* Bypass most chip-init, to get to device creation */
568 ret
= dd
->f_late_initreg(dd
);
572 /* dd->rcd can be NULL if early init failed */
573 for (i
= 0; dd
->rcd
&& i
< dd
->first_user_ctxt
; ++i
) {
575 * Set up the (kernel) rcvhdr queue and egr TIDs. If doing
576 * re-init, the simplest way to handle this is to free
577 * existing, and re-allocate.
578 * Need to re-create rest of ctxt 0 ctxtdata as well.
584 lastfail
= qib_create_rcvhdrq(dd
, rcd
);
586 lastfail
= qib_setup_eagerbufs(rcd
);
588 qib_dev_err(dd
, "failed to allocate kernel ctxt's "
589 "rcvhdrq and/or egr bufs\n");
594 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
598 ppd
= dd
->pport
+ pidx
;
599 mtu
= ib_mtu_enum_to_int(qib_ibmtu
);
601 mtu
= QIB_DEFAULT_MTU
;
602 qib_ibmtu
= 0; /* don't leave invalid value */
604 /* set max we can ever have for this driver load */
605 ppd
->init_ibmaxlen
= min(mtu
> 2048 ?
606 dd
->piosize4k
: dd
->piosize2k
,
608 (dd
->rcvhdrentsize
<< 2));
610 * Have to initialize ibmaxlen, but this will normally
611 * change immediately in qib_set_mtu().
613 ppd
->ibmaxlen
= ppd
->init_ibmaxlen
;
614 qib_set_mtu(ppd
, mtu
);
616 spin_lock_irqsave(&ppd
->lflags_lock
, flags
);
617 ppd
->lflags
|= QIBL_IB_LINK_DISABLED
;
618 spin_unlock_irqrestore(&ppd
->lflags_lock
, flags
);
620 lastfail
= dd
->f_bringup_serdes(ppd
);
622 qib_devinfo(dd
->pcidev
,
623 "Failed to bringup IB port %u\n", ppd
->port
);
624 lastfail
= -ENETDOWN
;
632 /* none of the ports initialized */
633 if (!ret
&& lastfail
)
637 /* but continue on, so we can debug cause */
642 init_piobuf_state(dd
);
646 /* chip is OK for user apps; mark it as initialized */
647 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
648 ppd
= dd
->pport
+ pidx
;
650 * Set status even if port serdes is not initialized
651 * so that diags will work.
653 *ppd
->statusp
|= QIB_STATUS_CHIP_PRESENT
|
655 if (!ppd
->link_speed_enabled
)
657 if (dd
->flags
& QIB_HAS_SEND_DMA
)
658 ret
= qib_setup_sdma(ppd
);
659 init_timer(&ppd
->hol_timer
);
660 ppd
->hol_timer
.function
= qib_hol_event
;
661 ppd
->hol_timer
.data
= (unsigned long)ppd
;
662 ppd
->hol_state
= QIB_HOL_UP
;
665 /* now we can enable all interrupts from the chip */
666 dd
->f_set_intr_state(dd
, 1);
669 * Setup to verify we get an interrupt, and fallback
670 * to an alternate if necessary and possible.
672 mod_timer(&dd
->intrchk_timer
, jiffies
+ HZ
/2);
673 /* start stats retrieval timer */
674 mod_timer(&dd
->stats_timer
, jiffies
+ HZ
* ACTIVITY_TIMER
);
677 /* if ret is non-zero, we probably should do some cleanup here... */
682 * These next two routines are placeholders in case we don't have per-arch
683 * code for controlling write combining. If explicit control of write
684 * combining is not available, performance will probably be awful.
687 int __attribute__((weak
)) qib_enable_wc(struct qib_devdata
*dd
)
692 void __attribute__((weak
)) qib_disable_wc(struct qib_devdata
*dd
)
696 static inline struct qib_devdata
*__qib_lookup(int unit
)
698 return idr_find(&qib_unit_table
, unit
);
701 struct qib_devdata
*qib_lookup(int unit
)
703 struct qib_devdata
*dd
;
706 spin_lock_irqsave(&qib_devs_lock
, flags
);
707 dd
= __qib_lookup(unit
);
708 spin_unlock_irqrestore(&qib_devs_lock
, flags
);
714 * Stop the timers during unit shutdown, or after an error late
717 static void qib_stop_timers(struct qib_devdata
*dd
)
719 struct qib_pportdata
*ppd
;
722 if (dd
->stats_timer
.data
) {
723 del_timer_sync(&dd
->stats_timer
);
724 dd
->stats_timer
.data
= 0;
726 if (dd
->intrchk_timer
.data
) {
727 del_timer_sync(&dd
->intrchk_timer
);
728 dd
->intrchk_timer
.data
= 0;
730 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
731 ppd
= dd
->pport
+ pidx
;
732 if (ppd
->hol_timer
.data
)
733 del_timer_sync(&ppd
->hol_timer
);
734 if (ppd
->led_override_timer
.data
) {
735 del_timer_sync(&ppd
->led_override_timer
);
736 atomic_set(&ppd
->led_override_timer_active
, 0);
738 if (ppd
->symerr_clear_timer
.data
)
739 del_timer_sync(&ppd
->symerr_clear_timer
);
744 * qib_shutdown_device - shut down a device
745 * @dd: the qlogic_ib device
747 * This is called to make the device quiet when we are about to
748 * unload the driver, and also when the device is administratively
749 * disabled. It does not free any data structures.
750 * Everything it does has to be setup again by qib_init(dd, 1)
752 static void qib_shutdown_device(struct qib_devdata
*dd
)
754 struct qib_pportdata
*ppd
;
757 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
758 ppd
= dd
->pport
+ pidx
;
760 spin_lock_irq(&ppd
->lflags_lock
);
761 ppd
->lflags
&= ~(QIBL_LINKDOWN
| QIBL_LINKINIT
|
762 QIBL_LINKARMED
| QIBL_LINKACTIVE
|
764 spin_unlock_irq(&ppd
->lflags_lock
);
765 *ppd
->statusp
&= ~(QIB_STATUS_IB_CONF
| QIB_STATUS_IB_READY
);
767 dd
->flags
&= ~QIB_INITTED
;
769 /* mask interrupts, but not errors */
770 dd
->f_set_intr_state(dd
, 0);
772 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
773 ppd
= dd
->pport
+ pidx
;
774 dd
->f_rcvctrl(ppd
, QIB_RCVCTRL_TAILUPD_DIS
|
775 QIB_RCVCTRL_CTXT_DIS
|
776 QIB_RCVCTRL_INTRAVAIL_DIS
|
777 QIB_RCVCTRL_PKEY_ENB
, -1);
779 * Gracefully stop all sends allowing any in progress to
782 dd
->f_sendctrl(ppd
, QIB_SENDCTRL_CLEAR
);
786 * Enough for anything that's going to trickle out to have actually
791 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
792 ppd
= dd
->pport
+ pidx
;
793 dd
->f_setextled(ppd
, 0); /* make sure LEDs are off */
795 if (dd
->flags
& QIB_HAS_SEND_DMA
)
796 qib_teardown_sdma(ppd
);
798 dd
->f_sendctrl(ppd
, QIB_SENDCTRL_AVAIL_DIS
|
799 QIB_SENDCTRL_SEND_DIS
);
801 * Clear SerdesEnable.
802 * We can't count on interrupts since we are stopping.
804 dd
->f_quiet_serdes(ppd
);
807 destroy_workqueue(ppd
->qib_wq
);
812 qib_update_eeprom_log(dd
);
816 * qib_free_ctxtdata - free a context's allocated data
817 * @dd: the qlogic_ib device
818 * @rcd: the ctxtdata structure
820 * free up any allocated data for a context
821 * This should not touch anything that would affect a simultaneous
822 * re-allocation of context data, because it is called after qib_mutex
823 * is released (and can be called from reinit as well).
824 * It should never change any chip state, or global driver state.
826 void qib_free_ctxtdata(struct qib_devdata
*dd
, struct qib_ctxtdata
*rcd
)
832 dma_free_coherent(&dd
->pcidev
->dev
, rcd
->rcvhdrq_size
,
833 rcd
->rcvhdrq
, rcd
->rcvhdrq_phys
);
835 if (rcd
->rcvhdrtail_kvaddr
) {
836 dma_free_coherent(&dd
->pcidev
->dev
, PAGE_SIZE
,
837 rcd
->rcvhdrtail_kvaddr
,
838 rcd
->rcvhdrqtailaddr_phys
);
839 rcd
->rcvhdrtail_kvaddr
= NULL
;
842 if (rcd
->rcvegrbuf
) {
845 for (e
= 0; e
< rcd
->rcvegrbuf_chunks
; e
++) {
846 void *base
= rcd
->rcvegrbuf
[e
];
847 size_t size
= rcd
->rcvegrbuf_size
;
849 dma_free_coherent(&dd
->pcidev
->dev
, size
,
850 base
, rcd
->rcvegrbuf_phys
[e
]);
852 kfree(rcd
->rcvegrbuf
);
853 rcd
->rcvegrbuf
= NULL
;
854 kfree(rcd
->rcvegrbuf_phys
);
855 rcd
->rcvegrbuf_phys
= NULL
;
856 rcd
->rcvegrbuf_chunks
= 0;
859 kfree(rcd
->tid_pg_list
);
860 vfree(rcd
->user_event_mask
);
861 vfree(rcd
->subctxt_uregbase
);
862 vfree(rcd
->subctxt_rcvegrbuf
);
863 vfree(rcd
->subctxt_rcvhdr_base
);
868 * Perform a PIO buffer bandwidth write test, to verify proper system
869 * configuration. Even when all the setup calls work, occasionally
870 * BIOS or other issues can prevent write combining from working, or
871 * can cause other bandwidth problems to the chip.
873 * This test simply writes the same buffer over and over again, and
874 * measures close to the peak bandwidth to the chip (not testing
875 * data bandwidth to the wire). On chips that use an address-based
876 * trigger to send packets to the wire, this is easy. On chips that
877 * use a count to trigger, we want to make sure that the packet doesn't
878 * go out on the wire, or trigger flow control checks.
880 static void qib_verify_pioperf(struct qib_devdata
*dd
)
882 u32 pbnum
, cnt
, lcnt
;
887 piobuf
= dd
->f_getsendbuf(dd
->pport
, 0ULL, &pbnum
);
889 qib_devinfo(dd
->pcidev
,
890 "No PIObufs for checking perf, skipping\n");
895 * Enough to give us a reasonable test, less than piobuf size, and
896 * likely multiple of store buffer length.
902 qib_devinfo(dd
->pcidev
,
903 "Couldn't get memory for checking PIO perf,"
908 preempt_disable(); /* we want reasonably accurate elapsed time */
909 msecs
= 1 + jiffies_to_msecs(jiffies
);
910 for (lcnt
= 0; lcnt
< 10000U; lcnt
++) {
911 /* wait until we cross msec boundary */
912 if (jiffies_to_msecs(jiffies
) >= msecs
)
917 dd
->f_set_armlaunch(dd
, 0);
920 * length 0, no dwords actually sent
926 * This is only roughly accurate, since even with preempt we
927 * still take interrupts that could take a while. Running for
928 * >= 5 msec seems to get us "close enough" to accurate values.
930 msecs
= jiffies_to_msecs(jiffies
);
931 for (emsecs
= lcnt
= 0; emsecs
<= 5UL; lcnt
++) {
932 qib_pio_copy(piobuf
+ 64, addr
, cnt
>> 2);
933 emsecs
= jiffies_to_msecs(jiffies
) - msecs
;
936 /* 1 GiB/sec, slightly over IB SDR line rate */
937 if (lcnt
< (emsecs
* 1024U))
939 "Performance problem: bandwidth to PIO buffers is "
941 lcnt
/ (u32
) emsecs
);
948 /* disarm piobuf, so it's available again */
949 dd
->f_sendctrl(dd
->pport
, QIB_SENDCTRL_DISARM_BUF(pbnum
));
950 qib_sendbuf_done(dd
, pbnum
);
951 dd
->f_set_armlaunch(dd
, 1);
955 void qib_free_devdata(struct qib_devdata
*dd
)
959 spin_lock_irqsave(&qib_devs_lock
, flags
);
960 idr_remove(&qib_unit_table
, dd
->unit
);
962 spin_unlock_irqrestore(&qib_devs_lock
, flags
);
964 ib_dealloc_device(&dd
->verbs_dev
.ibdev
);
968 * Allocate our primary per-unit data structure. Must be done via verbs
969 * allocator, because the verbs cleanup process both does cleanup and
970 * free of the data structure.
971 * "extra" is for chip-specific data.
973 * Use the idr mechanism to get a unit number for this unit.
975 struct qib_devdata
*qib_alloc_devdata(struct pci_dev
*pdev
, size_t extra
)
978 struct qib_devdata
*dd
;
981 if (!idr_pre_get(&qib_unit_table
, GFP_KERNEL
)) {
982 dd
= ERR_PTR(-ENOMEM
);
986 dd
= (struct qib_devdata
*) ib_alloc_device(sizeof(*dd
) + extra
);
988 dd
= ERR_PTR(-ENOMEM
);
992 spin_lock_irqsave(&qib_devs_lock
, flags
);
993 ret
= idr_get_new(&qib_unit_table
, dd
, &dd
->unit
);
995 list_add(&dd
->list
, &qib_dev_list
);
996 spin_unlock_irqrestore(&qib_devs_lock
, flags
);
999 qib_early_err(&pdev
->dev
,
1000 "Could not allocate unit ID: error %d\n", -ret
);
1001 ib_dealloc_device(&dd
->verbs_dev
.ibdev
);
1006 if (!qib_cpulist_count
) {
1007 u32 count
= num_online_cpus();
1008 qib_cpulist
= kzalloc(BITS_TO_LONGS(count
) *
1009 sizeof(long), GFP_KERNEL
);
1011 qib_cpulist_count
= count
;
1013 qib_early_err(&pdev
->dev
, "Could not alloc cpulist "
1014 "info, cpu affinity might be wrong\n");
1022 * Called from freeze mode handlers, and from PCI error
1023 * reporting code. Should be paranoid about state of
1024 * system and data structures.
1026 void qib_disable_after_error(struct qib_devdata
*dd
)
1028 if (dd
->flags
& QIB_INITTED
) {
1031 dd
->flags
&= ~QIB_INITTED
;
1033 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
) {
1034 struct qib_pportdata
*ppd
;
1036 ppd
= dd
->pport
+ pidx
;
1037 if (dd
->flags
& QIB_PRESENT
) {
1038 qib_set_linkstate(ppd
,
1039 QIB_IB_LINKDOWN_DISABLE
);
1040 dd
->f_setextled(ppd
, 0);
1042 *ppd
->statusp
&= ~QIB_STATUS_IB_READY
;
1047 * Mark as having had an error for driver, and also
1048 * for /sys and status word mapped to user programs.
1049 * This marks unit as not usable, until reset.
1052 *dd
->devstatusp
|= QIB_STATUS_HWERROR
;
1055 static void __devexit
qib_remove_one(struct pci_dev
*);
1056 static int __devinit
qib_init_one(struct pci_dev
*,
1057 const struct pci_device_id
*);
1059 #define DRIVER_LOAD_MSG "QLogic " QIB_DRV_NAME " loaded: "
1060 #define PFX QIB_DRV_NAME ": "
1062 static DEFINE_PCI_DEVICE_TABLE(qib_pci_tbl
) = {
1063 { PCI_DEVICE(PCI_VENDOR_ID_PATHSCALE
, PCI_DEVICE_ID_QLOGIC_IB_6120
) },
1064 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_IB_7220
) },
1065 { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC
, PCI_DEVICE_ID_QLOGIC_IB_7322
) },
1069 MODULE_DEVICE_TABLE(pci
, qib_pci_tbl
);
1071 struct pci_driver qib_driver
= {
1072 .name
= QIB_DRV_NAME
,
1073 .probe
= qib_init_one
,
1074 .remove
= __devexit_p(qib_remove_one
),
1075 .id_table
= qib_pci_tbl
,
1076 .err_handler
= &qib_pci_err_handler
,
1080 * Do all the generic driver unit- and chip-independent memory
1081 * allocation and initialization.
1083 static int __init
qlogic_ib_init(void)
1087 ret
= qib_dev_init();
1091 qib_cq_wq
= create_singlethread_workqueue("qib_cq");
1098 * These must be called before the driver is registered with
1099 * the PCI subsystem.
1101 idr_init(&qib_unit_table
);
1102 if (!idr_pre_get(&qib_unit_table
, GFP_KERNEL
)) {
1103 printk(KERN_ERR QIB_DRV_NAME
": idr_pre_get() failed\n");
1108 ret
= pci_register_driver(&qib_driver
);
1110 printk(KERN_ERR QIB_DRV_NAME
1111 ": Unable to register driver: error %d\n", -ret
);
1115 /* not fatal if it doesn't work */
1116 if (qib_init_qibfs())
1117 printk(KERN_ERR QIB_DRV_NAME
": Unable to register ipathfs\n");
1118 goto bail
; /* all OK */
1121 idr_destroy(&qib_unit_table
);
1123 destroy_workqueue(qib_cq_wq
);
1130 module_init(qlogic_ib_init
);
1133 * Do the non-unit driver cleanup, memory free, etc. at unload.
1135 static void __exit
qlogic_ib_cleanup(void)
1139 ret
= qib_exit_qibfs();
1141 printk(KERN_ERR QIB_DRV_NAME
": "
1142 "Unable to cleanup counter filesystem: "
1143 "error %d\n", -ret
);
1145 pci_unregister_driver(&qib_driver
);
1147 destroy_workqueue(qib_cq_wq
);
1149 qib_cpulist_count
= 0;
1152 idr_destroy(&qib_unit_table
);
1156 module_exit(qlogic_ib_cleanup
);
1158 /* this can only be called after a successful initialization */
1159 static void cleanup_device_data(struct qib_devdata
*dd
)
1163 struct qib_ctxtdata
**tmp
;
1164 unsigned long flags
;
1166 /* users can't do anything more with chip */
1167 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
)
1168 if (dd
->pport
[pidx
].statusp
)
1169 *dd
->pport
[pidx
].statusp
&= ~QIB_STATUS_CHIP_PRESENT
;
1174 if (dd
->pioavailregs_dma
) {
1175 dma_free_coherent(&dd
->pcidev
->dev
, PAGE_SIZE
,
1176 (void *) dd
->pioavailregs_dma
,
1177 dd
->pioavailregs_phys
);
1178 dd
->pioavailregs_dma
= NULL
;
1181 if (dd
->pageshadow
) {
1182 struct page
**tmpp
= dd
->pageshadow
;
1183 dma_addr_t
*tmpd
= dd
->physshadow
;
1186 for (ctxt
= 0; ctxt
< dd
->cfgctxts
; ctxt
++) {
1187 int ctxt_tidbase
= ctxt
* dd
->rcvtidcnt
;
1188 int maxtid
= ctxt_tidbase
+ dd
->rcvtidcnt
;
1190 for (i
= ctxt_tidbase
; i
< maxtid
; i
++) {
1193 pci_unmap_page(dd
->pcidev
, tmpd
[i
],
1194 PAGE_SIZE
, PCI_DMA_FROMDEVICE
);
1195 qib_release_user_pages(&tmpp
[i
], 1);
1201 tmpp
= dd
->pageshadow
;
1202 dd
->pageshadow
= NULL
;
1207 * Free any resources still in use (usually just kernel contexts)
1208 * at unload; we do for ctxtcnt, because that's what we allocate.
1209 * We acquire lock to be really paranoid that rcd isn't being
1210 * accessed from some interrupt-related code (that should not happen,
1211 * but best to be sure).
1213 spin_lock_irqsave(&dd
->uctxt_lock
, flags
);
1216 spin_unlock_irqrestore(&dd
->uctxt_lock
, flags
);
1217 for (ctxt
= 0; tmp
&& ctxt
< dd
->ctxtcnt
; ctxt
++) {
1218 struct qib_ctxtdata
*rcd
= tmp
[ctxt
];
1220 tmp
[ctxt
] = NULL
; /* debugging paranoia */
1221 qib_free_ctxtdata(dd
, rcd
);
1224 kfree(dd
->boardname
);
1228 * Clean up on unit shutdown, or error during unit load after
1229 * successful initialization.
1231 static void qib_postinit_cleanup(struct qib_devdata
*dd
)
1234 * Clean up chip-specific stuff.
1235 * We check for NULL here, because it's outside
1236 * the kregbase check, and we need to call it
1237 * after the free_irq. Thus it's possible that
1238 * the function pointers were never initialized.
1243 qib_pcie_ddcleanup(dd
);
1245 cleanup_device_data(dd
);
1247 qib_free_devdata(dd
);
1250 static int __devinit
qib_init_one(struct pci_dev
*pdev
,
1251 const struct pci_device_id
*ent
)
1253 int ret
, j
, pidx
, initfail
;
1254 struct qib_devdata
*dd
= NULL
;
1256 ret
= qib_pcie_init(pdev
, ent
);
1261 * Do device-specific initialiation, function table setup, dd
1264 switch (ent
->device
) {
1265 case PCI_DEVICE_ID_QLOGIC_IB_6120
:
1266 #ifdef CONFIG_PCI_MSI
1267 dd
= qib_init_iba6120_funcs(pdev
, ent
);
1269 qib_early_err(&pdev
->dev
, "QLogic PCIE device 0x%x cannot "
1270 "work if CONFIG_PCI_MSI is not enabled\n",
1272 dd
= ERR_PTR(-ENODEV
);
1276 case PCI_DEVICE_ID_QLOGIC_IB_7220
:
1277 dd
= qib_init_iba7220_funcs(pdev
, ent
);
1280 case PCI_DEVICE_ID_QLOGIC_IB_7322
:
1281 dd
= qib_init_iba7322_funcs(pdev
, ent
);
1285 qib_early_err(&pdev
->dev
, "Failing on unknown QLogic "
1286 "deviceid 0x%x\n", ent
->device
);
1293 goto bail
; /* error already printed */
1295 ret
= qib_create_workqueues(dd
);
1299 /* do the generic initialization */
1300 initfail
= qib_init(dd
, 0);
1302 ret
= qib_register_ib_device(dd
);
1305 * Now ready for use. this should be cleared whenever we
1306 * detect a reset, or initiate one. If earlier failure,
1307 * we still create devices, so diags, etc. can be used
1308 * to determine cause of problem.
1310 if (!qib_mini_init
&& !initfail
&& !ret
)
1311 dd
->flags
|= QIB_INITTED
;
1313 j
= qib_device_create(dd
);
1315 qib_dev_err(dd
, "Failed to create /dev devices: %d\n", -j
);
1318 qib_dev_err(dd
, "Failed filesystem setup for counters: %d\n",
1321 if (qib_mini_init
|| initfail
|| ret
) {
1322 qib_stop_timers(dd
);
1323 flush_workqueue(ib_wq
);
1324 for (pidx
= 0; pidx
< dd
->num_pports
; ++pidx
)
1325 dd
->f_quiet_serdes(dd
->pport
+ pidx
);
1329 (void) qibfs_remove(dd
);
1330 qib_device_remove(dd
);
1333 qib_unregister_ib_device(dd
);
1334 qib_postinit_cleanup(dd
);
1341 ret
= qib_enable_wc(dd
);
1343 qib_dev_err(dd
, "Write combining not enabled "
1344 "(err %d): performance may be poor\n",
1350 qib_verify_pioperf(dd
);
1355 static void __devexit
qib_remove_one(struct pci_dev
*pdev
)
1357 struct qib_devdata
*dd
= pci_get_drvdata(pdev
);
1360 /* unregister from IB core */
1361 qib_unregister_ib_device(dd
);
1364 * Disable the IB link, disable interrupts on the device,
1365 * clear dma engines, etc.
1368 qib_shutdown_device(dd
);
1370 qib_stop_timers(dd
);
1372 /* wait until all of our (qsfp) queue_work() calls complete */
1373 flush_workqueue(ib_wq
);
1375 ret
= qibfs_remove(dd
);
1377 qib_dev_err(dd
, "Failed counters filesystem cleanup: %d\n",
1380 qib_device_remove(dd
);
1382 qib_postinit_cleanup(dd
);
1386 * qib_create_rcvhdrq - create a receive header queue
1387 * @dd: the qlogic_ib device
1388 * @rcd: the context data
1390 * This must be contiguous memory (from an i/o perspective), and must be
1391 * DMA'able (which means for some systems, it will go through an IOMMU,
1392 * or be forced into a low address range).
1394 int qib_create_rcvhdrq(struct qib_devdata
*dd
, struct qib_ctxtdata
*rcd
)
1398 if (!rcd
->rcvhdrq
) {
1399 dma_addr_t phys_hdrqtail
;
1402 amt
= ALIGN(dd
->rcvhdrcnt
* dd
->rcvhdrentsize
*
1403 sizeof(u32
), PAGE_SIZE
);
1404 gfp_flags
= (rcd
->ctxt
>= dd
->first_user_ctxt
) ?
1405 GFP_USER
: GFP_KERNEL
;
1406 rcd
->rcvhdrq
= dma_alloc_coherent(
1407 &dd
->pcidev
->dev
, amt
, &rcd
->rcvhdrq_phys
,
1408 gfp_flags
| __GFP_COMP
);
1410 if (!rcd
->rcvhdrq
) {
1411 qib_dev_err(dd
, "attempt to allocate %d bytes "
1412 "for ctxt %u rcvhdrq failed\n",
1417 if (rcd
->ctxt
>= dd
->first_user_ctxt
) {
1418 rcd
->user_event_mask
= vmalloc_user(PAGE_SIZE
);
1419 if (!rcd
->user_event_mask
)
1420 goto bail_free_hdrq
;
1423 if (!(dd
->flags
& QIB_NODMA_RTAIL
)) {
1424 rcd
->rcvhdrtail_kvaddr
= dma_alloc_coherent(
1425 &dd
->pcidev
->dev
, PAGE_SIZE
, &phys_hdrqtail
,
1427 if (!rcd
->rcvhdrtail_kvaddr
)
1429 rcd
->rcvhdrqtailaddr_phys
= phys_hdrqtail
;
1432 rcd
->rcvhdrq_size
= amt
;
1435 /* clear for security and sanity on each use */
1436 memset(rcd
->rcvhdrq
, 0, rcd
->rcvhdrq_size
);
1437 if (rcd
->rcvhdrtail_kvaddr
)
1438 memset(rcd
->rcvhdrtail_kvaddr
, 0, PAGE_SIZE
);
1442 qib_dev_err(dd
, "attempt to allocate 1 page for ctxt %u "
1443 "rcvhdrqtailaddr failed\n", rcd
->ctxt
);
1444 vfree(rcd
->user_event_mask
);
1445 rcd
->user_event_mask
= NULL
;
1447 dma_free_coherent(&dd
->pcidev
->dev
, amt
, rcd
->rcvhdrq
,
1449 rcd
->rcvhdrq
= NULL
;
1455 * allocate eager buffers, both kernel and user contexts.
1456 * @rcd: the context we are setting up.
1458 * Allocate the eager TID buffers and program them into hip.
1459 * They are no longer completely contiguous, we do multiple allocation
1460 * calls. Otherwise we get the OOM code involved, by asking for too
1461 * much per call, with disastrous results on some kernels.
1463 int qib_setup_eagerbufs(struct qib_ctxtdata
*rcd
)
1465 struct qib_devdata
*dd
= rcd
->dd
;
1466 unsigned e
, egrcnt
, egrperchunk
, chunk
, egrsize
, egroff
;
1471 * GFP_USER, but without GFP_FS, so buffer cache can be
1472 * coalesced (we hope); otherwise, even at order 4,
1473 * heavy filesystem activity makes these fail, and we can
1474 * use compound pages.
1476 gfp_flags
= __GFP_WAIT
| __GFP_IO
| __GFP_COMP
;
1478 egrcnt
= rcd
->rcvegrcnt
;
1479 egroff
= rcd
->rcvegr_tid_base
;
1480 egrsize
= dd
->rcvegrbufsize
;
1482 chunk
= rcd
->rcvegrbuf_chunks
;
1483 egrperchunk
= rcd
->rcvegrbufs_perchunk
;
1484 size
= rcd
->rcvegrbuf_size
;
1485 if (!rcd
->rcvegrbuf
) {
1487 kzalloc(chunk
* sizeof(rcd
->rcvegrbuf
[0]),
1489 if (!rcd
->rcvegrbuf
)
1492 if (!rcd
->rcvegrbuf_phys
) {
1493 rcd
->rcvegrbuf_phys
=
1494 kmalloc(chunk
* sizeof(rcd
->rcvegrbuf_phys
[0]),
1496 if (!rcd
->rcvegrbuf_phys
)
1497 goto bail_rcvegrbuf
;
1499 for (e
= 0; e
< rcd
->rcvegrbuf_chunks
; e
++) {
1500 if (rcd
->rcvegrbuf
[e
])
1503 dma_alloc_coherent(&dd
->pcidev
->dev
, size
,
1504 &rcd
->rcvegrbuf_phys
[e
],
1506 if (!rcd
->rcvegrbuf
[e
])
1507 goto bail_rcvegrbuf_phys
;
1510 rcd
->rcvegr_phys
= rcd
->rcvegrbuf_phys
[0];
1512 for (e
= chunk
= 0; chunk
< rcd
->rcvegrbuf_chunks
; chunk
++) {
1513 dma_addr_t pa
= rcd
->rcvegrbuf_phys
[chunk
];
1516 /* clear for security and sanity on each use */
1517 memset(rcd
->rcvegrbuf
[chunk
], 0, size
);
1519 for (i
= 0; e
< egrcnt
&& i
< egrperchunk
; e
++, i
++) {
1520 dd
->f_put_tid(dd
, e
+ egroff
+
1525 RCVHQ_RCV_TYPE_EAGER
, pa
);
1528 cond_resched(); /* don't hog the cpu */
1533 bail_rcvegrbuf_phys
:
1534 for (e
= 0; e
< rcd
->rcvegrbuf_chunks
&& rcd
->rcvegrbuf
[e
]; e
++)
1535 dma_free_coherent(&dd
->pcidev
->dev
, size
,
1536 rcd
->rcvegrbuf
[e
], rcd
->rcvegrbuf_phys
[e
]);
1537 kfree(rcd
->rcvegrbuf_phys
);
1538 rcd
->rcvegrbuf_phys
= NULL
;
1540 kfree(rcd
->rcvegrbuf
);
1541 rcd
->rcvegrbuf
= NULL
;
1547 * Note: Changes to this routine should be mirrored
1548 * for the diagnostics routine qib_remap_ioaddr32().
1549 * There is also related code for VL15 buffers in qib_init_7322_variables().
1550 * The teardown code that unmaps is in qib_pcie_ddcleanup()
1552 int init_chip_wc_pat(struct qib_devdata
*dd
, u32 vl15buflen
)
1554 u64 __iomem
*qib_kregbase
= NULL
;
1555 void __iomem
*qib_piobase
= NULL
;
1556 u64 __iomem
*qib_userbase
= NULL
;
1558 u64 qib_pio2koffset
= dd
->piobufbase
& 0xffffffff;
1559 u64 qib_pio4koffset
= dd
->piobufbase
>> 32;
1560 u64 qib_pio2klen
= dd
->piobcnt2k
* dd
->palign
;
1561 u64 qib_pio4klen
= dd
->piobcnt4k
* dd
->align4k
;
1562 u64 qib_physaddr
= dd
->physaddr
;
1564 u64 qib_userlen
= 0;
1567 * Free the old mapping because the kernel will try to reuse the
1568 * old mapping and not create a new mapping with the
1569 * write combining attribute.
1571 iounmap(dd
->kregbase
);
1572 dd
->kregbase
= NULL
;
1575 * Assumes chip address space looks like:
1576 * - kregs + sregs + cregs + uregs (in any order)
1577 * - piobufs (2K and 4K bufs in either order)
1579 * - kregs + sregs + cregs (in any order)
1580 * - piobufs (2K and 4K bufs in either order)
1583 if (dd
->piobcnt4k
== 0) {
1584 qib_kreglen
= qib_pio2koffset
;
1585 qib_piolen
= qib_pio2klen
;
1586 } else if (qib_pio2koffset
< qib_pio4koffset
) {
1587 qib_kreglen
= qib_pio2koffset
;
1588 qib_piolen
= qib_pio4koffset
+ qib_pio4klen
- qib_kreglen
;
1590 qib_kreglen
= qib_pio4koffset
;
1591 qib_piolen
= qib_pio2koffset
+ qib_pio2klen
- qib_kreglen
;
1593 qib_piolen
+= vl15buflen
;
1594 /* Map just the configured ports (not all hw ports) */
1595 if (dd
->uregbase
> qib_kreglen
)
1596 qib_userlen
= dd
->ureg_align
* dd
->cfgctxts
;
1598 /* Sanity checks passed, now create the new mappings */
1599 qib_kregbase
= ioremap_nocache(qib_physaddr
, qib_kreglen
);
1603 qib_piobase
= ioremap_wc(qib_physaddr
+ qib_kreglen
, qib_piolen
);
1608 qib_userbase
= ioremap_nocache(qib_physaddr
+ dd
->uregbase
,
1614 dd
->kregbase
= qib_kregbase
;
1615 dd
->kregend
= (u64 __iomem
*)
1616 ((char __iomem
*) qib_kregbase
+ qib_kreglen
);
1617 dd
->piobase
= qib_piobase
;
1618 dd
->pio2kbase
= (void __iomem
*)
1619 (((char __iomem
*) dd
->piobase
) +
1620 qib_pio2koffset
- qib_kreglen
);
1622 dd
->pio4kbase
= (void __iomem
*)
1623 (((char __iomem
*) dd
->piobase
) +
1624 qib_pio4koffset
- qib_kreglen
);
1626 /* ureg will now be accessed relative to dd->userbase */
1627 dd
->userbase
= qib_userbase
;
1631 iounmap(qib_piobase
);
1633 iounmap(qib_kregbase
);