2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright (C) 2013 Freescale Semiconductor, Inc.
16 * Author: Varun Sethi <varun.sethi@freescale.com>
20 #define pr_fmt(fmt) "fsl-pamu-domain: %s: " fmt, __func__
22 #include <linux/init.h>
23 #include <linux/iommu.h>
24 #include <linux/notifier.h>
25 #include <linux/slab.h>
26 #include <linux/module.h>
27 #include <linux/types.h>
29 #include <linux/interrupt.h>
30 #include <linux/device.h>
31 #include <linux/of_platform.h>
32 #include <linux/bootmem.h>
33 #include <linux/err.h>
35 #include <asm/bitops.h>
37 #include <asm/pci-bridge.h>
38 #include <sysdev/fsl_pci.h>
40 #include "fsl_pamu_domain.h"
43 * Global spinlock that needs to be held while
46 static DEFINE_SPINLOCK(iommu_lock
);
48 static struct kmem_cache
*fsl_pamu_domain_cache
;
49 static struct kmem_cache
*iommu_devinfo_cache
;
50 static DEFINE_SPINLOCK(device_domain_lock
);
52 static int __init
iommu_init_mempool(void)
55 fsl_pamu_domain_cache
= kmem_cache_create("fsl_pamu_domain",
56 sizeof(struct fsl_dma_domain
),
61 if (!fsl_pamu_domain_cache
) {
62 pr_debug("Couldn't create fsl iommu_domain cache\n");
66 iommu_devinfo_cache
= kmem_cache_create("iommu_devinfo",
67 sizeof(struct device_domain_info
),
71 if (!iommu_devinfo_cache
) {
72 pr_debug("Couldn't create devinfo cache\n");
73 kmem_cache_destroy(fsl_pamu_domain_cache
);
80 static phys_addr_t
get_phys_addr(struct fsl_dma_domain
*dma_domain
, dma_addr_t iova
)
82 u32 win_cnt
= dma_domain
->win_cnt
;
83 struct dma_window
*win_ptr
=
84 &dma_domain
->win_arr
[0];
85 struct iommu_domain_geometry
*geom
;
87 geom
= &dma_domain
->iommu_domain
->geometry
;
89 if (!win_cnt
|| !dma_domain
->geom_size
) {
90 pr_debug("Number of windows/geometry not configured for the domain\n");
96 dma_addr_t subwin_iova
;
99 subwin_size
= dma_domain
->geom_size
>> ilog2(win_cnt
);
100 subwin_iova
= iova
& ~(subwin_size
- 1);
101 wnd
= (subwin_iova
- geom
->aperture_start
) >> ilog2(subwin_size
);
102 win_ptr
= &dma_domain
->win_arr
[wnd
];
106 return (win_ptr
->paddr
+ (iova
& (win_ptr
->size
- 1)));
111 static int map_subwins(int liodn
, struct fsl_dma_domain
*dma_domain
)
113 struct dma_window
*sub_win_ptr
=
114 &dma_domain
->win_arr
[0];
116 unsigned long rpn
, flags
;
118 for (i
= 0; i
< dma_domain
->win_cnt
; i
++) {
119 if (sub_win_ptr
[i
].valid
) {
120 rpn
= sub_win_ptr
[i
].paddr
>>
122 spin_lock_irqsave(&iommu_lock
, flags
);
123 ret
= pamu_config_spaace(liodn
, dma_domain
->win_cnt
, i
,
127 dma_domain
->snoop_id
,
128 dma_domain
->stash_id
,
130 sub_win_ptr
[i
].prot
);
131 spin_unlock_irqrestore(&iommu_lock
, flags
);
133 pr_debug("PAMU SPAACE configuration failed for liodn %d\n",
143 static int map_win(int liodn
, struct fsl_dma_domain
*dma_domain
)
146 struct dma_window
*wnd
= &dma_domain
->win_arr
[0];
147 phys_addr_t wnd_addr
= dma_domain
->iommu_domain
->geometry
.aperture_start
;
150 spin_lock_irqsave(&iommu_lock
, flags
);
151 ret
= pamu_config_ppaace(liodn
, wnd_addr
,
154 wnd
->paddr
>> PAMU_PAGE_SHIFT
,
155 dma_domain
->snoop_id
, dma_domain
->stash_id
,
157 spin_unlock_irqrestore(&iommu_lock
, flags
);
159 pr_debug("PAMU PAACE configuration failed for liodn %d\n",
165 /* Map the DMA window corresponding to the LIODN */
166 static int map_liodn(int liodn
, struct fsl_dma_domain
*dma_domain
)
168 if (dma_domain
->win_cnt
> 1)
169 return map_subwins(liodn
, dma_domain
);
171 return map_win(liodn
, dma_domain
);
175 /* Update window/subwindow mapping for the LIODN */
176 static int update_liodn(int liodn
, struct fsl_dma_domain
*dma_domain
, u32 wnd_nr
)
179 struct dma_window
*wnd
= &dma_domain
->win_arr
[wnd_nr
];
182 spin_lock_irqsave(&iommu_lock
, flags
);
183 if (dma_domain
->win_cnt
> 1) {
184 ret
= pamu_config_spaace(liodn
, dma_domain
->win_cnt
, wnd_nr
,
187 wnd
->paddr
>> PAMU_PAGE_SHIFT
,
188 dma_domain
->snoop_id
,
189 dma_domain
->stash_id
,
190 (wnd_nr
> 0) ? 1 : 0,
193 pr_debug("Subwindow reconfiguration failed for liodn %d\n", liodn
);
195 phys_addr_t wnd_addr
;
197 wnd_addr
= dma_domain
->iommu_domain
->geometry
.aperture_start
;
199 ret
= pamu_config_ppaace(liodn
, wnd_addr
,
202 wnd
->paddr
>> PAMU_PAGE_SHIFT
,
203 dma_domain
->snoop_id
, dma_domain
->stash_id
,
206 pr_debug("Window reconfiguration failed for liodn %d\n", liodn
);
209 spin_unlock_irqrestore(&iommu_lock
, flags
);
214 static int update_liodn_stash(int liodn
, struct fsl_dma_domain
*dma_domain
,
220 spin_lock_irqsave(&iommu_lock
, flags
);
221 if (!dma_domain
->win_arr
) {
222 pr_debug("Windows not configured, stash destination update failed for liodn %d\n", liodn
);
223 spin_unlock_irqrestore(&iommu_lock
, flags
);
227 for (i
= 0; i
< dma_domain
->win_cnt
; i
++) {
228 ret
= pamu_update_paace_stash(liodn
, i
, val
);
230 pr_debug("Failed to update SPAACE %d field for liodn %d\n ", i
, liodn
);
231 spin_unlock_irqrestore(&iommu_lock
, flags
);
236 spin_unlock_irqrestore(&iommu_lock
, flags
);
241 /* Set the geometry parameters for a LIODN */
242 static int pamu_set_liodn(int liodn
, struct device
*dev
,
243 struct fsl_dma_domain
*dma_domain
,
244 struct iommu_domain_geometry
*geom_attr
,
247 phys_addr_t window_addr
, window_size
;
248 phys_addr_t subwin_size
;
250 u32 omi_index
= ~(u32
)0;
254 * Configure the omi_index at the geometry setup time.
255 * This is a static value which depends on the type of
256 * device and would not change thereafter.
258 get_ome_index(&omi_index
, dev
);
260 window_addr
= geom_attr
->aperture_start
;
261 window_size
= dma_domain
->geom_size
;
263 spin_lock_irqsave(&iommu_lock
, flags
);
264 ret
= pamu_disable_liodn(liodn
);
266 ret
= pamu_config_ppaace(liodn
, window_addr
, window_size
, omi_index
,
267 0, dma_domain
->snoop_id
,
268 dma_domain
->stash_id
, win_cnt
, 0);
269 spin_unlock_irqrestore(&iommu_lock
, flags
);
271 pr_debug("PAMU PAACE configuration failed for liodn %d, win_cnt =%d\n", liodn
, win_cnt
);
276 subwin_size
= window_size
>> ilog2(win_cnt
);
277 for (i
= 0; i
< win_cnt
; i
++) {
278 spin_lock_irqsave(&iommu_lock
, flags
);
279 ret
= pamu_disable_spaace(liodn
, i
);
281 ret
= pamu_config_spaace(liodn
, win_cnt
, i
,
282 subwin_size
, omi_index
,
283 0, dma_domain
->snoop_id
,
284 dma_domain
->stash_id
,
286 spin_unlock_irqrestore(&iommu_lock
, flags
);
288 pr_debug("PAMU SPAACE configuration failed for liodn %d\n", liodn
);
297 static int check_size(u64 size
, dma_addr_t iova
)
300 * Size must be a power of two and at least be equal
303 if (!is_power_of_2(size
) || size
< PAMU_PAGE_SIZE
) {
304 pr_debug("%s: size too small or not a power of two\n", __func__
);
308 /* iova must be page size aligned*/
309 if (iova
& (size
- 1)) {
310 pr_debug("%s: address is not aligned with window size\n", __func__
);
317 static struct fsl_dma_domain
*iommu_alloc_dma_domain(void)
319 struct fsl_dma_domain
*domain
;
321 domain
= kmem_cache_zalloc(fsl_pamu_domain_cache
, GFP_KERNEL
);
325 domain
->stash_id
= ~(u32
)0;
326 domain
->snoop_id
= ~(u32
)0;
327 domain
->win_cnt
= pamu_get_max_subwin_cnt();
328 domain
->geom_size
= 0;
330 INIT_LIST_HEAD(&domain
->devices
);
332 spin_lock_init(&domain
->domain_lock
);
337 static inline struct device_domain_info
*find_domain(struct device
*dev
)
339 return dev
->archdata
.iommu_domain
;
342 static void remove_device_ref(struct device_domain_info
*info
, u32 win_cnt
)
346 list_del(&info
->link
);
347 spin_lock_irqsave(&iommu_lock
, flags
);
349 pamu_free_subwins(info
->liodn
);
350 pamu_disable_liodn(info
->liodn
);
351 spin_unlock_irqrestore(&iommu_lock
, flags
);
352 spin_lock_irqsave(&device_domain_lock
, flags
);
353 info
->dev
->archdata
.iommu_domain
= NULL
;
354 kmem_cache_free(iommu_devinfo_cache
, info
);
355 spin_unlock_irqrestore(&device_domain_lock
, flags
);
358 static void detach_device(struct device
*dev
, struct fsl_dma_domain
*dma_domain
)
360 struct device_domain_info
*info
, *tmp
;
363 spin_lock_irqsave(&dma_domain
->domain_lock
, flags
);
364 /* Remove the device from the domain device list */
365 list_for_each_entry_safe(info
, tmp
, &dma_domain
->devices
, link
) {
366 if (!dev
|| (info
->dev
== dev
))
367 remove_device_ref(info
, dma_domain
->win_cnt
);
369 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
372 static void attach_device(struct fsl_dma_domain
*dma_domain
, int liodn
, struct device
*dev
)
374 struct device_domain_info
*info
, *old_domain_info
;
377 spin_lock_irqsave(&device_domain_lock
, flags
);
379 * Check here if the device is already attached to domain or not.
380 * If the device is already attached to a domain detach it.
382 old_domain_info
= find_domain(dev
);
383 if (old_domain_info
&& old_domain_info
->domain
!= dma_domain
) {
384 spin_unlock_irqrestore(&device_domain_lock
, flags
);
385 detach_device(dev
, old_domain_info
->domain
);
386 spin_lock_irqsave(&device_domain_lock
, flags
);
389 info
= kmem_cache_zalloc(iommu_devinfo_cache
, GFP_ATOMIC
);
393 info
->domain
= dma_domain
;
395 list_add(&info
->link
, &dma_domain
->devices
);
397 * In case of devices with multiple LIODNs just store
398 * the info for the first LIODN as all
399 * LIODNs share the same domain
401 if (!old_domain_info
)
402 dev
->archdata
.iommu_domain
= info
;
403 spin_unlock_irqrestore(&device_domain_lock
, flags
);
407 static phys_addr_t
fsl_pamu_iova_to_phys(struct iommu_domain
*domain
,
410 struct fsl_dma_domain
*dma_domain
= domain
->priv
;
412 if ((iova
< domain
->geometry
.aperture_start
) ||
413 iova
> (domain
->geometry
.aperture_end
))
416 return get_phys_addr(dma_domain
, iova
);
419 static int fsl_pamu_domain_has_cap(struct iommu_domain
*domain
,
422 return cap
== IOMMU_CAP_CACHE_COHERENCY
;
425 static void fsl_pamu_domain_destroy(struct iommu_domain
*domain
)
427 struct fsl_dma_domain
*dma_domain
= domain
->priv
;
431 /* remove all the devices from the device list */
432 detach_device(NULL
, dma_domain
);
434 dma_domain
->enabled
= 0;
435 dma_domain
->mapped
= 0;
437 kmem_cache_free(fsl_pamu_domain_cache
, dma_domain
);
440 static int fsl_pamu_domain_init(struct iommu_domain
*domain
)
442 struct fsl_dma_domain
*dma_domain
;
444 dma_domain
= iommu_alloc_dma_domain();
446 pr_debug("dma_domain allocation failed\n");
449 domain
->priv
= dma_domain
;
450 dma_domain
->iommu_domain
= domain
;
451 /* defaul geometry 64 GB i.e. maximum system address */
452 domain
->geometry
.aperture_start
= 0;
453 domain
->geometry
.aperture_end
= (1ULL << 36) - 1;
454 domain
->geometry
.force_aperture
= true;
459 /* Configure geometry settings for all LIODNs associated with domain */
460 static int pamu_set_domain_geometry(struct fsl_dma_domain
*dma_domain
,
461 struct iommu_domain_geometry
*geom_attr
,
464 struct device_domain_info
*info
;
467 list_for_each_entry(info
, &dma_domain
->devices
, link
) {
468 ret
= pamu_set_liodn(info
->liodn
, info
->dev
, dma_domain
,
477 /* Update stash destination for all LIODNs associated with the domain */
478 static int update_domain_stash(struct fsl_dma_domain
*dma_domain
, u32 val
)
480 struct device_domain_info
*info
;
483 list_for_each_entry(info
, &dma_domain
->devices
, link
) {
484 ret
= update_liodn_stash(info
->liodn
, dma_domain
, val
);
492 /* Update domain mappings for all LIODNs associated with the domain */
493 static int update_domain_mapping(struct fsl_dma_domain
*dma_domain
, u32 wnd_nr
)
495 struct device_domain_info
*info
;
498 list_for_each_entry(info
, &dma_domain
->devices
, link
) {
499 ret
= update_liodn(info
->liodn
, dma_domain
, wnd_nr
);
506 static int disable_domain_win(struct fsl_dma_domain
*dma_domain
, u32 wnd_nr
)
508 struct device_domain_info
*info
;
511 list_for_each_entry(info
, &dma_domain
->devices
, link
) {
512 if (dma_domain
->win_cnt
== 1 && dma_domain
->enabled
) {
513 ret
= pamu_disable_liodn(info
->liodn
);
515 dma_domain
->enabled
= 0;
517 ret
= pamu_disable_spaace(info
->liodn
, wnd_nr
);
524 static void fsl_pamu_window_disable(struct iommu_domain
*domain
, u32 wnd_nr
)
526 struct fsl_dma_domain
*dma_domain
= domain
->priv
;
530 spin_lock_irqsave(&dma_domain
->domain_lock
, flags
);
531 if (!dma_domain
->win_arr
) {
532 pr_debug("Number of windows not configured\n");
533 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
537 if (wnd_nr
>= dma_domain
->win_cnt
) {
538 pr_debug("Invalid window index\n");
539 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
543 if (dma_domain
->win_arr
[wnd_nr
].valid
) {
544 ret
= disable_domain_win(dma_domain
, wnd_nr
);
546 dma_domain
->win_arr
[wnd_nr
].valid
= 0;
547 dma_domain
->mapped
--;
551 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
555 static int fsl_pamu_window_enable(struct iommu_domain
*domain
, u32 wnd_nr
,
556 phys_addr_t paddr
, u64 size
, int prot
)
558 struct fsl_dma_domain
*dma_domain
= domain
->priv
;
559 struct dma_window
*wnd
;
565 if (prot
& IOMMU_READ
)
566 pamu_prot
|= PAACE_AP_PERMS_QUERY
;
567 if (prot
& IOMMU_WRITE
)
568 pamu_prot
|= PAACE_AP_PERMS_UPDATE
;
570 spin_lock_irqsave(&dma_domain
->domain_lock
, flags
);
571 if (!dma_domain
->win_arr
) {
572 pr_debug("Number of windows not configured\n");
573 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
577 if (wnd_nr
>= dma_domain
->win_cnt
) {
578 pr_debug("Invalid window index\n");
579 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
583 win_size
= dma_domain
->geom_size
>> ilog2(dma_domain
->win_cnt
);
584 if (size
> win_size
) {
585 pr_debug("Invalid window size \n");
586 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
590 if (dma_domain
->win_cnt
== 1) {
591 if (dma_domain
->enabled
) {
592 pr_debug("Disable the window before updating the mapping\n");
593 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
597 ret
= check_size(size
, domain
->geometry
.aperture_start
);
599 pr_debug("Aperture start not aligned to the size\n");
600 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
605 wnd
= &dma_domain
->win_arr
[wnd_nr
];
609 wnd
->prot
= pamu_prot
;
611 ret
= update_domain_mapping(dma_domain
, wnd_nr
);
614 dma_domain
->mapped
++;
617 pr_debug("Disable the window before updating the mapping\n");
621 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
627 * Attach the LIODN to the DMA domain and configure the geometry
628 * and window mappings.
630 static int handle_attach_device(struct fsl_dma_domain
*dma_domain
,
631 struct device
*dev
, const u32
*liodn
,
635 struct iommu_domain
*domain
= dma_domain
->iommu_domain
;
639 spin_lock_irqsave(&dma_domain
->domain_lock
, flags
);
640 for (i
= 0; i
< num
; i
++) {
642 /* Ensure that LIODN value is valid */
643 if (liodn
[i
] >= PAACE_NUMBER_ENTRIES
) {
644 pr_debug("Invalid liodn %d, attach device failed for %s\n",
645 liodn
[i
], dev
->of_node
->full_name
);
650 attach_device(dma_domain
, liodn
[i
], dev
);
652 * Check if geometry has already been configured
653 * for the domain. If yes, set the geometry for
656 if (dma_domain
->win_arr
) {
657 u32 win_cnt
= dma_domain
->win_cnt
> 1 ? dma_domain
->win_cnt
: 0;
658 ret
= pamu_set_liodn(liodn
[i
], dev
, dma_domain
,
663 if (dma_domain
->mapped
) {
665 * Create window/subwindow mapping for
668 ret
= map_liodn(liodn
[i
], dma_domain
);
674 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
679 static int fsl_pamu_attach_device(struct iommu_domain
*domain
,
682 struct fsl_dma_domain
*dma_domain
= domain
->priv
;
686 struct pci_dev
*pdev
= NULL
;
687 struct pci_controller
*pci_ctl
;
690 * Use LIODN of the PCI controller while attaching a
693 if (dev_is_pci(dev
)) {
694 pdev
= to_pci_dev(dev
);
695 pci_ctl
= pci_bus_to_host(pdev
->bus
);
697 * make dev point to pci controller device
698 * so we can get the LIODN programmed by
701 dev
= pci_ctl
->parent
;
704 liodn
= of_get_property(dev
->of_node
, "fsl,liodn", &len
);
706 liodn_cnt
= len
/ sizeof(u32
);
707 ret
= handle_attach_device(dma_domain
, dev
,
710 pr_debug("missing fsl,liodn property at %s\n",
711 dev
->of_node
->full_name
);
718 static void fsl_pamu_detach_device(struct iommu_domain
*domain
,
721 struct fsl_dma_domain
*dma_domain
= domain
->priv
;
724 struct pci_dev
*pdev
= NULL
;
725 struct pci_controller
*pci_ctl
;
728 * Use LIODN of the PCI controller while detaching a
731 if (dev_is_pci(dev
)) {
732 pdev
= to_pci_dev(dev
);
733 pci_ctl
= pci_bus_to_host(pdev
->bus
);
735 * make dev point to pci controller device
736 * so we can get the LIODN programmed by
739 dev
= pci_ctl
->parent
;
742 prop
= of_get_property(dev
->of_node
, "fsl,liodn", &len
);
744 detach_device(dev
, dma_domain
);
746 pr_debug("missing fsl,liodn property at %s\n",
747 dev
->of_node
->full_name
);
750 static int configure_domain_geometry(struct iommu_domain
*domain
, void *data
)
752 struct iommu_domain_geometry
*geom_attr
= data
;
753 struct fsl_dma_domain
*dma_domain
= domain
->priv
;
754 dma_addr_t geom_size
;
757 geom_size
= geom_attr
->aperture_end
- geom_attr
->aperture_start
+ 1;
759 * Sanity check the geometry size. Also, we do not support
760 * DMA outside of the geometry.
762 if (check_size(geom_size
, geom_attr
->aperture_start
) ||
763 !geom_attr
->force_aperture
) {
764 pr_debug("Invalid PAMU geometry attributes\n");
768 spin_lock_irqsave(&dma_domain
->domain_lock
, flags
);
769 if (dma_domain
->enabled
) {
770 pr_debug("Can't set geometry attributes as domain is active\n");
771 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
775 /* Copy the domain geometry information */
776 memcpy(&domain
->geometry
, geom_attr
,
777 sizeof(struct iommu_domain_geometry
));
778 dma_domain
->geom_size
= geom_size
;
780 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
785 /* Set the domain stash attribute */
786 static int configure_domain_stash(struct fsl_dma_domain
*dma_domain
, void *data
)
788 struct pamu_stash_attribute
*stash_attr
= data
;
792 spin_lock_irqsave(&dma_domain
->domain_lock
, flags
);
794 memcpy(&dma_domain
->dma_stash
, stash_attr
,
795 sizeof(struct pamu_stash_attribute
));
797 dma_domain
->stash_id
= get_stash_id(stash_attr
->cache
,
799 if (dma_domain
->stash_id
== ~(u32
)0) {
800 pr_debug("Invalid stash attributes\n");
801 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
805 ret
= update_domain_stash(dma_domain
, dma_domain
->stash_id
);
807 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
812 /* Configure domain dma state i.e. enable/disable DMA*/
813 static int configure_domain_dma_state(struct fsl_dma_domain
*dma_domain
, bool enable
)
815 struct device_domain_info
*info
;
819 spin_lock_irqsave(&dma_domain
->domain_lock
, flags
);
821 if (enable
&& !dma_domain
->mapped
) {
822 pr_debug("Can't enable DMA domain without valid mapping\n");
823 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
827 dma_domain
->enabled
= enable
;
828 list_for_each_entry(info
, &dma_domain
->devices
,
830 ret
= (enable
) ? pamu_enable_liodn(info
->liodn
) :
831 pamu_disable_liodn(info
->liodn
);
833 pr_debug("Unable to set dma state for liodn %d",
836 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
841 static int fsl_pamu_set_domain_attr(struct iommu_domain
*domain
,
842 enum iommu_attr attr_type
, void *data
)
844 struct fsl_dma_domain
*dma_domain
= domain
->priv
;
849 case DOMAIN_ATTR_GEOMETRY
:
850 ret
= configure_domain_geometry(domain
, data
);
852 case DOMAIN_ATTR_FSL_PAMU_STASH
:
853 ret
= configure_domain_stash(dma_domain
, data
);
855 case DOMAIN_ATTR_FSL_PAMU_ENABLE
:
856 ret
= configure_domain_dma_state(dma_domain
, *(int *)data
);
859 pr_debug("Unsupported attribute type\n");
867 static int fsl_pamu_get_domain_attr(struct iommu_domain
*domain
,
868 enum iommu_attr attr_type
, void *data
)
870 struct fsl_dma_domain
*dma_domain
= domain
->priv
;
875 case DOMAIN_ATTR_FSL_PAMU_STASH
:
876 memcpy((struct pamu_stash_attribute
*) data
, &dma_domain
->dma_stash
,
877 sizeof(struct pamu_stash_attribute
));
879 case DOMAIN_ATTR_FSL_PAMU_ENABLE
:
880 *(int *)data
= dma_domain
->enabled
;
882 case DOMAIN_ATTR_FSL_PAMUV1
:
883 *(int *)data
= DOMAIN_ATTR_FSL_PAMUV1
;
886 pr_debug("Unsupported attribute type\n");
894 static struct iommu_group
*get_device_iommu_group(struct device
*dev
)
896 struct iommu_group
*group
;
898 group
= iommu_group_get(dev
);
900 group
= iommu_group_alloc();
905 static bool check_pci_ctl_endpt_part(struct pci_controller
*pci_ctl
)
909 /* Check the PCI controller version number by readding BRR1 register */
910 version
= in_be32(pci_ctl
->cfg_addr
+ (PCI_FSL_BRR1
>> 2));
911 version
&= PCI_FSL_BRR1_VER
;
912 /* If PCI controller version is >= 0x204 we can partition endpoints*/
913 if (version
>= 0x204)
919 /* Get iommu group information from peer devices or devices on the parent bus */
920 static struct iommu_group
*get_shared_pci_device_group(struct pci_dev
*pdev
)
923 struct iommu_group
*group
;
924 struct pci_bus
*bus
= pdev
->bus
;
927 * Traverese the pci bus device list to get
928 * the shared iommu group.
931 list_for_each_entry(tmp
, &bus
->devices
, bus_list
) {
934 group
= iommu_group_get(&tmp
->dev
);
945 static struct iommu_group
*get_pci_device_group(struct pci_dev
*pdev
)
947 struct pci_controller
*pci_ctl
;
948 bool pci_endpt_partioning
;
949 struct iommu_group
*group
= NULL
;
951 pci_ctl
= pci_bus_to_host(pdev
->bus
);
952 pci_endpt_partioning
= check_pci_ctl_endpt_part(pci_ctl
);
953 /* We can partition PCIe devices so assign device group to the device */
954 if (pci_endpt_partioning
) {
955 group
= iommu_group_get_for_dev(&pdev
->dev
);
958 * PCIe controller is not a paritionable entity
959 * free the controller device iommu_group.
961 if (pci_ctl
->parent
->iommu_group
)
962 iommu_group_remove_device(pci_ctl
->parent
);
965 * All devices connected to the controller will share the
966 * PCI controllers device group. If this is the first
967 * device to be probed for the pci controller, copy the
968 * device group information from the PCI controller device
969 * node and remove the PCI controller iommu group.
970 * For subsequent devices, the iommu group information can
971 * be obtained from sibling devices (i.e. from the bus_devices
974 if (pci_ctl
->parent
->iommu_group
) {
975 group
= get_device_iommu_group(pci_ctl
->parent
);
976 iommu_group_remove_device(pci_ctl
->parent
);
978 group
= get_shared_pci_device_group(pdev
);
984 static int fsl_pamu_add_device(struct device
*dev
)
986 struct iommu_group
*group
= NULL
;
987 struct pci_dev
*pdev
;
992 * For platform devices we allocate a separate group for
993 * each of the devices.
995 if (dev_is_pci(dev
)) {
996 pdev
= to_pci_dev(dev
);
997 /* Don't create device groups for virtual PCI bridges */
998 if (pdev
->subordinate
)
1001 group
= get_pci_device_group(pdev
);
1004 prop
= of_get_property(dev
->of_node
, "fsl,liodn", &len
);
1006 group
= get_device_iommu_group(dev
);
1009 if (!group
|| IS_ERR(group
))
1010 return PTR_ERR(group
);
1012 ret
= iommu_group_add_device(group
, dev
);
1014 iommu_group_put(group
);
1018 static void fsl_pamu_remove_device(struct device
*dev
)
1020 iommu_group_remove_device(dev
);
1023 static int fsl_pamu_set_windows(struct iommu_domain
*domain
, u32 w_count
)
1025 struct fsl_dma_domain
*dma_domain
= domain
->priv
;
1026 unsigned long flags
;
1029 spin_lock_irqsave(&dma_domain
->domain_lock
, flags
);
1030 /* Ensure domain is inactive i.e. DMA should be disabled for the domain */
1031 if (dma_domain
->enabled
) {
1032 pr_debug("Can't set geometry attributes as domain is active\n");
1033 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
1037 /* Ensure that the geometry has been set for the domain */
1038 if (!dma_domain
->geom_size
) {
1039 pr_debug("Please configure geometry before setting the number of windows\n");
1040 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
1045 * Ensure we have valid window count i.e. it should be less than
1046 * maximum permissible limit and should be a power of two.
1048 if (w_count
> pamu_get_max_subwin_cnt() || !is_power_of_2(w_count
)) {
1049 pr_debug("Invalid window count\n");
1050 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
1054 ret
= pamu_set_domain_geometry(dma_domain
, &domain
->geometry
,
1055 ((w_count
> 1) ? w_count
: 0));
1057 if (dma_domain
->win_arr
)
1058 kfree(dma_domain
->win_arr
);
1059 dma_domain
->win_arr
= kzalloc(sizeof(struct dma_window
) *
1060 w_count
, GFP_ATOMIC
);
1061 if (!dma_domain
->win_arr
) {
1062 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
1065 dma_domain
->win_cnt
= w_count
;
1067 spin_unlock_irqrestore(&dma_domain
->domain_lock
, flags
);
1072 static u32
fsl_pamu_get_windows(struct iommu_domain
*domain
)
1074 struct fsl_dma_domain
*dma_domain
= domain
->priv
;
1076 return dma_domain
->win_cnt
;
1079 static struct iommu_ops fsl_pamu_ops
= {
1080 .domain_init
= fsl_pamu_domain_init
,
1081 .domain_destroy
= fsl_pamu_domain_destroy
,
1082 .attach_dev
= fsl_pamu_attach_device
,
1083 .detach_dev
= fsl_pamu_detach_device
,
1084 .domain_window_enable
= fsl_pamu_window_enable
,
1085 .domain_window_disable
= fsl_pamu_window_disable
,
1086 .domain_get_windows
= fsl_pamu_get_windows
,
1087 .domain_set_windows
= fsl_pamu_set_windows
,
1088 .iova_to_phys
= fsl_pamu_iova_to_phys
,
1089 .domain_has_cap
= fsl_pamu_domain_has_cap
,
1090 .domain_set_attr
= fsl_pamu_set_domain_attr
,
1091 .domain_get_attr
= fsl_pamu_get_domain_attr
,
1092 .add_device
= fsl_pamu_add_device
,
1093 .remove_device
= fsl_pamu_remove_device
,
1096 int pamu_domain_init()
1100 ret
= iommu_init_mempool();
1104 bus_set_iommu(&platform_bus_type
, &fsl_pamu_ops
);
1105 bus_set_iommu(&pci_bus_type
, &fsl_pamu_ops
);