Merge master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6
[deliverable/linux.git] / drivers / kvm / kvm.h
1 #ifndef __KVM_H
2 #define __KVM_H
3
4 /*
5 * This work is licensed under the terms of the GNU GPL, version 2. See
6 * the COPYING file in the top-level directory.
7 */
8
9 #include <linux/types.h>
10 #include <linux/list.h>
11 #include <linux/mutex.h>
12 #include <linux/spinlock.h>
13 #include <linux/mm.h>
14
15 #include "vmx.h"
16 #include <linux/kvm.h>
17 #include <linux/kvm_para.h>
18
19 #define CR0_PE_MASK (1ULL << 0)
20 #define CR0_TS_MASK (1ULL << 3)
21 #define CR0_NE_MASK (1ULL << 5)
22 #define CR0_WP_MASK (1ULL << 16)
23 #define CR0_NW_MASK (1ULL << 29)
24 #define CR0_CD_MASK (1ULL << 30)
25 #define CR0_PG_MASK (1ULL << 31)
26
27 #define CR3_WPT_MASK (1ULL << 3)
28 #define CR3_PCD_MASK (1ULL << 4)
29
30 #define CR3_RESEVED_BITS 0x07ULL
31 #define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) | 0x0fe7ULL)
32 #define CR3_FLAGS_MASK ((1ULL << 5) - 1)
33
34 #define CR4_VME_MASK (1ULL << 0)
35 #define CR4_PSE_MASK (1ULL << 4)
36 #define CR4_PAE_MASK (1ULL << 5)
37 #define CR4_PGE_MASK (1ULL << 7)
38 #define CR4_VMXE_MASK (1ULL << 13)
39
40 #define KVM_GUEST_CR0_MASK \
41 (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK \
42 | CR0_NW_MASK | CR0_CD_MASK)
43 #define KVM_VM_CR0_ALWAYS_ON \
44 (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK)
45 #define KVM_GUEST_CR4_MASK \
46 (CR4_PSE_MASK | CR4_PAE_MASK | CR4_PGE_MASK | CR4_VMXE_MASK | CR4_VME_MASK)
47 #define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK)
48 #define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK | CR4_VME_MASK)
49
50 #define INVALID_PAGE (~(hpa_t)0)
51 #define UNMAPPED_GVA (~(gpa_t)0)
52
53 #define KVM_MAX_VCPUS 1
54 #define KVM_MEMORY_SLOTS 4
55 #define KVM_NUM_MMU_PAGES 256
56 #define KVM_MIN_FREE_MMU_PAGES 5
57 #define KVM_REFILL_PAGES 25
58
59 #define FX_IMAGE_SIZE 512
60 #define FX_IMAGE_ALIGN 16
61 #define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN)
62
63 #define DE_VECTOR 0
64 #define DF_VECTOR 8
65 #define TS_VECTOR 10
66 #define NP_VECTOR 11
67 #define SS_VECTOR 12
68 #define GP_VECTOR 13
69 #define PF_VECTOR 14
70
71 #define SELECTOR_TI_MASK (1 << 2)
72 #define SELECTOR_RPL_MASK 0x03
73
74 #define IOPL_SHIFT 12
75
76 /*
77 * Address types:
78 *
79 * gva - guest virtual address
80 * gpa - guest physical address
81 * gfn - guest frame number
82 * hva - host virtual address
83 * hpa - host physical address
84 * hfn - host frame number
85 */
86
87 typedef unsigned long gva_t;
88 typedef u64 gpa_t;
89 typedef unsigned long gfn_t;
90
91 typedef unsigned long hva_t;
92 typedef u64 hpa_t;
93 typedef unsigned long hfn_t;
94
95 #define NR_PTE_CHAIN_ENTRIES 5
96
97 struct kvm_pte_chain {
98 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
99 struct hlist_node link;
100 };
101
102 /*
103 * kvm_mmu_page_role, below, is defined as:
104 *
105 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
106 * bits 4:7 - page table level for this shadow (1-4)
107 * bits 8:9 - page table quadrant for 2-level guests
108 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
109 */
110 union kvm_mmu_page_role {
111 unsigned word;
112 struct {
113 unsigned glevels : 4;
114 unsigned level : 4;
115 unsigned quadrant : 2;
116 unsigned pad_for_nice_hex_output : 6;
117 unsigned metaphysical : 1;
118 };
119 };
120
121 struct kvm_mmu_page {
122 struct list_head link;
123 struct hlist_node hash_link;
124
125 /*
126 * The following two entries are used to key the shadow page in the
127 * hash table.
128 */
129 gfn_t gfn;
130 union kvm_mmu_page_role role;
131
132 hpa_t page_hpa;
133 unsigned long slot_bitmap; /* One bit set per slot which has memory
134 * in this shadow page.
135 */
136 int global; /* Set if all ptes in this page are global */
137 int multimapped; /* More than one parent_pte? */
138 int root_count; /* Currently serving as active root */
139 union {
140 u64 *parent_pte; /* !multimapped */
141 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
142 };
143 };
144
145 struct vmcs {
146 u32 revision_id;
147 u32 abort;
148 char data[0];
149 };
150
151 #define vmx_msr_entry kvm_msr_entry
152
153 struct kvm_vcpu;
154
155 /*
156 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
157 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
158 * mode.
159 */
160 struct kvm_mmu {
161 void (*new_cr3)(struct kvm_vcpu *vcpu);
162 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
163 void (*free)(struct kvm_vcpu *vcpu);
164 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
165 hpa_t root_hpa;
166 int root_level;
167 int shadow_root_level;
168
169 u64 *pae_root;
170 };
171
172 #define KVM_NR_MEM_OBJS 20
173
174 struct kvm_mmu_memory_cache {
175 int nobjs;
176 void *objects[KVM_NR_MEM_OBJS];
177 };
178
179 /*
180 * We don't want allocation failures within the mmu code, so we preallocate
181 * enough memory for a single page fault in a cache.
182 */
183 struct kvm_guest_debug {
184 int enabled;
185 unsigned long bp[4];
186 int singlestep;
187 };
188
189 enum {
190 VCPU_REGS_RAX = 0,
191 VCPU_REGS_RCX = 1,
192 VCPU_REGS_RDX = 2,
193 VCPU_REGS_RBX = 3,
194 VCPU_REGS_RSP = 4,
195 VCPU_REGS_RBP = 5,
196 VCPU_REGS_RSI = 6,
197 VCPU_REGS_RDI = 7,
198 #ifdef CONFIG_X86_64
199 VCPU_REGS_R8 = 8,
200 VCPU_REGS_R9 = 9,
201 VCPU_REGS_R10 = 10,
202 VCPU_REGS_R11 = 11,
203 VCPU_REGS_R12 = 12,
204 VCPU_REGS_R13 = 13,
205 VCPU_REGS_R14 = 14,
206 VCPU_REGS_R15 = 15,
207 #endif
208 NR_VCPU_REGS
209 };
210
211 enum {
212 VCPU_SREG_CS,
213 VCPU_SREG_DS,
214 VCPU_SREG_ES,
215 VCPU_SREG_FS,
216 VCPU_SREG_GS,
217 VCPU_SREG_SS,
218 VCPU_SREG_TR,
219 VCPU_SREG_LDTR,
220 };
221
222 struct kvm_vcpu {
223 struct kvm *kvm;
224 union {
225 struct vmcs *vmcs;
226 struct vcpu_svm *svm;
227 };
228 struct mutex mutex;
229 int cpu;
230 int launched;
231 int interrupt_window_open;
232 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
233 #define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long)
234 unsigned long irq_pending[NR_IRQ_WORDS];
235 unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
236 unsigned long rip; /* needs vcpu_load_rsp_rip() */
237
238 unsigned long cr0;
239 unsigned long cr2;
240 unsigned long cr3;
241 gpa_t para_state_gpa;
242 struct page *para_state_page;
243 gpa_t hypercall_gpa;
244 unsigned long cr4;
245 unsigned long cr8;
246 u64 pdptrs[4]; /* pae */
247 u64 shadow_efer;
248 u64 apic_base;
249 u64 ia32_misc_enable_msr;
250 int nmsrs;
251 struct vmx_msr_entry *guest_msrs;
252 struct vmx_msr_entry *host_msrs;
253
254 struct list_head free_pages;
255 struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES];
256 struct kvm_mmu mmu;
257
258 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
259 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
260
261 gfn_t last_pt_write_gfn;
262 int last_pt_write_count;
263
264 struct kvm_guest_debug guest_debug;
265
266 char fx_buf[FX_BUF_SIZE];
267 char *host_fx_image;
268 char *guest_fx_image;
269
270 int mmio_needed;
271 int mmio_read_completed;
272 int mmio_is_write;
273 int mmio_size;
274 unsigned char mmio_data[8];
275 gpa_t mmio_phys_addr;
276
277 struct {
278 int active;
279 u8 save_iopl;
280 struct kvm_save_segment {
281 u16 selector;
282 unsigned long base;
283 u32 limit;
284 u32 ar;
285 } tr, es, ds, fs, gs;
286 } rmode;
287 };
288
289 struct kvm_memory_slot {
290 gfn_t base_gfn;
291 unsigned long npages;
292 unsigned long flags;
293 struct page **phys_mem;
294 unsigned long *dirty_bitmap;
295 };
296
297 struct kvm {
298 spinlock_t lock; /* protects everything except vcpus */
299 int nmemslots;
300 struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS];
301 /*
302 * Hash table of struct kvm_mmu_page.
303 */
304 struct list_head active_mmu_pages;
305 int n_free_mmu_pages;
306 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
307 struct kvm_vcpu vcpus[KVM_MAX_VCPUS];
308 int memory_config_version;
309 int busy;
310 unsigned long rmap_overflow;
311 struct list_head vm_list;
312 struct file *filp;
313 };
314
315 struct kvm_stat {
316 u32 pf_fixed;
317 u32 pf_guest;
318 u32 tlb_flush;
319 u32 invlpg;
320
321 u32 exits;
322 u32 io_exits;
323 u32 mmio_exits;
324 u32 signal_exits;
325 u32 irq_window_exits;
326 u32 halt_exits;
327 u32 request_irq_exits;
328 u32 irq_exits;
329 };
330
331 struct descriptor_table {
332 u16 limit;
333 unsigned long base;
334 } __attribute__((packed));
335
336 struct kvm_arch_ops {
337 int (*cpu_has_kvm_support)(void); /* __init */
338 int (*disabled_by_bios)(void); /* __init */
339 void (*hardware_enable)(void *dummy); /* __init */
340 void (*hardware_disable)(void *dummy);
341 int (*hardware_setup)(void); /* __init */
342 void (*hardware_unsetup)(void); /* __exit */
343
344 int (*vcpu_create)(struct kvm_vcpu *vcpu);
345 void (*vcpu_free)(struct kvm_vcpu *vcpu);
346
347 void (*vcpu_load)(struct kvm_vcpu *vcpu);
348 void (*vcpu_put)(struct kvm_vcpu *vcpu);
349 void (*vcpu_decache)(struct kvm_vcpu *vcpu);
350
351 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
352 struct kvm_debug_guest *dbg);
353 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
354 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
355 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
356 void (*get_segment)(struct kvm_vcpu *vcpu,
357 struct kvm_segment *var, int seg);
358 void (*set_segment)(struct kvm_vcpu *vcpu,
359 struct kvm_segment *var, int seg);
360 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
361 void (*decache_cr0_cr4_guest_bits)(struct kvm_vcpu *vcpu);
362 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
363 void (*set_cr0_no_modeswitch)(struct kvm_vcpu *vcpu,
364 unsigned long cr0);
365 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
366 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
367 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
368 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
369 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
370 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
371 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
372 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
373 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
374 int *exception);
375 void (*cache_regs)(struct kvm_vcpu *vcpu);
376 void (*decache_regs)(struct kvm_vcpu *vcpu);
377 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
378 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
379
380 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t addr);
381 void (*tlb_flush)(struct kvm_vcpu *vcpu);
382 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
383 unsigned long addr, u32 err_code);
384
385 void (*inject_gp)(struct kvm_vcpu *vcpu, unsigned err_code);
386
387 int (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
388 int (*vcpu_setup)(struct kvm_vcpu *vcpu);
389 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
390 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
391 unsigned char *hypercall_addr);
392 };
393
394 extern struct kvm_stat kvm_stat;
395 extern struct kvm_arch_ops *kvm_arch_ops;
396
397 #define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt)
398 #define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt)
399
400 int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module);
401 void kvm_exit_arch(void);
402
403 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
404 int kvm_mmu_create(struct kvm_vcpu *vcpu);
405 int kvm_mmu_setup(struct kvm_vcpu *vcpu);
406
407 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
408 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot);
409
410 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa);
411 #define HPA_MSB ((sizeof(hpa_t) * 8) - 1)
412 #define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB)
413 static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; }
414 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva);
415
416 void kvm_emulator_want_group7_invlpg(void);
417
418 extern hpa_t bad_page_address;
419
420 static inline struct page *gfn_to_page(struct kvm_memory_slot *slot, gfn_t gfn)
421 {
422 return slot->phys_mem[gfn - slot->base_gfn];
423 }
424
425 struct kvm_memory_slot *gfn_to_memslot(struct kvm *kvm, gfn_t gfn);
426 void mark_page_dirty(struct kvm *kvm, gfn_t gfn);
427
428 enum emulation_result {
429 EMULATE_DONE, /* no further processing */
430 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
431 EMULATE_FAIL, /* can't emulate this instruction */
432 };
433
434 int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
435 unsigned long cr2, u16 error_code);
436 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
437 void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
438 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
439 unsigned long *rflags);
440
441 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
442 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
443 unsigned long *rflags);
444
445 struct x86_emulate_ctxt;
446
447 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
448 int emulate_clts(struct kvm_vcpu *vcpu);
449 int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr,
450 unsigned long *dest);
451 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
452 unsigned long value);
453
454 void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
455 void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
456 void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
457 void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
458 void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
459
460 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
461 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
462
463 void fx_init(struct kvm_vcpu *vcpu);
464
465 void load_msrs(struct vmx_msr_entry *e, int n);
466 void save_msrs(struct vmx_msr_entry *e, int n);
467 void kvm_resched(struct kvm_vcpu *vcpu);
468
469 int kvm_read_guest(struct kvm_vcpu *vcpu,
470 gva_t addr,
471 unsigned long size,
472 void *dest);
473
474 int kvm_write_guest(struct kvm_vcpu *vcpu,
475 gva_t addr,
476 unsigned long size,
477 void *data);
478
479 unsigned long segment_base(u16 selector);
480
481 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
482 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
483 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
484 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
485
486 int kvm_hypercall(struct kvm_vcpu *vcpu, struct kvm_run *run);
487
488 static inline int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
489 u32 error_code)
490 {
491 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
492 kvm_mmu_free_some_pages(vcpu);
493 return vcpu->mmu.page_fault(vcpu, gva, error_code);
494 }
495
496 static inline struct page *_gfn_to_page(struct kvm *kvm, gfn_t gfn)
497 {
498 struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
499 return (slot) ? slot->phys_mem[gfn - slot->base_gfn] : NULL;
500 }
501
502 static inline int is_long_mode(struct kvm_vcpu *vcpu)
503 {
504 #ifdef CONFIG_X86_64
505 return vcpu->shadow_efer & EFER_LME;
506 #else
507 return 0;
508 #endif
509 }
510
511 static inline int is_pae(struct kvm_vcpu *vcpu)
512 {
513 return vcpu->cr4 & CR4_PAE_MASK;
514 }
515
516 static inline int is_pse(struct kvm_vcpu *vcpu)
517 {
518 return vcpu->cr4 & CR4_PSE_MASK;
519 }
520
521 static inline int is_paging(struct kvm_vcpu *vcpu)
522 {
523 return vcpu->cr0 & CR0_PG_MASK;
524 }
525
526 static inline int memslot_id(struct kvm *kvm, struct kvm_memory_slot *slot)
527 {
528 return slot - kvm->memslots;
529 }
530
531 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
532 {
533 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
534
535 return (struct kvm_mmu_page *)page_private(page);
536 }
537
538 static inline u16 read_fs(void)
539 {
540 u16 seg;
541 asm ("mov %%fs, %0" : "=g"(seg));
542 return seg;
543 }
544
545 static inline u16 read_gs(void)
546 {
547 u16 seg;
548 asm ("mov %%gs, %0" : "=g"(seg));
549 return seg;
550 }
551
552 static inline u16 read_ldt(void)
553 {
554 u16 ldt;
555 asm ("sldt %0" : "=g"(ldt));
556 return ldt;
557 }
558
559 static inline void load_fs(u16 sel)
560 {
561 asm ("mov %0, %%fs" : : "rm"(sel));
562 }
563
564 static inline void load_gs(u16 sel)
565 {
566 asm ("mov %0, %%gs" : : "rm"(sel));
567 }
568
569 #ifndef load_ldt
570 static inline void load_ldt(u16 sel)
571 {
572 asm ("lldt %0" : : "rm"(sel));
573 }
574 #endif
575
576 static inline void get_idt(struct descriptor_table *table)
577 {
578 asm ("sidt %0" : "=m"(*table));
579 }
580
581 static inline void get_gdt(struct descriptor_table *table)
582 {
583 asm ("sgdt %0" : "=m"(*table));
584 }
585
586 static inline unsigned long read_tr_base(void)
587 {
588 u16 tr;
589 asm ("str %0" : "=g"(tr));
590 return segment_base(tr);
591 }
592
593 #ifdef CONFIG_X86_64
594 static inline unsigned long read_msr(unsigned long msr)
595 {
596 u64 value;
597
598 rdmsrl(msr, value);
599 return value;
600 }
601 #endif
602
603 static inline void fx_save(void *image)
604 {
605 asm ("fxsave (%0)":: "r" (image));
606 }
607
608 static inline void fx_restore(void *image)
609 {
610 asm ("fxrstor (%0)":: "r" (image));
611 }
612
613 static inline void fpu_init(void)
614 {
615 asm ("finit");
616 }
617
618 static inline u32 get_rdx_init_val(void)
619 {
620 return 0x600; /* P6 family */
621 }
622
623 #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
624 #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
625 #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
626 #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
627 #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
628 #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
629 #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
630 #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
631 #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
632
633 #define MSR_IA32_TIME_STAMP_COUNTER 0x010
634
635 #define TSS_IOPB_BASE_OFFSET 0x66
636 #define TSS_BASE_SIZE 0x68
637 #define TSS_IOPB_SIZE (65536 / 8)
638 #define TSS_REDIRECTION_SIZE (256 / 8)
639 #define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
640
641 #endif
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