[PATCH] KVM: MMU: Never free a shadow page actively serving as a root
[deliverable/linux.git] / drivers / kvm / kvm.h
1 #ifndef __KVM_H
2 #define __KVM_H
3
4 /*
5 * This work is licensed under the terms of the GNU GPL, version 2. See
6 * the COPYING file in the top-level directory.
7 */
8
9 #include <linux/types.h>
10 #include <linux/list.h>
11 #include <linux/mutex.h>
12 #include <linux/spinlock.h>
13 #include <linux/mm.h>
14
15 #include "vmx.h"
16 #include <linux/kvm.h>
17
18 #define CR0_PE_MASK (1ULL << 0)
19 #define CR0_TS_MASK (1ULL << 3)
20 #define CR0_NE_MASK (1ULL << 5)
21 #define CR0_WP_MASK (1ULL << 16)
22 #define CR0_NW_MASK (1ULL << 29)
23 #define CR0_CD_MASK (1ULL << 30)
24 #define CR0_PG_MASK (1ULL << 31)
25
26 #define CR3_WPT_MASK (1ULL << 3)
27 #define CR3_PCD_MASK (1ULL << 4)
28
29 #define CR3_RESEVED_BITS 0x07ULL
30 #define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) | 0x0fe7ULL)
31 #define CR3_FLAGS_MASK ((1ULL << 5) - 1)
32
33 #define CR4_VME_MASK (1ULL << 0)
34 #define CR4_PSE_MASK (1ULL << 4)
35 #define CR4_PAE_MASK (1ULL << 5)
36 #define CR4_PGE_MASK (1ULL << 7)
37 #define CR4_VMXE_MASK (1ULL << 13)
38
39 #define KVM_GUEST_CR0_MASK \
40 (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK \
41 | CR0_NW_MASK | CR0_CD_MASK)
42 #define KVM_VM_CR0_ALWAYS_ON \
43 (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK)
44 #define KVM_GUEST_CR4_MASK \
45 (CR4_PSE_MASK | CR4_PAE_MASK | CR4_PGE_MASK | CR4_VMXE_MASK | CR4_VME_MASK)
46 #define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK)
47 #define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK | CR4_VME_MASK)
48
49 #define INVALID_PAGE (~(hpa_t)0)
50 #define UNMAPPED_GVA (~(gpa_t)0)
51
52 #define KVM_MAX_VCPUS 1
53 #define KVM_MEMORY_SLOTS 4
54 #define KVM_NUM_MMU_PAGES 256
55 #define KVM_MIN_FREE_MMU_PAGES 5
56 #define KVM_REFILL_PAGES 25
57
58 #define FX_IMAGE_SIZE 512
59 #define FX_IMAGE_ALIGN 16
60 #define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN)
61
62 #define DE_VECTOR 0
63 #define DF_VECTOR 8
64 #define TS_VECTOR 10
65 #define NP_VECTOR 11
66 #define SS_VECTOR 12
67 #define GP_VECTOR 13
68 #define PF_VECTOR 14
69
70 #define SELECTOR_TI_MASK (1 << 2)
71 #define SELECTOR_RPL_MASK 0x03
72
73 #define IOPL_SHIFT 12
74
75 /*
76 * Address types:
77 *
78 * gva - guest virtual address
79 * gpa - guest physical address
80 * gfn - guest frame number
81 * hva - host virtual address
82 * hpa - host physical address
83 * hfn - host frame number
84 */
85
86 typedef unsigned long gva_t;
87 typedef u64 gpa_t;
88 typedef unsigned long gfn_t;
89
90 typedef unsigned long hva_t;
91 typedef u64 hpa_t;
92 typedef unsigned long hfn_t;
93
94 #define NR_PTE_CHAIN_ENTRIES 5
95
96 struct kvm_pte_chain {
97 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
98 struct hlist_node link;
99 };
100
101 /*
102 * kvm_mmu_page_role, below, is defined as:
103 *
104 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
105 * bits 4:7 - page table level for this shadow (1-4)
106 * bits 8:9 - page table quadrant for 2-level guests
107 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
108 */
109 union kvm_mmu_page_role {
110 unsigned word;
111 struct {
112 unsigned glevels : 4;
113 unsigned level : 4;
114 unsigned quadrant : 2;
115 unsigned pad_for_nice_hex_output : 6;
116 unsigned metaphysical : 1;
117 };
118 };
119
120 struct kvm_mmu_page {
121 struct list_head link;
122 struct hlist_node hash_link;
123
124 /*
125 * The following two entries are used to key the shadow page in the
126 * hash table.
127 */
128 gfn_t gfn;
129 union kvm_mmu_page_role role;
130
131 hpa_t page_hpa;
132 unsigned long slot_bitmap; /* One bit set per slot which has memory
133 * in this shadow page.
134 */
135 int global; /* Set if all ptes in this page are global */
136 int multimapped; /* More than one parent_pte? */
137 int root_count; /* Currently serving as active root */
138 union {
139 u64 *parent_pte; /* !multimapped */
140 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
141 };
142 };
143
144 struct vmcs {
145 u32 revision_id;
146 u32 abort;
147 char data[0];
148 };
149
150 #define vmx_msr_entry kvm_msr_entry
151
152 struct kvm_vcpu;
153
154 /*
155 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
156 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
157 * mode.
158 */
159 struct kvm_mmu {
160 void (*new_cr3)(struct kvm_vcpu *vcpu);
161 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
162 void (*free)(struct kvm_vcpu *vcpu);
163 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
164 hpa_t root_hpa;
165 int root_level;
166 int shadow_root_level;
167
168 u64 *pae_root;
169 };
170
171 struct kvm_guest_debug {
172 int enabled;
173 unsigned long bp[4];
174 int singlestep;
175 };
176
177 enum {
178 VCPU_REGS_RAX = 0,
179 VCPU_REGS_RCX = 1,
180 VCPU_REGS_RDX = 2,
181 VCPU_REGS_RBX = 3,
182 VCPU_REGS_RSP = 4,
183 VCPU_REGS_RBP = 5,
184 VCPU_REGS_RSI = 6,
185 VCPU_REGS_RDI = 7,
186 #ifdef CONFIG_X86_64
187 VCPU_REGS_R8 = 8,
188 VCPU_REGS_R9 = 9,
189 VCPU_REGS_R10 = 10,
190 VCPU_REGS_R11 = 11,
191 VCPU_REGS_R12 = 12,
192 VCPU_REGS_R13 = 13,
193 VCPU_REGS_R14 = 14,
194 VCPU_REGS_R15 = 15,
195 #endif
196 NR_VCPU_REGS
197 };
198
199 enum {
200 VCPU_SREG_CS,
201 VCPU_SREG_DS,
202 VCPU_SREG_ES,
203 VCPU_SREG_FS,
204 VCPU_SREG_GS,
205 VCPU_SREG_SS,
206 VCPU_SREG_TR,
207 VCPU_SREG_LDTR,
208 };
209
210 struct kvm_vcpu {
211 struct kvm *kvm;
212 union {
213 struct vmcs *vmcs;
214 struct vcpu_svm *svm;
215 };
216 struct mutex mutex;
217 int cpu;
218 int launched;
219 int interrupt_window_open;
220 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
221 #define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long)
222 unsigned long irq_pending[NR_IRQ_WORDS];
223 unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
224 unsigned long rip; /* needs vcpu_load_rsp_rip() */
225
226 unsigned long cr0;
227 unsigned long cr2;
228 unsigned long cr3;
229 unsigned long cr4;
230 unsigned long cr8;
231 u64 pdptrs[4]; /* pae */
232 u64 shadow_efer;
233 u64 apic_base;
234 int nmsrs;
235 struct vmx_msr_entry *guest_msrs;
236 struct vmx_msr_entry *host_msrs;
237
238 struct list_head free_pages;
239 struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES];
240 struct kvm_mmu mmu;
241
242 gfn_t last_pt_write_gfn;
243 int last_pt_write_count;
244
245 struct kvm_guest_debug guest_debug;
246
247 char fx_buf[FX_BUF_SIZE];
248 char *host_fx_image;
249 char *guest_fx_image;
250
251 int mmio_needed;
252 int mmio_read_completed;
253 int mmio_is_write;
254 int mmio_size;
255 unsigned char mmio_data[8];
256 gpa_t mmio_phys_addr;
257
258 struct {
259 int active;
260 u8 save_iopl;
261 struct kvm_save_segment {
262 u16 selector;
263 unsigned long base;
264 u32 limit;
265 u32 ar;
266 } tr, es, ds, fs, gs;
267 } rmode;
268 };
269
270 struct kvm_memory_slot {
271 gfn_t base_gfn;
272 unsigned long npages;
273 unsigned long flags;
274 struct page **phys_mem;
275 unsigned long *dirty_bitmap;
276 };
277
278 struct kvm {
279 spinlock_t lock; /* protects everything except vcpus */
280 int nmemslots;
281 struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS];
282 /*
283 * Hash table of struct kvm_mmu_page.
284 */
285 struct list_head active_mmu_pages;
286 int n_free_mmu_pages;
287 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
288 struct kvm_vcpu vcpus[KVM_MAX_VCPUS];
289 int memory_config_version;
290 int busy;
291 unsigned long rmap_overflow;
292 };
293
294 struct kvm_stat {
295 u32 pf_fixed;
296 u32 pf_guest;
297 u32 tlb_flush;
298 u32 invlpg;
299
300 u32 exits;
301 u32 io_exits;
302 u32 mmio_exits;
303 u32 signal_exits;
304 u32 irq_window_exits;
305 u32 halt_exits;
306 u32 request_irq_exits;
307 u32 irq_exits;
308 };
309
310 struct descriptor_table {
311 u16 limit;
312 unsigned long base;
313 } __attribute__((packed));
314
315 struct kvm_arch_ops {
316 int (*cpu_has_kvm_support)(void); /* __init */
317 int (*disabled_by_bios)(void); /* __init */
318 void (*hardware_enable)(void *dummy); /* __init */
319 void (*hardware_disable)(void *dummy);
320 int (*hardware_setup)(void); /* __init */
321 void (*hardware_unsetup)(void); /* __exit */
322
323 int (*vcpu_create)(struct kvm_vcpu *vcpu);
324 void (*vcpu_free)(struct kvm_vcpu *vcpu);
325
326 struct kvm_vcpu *(*vcpu_load)(struct kvm_vcpu *vcpu);
327 void (*vcpu_put)(struct kvm_vcpu *vcpu);
328
329 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
330 struct kvm_debug_guest *dbg);
331 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
332 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
333 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
334 void (*get_segment)(struct kvm_vcpu *vcpu,
335 struct kvm_segment *var, int seg);
336 void (*set_segment)(struct kvm_vcpu *vcpu,
337 struct kvm_segment *var, int seg);
338 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
339 void (*decache_cr0_cr4_guest_bits)(struct kvm_vcpu *vcpu);
340 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
341 void (*set_cr0_no_modeswitch)(struct kvm_vcpu *vcpu,
342 unsigned long cr0);
343 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
344 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
345 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
346 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
347 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
348 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
349 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
350 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
351 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
352 int *exception);
353 void (*cache_regs)(struct kvm_vcpu *vcpu);
354 void (*decache_regs)(struct kvm_vcpu *vcpu);
355 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
356 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
357
358 void (*invlpg)(struct kvm_vcpu *vcpu, gva_t addr);
359 void (*tlb_flush)(struct kvm_vcpu *vcpu);
360 void (*inject_page_fault)(struct kvm_vcpu *vcpu,
361 unsigned long addr, u32 err_code);
362
363 void (*inject_gp)(struct kvm_vcpu *vcpu, unsigned err_code);
364
365 int (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
366 int (*vcpu_setup)(struct kvm_vcpu *vcpu);
367 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
368 };
369
370 extern struct kvm_stat kvm_stat;
371 extern struct kvm_arch_ops *kvm_arch_ops;
372
373 #define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt)
374 #define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt)
375
376 int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module);
377 void kvm_exit_arch(void);
378
379 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
380 int kvm_mmu_create(struct kvm_vcpu *vcpu);
381 int kvm_mmu_setup(struct kvm_vcpu *vcpu);
382
383 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
384 void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
385
386 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa);
387 #define HPA_MSB ((sizeof(hpa_t) * 8) - 1)
388 #define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB)
389 static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; }
390 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva);
391
392 void kvm_emulator_want_group7_invlpg(void);
393
394 extern hpa_t bad_page_address;
395
396 static inline struct page *gfn_to_page(struct kvm_memory_slot *slot, gfn_t gfn)
397 {
398 return slot->phys_mem[gfn - slot->base_gfn];
399 }
400
401 struct kvm_memory_slot *gfn_to_memslot(struct kvm *kvm, gfn_t gfn);
402 void mark_page_dirty(struct kvm *kvm, gfn_t gfn);
403
404 enum emulation_result {
405 EMULATE_DONE, /* no further processing */
406 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
407 EMULATE_FAIL, /* can't emulate this instruction */
408 };
409
410 int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
411 unsigned long cr2, u16 error_code);
412 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
413 void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
414 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
415 unsigned long *rflags);
416
417 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
418 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
419 unsigned long *rflags);
420
421 struct x86_emulate_ctxt;
422
423 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
424 int emulate_clts(struct kvm_vcpu *vcpu);
425 int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr,
426 unsigned long *dest);
427 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
428 unsigned long value);
429
430 void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
431 void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
432 void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
433 void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
434 void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
435
436 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
437 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
438
439 void fx_init(struct kvm_vcpu *vcpu);
440
441 void load_msrs(struct vmx_msr_entry *e, int n);
442 void save_msrs(struct vmx_msr_entry *e, int n);
443 void kvm_resched(struct kvm_vcpu *vcpu);
444
445 int kvm_read_guest(struct kvm_vcpu *vcpu,
446 gva_t addr,
447 unsigned long size,
448 void *dest);
449
450 int kvm_write_guest(struct kvm_vcpu *vcpu,
451 gva_t addr,
452 unsigned long size,
453 void *data);
454
455 unsigned long segment_base(u16 selector);
456
457 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
458 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
459 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
460 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
461
462 static inline int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
463 u32 error_code)
464 {
465 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
466 kvm_mmu_free_some_pages(vcpu);
467 return vcpu->mmu.page_fault(vcpu, gva, error_code);
468 }
469
470 static inline struct page *_gfn_to_page(struct kvm *kvm, gfn_t gfn)
471 {
472 struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
473 return (slot) ? slot->phys_mem[gfn - slot->base_gfn] : NULL;
474 }
475
476 static inline int is_long_mode(struct kvm_vcpu *vcpu)
477 {
478 #ifdef CONFIG_X86_64
479 return vcpu->shadow_efer & EFER_LME;
480 #else
481 return 0;
482 #endif
483 }
484
485 static inline int is_pae(struct kvm_vcpu *vcpu)
486 {
487 return vcpu->cr4 & CR4_PAE_MASK;
488 }
489
490 static inline int is_pse(struct kvm_vcpu *vcpu)
491 {
492 return vcpu->cr4 & CR4_PSE_MASK;
493 }
494
495 static inline int is_paging(struct kvm_vcpu *vcpu)
496 {
497 return vcpu->cr0 & CR0_PG_MASK;
498 }
499
500 static inline int memslot_id(struct kvm *kvm, struct kvm_memory_slot *slot)
501 {
502 return slot - kvm->memslots;
503 }
504
505 static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
506 {
507 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
508
509 return (struct kvm_mmu_page *)page->private;
510 }
511
512 static inline u16 read_fs(void)
513 {
514 u16 seg;
515 asm ("mov %%fs, %0" : "=g"(seg));
516 return seg;
517 }
518
519 static inline u16 read_gs(void)
520 {
521 u16 seg;
522 asm ("mov %%gs, %0" : "=g"(seg));
523 return seg;
524 }
525
526 static inline u16 read_ldt(void)
527 {
528 u16 ldt;
529 asm ("sldt %0" : "=g"(ldt));
530 return ldt;
531 }
532
533 static inline void load_fs(u16 sel)
534 {
535 asm ("mov %0, %%fs" : : "rm"(sel));
536 }
537
538 static inline void load_gs(u16 sel)
539 {
540 asm ("mov %0, %%gs" : : "rm"(sel));
541 }
542
543 #ifndef load_ldt
544 static inline void load_ldt(u16 sel)
545 {
546 asm ("lldt %0" : : "g"(sel));
547 }
548 #endif
549
550 static inline void get_idt(struct descriptor_table *table)
551 {
552 asm ("sidt %0" : "=m"(*table));
553 }
554
555 static inline void get_gdt(struct descriptor_table *table)
556 {
557 asm ("sgdt %0" : "=m"(*table));
558 }
559
560 static inline unsigned long read_tr_base(void)
561 {
562 u16 tr;
563 asm ("str %0" : "=g"(tr));
564 return segment_base(tr);
565 }
566
567 #ifdef CONFIG_X86_64
568 static inline unsigned long read_msr(unsigned long msr)
569 {
570 u64 value;
571
572 rdmsrl(msr, value);
573 return value;
574 }
575 #endif
576
577 static inline void fx_save(void *image)
578 {
579 asm ("fxsave (%0)":: "r" (image));
580 }
581
582 static inline void fx_restore(void *image)
583 {
584 asm ("fxrstor (%0)":: "r" (image));
585 }
586
587 static inline void fpu_init(void)
588 {
589 asm ("finit");
590 }
591
592 static inline u32 get_rdx_init_val(void)
593 {
594 return 0x600; /* P6 family */
595 }
596
597 #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
598 #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
599 #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
600 #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
601 #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
602 #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
603 #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
604 #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
605 #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
606
607 #define MSR_IA32_TIME_STAMP_COUNTER 0x010
608
609 #define TSS_IOPB_BASE_OFFSET 0x66
610 #define TSS_BASE_SIZE 0x68
611 #define TSS_IOPB_SIZE (65536 / 8)
612 #define TSS_REDIRECTION_SIZE (256 / 8)
613 #define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
614
615 #endif
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