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KVM: Use list_move()
[deliverable/linux.git] / drivers / kvm / mmu.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <asm/page.h>
22 #include <linux/mm.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
25
26 #include "vmx.h"
27 #include "kvm.h"
28
29 #undef MMU_DEBUG
30
31 #undef AUDIT
32
33 #ifdef AUDIT
34 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
35 #else
36 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
37 #endif
38
39 #ifdef MMU_DEBUG
40
41 #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
42 #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
43
44 #else
45
46 #define pgprintk(x...) do { } while (0)
47 #define rmap_printk(x...) do { } while (0)
48
49 #endif
50
51 #if defined(MMU_DEBUG) || defined(AUDIT)
52 static int dbg = 1;
53 #endif
54
55 #define ASSERT(x) \
56 if (!(x)) { \
57 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
58 __FILE__, __LINE__, #x); \
59 }
60
61 #define PT64_PT_BITS 9
62 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
63 #define PT32_PT_BITS 10
64 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
65
66 #define PT_WRITABLE_SHIFT 1
67
68 #define PT_PRESENT_MASK (1ULL << 0)
69 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
70 #define PT_USER_MASK (1ULL << 2)
71 #define PT_PWT_MASK (1ULL << 3)
72 #define PT_PCD_MASK (1ULL << 4)
73 #define PT_ACCESSED_MASK (1ULL << 5)
74 #define PT_DIRTY_MASK (1ULL << 6)
75 #define PT_PAGE_SIZE_MASK (1ULL << 7)
76 #define PT_PAT_MASK (1ULL << 7)
77 #define PT_GLOBAL_MASK (1ULL << 8)
78 #define PT64_NX_MASK (1ULL << 63)
79
80 #define PT_PAT_SHIFT 7
81 #define PT_DIR_PAT_SHIFT 12
82 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
83
84 #define PT32_DIR_PSE36_SIZE 4
85 #define PT32_DIR_PSE36_SHIFT 13
86 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
87
88
89 #define PT32_PTE_COPY_MASK \
90 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
91
92 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
93
94 #define PT_FIRST_AVAIL_BITS_SHIFT 9
95 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
96
97 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
98 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
99
100 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
101 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
102
103 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
104 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
105
106 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
107
108 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
109
110 #define PT64_LEVEL_BITS 9
111
112 #define PT64_LEVEL_SHIFT(level) \
113 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
114
115 #define PT64_LEVEL_MASK(level) \
116 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
117
118 #define PT64_INDEX(address, level)\
119 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
120
121
122 #define PT32_LEVEL_BITS 10
123
124 #define PT32_LEVEL_SHIFT(level) \
125 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
126
127 #define PT32_LEVEL_MASK(level) \
128 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
129
130 #define PT32_INDEX(address, level)\
131 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
132
133
134 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
135 #define PT64_DIR_BASE_ADDR_MASK \
136 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
137
138 #define PT32_BASE_ADDR_MASK PAGE_MASK
139 #define PT32_DIR_BASE_ADDR_MASK \
140 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
141
142
143 #define PFERR_PRESENT_MASK (1U << 0)
144 #define PFERR_WRITE_MASK (1U << 1)
145 #define PFERR_USER_MASK (1U << 2)
146 #define PFERR_FETCH_MASK (1U << 4)
147
148 #define PT64_ROOT_LEVEL 4
149 #define PT32_ROOT_LEVEL 2
150 #define PT32E_ROOT_LEVEL 3
151
152 #define PT_DIRECTORY_LEVEL 2
153 #define PT_PAGE_TABLE_LEVEL 1
154
155 #define RMAP_EXT 4
156
157 struct kvm_rmap_desc {
158 u64 *shadow_ptes[RMAP_EXT];
159 struct kvm_rmap_desc *more;
160 };
161
162 static int is_write_protection(struct kvm_vcpu *vcpu)
163 {
164 return vcpu->cr0 & CR0_WP_MASK;
165 }
166
167 static int is_cpuid_PSE36(void)
168 {
169 return 1;
170 }
171
172 static int is_nx(struct kvm_vcpu *vcpu)
173 {
174 return vcpu->shadow_efer & EFER_NX;
175 }
176
177 static int is_present_pte(unsigned long pte)
178 {
179 return pte & PT_PRESENT_MASK;
180 }
181
182 static int is_writeble_pte(unsigned long pte)
183 {
184 return pte & PT_WRITABLE_MASK;
185 }
186
187 static int is_io_pte(unsigned long pte)
188 {
189 return pte & PT_SHADOW_IO_MARK;
190 }
191
192 static int is_rmap_pte(u64 pte)
193 {
194 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
195 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
196 }
197
198 static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
199 size_t objsize, int min)
200 {
201 void *obj;
202
203 if (cache->nobjs >= min)
204 return 0;
205 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
206 obj = kzalloc(objsize, GFP_NOWAIT);
207 if (!obj)
208 return -ENOMEM;
209 cache->objects[cache->nobjs++] = obj;
210 }
211 return 0;
212 }
213
214 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
215 {
216 while (mc->nobjs)
217 kfree(mc->objects[--mc->nobjs]);
218 }
219
220 static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
221 {
222 int r;
223
224 r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
225 sizeof(struct kvm_pte_chain), 4);
226 if (r)
227 goto out;
228 r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
229 sizeof(struct kvm_rmap_desc), 1);
230 out:
231 return r;
232 }
233
234 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
235 {
236 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
237 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
238 }
239
240 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
241 size_t size)
242 {
243 void *p;
244
245 BUG_ON(!mc->nobjs);
246 p = mc->objects[--mc->nobjs];
247 memset(p, 0, size);
248 return p;
249 }
250
251 static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
252 {
253 if (mc->nobjs < KVM_NR_MEM_OBJS)
254 mc->objects[mc->nobjs++] = obj;
255 else
256 kfree(obj);
257 }
258
259 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
260 {
261 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
262 sizeof(struct kvm_pte_chain));
263 }
264
265 static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
266 struct kvm_pte_chain *pc)
267 {
268 mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
269 }
270
271 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
272 {
273 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
274 sizeof(struct kvm_rmap_desc));
275 }
276
277 static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
278 struct kvm_rmap_desc *rd)
279 {
280 mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
281 }
282
283 /*
284 * Reverse mapping data structures:
285 *
286 * If page->private bit zero is zero, then page->private points to the
287 * shadow page table entry that points to page_address(page).
288 *
289 * If page->private bit zero is one, (then page->private & ~1) points
290 * to a struct kvm_rmap_desc containing more mappings.
291 */
292 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
293 {
294 struct page *page;
295 struct kvm_rmap_desc *desc;
296 int i;
297
298 if (!is_rmap_pte(*spte))
299 return;
300 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
301 if (!page_private(page)) {
302 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
303 set_page_private(page,(unsigned long)spte);
304 } else if (!(page_private(page) & 1)) {
305 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
306 desc = mmu_alloc_rmap_desc(vcpu);
307 desc->shadow_ptes[0] = (u64 *)page_private(page);
308 desc->shadow_ptes[1] = spte;
309 set_page_private(page,(unsigned long)desc | 1);
310 } else {
311 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
312 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
313 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
314 desc = desc->more;
315 if (desc->shadow_ptes[RMAP_EXT-1]) {
316 desc->more = mmu_alloc_rmap_desc(vcpu);
317 desc = desc->more;
318 }
319 for (i = 0; desc->shadow_ptes[i]; ++i)
320 ;
321 desc->shadow_ptes[i] = spte;
322 }
323 }
324
325 static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
326 struct page *page,
327 struct kvm_rmap_desc *desc,
328 int i,
329 struct kvm_rmap_desc *prev_desc)
330 {
331 int j;
332
333 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
334 ;
335 desc->shadow_ptes[i] = desc->shadow_ptes[j];
336 desc->shadow_ptes[j] = NULL;
337 if (j != 0)
338 return;
339 if (!prev_desc && !desc->more)
340 set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
341 else
342 if (prev_desc)
343 prev_desc->more = desc->more;
344 else
345 set_page_private(page,(unsigned long)desc->more | 1);
346 mmu_free_rmap_desc(vcpu, desc);
347 }
348
349 static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
350 {
351 struct page *page;
352 struct kvm_rmap_desc *desc;
353 struct kvm_rmap_desc *prev_desc;
354 int i;
355
356 if (!is_rmap_pte(*spte))
357 return;
358 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
359 if (!page_private(page)) {
360 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
361 BUG();
362 } else if (!(page_private(page) & 1)) {
363 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
364 if ((u64 *)page_private(page) != spte) {
365 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
366 spte, *spte);
367 BUG();
368 }
369 set_page_private(page,0);
370 } else {
371 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
372 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
373 prev_desc = NULL;
374 while (desc) {
375 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
376 if (desc->shadow_ptes[i] == spte) {
377 rmap_desc_remove_entry(vcpu, page,
378 desc, i,
379 prev_desc);
380 return;
381 }
382 prev_desc = desc;
383 desc = desc->more;
384 }
385 BUG();
386 }
387 }
388
389 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
390 {
391 struct kvm *kvm = vcpu->kvm;
392 struct page *page;
393 struct kvm_memory_slot *slot;
394 struct kvm_rmap_desc *desc;
395 u64 *spte;
396
397 slot = gfn_to_memslot(kvm, gfn);
398 BUG_ON(!slot);
399 page = gfn_to_page(slot, gfn);
400
401 while (page_private(page)) {
402 if (!(page_private(page) & 1))
403 spte = (u64 *)page_private(page);
404 else {
405 desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
406 spte = desc->shadow_ptes[0];
407 }
408 BUG_ON(!spte);
409 BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
410 != page_to_pfn(page));
411 BUG_ON(!(*spte & PT_PRESENT_MASK));
412 BUG_ON(!(*spte & PT_WRITABLE_MASK));
413 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
414 rmap_remove(vcpu, spte);
415 kvm_arch_ops->tlb_flush(vcpu);
416 *spte &= ~(u64)PT_WRITABLE_MASK;
417 }
418 }
419
420 static int is_empty_shadow_page(hpa_t page_hpa)
421 {
422 u64 *pos;
423 u64 *end;
424
425 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64);
426 pos != end; pos++)
427 if (*pos != 0) {
428 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
429 pos, *pos);
430 return 0;
431 }
432 return 1;
433 }
434
435 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
436 {
437 struct kvm_mmu_page *page_head = page_header(page_hpa);
438
439 ASSERT(is_empty_shadow_page(page_hpa));
440 page_head->page_hpa = page_hpa;
441 list_move(&page_head->link, &vcpu->free_pages);
442 ++vcpu->kvm->n_free_mmu_pages;
443 }
444
445 static unsigned kvm_page_table_hashfn(gfn_t gfn)
446 {
447 return gfn;
448 }
449
450 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
451 u64 *parent_pte)
452 {
453 struct kvm_mmu_page *page;
454
455 if (list_empty(&vcpu->free_pages))
456 return NULL;
457
458 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
459 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
460 ASSERT(is_empty_shadow_page(page->page_hpa));
461 page->slot_bitmap = 0;
462 page->multimapped = 0;
463 page->parent_pte = parent_pte;
464 --vcpu->kvm->n_free_mmu_pages;
465 return page;
466 }
467
468 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
469 struct kvm_mmu_page *page, u64 *parent_pte)
470 {
471 struct kvm_pte_chain *pte_chain;
472 struct hlist_node *node;
473 int i;
474
475 if (!parent_pte)
476 return;
477 if (!page->multimapped) {
478 u64 *old = page->parent_pte;
479
480 if (!old) {
481 page->parent_pte = parent_pte;
482 return;
483 }
484 page->multimapped = 1;
485 pte_chain = mmu_alloc_pte_chain(vcpu);
486 INIT_HLIST_HEAD(&page->parent_ptes);
487 hlist_add_head(&pte_chain->link, &page->parent_ptes);
488 pte_chain->parent_ptes[0] = old;
489 }
490 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
491 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
492 continue;
493 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
494 if (!pte_chain->parent_ptes[i]) {
495 pte_chain->parent_ptes[i] = parent_pte;
496 return;
497 }
498 }
499 pte_chain = mmu_alloc_pte_chain(vcpu);
500 BUG_ON(!pte_chain);
501 hlist_add_head(&pte_chain->link, &page->parent_ptes);
502 pte_chain->parent_ptes[0] = parent_pte;
503 }
504
505 static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
506 struct kvm_mmu_page *page,
507 u64 *parent_pte)
508 {
509 struct kvm_pte_chain *pte_chain;
510 struct hlist_node *node;
511 int i;
512
513 if (!page->multimapped) {
514 BUG_ON(page->parent_pte != parent_pte);
515 page->parent_pte = NULL;
516 return;
517 }
518 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
519 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
520 if (!pte_chain->parent_ptes[i])
521 break;
522 if (pte_chain->parent_ptes[i] != parent_pte)
523 continue;
524 while (i + 1 < NR_PTE_CHAIN_ENTRIES
525 && pte_chain->parent_ptes[i + 1]) {
526 pte_chain->parent_ptes[i]
527 = pte_chain->parent_ptes[i + 1];
528 ++i;
529 }
530 pte_chain->parent_ptes[i] = NULL;
531 if (i == 0) {
532 hlist_del(&pte_chain->link);
533 mmu_free_pte_chain(vcpu, pte_chain);
534 if (hlist_empty(&page->parent_ptes)) {
535 page->multimapped = 0;
536 page->parent_pte = NULL;
537 }
538 }
539 return;
540 }
541 BUG();
542 }
543
544 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
545 gfn_t gfn)
546 {
547 unsigned index;
548 struct hlist_head *bucket;
549 struct kvm_mmu_page *page;
550 struct hlist_node *node;
551
552 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
553 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
554 bucket = &vcpu->kvm->mmu_page_hash[index];
555 hlist_for_each_entry(page, node, bucket, hash_link)
556 if (page->gfn == gfn && !page->role.metaphysical) {
557 pgprintk("%s: found role %x\n",
558 __FUNCTION__, page->role.word);
559 return page;
560 }
561 return NULL;
562 }
563
564 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
565 gfn_t gfn,
566 gva_t gaddr,
567 unsigned level,
568 int metaphysical,
569 unsigned hugepage_access,
570 u64 *parent_pte)
571 {
572 union kvm_mmu_page_role role;
573 unsigned index;
574 unsigned quadrant;
575 struct hlist_head *bucket;
576 struct kvm_mmu_page *page;
577 struct hlist_node *node;
578
579 role.word = 0;
580 role.glevels = vcpu->mmu.root_level;
581 role.level = level;
582 role.metaphysical = metaphysical;
583 role.hugepage_access = hugepage_access;
584 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
585 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
586 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
587 role.quadrant = quadrant;
588 }
589 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
590 gfn, role.word);
591 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
592 bucket = &vcpu->kvm->mmu_page_hash[index];
593 hlist_for_each_entry(page, node, bucket, hash_link)
594 if (page->gfn == gfn && page->role.word == role.word) {
595 mmu_page_add_parent_pte(vcpu, page, parent_pte);
596 pgprintk("%s: found\n", __FUNCTION__);
597 return page;
598 }
599 page = kvm_mmu_alloc_page(vcpu, parent_pte);
600 if (!page)
601 return page;
602 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
603 page->gfn = gfn;
604 page->role = role;
605 hlist_add_head(&page->hash_link, bucket);
606 if (!metaphysical)
607 rmap_write_protect(vcpu, gfn);
608 return page;
609 }
610
611 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
612 struct kvm_mmu_page *page)
613 {
614 unsigned i;
615 u64 *pt;
616 u64 ent;
617
618 pt = __va(page->page_hpa);
619
620 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
621 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
622 if (pt[i] & PT_PRESENT_MASK)
623 rmap_remove(vcpu, &pt[i]);
624 pt[i] = 0;
625 }
626 kvm_arch_ops->tlb_flush(vcpu);
627 return;
628 }
629
630 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
631 ent = pt[i];
632
633 pt[i] = 0;
634 if (!(ent & PT_PRESENT_MASK))
635 continue;
636 ent &= PT64_BASE_ADDR_MASK;
637 mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
638 }
639 }
640
641 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
642 struct kvm_mmu_page *page,
643 u64 *parent_pte)
644 {
645 mmu_page_remove_parent_pte(vcpu, page, parent_pte);
646 }
647
648 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
649 struct kvm_mmu_page *page)
650 {
651 u64 *parent_pte;
652
653 while (page->multimapped || page->parent_pte) {
654 if (!page->multimapped)
655 parent_pte = page->parent_pte;
656 else {
657 struct kvm_pte_chain *chain;
658
659 chain = container_of(page->parent_ptes.first,
660 struct kvm_pte_chain, link);
661 parent_pte = chain->parent_ptes[0];
662 }
663 BUG_ON(!parent_pte);
664 kvm_mmu_put_page(vcpu, page, parent_pte);
665 *parent_pte = 0;
666 }
667 kvm_mmu_page_unlink_children(vcpu, page);
668 if (!page->root_count) {
669 hlist_del(&page->hash_link);
670 kvm_mmu_free_page(vcpu, page->page_hpa);
671 } else
672 list_move(&page->link, &vcpu->kvm->active_mmu_pages);
673 }
674
675 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
676 {
677 unsigned index;
678 struct hlist_head *bucket;
679 struct kvm_mmu_page *page;
680 struct hlist_node *node, *n;
681 int r;
682
683 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
684 r = 0;
685 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
686 bucket = &vcpu->kvm->mmu_page_hash[index];
687 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
688 if (page->gfn == gfn && !page->role.metaphysical) {
689 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
690 page->role.word);
691 kvm_mmu_zap_page(vcpu, page);
692 r = 1;
693 }
694 return r;
695 }
696
697 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
698 {
699 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
700 struct kvm_mmu_page *page_head = page_header(__pa(pte));
701
702 __set_bit(slot, &page_head->slot_bitmap);
703 }
704
705 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
706 {
707 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
708
709 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
710 }
711
712 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
713 {
714 struct kvm_memory_slot *slot;
715 struct page *page;
716
717 ASSERT((gpa & HPA_ERR_MASK) == 0);
718 slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
719 if (!slot)
720 return gpa | HPA_ERR_MASK;
721 page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
722 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
723 | (gpa & (PAGE_SIZE-1));
724 }
725
726 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
727 {
728 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
729
730 if (gpa == UNMAPPED_GVA)
731 return UNMAPPED_GVA;
732 return gpa_to_hpa(vcpu, gpa);
733 }
734
735 struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
736 {
737 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
738
739 if (gpa == UNMAPPED_GVA)
740 return NULL;
741 return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
742 }
743
744 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
745 {
746 }
747
748 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
749 {
750 int level = PT32E_ROOT_LEVEL;
751 hpa_t table_addr = vcpu->mmu.root_hpa;
752
753 for (; ; level--) {
754 u32 index = PT64_INDEX(v, level);
755 u64 *table;
756 u64 pte;
757
758 ASSERT(VALID_PAGE(table_addr));
759 table = __va(table_addr);
760
761 if (level == 1) {
762 pte = table[index];
763 if (is_present_pte(pte) && is_writeble_pte(pte))
764 return 0;
765 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
766 page_header_update_slot(vcpu->kvm, table, v);
767 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
768 PT_USER_MASK;
769 rmap_add(vcpu, &table[index]);
770 return 0;
771 }
772
773 if (table[index] == 0) {
774 struct kvm_mmu_page *new_table;
775 gfn_t pseudo_gfn;
776
777 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
778 >> PAGE_SHIFT;
779 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
780 v, level - 1,
781 1, 0, &table[index]);
782 if (!new_table) {
783 pgprintk("nonpaging_map: ENOMEM\n");
784 return -ENOMEM;
785 }
786
787 table[index] = new_table->page_hpa | PT_PRESENT_MASK
788 | PT_WRITABLE_MASK | PT_USER_MASK;
789 }
790 table_addr = table[index] & PT64_BASE_ADDR_MASK;
791 }
792 }
793
794 static void mmu_free_roots(struct kvm_vcpu *vcpu)
795 {
796 int i;
797 struct kvm_mmu_page *page;
798
799 #ifdef CONFIG_X86_64
800 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
801 hpa_t root = vcpu->mmu.root_hpa;
802
803 ASSERT(VALID_PAGE(root));
804 page = page_header(root);
805 --page->root_count;
806 vcpu->mmu.root_hpa = INVALID_PAGE;
807 return;
808 }
809 #endif
810 for (i = 0; i < 4; ++i) {
811 hpa_t root = vcpu->mmu.pae_root[i];
812
813 ASSERT(VALID_PAGE(root));
814 root &= PT64_BASE_ADDR_MASK;
815 page = page_header(root);
816 --page->root_count;
817 vcpu->mmu.pae_root[i] = INVALID_PAGE;
818 }
819 vcpu->mmu.root_hpa = INVALID_PAGE;
820 }
821
822 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
823 {
824 int i;
825 gfn_t root_gfn;
826 struct kvm_mmu_page *page;
827
828 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
829
830 #ifdef CONFIG_X86_64
831 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
832 hpa_t root = vcpu->mmu.root_hpa;
833
834 ASSERT(!VALID_PAGE(root));
835 page = kvm_mmu_get_page(vcpu, root_gfn, 0,
836 PT64_ROOT_LEVEL, 0, 0, NULL);
837 root = page->page_hpa;
838 ++page->root_count;
839 vcpu->mmu.root_hpa = root;
840 return;
841 }
842 #endif
843 for (i = 0; i < 4; ++i) {
844 hpa_t root = vcpu->mmu.pae_root[i];
845
846 ASSERT(!VALID_PAGE(root));
847 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
848 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
849 else if (vcpu->mmu.root_level == 0)
850 root_gfn = 0;
851 page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
852 PT32_ROOT_LEVEL, !is_paging(vcpu),
853 0, NULL);
854 root = page->page_hpa;
855 ++page->root_count;
856 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
857 }
858 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
859 }
860
861 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
862 {
863 return vaddr;
864 }
865
866 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
867 u32 error_code)
868 {
869 gpa_t addr = gva;
870 hpa_t paddr;
871 int r;
872
873 r = mmu_topup_memory_caches(vcpu);
874 if (r)
875 return r;
876
877 ASSERT(vcpu);
878 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
879
880
881 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
882
883 if (is_error_hpa(paddr))
884 return 1;
885
886 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
887 }
888
889 static void nonpaging_free(struct kvm_vcpu *vcpu)
890 {
891 mmu_free_roots(vcpu);
892 }
893
894 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
895 {
896 struct kvm_mmu *context = &vcpu->mmu;
897
898 context->new_cr3 = nonpaging_new_cr3;
899 context->page_fault = nonpaging_page_fault;
900 context->gva_to_gpa = nonpaging_gva_to_gpa;
901 context->free = nonpaging_free;
902 context->root_level = 0;
903 context->shadow_root_level = PT32E_ROOT_LEVEL;
904 mmu_alloc_roots(vcpu);
905 ASSERT(VALID_PAGE(context->root_hpa));
906 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
907 return 0;
908 }
909
910 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
911 {
912 ++kvm_stat.tlb_flush;
913 kvm_arch_ops->tlb_flush(vcpu);
914 }
915
916 static void paging_new_cr3(struct kvm_vcpu *vcpu)
917 {
918 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
919 mmu_free_roots(vcpu);
920 if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
921 kvm_mmu_free_some_pages(vcpu);
922 mmu_alloc_roots(vcpu);
923 kvm_mmu_flush_tlb(vcpu);
924 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
925 }
926
927 static inline void set_pte_common(struct kvm_vcpu *vcpu,
928 u64 *shadow_pte,
929 gpa_t gaddr,
930 int dirty,
931 u64 access_bits,
932 gfn_t gfn)
933 {
934 hpa_t paddr;
935
936 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
937 if (!dirty)
938 access_bits &= ~PT_WRITABLE_MASK;
939
940 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
941
942 *shadow_pte |= access_bits;
943
944 if (is_error_hpa(paddr)) {
945 *shadow_pte |= gaddr;
946 *shadow_pte |= PT_SHADOW_IO_MARK;
947 *shadow_pte &= ~PT_PRESENT_MASK;
948 return;
949 }
950
951 *shadow_pte |= paddr;
952
953 if (access_bits & PT_WRITABLE_MASK) {
954 struct kvm_mmu_page *shadow;
955
956 shadow = kvm_mmu_lookup_page(vcpu, gfn);
957 if (shadow) {
958 pgprintk("%s: found shadow page for %lx, marking ro\n",
959 __FUNCTION__, gfn);
960 access_bits &= ~PT_WRITABLE_MASK;
961 if (is_writeble_pte(*shadow_pte)) {
962 *shadow_pte &= ~PT_WRITABLE_MASK;
963 kvm_arch_ops->tlb_flush(vcpu);
964 }
965 }
966 }
967
968 if (access_bits & PT_WRITABLE_MASK)
969 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
970
971 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
972 rmap_add(vcpu, shadow_pte);
973 }
974
975 static void inject_page_fault(struct kvm_vcpu *vcpu,
976 u64 addr,
977 u32 err_code)
978 {
979 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
980 }
981
982 static inline int fix_read_pf(u64 *shadow_ent)
983 {
984 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
985 !(*shadow_ent & PT_USER_MASK)) {
986 /*
987 * If supervisor write protect is disabled, we shadow kernel
988 * pages as user pages so we can trap the write access.
989 */
990 *shadow_ent |= PT_USER_MASK;
991 *shadow_ent &= ~PT_WRITABLE_MASK;
992
993 return 1;
994
995 }
996 return 0;
997 }
998
999 static void paging_free(struct kvm_vcpu *vcpu)
1000 {
1001 nonpaging_free(vcpu);
1002 }
1003
1004 #define PTTYPE 64
1005 #include "paging_tmpl.h"
1006 #undef PTTYPE
1007
1008 #define PTTYPE 32
1009 #include "paging_tmpl.h"
1010 #undef PTTYPE
1011
1012 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
1013 {
1014 struct kvm_mmu *context = &vcpu->mmu;
1015
1016 ASSERT(is_pae(vcpu));
1017 context->new_cr3 = paging_new_cr3;
1018 context->page_fault = paging64_page_fault;
1019 context->gva_to_gpa = paging64_gva_to_gpa;
1020 context->free = paging_free;
1021 context->root_level = level;
1022 context->shadow_root_level = level;
1023 mmu_alloc_roots(vcpu);
1024 ASSERT(VALID_PAGE(context->root_hpa));
1025 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1026 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1027 return 0;
1028 }
1029
1030 static int paging64_init_context(struct kvm_vcpu *vcpu)
1031 {
1032 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
1033 }
1034
1035 static int paging32_init_context(struct kvm_vcpu *vcpu)
1036 {
1037 struct kvm_mmu *context = &vcpu->mmu;
1038
1039 context->new_cr3 = paging_new_cr3;
1040 context->page_fault = paging32_page_fault;
1041 context->gva_to_gpa = paging32_gva_to_gpa;
1042 context->free = paging_free;
1043 context->root_level = PT32_ROOT_LEVEL;
1044 context->shadow_root_level = PT32E_ROOT_LEVEL;
1045 mmu_alloc_roots(vcpu);
1046 ASSERT(VALID_PAGE(context->root_hpa));
1047 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1048 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1049 return 0;
1050 }
1051
1052 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1053 {
1054 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1055 }
1056
1057 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1058 {
1059 ASSERT(vcpu);
1060 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1061
1062 if (!is_paging(vcpu))
1063 return nonpaging_init_context(vcpu);
1064 else if (is_long_mode(vcpu))
1065 return paging64_init_context(vcpu);
1066 else if (is_pae(vcpu))
1067 return paging32E_init_context(vcpu);
1068 else
1069 return paging32_init_context(vcpu);
1070 }
1071
1072 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1073 {
1074 ASSERT(vcpu);
1075 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1076 vcpu->mmu.free(vcpu);
1077 vcpu->mmu.root_hpa = INVALID_PAGE;
1078 }
1079 }
1080
1081 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1082 {
1083 int r;
1084
1085 destroy_kvm_mmu(vcpu);
1086 r = init_kvm_mmu(vcpu);
1087 if (r < 0)
1088 goto out;
1089 r = mmu_topup_memory_caches(vcpu);
1090 out:
1091 return r;
1092 }
1093
1094 static void mmu_pre_write_zap_pte(struct kvm_vcpu *vcpu,
1095 struct kvm_mmu_page *page,
1096 u64 *spte)
1097 {
1098 u64 pte;
1099 struct kvm_mmu_page *child;
1100
1101 pte = *spte;
1102 if (is_present_pte(pte)) {
1103 if (page->role.level == PT_PAGE_TABLE_LEVEL)
1104 rmap_remove(vcpu, spte);
1105 else {
1106 child = page_header(pte & PT64_BASE_ADDR_MASK);
1107 mmu_page_remove_parent_pte(vcpu, child, spte);
1108 }
1109 }
1110 *spte = 0;
1111 }
1112
1113 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1114 {
1115 gfn_t gfn = gpa >> PAGE_SHIFT;
1116 struct kvm_mmu_page *page;
1117 struct hlist_node *node, *n;
1118 struct hlist_head *bucket;
1119 unsigned index;
1120 u64 *spte;
1121 unsigned offset = offset_in_page(gpa);
1122 unsigned pte_size;
1123 unsigned page_offset;
1124 unsigned misaligned;
1125 int level;
1126 int flooded = 0;
1127 int npte;
1128
1129 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1130 if (gfn == vcpu->last_pt_write_gfn) {
1131 ++vcpu->last_pt_write_count;
1132 if (vcpu->last_pt_write_count >= 3)
1133 flooded = 1;
1134 } else {
1135 vcpu->last_pt_write_gfn = gfn;
1136 vcpu->last_pt_write_count = 1;
1137 }
1138 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1139 bucket = &vcpu->kvm->mmu_page_hash[index];
1140 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1141 if (page->gfn != gfn || page->role.metaphysical)
1142 continue;
1143 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1144 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1145 if (misaligned || flooded) {
1146 /*
1147 * Misaligned accesses are too much trouble to fix
1148 * up; also, they usually indicate a page is not used
1149 * as a page table.
1150 *
1151 * If we're seeing too many writes to a page,
1152 * it may no longer be a page table, or we may be
1153 * forking, in which case it is better to unmap the
1154 * page.
1155 */
1156 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1157 gpa, bytes, page->role.word);
1158 kvm_mmu_zap_page(vcpu, page);
1159 continue;
1160 }
1161 page_offset = offset;
1162 level = page->role.level;
1163 npte = 1;
1164 if (page->role.glevels == PT32_ROOT_LEVEL) {
1165 page_offset <<= 1; /* 32->64 */
1166 /*
1167 * A 32-bit pde maps 4MB while the shadow pdes map
1168 * only 2MB. So we need to double the offset again
1169 * and zap two pdes instead of one.
1170 */
1171 if (level == PT32_ROOT_LEVEL) {
1172 page_offset &= ~7; /* kill rounding error */
1173 page_offset <<= 1;
1174 npte = 2;
1175 }
1176 page_offset &= ~PAGE_MASK;
1177 }
1178 spte = __va(page->page_hpa);
1179 spte += page_offset / sizeof(*spte);
1180 while (npte--) {
1181 mmu_pre_write_zap_pte(vcpu, page, spte);
1182 ++spte;
1183 }
1184 }
1185 }
1186
1187 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1188 {
1189 }
1190
1191 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1192 {
1193 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1194
1195 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1196 }
1197
1198 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1199 {
1200 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1201 struct kvm_mmu_page *page;
1202
1203 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1204 struct kvm_mmu_page, link);
1205 kvm_mmu_zap_page(vcpu, page);
1206 }
1207 }
1208 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1209
1210 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1211 {
1212 struct kvm_mmu_page *page;
1213
1214 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1215 page = container_of(vcpu->kvm->active_mmu_pages.next,
1216 struct kvm_mmu_page, link);
1217 kvm_mmu_zap_page(vcpu, page);
1218 }
1219 while (!list_empty(&vcpu->free_pages)) {
1220 page = list_entry(vcpu->free_pages.next,
1221 struct kvm_mmu_page, link);
1222 list_del(&page->link);
1223 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1224 page->page_hpa = INVALID_PAGE;
1225 }
1226 free_page((unsigned long)vcpu->mmu.pae_root);
1227 }
1228
1229 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1230 {
1231 struct page *page;
1232 int i;
1233
1234 ASSERT(vcpu);
1235
1236 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1237 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1238
1239 INIT_LIST_HEAD(&page_header->link);
1240 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1241 goto error_1;
1242 set_page_private(page, (unsigned long)page_header);
1243 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1244 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1245 list_add(&page_header->link, &vcpu->free_pages);
1246 ++vcpu->kvm->n_free_mmu_pages;
1247 }
1248
1249 /*
1250 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1251 * Therefore we need to allocate shadow page tables in the first
1252 * 4GB of memory, which happens to fit the DMA32 zone.
1253 */
1254 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1255 if (!page)
1256 goto error_1;
1257 vcpu->mmu.pae_root = page_address(page);
1258 for (i = 0; i < 4; ++i)
1259 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1260
1261 return 0;
1262
1263 error_1:
1264 free_mmu_pages(vcpu);
1265 return -ENOMEM;
1266 }
1267
1268 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1269 {
1270 ASSERT(vcpu);
1271 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1272 ASSERT(list_empty(&vcpu->free_pages));
1273
1274 return alloc_mmu_pages(vcpu);
1275 }
1276
1277 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1278 {
1279 ASSERT(vcpu);
1280 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1281 ASSERT(!list_empty(&vcpu->free_pages));
1282
1283 return init_kvm_mmu(vcpu);
1284 }
1285
1286 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1287 {
1288 ASSERT(vcpu);
1289
1290 destroy_kvm_mmu(vcpu);
1291 free_mmu_pages(vcpu);
1292 mmu_free_memory_caches(vcpu);
1293 }
1294
1295 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
1296 {
1297 struct kvm *kvm = vcpu->kvm;
1298 struct kvm_mmu_page *page;
1299
1300 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1301 int i;
1302 u64 *pt;
1303
1304 if (!test_bit(slot, &page->slot_bitmap))
1305 continue;
1306
1307 pt = __va(page->page_hpa);
1308 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1309 /* avoid RMW */
1310 if (pt[i] & PT_WRITABLE_MASK) {
1311 rmap_remove(vcpu, &pt[i]);
1312 pt[i] &= ~PT_WRITABLE_MASK;
1313 }
1314 }
1315 }
1316
1317 #ifdef AUDIT
1318
1319 static const char *audit_msg;
1320
1321 static gva_t canonicalize(gva_t gva)
1322 {
1323 #ifdef CONFIG_X86_64
1324 gva = (long long)(gva << 16) >> 16;
1325 #endif
1326 return gva;
1327 }
1328
1329 static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
1330 gva_t va, int level)
1331 {
1332 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
1333 int i;
1334 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
1335
1336 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
1337 u64 ent = pt[i];
1338
1339 if (!ent & PT_PRESENT_MASK)
1340 continue;
1341
1342 va = canonicalize(va);
1343 if (level > 1)
1344 audit_mappings_page(vcpu, ent, va, level - 1);
1345 else {
1346 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
1347 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
1348
1349 if ((ent & PT_PRESENT_MASK)
1350 && (ent & PT64_BASE_ADDR_MASK) != hpa)
1351 printk(KERN_ERR "audit error: (%s) levels %d"
1352 " gva %lx gpa %llx hpa %llx ent %llx\n",
1353 audit_msg, vcpu->mmu.root_level,
1354 va, gpa, hpa, ent);
1355 }
1356 }
1357 }
1358
1359 static void audit_mappings(struct kvm_vcpu *vcpu)
1360 {
1361 unsigned i;
1362
1363 if (vcpu->mmu.root_level == 4)
1364 audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
1365 else
1366 for (i = 0; i < 4; ++i)
1367 if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
1368 audit_mappings_page(vcpu,
1369 vcpu->mmu.pae_root[i],
1370 i << 30,
1371 2);
1372 }
1373
1374 static int count_rmaps(struct kvm_vcpu *vcpu)
1375 {
1376 int nmaps = 0;
1377 int i, j, k;
1378
1379 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
1380 struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
1381 struct kvm_rmap_desc *d;
1382
1383 for (j = 0; j < m->npages; ++j) {
1384 struct page *page = m->phys_mem[j];
1385
1386 if (!page->private)
1387 continue;
1388 if (!(page->private & 1)) {
1389 ++nmaps;
1390 continue;
1391 }
1392 d = (struct kvm_rmap_desc *)(page->private & ~1ul);
1393 while (d) {
1394 for (k = 0; k < RMAP_EXT; ++k)
1395 if (d->shadow_ptes[k])
1396 ++nmaps;
1397 else
1398 break;
1399 d = d->more;
1400 }
1401 }
1402 }
1403 return nmaps;
1404 }
1405
1406 static int count_writable_mappings(struct kvm_vcpu *vcpu)
1407 {
1408 int nmaps = 0;
1409 struct kvm_mmu_page *page;
1410 int i;
1411
1412 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1413 u64 *pt = __va(page->page_hpa);
1414
1415 if (page->role.level != PT_PAGE_TABLE_LEVEL)
1416 continue;
1417
1418 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1419 u64 ent = pt[i];
1420
1421 if (!(ent & PT_PRESENT_MASK))
1422 continue;
1423 if (!(ent & PT_WRITABLE_MASK))
1424 continue;
1425 ++nmaps;
1426 }
1427 }
1428 return nmaps;
1429 }
1430
1431 static void audit_rmap(struct kvm_vcpu *vcpu)
1432 {
1433 int n_rmap = count_rmaps(vcpu);
1434 int n_actual = count_writable_mappings(vcpu);
1435
1436 if (n_rmap != n_actual)
1437 printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
1438 __FUNCTION__, audit_msg, n_rmap, n_actual);
1439 }
1440
1441 static void audit_write_protection(struct kvm_vcpu *vcpu)
1442 {
1443 struct kvm_mmu_page *page;
1444
1445 list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
1446 hfn_t hfn;
1447 struct page *pg;
1448
1449 if (page->role.metaphysical)
1450 continue;
1451
1452 hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
1453 >> PAGE_SHIFT;
1454 pg = pfn_to_page(hfn);
1455 if (pg->private)
1456 printk(KERN_ERR "%s: (%s) shadow page has writable"
1457 " mappings: gfn %lx role %x\n",
1458 __FUNCTION__, audit_msg, page->gfn,
1459 page->role.word);
1460 }
1461 }
1462
1463 static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
1464 {
1465 int olddbg = dbg;
1466
1467 dbg = 0;
1468 audit_msg = msg;
1469 audit_rmap(vcpu);
1470 audit_write_protection(vcpu);
1471 audit_mappings(vcpu);
1472 dbg = olddbg;
1473 }
1474
1475 #endif
Linux kernel - Deliverables
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