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[PATCH] KVM: MMU: Replace atomic allocations by preallocated objects
[deliverable/linux.git] / drivers / kvm / mmu.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19 #include <linux/types.h>
20 #include <linux/string.h>
21 #include <asm/page.h>
22 #include <linux/mm.h>
23 #include <linux/highmem.h>
24 #include <linux/module.h>
25
26 #include "vmx.h"
27 #include "kvm.h"
28
29 #define pgprintk(x...) do { printk(x); } while (0)
30 #define rmap_printk(x...) do { printk(x); } while (0)
31
32 #define ASSERT(x) \
33 if (!(x)) { \
34 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
35 __FILE__, __LINE__, #x); \
36 }
37
38 #define PT64_PT_BITS 9
39 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
40 #define PT32_PT_BITS 10
41 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
42
43 #define PT_WRITABLE_SHIFT 1
44
45 #define PT_PRESENT_MASK (1ULL << 0)
46 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
47 #define PT_USER_MASK (1ULL << 2)
48 #define PT_PWT_MASK (1ULL << 3)
49 #define PT_PCD_MASK (1ULL << 4)
50 #define PT_ACCESSED_MASK (1ULL << 5)
51 #define PT_DIRTY_MASK (1ULL << 6)
52 #define PT_PAGE_SIZE_MASK (1ULL << 7)
53 #define PT_PAT_MASK (1ULL << 7)
54 #define PT_GLOBAL_MASK (1ULL << 8)
55 #define PT64_NX_MASK (1ULL << 63)
56
57 #define PT_PAT_SHIFT 7
58 #define PT_DIR_PAT_SHIFT 12
59 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
60
61 #define PT32_DIR_PSE36_SIZE 4
62 #define PT32_DIR_PSE36_SHIFT 13
63 #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
64
65
66 #define PT32_PTE_COPY_MASK \
67 (PT_PRESENT_MASK | PT_ACCESSED_MASK | PT_DIRTY_MASK | PT_GLOBAL_MASK)
68
69 #define PT64_PTE_COPY_MASK (PT64_NX_MASK | PT32_PTE_COPY_MASK)
70
71 #define PT_FIRST_AVAIL_BITS_SHIFT 9
72 #define PT64_SECOND_AVAIL_BITS_SHIFT 52
73
74 #define PT_SHADOW_PS_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
75 #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
76
77 #define PT_SHADOW_WRITABLE_SHIFT (PT_FIRST_AVAIL_BITS_SHIFT + 1)
78 #define PT_SHADOW_WRITABLE_MASK (1ULL << PT_SHADOW_WRITABLE_SHIFT)
79
80 #define PT_SHADOW_USER_SHIFT (PT_SHADOW_WRITABLE_SHIFT + 1)
81 #define PT_SHADOW_USER_MASK (1ULL << (PT_SHADOW_USER_SHIFT))
82
83 #define PT_SHADOW_BITS_OFFSET (PT_SHADOW_WRITABLE_SHIFT - PT_WRITABLE_SHIFT)
84
85 #define VALID_PAGE(x) ((x) != INVALID_PAGE)
86
87 #define PT64_LEVEL_BITS 9
88
89 #define PT64_LEVEL_SHIFT(level) \
90 ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
91
92 #define PT64_LEVEL_MASK(level) \
93 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
94
95 #define PT64_INDEX(address, level)\
96 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
97
98
99 #define PT32_LEVEL_BITS 10
100
101 #define PT32_LEVEL_SHIFT(level) \
102 ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
103
104 #define PT32_LEVEL_MASK(level) \
105 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
106
107 #define PT32_INDEX(address, level)\
108 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
109
110
111 #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & PAGE_MASK)
112 #define PT64_DIR_BASE_ADDR_MASK \
113 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
114
115 #define PT32_BASE_ADDR_MASK PAGE_MASK
116 #define PT32_DIR_BASE_ADDR_MASK \
117 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
118
119
120 #define PFERR_PRESENT_MASK (1U << 0)
121 #define PFERR_WRITE_MASK (1U << 1)
122 #define PFERR_USER_MASK (1U << 2)
123
124 #define PT64_ROOT_LEVEL 4
125 #define PT32_ROOT_LEVEL 2
126 #define PT32E_ROOT_LEVEL 3
127
128 #define PT_DIRECTORY_LEVEL 2
129 #define PT_PAGE_TABLE_LEVEL 1
130
131 #define RMAP_EXT 4
132
133 struct kvm_rmap_desc {
134 u64 *shadow_ptes[RMAP_EXT];
135 struct kvm_rmap_desc *more;
136 };
137
138 static int is_write_protection(struct kvm_vcpu *vcpu)
139 {
140 return vcpu->cr0 & CR0_WP_MASK;
141 }
142
143 static int is_cpuid_PSE36(void)
144 {
145 return 1;
146 }
147
148 static int is_present_pte(unsigned long pte)
149 {
150 return pte & PT_PRESENT_MASK;
151 }
152
153 static int is_writeble_pte(unsigned long pte)
154 {
155 return pte & PT_WRITABLE_MASK;
156 }
157
158 static int is_io_pte(unsigned long pte)
159 {
160 return pte & PT_SHADOW_IO_MARK;
161 }
162
163 static int is_rmap_pte(u64 pte)
164 {
165 return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
166 == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
167 }
168
169 static void mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
170 size_t objsize, int min)
171 {
172 void *obj;
173
174 if (cache->nobjs >= min)
175 return;
176 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
177 obj = kzalloc(objsize, GFP_NOWAIT);
178 if (!obj)
179 BUG();
180 cache->objects[cache->nobjs++] = obj;
181 }
182 }
183
184 static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
185 {
186 while (mc->nobjs)
187 kfree(mc->objects[--mc->nobjs]);
188 }
189
190 static void mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
191 {
192 mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
193 sizeof(struct kvm_pte_chain), 4);
194 mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
195 sizeof(struct kvm_rmap_desc), 1);
196 }
197
198 static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
199 {
200 mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
201 mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
202 }
203
204 static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
205 size_t size)
206 {
207 void *p;
208
209 BUG_ON(!mc->nobjs);
210 p = mc->objects[--mc->nobjs];
211 memset(p, 0, size);
212 return p;
213 }
214
215 static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
216 {
217 if (mc->nobjs < KVM_NR_MEM_OBJS)
218 mc->objects[mc->nobjs++] = obj;
219 else
220 kfree(obj);
221 }
222
223 static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
224 {
225 return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
226 sizeof(struct kvm_pte_chain));
227 }
228
229 static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
230 struct kvm_pte_chain *pc)
231 {
232 mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
233 }
234
235 static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
236 {
237 return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
238 sizeof(struct kvm_rmap_desc));
239 }
240
241 static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
242 struct kvm_rmap_desc *rd)
243 {
244 mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
245 }
246
247 /*
248 * Reverse mapping data structures:
249 *
250 * If page->private bit zero is zero, then page->private points to the
251 * shadow page table entry that points to page_address(page).
252 *
253 * If page->private bit zero is one, (then page->private & ~1) points
254 * to a struct kvm_rmap_desc containing more mappings.
255 */
256 static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
257 {
258 struct page *page;
259 struct kvm_rmap_desc *desc;
260 int i;
261
262 if (!is_rmap_pte(*spte))
263 return;
264 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
265 if (!page->private) {
266 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
267 page->private = (unsigned long)spte;
268 } else if (!(page->private & 1)) {
269 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
270 desc = mmu_alloc_rmap_desc(vcpu);
271 desc->shadow_ptes[0] = (u64 *)page->private;
272 desc->shadow_ptes[1] = spte;
273 page->private = (unsigned long)desc | 1;
274 } else {
275 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
276 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
277 while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
278 desc = desc->more;
279 if (desc->shadow_ptes[RMAP_EXT-1]) {
280 desc->more = mmu_alloc_rmap_desc(vcpu);
281 desc = desc->more;
282 }
283 for (i = 0; desc->shadow_ptes[i]; ++i)
284 ;
285 desc->shadow_ptes[i] = spte;
286 }
287 }
288
289 static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
290 struct page *page,
291 struct kvm_rmap_desc *desc,
292 int i,
293 struct kvm_rmap_desc *prev_desc)
294 {
295 int j;
296
297 for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
298 ;
299 desc->shadow_ptes[i] = desc->shadow_ptes[j];
300 desc->shadow_ptes[j] = 0;
301 if (j != 0)
302 return;
303 if (!prev_desc && !desc->more)
304 page->private = (unsigned long)desc->shadow_ptes[0];
305 else
306 if (prev_desc)
307 prev_desc->more = desc->more;
308 else
309 page->private = (unsigned long)desc->more | 1;
310 mmu_free_rmap_desc(vcpu, desc);
311 }
312
313 static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
314 {
315 struct page *page;
316 struct kvm_rmap_desc *desc;
317 struct kvm_rmap_desc *prev_desc;
318 int i;
319
320 if (!is_rmap_pte(*spte))
321 return;
322 page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
323 if (!page->private) {
324 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
325 BUG();
326 } else if (!(page->private & 1)) {
327 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
328 if ((u64 *)page->private != spte) {
329 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
330 spte, *spte);
331 BUG();
332 }
333 page->private = 0;
334 } else {
335 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
336 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
337 prev_desc = NULL;
338 while (desc) {
339 for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
340 if (desc->shadow_ptes[i] == spte) {
341 rmap_desc_remove_entry(vcpu, page,
342 desc, i,
343 prev_desc);
344 return;
345 }
346 prev_desc = desc;
347 desc = desc->more;
348 }
349 BUG();
350 }
351 }
352
353 static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
354 {
355 struct kvm *kvm = vcpu->kvm;
356 struct page *page;
357 struct kvm_memory_slot *slot;
358 struct kvm_rmap_desc *desc;
359 u64 *spte;
360
361 slot = gfn_to_memslot(kvm, gfn);
362 BUG_ON(!slot);
363 page = gfn_to_page(slot, gfn);
364
365 while (page->private) {
366 if (!(page->private & 1))
367 spte = (u64 *)page->private;
368 else {
369 desc = (struct kvm_rmap_desc *)(page->private & ~1ul);
370 spte = desc->shadow_ptes[0];
371 }
372 BUG_ON(!spte);
373 BUG_ON((*spte & PT64_BASE_ADDR_MASK) !=
374 page_to_pfn(page) << PAGE_SHIFT);
375 BUG_ON(!(*spte & PT_PRESENT_MASK));
376 BUG_ON(!(*spte & PT_WRITABLE_MASK));
377 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
378 rmap_remove(vcpu, spte);
379 *spte &= ~(u64)PT_WRITABLE_MASK;
380 }
381 }
382
383 static int is_empty_shadow_page(hpa_t page_hpa)
384 {
385 u64 *pos;
386 u64 *end;
387
388 for (pos = __va(page_hpa), end = pos + PAGE_SIZE / sizeof(u64);
389 pos != end; pos++)
390 if (*pos != 0) {
391 printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
392 pos, *pos);
393 return 0;
394 }
395 return 1;
396 }
397
398 static void kvm_mmu_free_page(struct kvm_vcpu *vcpu, hpa_t page_hpa)
399 {
400 struct kvm_mmu_page *page_head = page_header(page_hpa);
401
402 ASSERT(is_empty_shadow_page(page_hpa));
403 list_del(&page_head->link);
404 page_head->page_hpa = page_hpa;
405 list_add(&page_head->link, &vcpu->free_pages);
406 ++vcpu->kvm->n_free_mmu_pages;
407 }
408
409 static unsigned kvm_page_table_hashfn(gfn_t gfn)
410 {
411 return gfn;
412 }
413
414 static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
415 u64 *parent_pte)
416 {
417 struct kvm_mmu_page *page;
418
419 if (list_empty(&vcpu->free_pages))
420 return NULL;
421
422 page = list_entry(vcpu->free_pages.next, struct kvm_mmu_page, link);
423 list_del(&page->link);
424 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
425 ASSERT(is_empty_shadow_page(page->page_hpa));
426 page->slot_bitmap = 0;
427 page->global = 1;
428 page->multimapped = 0;
429 page->parent_pte = parent_pte;
430 --vcpu->kvm->n_free_mmu_pages;
431 return page;
432 }
433
434 static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
435 struct kvm_mmu_page *page, u64 *parent_pte)
436 {
437 struct kvm_pte_chain *pte_chain;
438 struct hlist_node *node;
439 int i;
440
441 if (!parent_pte)
442 return;
443 if (!page->multimapped) {
444 u64 *old = page->parent_pte;
445
446 if (!old) {
447 page->parent_pte = parent_pte;
448 return;
449 }
450 page->multimapped = 1;
451 pte_chain = mmu_alloc_pte_chain(vcpu);
452 INIT_HLIST_HEAD(&page->parent_ptes);
453 hlist_add_head(&pte_chain->link, &page->parent_ptes);
454 pte_chain->parent_ptes[0] = old;
455 }
456 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
457 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
458 continue;
459 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
460 if (!pte_chain->parent_ptes[i]) {
461 pte_chain->parent_ptes[i] = parent_pte;
462 return;
463 }
464 }
465 pte_chain = mmu_alloc_pte_chain(vcpu);
466 BUG_ON(!pte_chain);
467 hlist_add_head(&pte_chain->link, &page->parent_ptes);
468 pte_chain->parent_ptes[0] = parent_pte;
469 }
470
471 static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
472 struct kvm_mmu_page *page,
473 u64 *parent_pte)
474 {
475 struct kvm_pte_chain *pte_chain;
476 struct hlist_node *node;
477 int i;
478
479 if (!page->multimapped) {
480 BUG_ON(page->parent_pte != parent_pte);
481 page->parent_pte = NULL;
482 return;
483 }
484 hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
485 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
486 if (!pte_chain->parent_ptes[i])
487 break;
488 if (pte_chain->parent_ptes[i] != parent_pte)
489 continue;
490 while (i + 1 < NR_PTE_CHAIN_ENTRIES
491 && pte_chain->parent_ptes[i + 1]) {
492 pte_chain->parent_ptes[i]
493 = pte_chain->parent_ptes[i + 1];
494 ++i;
495 }
496 pte_chain->parent_ptes[i] = NULL;
497 if (i == 0) {
498 hlist_del(&pte_chain->link);
499 mmu_free_pte_chain(vcpu, pte_chain);
500 if (hlist_empty(&page->parent_ptes)) {
501 page->multimapped = 0;
502 page->parent_pte = NULL;
503 }
504 }
505 return;
506 }
507 BUG();
508 }
509
510 static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
511 gfn_t gfn)
512 {
513 unsigned index;
514 struct hlist_head *bucket;
515 struct kvm_mmu_page *page;
516 struct hlist_node *node;
517
518 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
519 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
520 bucket = &vcpu->kvm->mmu_page_hash[index];
521 hlist_for_each_entry(page, node, bucket, hash_link)
522 if (page->gfn == gfn && !page->role.metaphysical) {
523 pgprintk("%s: found role %x\n",
524 __FUNCTION__, page->role.word);
525 return page;
526 }
527 return NULL;
528 }
529
530 static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
531 gfn_t gfn,
532 gva_t gaddr,
533 unsigned level,
534 int metaphysical,
535 u64 *parent_pte)
536 {
537 union kvm_mmu_page_role role;
538 unsigned index;
539 unsigned quadrant;
540 struct hlist_head *bucket;
541 struct kvm_mmu_page *page;
542 struct hlist_node *node;
543
544 role.word = 0;
545 role.glevels = vcpu->mmu.root_level;
546 role.level = level;
547 role.metaphysical = metaphysical;
548 if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
549 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
550 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
551 role.quadrant = quadrant;
552 }
553 pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
554 gfn, role.word);
555 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
556 bucket = &vcpu->kvm->mmu_page_hash[index];
557 hlist_for_each_entry(page, node, bucket, hash_link)
558 if (page->gfn == gfn && page->role.word == role.word) {
559 mmu_page_add_parent_pte(vcpu, page, parent_pte);
560 pgprintk("%s: found\n", __FUNCTION__);
561 return page;
562 }
563 page = kvm_mmu_alloc_page(vcpu, parent_pte);
564 if (!page)
565 return page;
566 pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
567 page->gfn = gfn;
568 page->role = role;
569 hlist_add_head(&page->hash_link, bucket);
570 if (!metaphysical)
571 rmap_write_protect(vcpu, gfn);
572 return page;
573 }
574
575 static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
576 struct kvm_mmu_page *page)
577 {
578 unsigned i;
579 u64 *pt;
580 u64 ent;
581
582 pt = __va(page->page_hpa);
583
584 if (page->role.level == PT_PAGE_TABLE_LEVEL) {
585 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
586 if (pt[i] & PT_PRESENT_MASK)
587 rmap_remove(vcpu, &pt[i]);
588 pt[i] = 0;
589 }
590 return;
591 }
592
593 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
594 ent = pt[i];
595
596 pt[i] = 0;
597 if (!(ent & PT_PRESENT_MASK))
598 continue;
599 ent &= PT64_BASE_ADDR_MASK;
600 mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
601 }
602 }
603
604 static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
605 struct kvm_mmu_page *page,
606 u64 *parent_pte)
607 {
608 mmu_page_remove_parent_pte(vcpu, page, parent_pte);
609 }
610
611 static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
612 struct kvm_mmu_page *page)
613 {
614 u64 *parent_pte;
615
616 while (page->multimapped || page->parent_pte) {
617 if (!page->multimapped)
618 parent_pte = page->parent_pte;
619 else {
620 struct kvm_pte_chain *chain;
621
622 chain = container_of(page->parent_ptes.first,
623 struct kvm_pte_chain, link);
624 parent_pte = chain->parent_ptes[0];
625 }
626 BUG_ON(!parent_pte);
627 kvm_mmu_put_page(vcpu, page, parent_pte);
628 *parent_pte = 0;
629 }
630 kvm_mmu_page_unlink_children(vcpu, page);
631 if (!page->root_count) {
632 hlist_del(&page->hash_link);
633 kvm_mmu_free_page(vcpu, page->page_hpa);
634 } else {
635 list_del(&page->link);
636 list_add(&page->link, &vcpu->kvm->active_mmu_pages);
637 }
638 }
639
640 static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
641 {
642 unsigned index;
643 struct hlist_head *bucket;
644 struct kvm_mmu_page *page;
645 struct hlist_node *node, *n;
646 int r;
647
648 pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
649 r = 0;
650 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
651 bucket = &vcpu->kvm->mmu_page_hash[index];
652 hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
653 if (page->gfn == gfn && !page->role.metaphysical) {
654 pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
655 page->role.word);
656 kvm_mmu_zap_page(vcpu, page);
657 r = 1;
658 }
659 return r;
660 }
661
662 static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
663 {
664 int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
665 struct kvm_mmu_page *page_head = page_header(__pa(pte));
666
667 __set_bit(slot, &page_head->slot_bitmap);
668 }
669
670 hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
671 {
672 hpa_t hpa = gpa_to_hpa(vcpu, gpa);
673
674 return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
675 }
676
677 hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
678 {
679 struct kvm_memory_slot *slot;
680 struct page *page;
681
682 ASSERT((gpa & HPA_ERR_MASK) == 0);
683 slot = gfn_to_memslot(vcpu->kvm, gpa >> PAGE_SHIFT);
684 if (!slot)
685 return gpa | HPA_ERR_MASK;
686 page = gfn_to_page(slot, gpa >> PAGE_SHIFT);
687 return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
688 | (gpa & (PAGE_SIZE-1));
689 }
690
691 hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
692 {
693 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
694
695 if (gpa == UNMAPPED_GVA)
696 return UNMAPPED_GVA;
697 return gpa_to_hpa(vcpu, gpa);
698 }
699
700 static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
701 {
702 }
703
704 static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
705 {
706 int level = PT32E_ROOT_LEVEL;
707 hpa_t table_addr = vcpu->mmu.root_hpa;
708
709 for (; ; level--) {
710 u32 index = PT64_INDEX(v, level);
711 u64 *table;
712 u64 pte;
713
714 ASSERT(VALID_PAGE(table_addr));
715 table = __va(table_addr);
716
717 if (level == 1) {
718 pte = table[index];
719 if (is_present_pte(pte) && is_writeble_pte(pte))
720 return 0;
721 mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
722 page_header_update_slot(vcpu->kvm, table, v);
723 table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
724 PT_USER_MASK;
725 rmap_add(vcpu, &table[index]);
726 return 0;
727 }
728
729 if (table[index] == 0) {
730 struct kvm_mmu_page *new_table;
731 gfn_t pseudo_gfn;
732
733 pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
734 >> PAGE_SHIFT;
735 new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
736 v, level - 1,
737 1, &table[index]);
738 if (!new_table) {
739 pgprintk("nonpaging_map: ENOMEM\n");
740 return -ENOMEM;
741 }
742
743 table[index] = new_table->page_hpa | PT_PRESENT_MASK
744 | PT_WRITABLE_MASK | PT_USER_MASK;
745 }
746 table_addr = table[index] & PT64_BASE_ADDR_MASK;
747 }
748 }
749
750 static void mmu_free_roots(struct kvm_vcpu *vcpu)
751 {
752 int i;
753 struct kvm_mmu_page *page;
754
755 #ifdef CONFIG_X86_64
756 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
757 hpa_t root = vcpu->mmu.root_hpa;
758
759 ASSERT(VALID_PAGE(root));
760 page = page_header(root);
761 --page->root_count;
762 vcpu->mmu.root_hpa = INVALID_PAGE;
763 return;
764 }
765 #endif
766 for (i = 0; i < 4; ++i) {
767 hpa_t root = vcpu->mmu.pae_root[i];
768
769 ASSERT(VALID_PAGE(root));
770 root &= PT64_BASE_ADDR_MASK;
771 page = page_header(root);
772 --page->root_count;
773 vcpu->mmu.pae_root[i] = INVALID_PAGE;
774 }
775 vcpu->mmu.root_hpa = INVALID_PAGE;
776 }
777
778 static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
779 {
780 int i;
781 gfn_t root_gfn;
782 struct kvm_mmu_page *page;
783
784 root_gfn = vcpu->cr3 >> PAGE_SHIFT;
785
786 #ifdef CONFIG_X86_64
787 if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
788 hpa_t root = vcpu->mmu.root_hpa;
789
790 ASSERT(!VALID_PAGE(root));
791 root = kvm_mmu_get_page(vcpu, root_gfn, 0,
792 PT64_ROOT_LEVEL, 0, NULL)->page_hpa;
793 page = page_header(root);
794 ++page->root_count;
795 vcpu->mmu.root_hpa = root;
796 return;
797 }
798 #endif
799 for (i = 0; i < 4; ++i) {
800 hpa_t root = vcpu->mmu.pae_root[i];
801
802 ASSERT(!VALID_PAGE(root));
803 if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL)
804 root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
805 else if (vcpu->mmu.root_level == 0)
806 root_gfn = 0;
807 root = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
808 PT32_ROOT_LEVEL, !is_paging(vcpu),
809 NULL)->page_hpa;
810 page = page_header(root);
811 ++page->root_count;
812 vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
813 }
814 vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
815 }
816
817 static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
818 {
819 return vaddr;
820 }
821
822 static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
823 u32 error_code)
824 {
825 gpa_t addr = gva;
826 hpa_t paddr;
827
828 mmu_topup_memory_caches(vcpu);
829
830 ASSERT(vcpu);
831 ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
832
833
834 paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
835
836 if (is_error_hpa(paddr))
837 return 1;
838
839 return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
840 }
841
842 static void nonpaging_free(struct kvm_vcpu *vcpu)
843 {
844 mmu_free_roots(vcpu);
845 }
846
847 static int nonpaging_init_context(struct kvm_vcpu *vcpu)
848 {
849 struct kvm_mmu *context = &vcpu->mmu;
850
851 context->new_cr3 = nonpaging_new_cr3;
852 context->page_fault = nonpaging_page_fault;
853 context->gva_to_gpa = nonpaging_gva_to_gpa;
854 context->free = nonpaging_free;
855 context->root_level = 0;
856 context->shadow_root_level = PT32E_ROOT_LEVEL;
857 mmu_alloc_roots(vcpu);
858 ASSERT(VALID_PAGE(context->root_hpa));
859 kvm_arch_ops->set_cr3(vcpu, context->root_hpa);
860 return 0;
861 }
862
863 static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
864 {
865 ++kvm_stat.tlb_flush;
866 kvm_arch_ops->tlb_flush(vcpu);
867 }
868
869 static void paging_new_cr3(struct kvm_vcpu *vcpu)
870 {
871 pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
872 mmu_free_roots(vcpu);
873 mmu_alloc_roots(vcpu);
874 kvm_mmu_flush_tlb(vcpu);
875 kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
876 }
877
878 static void mark_pagetable_nonglobal(void *shadow_pte)
879 {
880 page_header(__pa(shadow_pte))->global = 0;
881 }
882
883 static inline void set_pte_common(struct kvm_vcpu *vcpu,
884 u64 *shadow_pte,
885 gpa_t gaddr,
886 int dirty,
887 u64 access_bits,
888 gfn_t gfn)
889 {
890 hpa_t paddr;
891
892 *shadow_pte |= access_bits << PT_SHADOW_BITS_OFFSET;
893 if (!dirty)
894 access_bits &= ~PT_WRITABLE_MASK;
895
896 paddr = gpa_to_hpa(vcpu, gaddr & PT64_BASE_ADDR_MASK);
897
898 *shadow_pte |= access_bits;
899
900 if (!(*shadow_pte & PT_GLOBAL_MASK))
901 mark_pagetable_nonglobal(shadow_pte);
902
903 if (is_error_hpa(paddr)) {
904 *shadow_pte |= gaddr;
905 *shadow_pte |= PT_SHADOW_IO_MARK;
906 *shadow_pte &= ~PT_PRESENT_MASK;
907 return;
908 }
909
910 *shadow_pte |= paddr;
911
912 if (access_bits & PT_WRITABLE_MASK) {
913 struct kvm_mmu_page *shadow;
914
915 shadow = kvm_mmu_lookup_page(vcpu, gfn);
916 if (shadow) {
917 pgprintk("%s: found shadow page for %lx, marking ro\n",
918 __FUNCTION__, gfn);
919 access_bits &= ~PT_WRITABLE_MASK;
920 *shadow_pte &= ~PT_WRITABLE_MASK;
921 }
922 }
923
924 if (access_bits & PT_WRITABLE_MASK)
925 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
926
927 page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
928 rmap_add(vcpu, shadow_pte);
929 }
930
931 static void inject_page_fault(struct kvm_vcpu *vcpu,
932 u64 addr,
933 u32 err_code)
934 {
935 kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
936 }
937
938 static inline int fix_read_pf(u64 *shadow_ent)
939 {
940 if ((*shadow_ent & PT_SHADOW_USER_MASK) &&
941 !(*shadow_ent & PT_USER_MASK)) {
942 /*
943 * If supervisor write protect is disabled, we shadow kernel
944 * pages as user pages so we can trap the write access.
945 */
946 *shadow_ent |= PT_USER_MASK;
947 *shadow_ent &= ~PT_WRITABLE_MASK;
948
949 return 1;
950
951 }
952 return 0;
953 }
954
955 static int may_access(u64 pte, int write, int user)
956 {
957
958 if (user && !(pte & PT_USER_MASK))
959 return 0;
960 if (write && !(pte & PT_WRITABLE_MASK))
961 return 0;
962 return 1;
963 }
964
965 static void paging_free(struct kvm_vcpu *vcpu)
966 {
967 nonpaging_free(vcpu);
968 }
969
970 #define PTTYPE 64
971 #include "paging_tmpl.h"
972 #undef PTTYPE
973
974 #define PTTYPE 32
975 #include "paging_tmpl.h"
976 #undef PTTYPE
977
978 static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
979 {
980 struct kvm_mmu *context = &vcpu->mmu;
981
982 ASSERT(is_pae(vcpu));
983 context->new_cr3 = paging_new_cr3;
984 context->page_fault = paging64_page_fault;
985 context->gva_to_gpa = paging64_gva_to_gpa;
986 context->free = paging_free;
987 context->root_level = level;
988 context->shadow_root_level = level;
989 mmu_alloc_roots(vcpu);
990 ASSERT(VALID_PAGE(context->root_hpa));
991 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
992 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
993 return 0;
994 }
995
996 static int paging64_init_context(struct kvm_vcpu *vcpu)
997 {
998 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
999 }
1000
1001 static int paging32_init_context(struct kvm_vcpu *vcpu)
1002 {
1003 struct kvm_mmu *context = &vcpu->mmu;
1004
1005 context->new_cr3 = paging_new_cr3;
1006 context->page_fault = paging32_page_fault;
1007 context->gva_to_gpa = paging32_gva_to_gpa;
1008 context->free = paging_free;
1009 context->root_level = PT32_ROOT_LEVEL;
1010 context->shadow_root_level = PT32E_ROOT_LEVEL;
1011 mmu_alloc_roots(vcpu);
1012 ASSERT(VALID_PAGE(context->root_hpa));
1013 kvm_arch_ops->set_cr3(vcpu, context->root_hpa |
1014 (vcpu->cr3 & (CR3_PCD_MASK | CR3_WPT_MASK)));
1015 return 0;
1016 }
1017
1018 static int paging32E_init_context(struct kvm_vcpu *vcpu)
1019 {
1020 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
1021 }
1022
1023 static int init_kvm_mmu(struct kvm_vcpu *vcpu)
1024 {
1025 ASSERT(vcpu);
1026 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1027
1028 if (!is_paging(vcpu))
1029 return nonpaging_init_context(vcpu);
1030 else if (is_long_mode(vcpu))
1031 return paging64_init_context(vcpu);
1032 else if (is_pae(vcpu))
1033 return paging32E_init_context(vcpu);
1034 else
1035 return paging32_init_context(vcpu);
1036 }
1037
1038 static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
1039 {
1040 ASSERT(vcpu);
1041 if (VALID_PAGE(vcpu->mmu.root_hpa)) {
1042 vcpu->mmu.free(vcpu);
1043 vcpu->mmu.root_hpa = INVALID_PAGE;
1044 }
1045 }
1046
1047 int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
1048 {
1049 int r;
1050
1051 destroy_kvm_mmu(vcpu);
1052 r = init_kvm_mmu(vcpu);
1053 if (r < 0)
1054 goto out;
1055 mmu_topup_memory_caches(vcpu);
1056 out:
1057 return r;
1058 }
1059
1060 void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1061 {
1062 gfn_t gfn = gpa >> PAGE_SHIFT;
1063 struct kvm_mmu_page *page;
1064 struct kvm_mmu_page *child;
1065 struct hlist_node *node, *n;
1066 struct hlist_head *bucket;
1067 unsigned index;
1068 u64 *spte;
1069 u64 pte;
1070 unsigned offset = offset_in_page(gpa);
1071 unsigned pte_size;
1072 unsigned page_offset;
1073 unsigned misaligned;
1074 int level;
1075 int flooded = 0;
1076
1077 pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
1078 if (gfn == vcpu->last_pt_write_gfn) {
1079 ++vcpu->last_pt_write_count;
1080 if (vcpu->last_pt_write_count >= 3)
1081 flooded = 1;
1082 } else {
1083 vcpu->last_pt_write_gfn = gfn;
1084 vcpu->last_pt_write_count = 1;
1085 }
1086 index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
1087 bucket = &vcpu->kvm->mmu_page_hash[index];
1088 hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
1089 if (page->gfn != gfn || page->role.metaphysical)
1090 continue;
1091 pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
1092 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
1093 if (misaligned || flooded) {
1094 /*
1095 * Misaligned accesses are too much trouble to fix
1096 * up; also, they usually indicate a page is not used
1097 * as a page table.
1098 *
1099 * If we're seeing too many writes to a page,
1100 * it may no longer be a page table, or we may be
1101 * forking, in which case it is better to unmap the
1102 * page.
1103 */
1104 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
1105 gpa, bytes, page->role.word);
1106 kvm_mmu_zap_page(vcpu, page);
1107 continue;
1108 }
1109 page_offset = offset;
1110 level = page->role.level;
1111 if (page->role.glevels == PT32_ROOT_LEVEL) {
1112 page_offset <<= 1; /* 32->64 */
1113 page_offset &= ~PAGE_MASK;
1114 }
1115 spte = __va(page->page_hpa);
1116 spte += page_offset / sizeof(*spte);
1117 pte = *spte;
1118 if (is_present_pte(pte)) {
1119 if (level == PT_PAGE_TABLE_LEVEL)
1120 rmap_remove(vcpu, spte);
1121 else {
1122 child = page_header(pte & PT64_BASE_ADDR_MASK);
1123 mmu_page_remove_parent_pte(vcpu, child, spte);
1124 }
1125 }
1126 *spte = 0;
1127 }
1128 }
1129
1130 void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes)
1131 {
1132 }
1133
1134 int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
1135 {
1136 gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
1137
1138 return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
1139 }
1140
1141 void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
1142 {
1143 while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
1144 struct kvm_mmu_page *page;
1145
1146 page = container_of(vcpu->kvm->active_mmu_pages.prev,
1147 struct kvm_mmu_page, link);
1148 kvm_mmu_zap_page(vcpu, page);
1149 }
1150 }
1151 EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
1152
1153 static void free_mmu_pages(struct kvm_vcpu *vcpu)
1154 {
1155 struct kvm_mmu_page *page;
1156
1157 while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
1158 page = container_of(vcpu->kvm->active_mmu_pages.next,
1159 struct kvm_mmu_page, link);
1160 kvm_mmu_zap_page(vcpu, page);
1161 }
1162 while (!list_empty(&vcpu->free_pages)) {
1163 page = list_entry(vcpu->free_pages.next,
1164 struct kvm_mmu_page, link);
1165 list_del(&page->link);
1166 __free_page(pfn_to_page(page->page_hpa >> PAGE_SHIFT));
1167 page->page_hpa = INVALID_PAGE;
1168 }
1169 free_page((unsigned long)vcpu->mmu.pae_root);
1170 }
1171
1172 static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
1173 {
1174 struct page *page;
1175 int i;
1176
1177 ASSERT(vcpu);
1178
1179 for (i = 0; i < KVM_NUM_MMU_PAGES; i++) {
1180 struct kvm_mmu_page *page_header = &vcpu->page_header_buf[i];
1181
1182 INIT_LIST_HEAD(&page_header->link);
1183 if ((page = alloc_page(GFP_KERNEL)) == NULL)
1184 goto error_1;
1185 page->private = (unsigned long)page_header;
1186 page_header->page_hpa = (hpa_t)page_to_pfn(page) << PAGE_SHIFT;
1187 memset(__va(page_header->page_hpa), 0, PAGE_SIZE);
1188 list_add(&page_header->link, &vcpu->free_pages);
1189 ++vcpu->kvm->n_free_mmu_pages;
1190 }
1191
1192 /*
1193 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
1194 * Therefore we need to allocate shadow page tables in the first
1195 * 4GB of memory, which happens to fit the DMA32 zone.
1196 */
1197 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
1198 if (!page)
1199 goto error_1;
1200 vcpu->mmu.pae_root = page_address(page);
1201 for (i = 0; i < 4; ++i)
1202 vcpu->mmu.pae_root[i] = INVALID_PAGE;
1203
1204 return 0;
1205
1206 error_1:
1207 free_mmu_pages(vcpu);
1208 return -ENOMEM;
1209 }
1210
1211 int kvm_mmu_create(struct kvm_vcpu *vcpu)
1212 {
1213 ASSERT(vcpu);
1214 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1215 ASSERT(list_empty(&vcpu->free_pages));
1216
1217 return alloc_mmu_pages(vcpu);
1218 }
1219
1220 int kvm_mmu_setup(struct kvm_vcpu *vcpu)
1221 {
1222 ASSERT(vcpu);
1223 ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
1224 ASSERT(!list_empty(&vcpu->free_pages));
1225
1226 return init_kvm_mmu(vcpu);
1227 }
1228
1229 void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
1230 {
1231 ASSERT(vcpu);
1232
1233 destroy_kvm_mmu(vcpu);
1234 free_mmu_pages(vcpu);
1235 mmu_free_memory_caches(vcpu);
1236 }
1237
1238 void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
1239 {
1240 struct kvm *kvm = vcpu->kvm;
1241 struct kvm_mmu_page *page;
1242
1243 list_for_each_entry(page, &kvm->active_mmu_pages, link) {
1244 int i;
1245 u64 *pt;
1246
1247 if (!test_bit(slot, &page->slot_bitmap))
1248 continue;
1249
1250 pt = __va(page->page_hpa);
1251 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1252 /* avoid RMW */
1253 if (pt[i] & PT_WRITABLE_MASK) {
1254 rmap_remove(vcpu, &pt[i]);
1255 pt[i] &= ~PT_WRITABLE_MASK;
1256 }
1257 }
1258 }
Linux kernel - Deliverables
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