drivers/kvm/paging_tmpl.h

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * This module enables machines with Intel VT-x extensions to run virtual
   5  * machines without emulation or binary translation.
   6  *
   7  * MMU support
   8  *
   9  * Copyright (C) 2006 Qumranet, Inc.
  10  *
  11  * Authors:
  12  *   Yaniv Kamay  <yaniv@qumranet.com>
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *
  15  * This work is licensed under the terms of the GNU GPL, version 2.  See
  16  * the COPYING file in the top-level directory.
  17  *
  18  */
  19
  20 /*
  21  * We need the mmu code to access both 32-bit and 64-bit guest ptes,
  22  * so the code in this file is compiled twice, once per pte size.
  23  */
  24
  25 #if PTTYPE == 64
  26         #define pt_element_t u64
  27         #define guest_walker guest_walker64
  28         #define FNAME(name) paging##64_##name
  29         #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
  30         #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
  31         #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
  32         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  33         #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
  34         #define PT_LEVEL_BITS PT64_LEVEL_BITS
  35         #ifdef CONFIG_X86_64
  36         #define PT_MAX_FULL_LEVELS 4
  37         #else
  38         #define PT_MAX_FULL_LEVELS 2
  39         #endif
  40 #elif PTTYPE == 32
  41         #define pt_element_t u32
  42         #define guest_walker guest_walker32
  43         #define FNAME(name) paging##32_##name
  44         #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
  45         #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
  46         #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
  47         #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  48         #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
  49         #define PT_LEVEL_BITS PT32_LEVEL_BITS
  50         #define PT_MAX_FULL_LEVELS 2
  51 #else
  52         #error Invalid PTTYPE value
  53 #endif
  54
  55 /*
  56  * The guest_walker structure emulates the behavior of the hardware page
  57  * table walker.
  58  */
  59 struct guest_walker {
  60         int level;
  61         gfn_t table_gfn[PT_MAX_FULL_LEVELS];
  62         pt_element_t *table;
  63         pt_element_t pte;
  64         pt_element_t *ptep;
  65         struct page *page;
  66         int index;
  67         pt_element_t inherited_ar;
  68         gfn_t gfn;
  69         u32 error_code;
  70 };
  71
  72 static void FNAME(update_dirty_bit)(struct kvm_vcpu *vcpu,
  73                                     int write_fault,
  74                                     pt_element_t *ptep,
  75                                     gfn_t table_gfn)
  76 {
  77         if (write_fault && !is_dirty_pte(*ptep)) {
  78                 mark_page_dirty(vcpu->kvm, table_gfn);
  79                 *ptep |= PT_DIRTY_MASK;
  80         }
  81 }
  82
  83 /*
  84  * Fetch a guest pte for a guest virtual address
  85  */
  86 static int FNAME(walk_addr)(struct guest_walker *walker,
  87                             struct kvm_vcpu *vcpu, gva_t addr,
  88                             int write_fault, int user_fault, int fetch_fault)
  89 {
  90         hpa_t hpa;
  91         struct kvm_memory_slot *slot;
  92         pt_element_t *ptep;
  93         pt_element_t root;
  94         gfn_t table_gfn;
  95
  96         pgprintk("%s: addr %lx\n", __FUNCTION__, addr);
  97         walker->level = vcpu->mmu.root_level;
  98         walker->table = NULL;
  99         walker->page = NULL;
 100         walker->ptep = NULL;
 101         root = vcpu->cr3;
 102 #if PTTYPE == 64
 103         if (!is_long_mode(vcpu)) {
 104                 walker->ptep = &vcpu->pdptrs[(addr >> 30) & 3];
 105                 root = *walker->ptep;
 106                 walker->pte = root;
 107                 if (!(root & PT_PRESENT_MASK))
 108                         goto not_present;
 109                 --walker->level;
 110         }
 111 #endif
 112         table_gfn = (root & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
 113         walker->table_gfn[walker->level - 1] = table_gfn;
 114         pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
 115                  walker->level - 1, table_gfn);
 116         slot = gfn_to_memslot(vcpu->kvm, table_gfn);
 117         hpa = safe_gpa_to_hpa(vcpu->kvm, root & PT64_BASE_ADDR_MASK);
 118         walker->page = pfn_to_page(hpa >> PAGE_SHIFT);
 119         walker->table = kmap_atomic(walker->page, KM_USER0);
 120
 121         ASSERT((!is_long_mode(vcpu) && is_pae(vcpu)) ||
 122                (vcpu->cr3 & CR3_NONPAE_RESERVED_BITS) == 0);
 123
 124         walker->inherited_ar = PT_USER_MASK | PT_WRITABLE_MASK;
 125
 126         for (;;) {
 127                 int index = PT_INDEX(addr, walker->level);
 128                 hpa_t paddr;
 129
 130                 ptep = &walker->table[index];
 131                 walker->index = index;
 132                 ASSERT(((unsigned long)walker->table & PAGE_MASK) ==
 133                        ((unsigned long)ptep & PAGE_MASK));
 134
 135                 if (!is_present_pte(*ptep))
 136                         goto not_present;
 137
 138                 if (write_fault && !is_writeble_pte(*ptep))
 139                         if (user_fault || is_write_protection(vcpu))
 140                                 goto access_error;
 141
 142                 if (user_fault && !(*ptep & PT_USER_MASK))
 143                         goto access_error;
 144
 145 #if PTTYPE == 64
 146                 if (fetch_fault && is_nx(vcpu) && (*ptep & PT64_NX_MASK))
 147                         goto access_error;
 148 #endif
 149
 150                 if (!(*ptep & PT_ACCESSED_MASK)) {
 151                         mark_page_dirty(vcpu->kvm, table_gfn);
 152                         *ptep |= PT_ACCESSED_MASK;
 153                 }
 154
 155                 if (walker->level == PT_PAGE_TABLE_LEVEL) {
 156                         walker->gfn = (*ptep & PT_BASE_ADDR_MASK)
 157                                 >> PAGE_SHIFT;
 158                         FNAME(update_dirty_bit)(vcpu, write_fault, ptep,
 159                                                 table_gfn);
 160                         break;
 161                 }
 162
 163                 if (walker->level == PT_DIRECTORY_LEVEL
 164                     && (*ptep & PT_PAGE_SIZE_MASK)
 165                     && (PTTYPE == 64 || is_pse(vcpu))) {
 166                         walker->gfn = (*ptep & PT_DIR_BASE_ADDR_MASK)
 167                                 >> PAGE_SHIFT;
 168                         walker->gfn += PT_INDEX(addr, PT_PAGE_TABLE_LEVEL);
 169                         FNAME(update_dirty_bit)(vcpu, write_fault, ptep,
 170                                                 table_gfn);
 171                         break;
 172                 }
 173
 174                 walker->inherited_ar &= walker->table[index];
 175                 table_gfn = (*ptep & PT_BASE_ADDR_MASK) >> PAGE_SHIFT;
 176                 kunmap_atomic(walker->table, KM_USER0);
 177                 paddr = safe_gpa_to_hpa(vcpu->kvm, table_gfn << PAGE_SHIFT);
 178                 walker->page = pfn_to_page(paddr >> PAGE_SHIFT);
 179                 walker->table = kmap_atomic(walker->page, KM_USER0);
 180                 --walker->level;
 181                 walker->table_gfn[walker->level - 1] = table_gfn;
 182                 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__,
 183                          walker->level - 1, table_gfn);
 184         }
 185         walker->pte = *ptep;
 186         if (walker->page)
 187                 walker->ptep = NULL;
 188         if (walker->table)
 189                 kunmap_atomic(walker->table, KM_USER0);
 190         pgprintk("%s: pte %llx\n", __FUNCTION__, (u64)*ptep);
 191         return 1;
 192
 193 not_present:
 194         walker->error_code = 0;
 195         goto err;
 196
 197 access_error:
 198         walker->error_code = PFERR_PRESENT_MASK;
 199
 200 err:
 201         if (write_fault)
 202                 walker->error_code |= PFERR_WRITE_MASK;
 203         if (user_fault)
 204                 walker->error_code |= PFERR_USER_MASK;
 205         if (fetch_fault)
 206                 walker->error_code |= PFERR_FETCH_MASK;
 207         if (walker->table)
 208                 kunmap_atomic(walker->table, KM_USER0);
 209         return 0;
 210 }
 211
 212 static void FNAME(set_pte_common)(struct kvm_vcpu *vcpu,
 213                                   u64 *shadow_pte,
 214                                   gpa_t gaddr,
 215                                   pt_element_t gpte,
 216                                   u64 access_bits,
 217                                   int user_fault,
 218                                   int write_fault,
 219                                   int *ptwrite,
 220                                   struct guest_walker *walker,
 221                                   gfn_t gfn)
 222 {
 223         hpa_t paddr;
 224         int dirty = gpte & PT_DIRTY_MASK;
 225         u64 spte;
 226         int was_rmapped = is_rmap_pte(*shadow_pte);
 227
 228         pgprintk("%s: spte %llx gpte %llx access %llx write_fault %d"
 229                  " user_fault %d gfn %lx\n",
 230                  __FUNCTION__, *shadow_pte, (u64)gpte, access_bits,
 231                  write_fault, user_fault, gfn);
 232
 233         /*
 234          * We don't set the accessed bit, since we sometimes want to see
 235          * whether the guest actually used the pte (in order to detect
 236          * demand paging).
 237          */
 238         spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
 239         spte |= gpte & PT64_NX_MASK;
 240         if (!dirty)
 241                 access_bits &= ~PT_WRITABLE_MASK;
 242
 243         paddr = gpa_to_hpa(vcpu->kvm, gaddr & PT64_BASE_ADDR_MASK);
 244
 245         spte |= PT_PRESENT_MASK;
 246         if (access_bits & PT_USER_MASK)
 247                 spte |= PT_USER_MASK;
 248
 249         if (is_error_hpa(paddr)) {
 250                 set_shadow_pte(shadow_pte,
 251                                shadow_trap_nonpresent_pte | PT_SHADOW_IO_MARK);
 252                 return;
 253         }
 254
 255         spte |= paddr;
 256
 257         if ((access_bits & PT_WRITABLE_MASK)
 258             || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
 259                 struct kvm_mmu_page *shadow;
 260
 261                 spte |= PT_WRITABLE_MASK;
 262                 if (user_fault) {
 263                         mmu_unshadow(vcpu->kvm, gfn);
 264                         goto unshadowed;
 265                 }
 266
 267                 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
 268                 if (shadow) {
 269                         pgprintk("%s: found shadow page for %lx, marking ro\n",
 270                                  __FUNCTION__, gfn);
 271                         access_bits &= ~PT_WRITABLE_MASK;
 272                         if (is_writeble_pte(spte)) {
 273                                 spte &= ~PT_WRITABLE_MASK;
 274                                 kvm_x86_ops->tlb_flush(vcpu);
 275                         }
 276                         if (write_fault)
 277                                 *ptwrite = 1;
 278                 }
 279         }
 280
 281 unshadowed:
 282
 283         if (access_bits & PT_WRITABLE_MASK)
 284                 mark_page_dirty(vcpu->kvm, gaddr >> PAGE_SHIFT);
 285
 286         pgprintk("%s: setting spte %llx\n", __FUNCTION__, spte);
 287         set_shadow_pte(shadow_pte, spte);
 288         page_header_update_slot(vcpu->kvm, shadow_pte, gaddr);
 289         if (!was_rmapped)
 290                 rmap_add(vcpu, shadow_pte, (gaddr & PT64_BASE_ADDR_MASK)
 291                          >> PAGE_SHIFT);
 292         if (!ptwrite || !*ptwrite)
 293                 vcpu->last_pte_updated = shadow_pte;
 294 }
 295
 296 static void FNAME(set_pte)(struct kvm_vcpu *vcpu, pt_element_t gpte,
 297                            u64 *shadow_pte, u64 access_bits,
 298                            int user_fault, int write_fault, int *ptwrite,
 299                            struct guest_walker *walker, gfn_t gfn)
 300 {
 301         access_bits &= gpte;
 302         FNAME(set_pte_common)(vcpu, shadow_pte, gpte & PT_BASE_ADDR_MASK,
 303                               gpte, access_bits, user_fault, write_fault,
 304                               ptwrite, walker, gfn);
 305 }
 306
 307 static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page,
 308                               u64 *spte, const void *pte, int bytes,
 309                               int offset_in_pte)
 310 {
 311         pt_element_t gpte;
 312
 313         gpte = *(const pt_element_t *)pte;
 314         if (~gpte & (PT_PRESENT_MASK | PT_ACCESSED_MASK)) {
 315                 if (!offset_in_pte && !is_present_pte(gpte))
 316                         set_shadow_pte(spte, shadow_notrap_nonpresent_pte);
 317                 return;
 318         }
 319         if (bytes < sizeof(pt_element_t))
 320                 return;
 321         pgprintk("%s: gpte %llx spte %p\n", __FUNCTION__, (u64)gpte, spte);
 322         FNAME(set_pte)(vcpu, gpte, spte, PT_USER_MASK | PT_WRITABLE_MASK, 0,
 323                        0, NULL, NULL,
 324                        (gpte & PT_BASE_ADDR_MASK) >> PAGE_SHIFT);
 325 }
 326
 327 static void FNAME(set_pde)(struct kvm_vcpu *vcpu, pt_element_t gpde,
 328                            u64 *shadow_pte, u64 access_bits,
 329                            int user_fault, int write_fault, int *ptwrite,
 330                            struct guest_walker *walker, gfn_t gfn)
 331 {
 332         gpa_t gaddr;
 333
 334         access_bits &= gpde;
 335         gaddr = (gpa_t)gfn << PAGE_SHIFT;
 336         if (PTTYPE == 32 && is_cpuid_PSE36())
 337                 gaddr |= (gpde & PT32_DIR_PSE36_MASK) <<
 338                         (32 - PT32_DIR_PSE36_SHIFT);
 339         FNAME(set_pte_common)(vcpu, shadow_pte, gaddr,
 340                               gpde, access_bits, user_fault, write_fault,
 341                               ptwrite, walker, gfn);
 342 }
 343
 344 /*
 345  * Fetch a shadow pte for a specific level in the paging hierarchy.
 346  */
 347 static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr,
 348                          struct guest_walker *walker,
 349                          int user_fault, int write_fault, int *ptwrite)
 350 {
 351         hpa_t shadow_addr;
 352         int level;
 353         u64 *shadow_ent;
 354         u64 *prev_shadow_ent = NULL;
 355
 356         if (!is_present_pte(walker->pte))
 357                 return NULL;
 358
 359         shadow_addr = vcpu->mmu.root_hpa;
 360         level = vcpu->mmu.shadow_root_level;
 361         if (level == PT32E_ROOT_LEVEL) {
 362                 shadow_addr = vcpu->mmu.pae_root[(addr >> 30) & 3];
 363                 shadow_addr &= PT64_BASE_ADDR_MASK;
 364                 --level;
 365         }
 366
 367         for (; ; level--) {
 368                 u32 index = SHADOW_PT_INDEX(addr, level);
 369                 struct kvm_mmu_page *shadow_page;
 370                 u64 shadow_pte;
 371                 int metaphysical;
 372                 gfn_t table_gfn;
 373                 unsigned hugepage_access = 0;
 374
 375                 shadow_ent = ((u64 *)__va(shadow_addr)) + index;
 376                 if (is_shadow_present_pte(*shadow_ent)) {
 377                         if (level == PT_PAGE_TABLE_LEVEL)
 378                                 break;
 379                         shadow_addr = *shadow_ent & PT64_BASE_ADDR_MASK;
 380                         prev_shadow_ent = shadow_ent;
 381                         continue;
 382                 }
 383
 384                 if (level == PT_PAGE_TABLE_LEVEL)
 385                         break;
 386
 387                 if (level - 1 == PT_PAGE_TABLE_LEVEL
 388                     && walker->level == PT_DIRECTORY_LEVEL) {
 389                         metaphysical = 1;
 390                         hugepage_access = walker->pte;
 391                         hugepage_access &= PT_USER_MASK | PT_WRITABLE_MASK;
 392                         if (!is_dirty_pte(walker->pte))
 393                                 hugepage_access &= ~PT_WRITABLE_MASK;
 394                         hugepage_access >>= PT_WRITABLE_SHIFT;
 395                         if (walker->pte & PT64_NX_MASK)
 396                                 hugepage_access |= (1 << 2);
 397                         table_gfn = (walker->pte & PT_BASE_ADDR_MASK)
 398                                 >> PAGE_SHIFT;
 399                 } else {
 400                         metaphysical = 0;
 401                         table_gfn = walker->table_gfn[level - 2];
 402                 }
 403                 shadow_page = kvm_mmu_get_page(vcpu, table_gfn, addr, level-1,
 404                                                metaphysical, hugepage_access,
 405                                                shadow_ent);
 406                 shadow_addr = __pa(shadow_page->spt);
 407                 shadow_pte = shadow_addr | PT_PRESENT_MASK | PT_ACCESSED_MASK
 408                         | PT_WRITABLE_MASK | PT_USER_MASK;
 409                 *shadow_ent = shadow_pte;
 410                 prev_shadow_ent = shadow_ent;
 411         }
 412
 413         if (walker->level == PT_DIRECTORY_LEVEL) {
 414                 FNAME(set_pde)(vcpu, walker->pte, shadow_ent,
 415                                walker->inherited_ar, user_fault, write_fault,
 416                                ptwrite, walker, walker->gfn);
 417         } else {
 418                 ASSERT(walker->level == PT_PAGE_TABLE_LEVEL);
 419                 FNAME(set_pte)(vcpu, walker->pte, shadow_ent,
 420                                walker->inherited_ar, user_fault, write_fault,
 421                                ptwrite, walker, walker->gfn);
 422         }
 423         return shadow_ent;
 424 }
 425
 426 /*
 427  * Page fault handler.  There are several causes for a page fault:
 428  *   - there is no shadow pte for the guest pte
 429  *   - write access through a shadow pte marked read only so that we can set
 430  *     the dirty bit
 431  *   - write access to a shadow pte marked read only so we can update the page
 432  *     dirty bitmap, when userspace requests it
 433  *   - mmio access; in this case we will never install a present shadow pte
 434  *   - normal guest page fault due to the guest pte marked not present, not
 435  *     writable, or not executable
 436  *
 437  *  Returns: 1 if we need to emulate the instruction, 0 otherwise, or
 438  *           a negative value on error.
 439  */
 440 static int FNAME(page_fault)(struct kvm_vcpu *vcpu, gva_t addr,
 441                                u32 error_code)
 442 {
 443         int write_fault = error_code & PFERR_WRITE_MASK;
 444         int user_fault = error_code & PFERR_USER_MASK;
 445         int fetch_fault = error_code & PFERR_FETCH_MASK;
 446         struct guest_walker walker;
 447         u64 *shadow_pte;
 448         int write_pt = 0;
 449         int r;
 450
 451         pgprintk("%s: addr %lx err %x\n", __FUNCTION__, addr, error_code);
 452         kvm_mmu_audit(vcpu, "pre page fault");
 453
 454         r = mmu_topup_memory_caches(vcpu);
 455         if (r)
 456                 return r;
 457
 458         /*
 459          * Look up the shadow pte for the faulting address.
 460          */
 461         r = FNAME(walk_addr)(&walker, vcpu, addr, write_fault, user_fault,
 462                              fetch_fault);
 463
 464         /*
 465          * The page is not mapped by the guest.  Let the guest handle it.
 466          */
 467         if (!r) {
 468                 pgprintk("%s: guest page fault\n", __FUNCTION__);
 469                 inject_page_fault(vcpu, addr, walker.error_code);
 470                 vcpu->last_pt_write_count = 0; /* reset fork detector */
 471                 return 0;
 472         }
 473
 474         shadow_pte = FNAME(fetch)(vcpu, addr, &walker, user_fault, write_fault,
 475                                   &write_pt);
 476         pgprintk("%s: shadow pte %p %llx ptwrite %d\n", __FUNCTION__,
 477                  shadow_pte, *shadow_pte, write_pt);
 478
 479         if (!write_pt)
 480                 vcpu->last_pt_write_count = 0; /* reset fork detector */
 481
 482         /*
 483          * mmio: emulate if accessible, otherwise its a guest fault.
 484          */
 485         if (is_io_pte(*shadow_pte))
 486                 return 1;
 487
 488         ++vcpu->stat.pf_fixed;
 489         kvm_mmu_audit(vcpu, "post page fault (fixed)");
 490
 491         return write_pt;
 492 }
 493
 494 static gpa_t FNAME(gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t vaddr)
 495 {
 496         struct guest_walker walker;
 497         gpa_t gpa = UNMAPPED_GVA;
 498         int r;
 499
 500         r = FNAME(walk_addr)(&walker, vcpu, vaddr, 0, 0, 0);
 501
 502         if (r) {
 503                 gpa = (gpa_t)walker.gfn << PAGE_SHIFT;
 504                 gpa |= vaddr & ~PAGE_MASK;
 505         }
 506
 507         return gpa;
 508 }
 509
 510 static void FNAME(prefetch_page)(struct kvm_vcpu *vcpu,
 511                                  struct kvm_mmu_page *sp)
 512 {
 513         int i;
 514         pt_element_t *gpt;
 515
 516         if (sp->role.metaphysical || PTTYPE == 32) {
 517                 nonpaging_prefetch_page(vcpu, sp);
 518                 return;
 519         }
 520
 521         gpt = kmap_atomic(gfn_to_page(vcpu->kvm, sp->gfn), KM_USER0);
 522         for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
 523                 if (is_present_pte(gpt[i]))
 524                         sp->spt[i] = shadow_trap_nonpresent_pte;
 525                 else
 526                         sp->spt[i] = shadow_notrap_nonpresent_pte;
 527         kunmap_atomic(gpt, KM_USER0);
 528 }
 529
 530 #undef pt_element_t
 531 #undef guest_walker
 532 #undef FNAME
 533 #undef PT_BASE_ADDR_MASK
 534 #undef PT_INDEX
 535 #undef SHADOW_PT_INDEX
 536 #undef PT_LEVEL_MASK
 537 #undef PT_DIR_BASE_ADDR_MASK
 538 #undef PT_LEVEL_BITS
 539 #undef PT_MAX_FULL_LEVELS