2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
9 * Copyright (C) 2006 Qumranet, Inc.
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
21 * We need the mmu code to access both 32-bit and 64-bit guest ptes,
22 * so the code in this file is compiled twice, once per pte size.
26 #define pt_element_t u64
27 #define guest_walker guest_walker64
28 #define FNAME(name) paging##64_##name
29 #define PT_BASE_ADDR_MASK PT64_BASE_ADDR_MASK
30 #define PT_DIR_BASE_ADDR_MASK PT64_DIR_BASE_ADDR_MASK
31 #define PT_INDEX(addr, level) PT64_INDEX(addr, level)
32 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
33 #define PT_LEVEL_MASK(level) PT64_LEVEL_MASK(level)
34 #define PT_PTE_COPY_MASK PT64_PTE_COPY_MASK
36 #define PT_MAX_FULL_LEVELS 4
38 #define PT_MAX_FULL_LEVELS 2
41 #define pt_element_t u32
42 #define guest_walker guest_walker32
43 #define FNAME(name) paging##32_##name
44 #define PT_BASE_ADDR_MASK PT32_BASE_ADDR_MASK
45 #define PT_DIR_BASE_ADDR_MASK PT32_DIR_BASE_ADDR_MASK
46 #define PT_INDEX(addr, level) PT32_INDEX(addr, level)
47 #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
48 #define PT_LEVEL_MASK(level) PT32_LEVEL_MASK(level)
49 #define PT_PTE_COPY_MASK PT32_PTE_COPY_MASK
50 #define PT_MAX_FULL_LEVELS 2
52 #error Invalid PTTYPE value
56 * The guest_walker structure emulates the behavior of the hardware page
61 gfn_t table_gfn
[PT_MAX_FULL_LEVELS
];
64 pt_element_t inherited_ar
;
69 * Fetch a guest pte for a guest virtual address
71 static void FNAME(walk_addr
)(struct guest_walker
*walker
,
72 struct kvm_vcpu
*vcpu
, gva_t addr
)
75 struct kvm_memory_slot
*slot
;
80 pgprintk("%s: addr %lx\n", __FUNCTION__
, addr
);
81 walker
->level
= vcpu
->mmu
.root_level
;
85 if (!is_long_mode(vcpu
)) {
86 walker
->ptep
= &vcpu
->pdptrs
[(addr
>> 30) & 3];
88 if (!(root
& PT_PRESENT_MASK
))
93 table_gfn
= (root
& PT64_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
94 walker
->table_gfn
[walker
->level
- 1] = table_gfn
;
95 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__
,
96 walker
->level
- 1, table_gfn
);
97 slot
= gfn_to_memslot(vcpu
->kvm
, table_gfn
);
98 hpa
= safe_gpa_to_hpa(vcpu
, root
& PT64_BASE_ADDR_MASK
);
99 walker
->table
= kmap_atomic(pfn_to_page(hpa
>> PAGE_SHIFT
), KM_USER0
);
101 ASSERT((!is_long_mode(vcpu
) && is_pae(vcpu
)) ||
102 (vcpu
->cr3
& ~(PAGE_MASK
| CR3_FLAGS_MASK
)) == 0);
104 walker
->inherited_ar
= PT_USER_MASK
| PT_WRITABLE_MASK
;
107 int index
= PT_INDEX(addr
, walker
->level
);
110 ptep
= &walker
->table
[index
];
111 ASSERT(((unsigned long)walker
->table
& PAGE_MASK
) ==
112 ((unsigned long)ptep
& PAGE_MASK
));
114 if (is_present_pte(*ptep
) && !(*ptep
& PT_ACCESSED_MASK
))
115 *ptep
|= PT_ACCESSED_MASK
;
117 if (!is_present_pte(*ptep
))
120 if (walker
->level
== PT_PAGE_TABLE_LEVEL
) {
121 walker
->gfn
= (*ptep
& PT_BASE_ADDR_MASK
)
126 if (walker
->level
== PT_DIRECTORY_LEVEL
127 && (*ptep
& PT_PAGE_SIZE_MASK
)
128 && (PTTYPE
== 64 || is_pse(vcpu
))) {
129 walker
->gfn
= (*ptep
& PT_DIR_BASE_ADDR_MASK
)
131 walker
->gfn
+= PT_INDEX(addr
, PT_PAGE_TABLE_LEVEL
);
135 if (walker
->level
!= 3 || is_long_mode(vcpu
))
136 walker
->inherited_ar
&= walker
->table
[index
];
137 table_gfn
= (*ptep
& PT_BASE_ADDR_MASK
) >> PAGE_SHIFT
;
138 paddr
= safe_gpa_to_hpa(vcpu
, *ptep
& PT_BASE_ADDR_MASK
);
139 kunmap_atomic(walker
->table
, KM_USER0
);
140 walker
->table
= kmap_atomic(pfn_to_page(paddr
>> PAGE_SHIFT
),
143 walker
->table_gfn
[walker
->level
- 1 ] = table_gfn
;
144 pgprintk("%s: table_gfn[%d] %lx\n", __FUNCTION__
,
145 walker
->level
- 1, table_gfn
);
148 pgprintk("%s: pte %llx\n", __FUNCTION__
, (u64
)*ptep
);
151 static void FNAME(release_walker
)(struct guest_walker
*walker
)
154 kunmap_atomic(walker
->table
, KM_USER0
);
157 static void FNAME(set_pte
)(struct kvm_vcpu
*vcpu
, u64 guest_pte
,
158 u64
*shadow_pte
, u64 access_bits
, gfn_t gfn
)
160 ASSERT(*shadow_pte
== 0);
161 access_bits
&= guest_pte
;
162 *shadow_pte
= (guest_pte
& PT_PTE_COPY_MASK
);
163 set_pte_common(vcpu
, shadow_pte
, guest_pte
& PT_BASE_ADDR_MASK
,
164 guest_pte
& PT_DIRTY_MASK
, access_bits
, gfn
);
167 static void FNAME(set_pde
)(struct kvm_vcpu
*vcpu
, u64 guest_pde
,
168 u64
*shadow_pte
, u64 access_bits
, gfn_t gfn
)
172 ASSERT(*shadow_pte
== 0);
173 access_bits
&= guest_pde
;
174 gaddr
= (gpa_t
)gfn
<< PAGE_SHIFT
;
175 if (PTTYPE
== 32 && is_cpuid_PSE36())
176 gaddr
|= (guest_pde
& PT32_DIR_PSE36_MASK
) <<
177 (32 - PT32_DIR_PSE36_SHIFT
);
178 *shadow_pte
= guest_pde
& PT_PTE_COPY_MASK
;
179 set_pte_common(vcpu
, shadow_pte
, gaddr
,
180 guest_pde
& PT_DIRTY_MASK
, access_bits
, gfn
);
184 * Fetch a shadow pte for a specific level in the paging hierarchy.
186 static u64
*FNAME(fetch
)(struct kvm_vcpu
*vcpu
, gva_t addr
,
187 struct guest_walker
*walker
)
191 u64
*prev_shadow_ent
= NULL
;
192 pt_element_t
*guest_ent
= walker
->ptep
;
194 if (!is_present_pte(*guest_ent
))
197 shadow_addr
= vcpu
->mmu
.root_hpa
;
198 level
= vcpu
->mmu
.shadow_root_level
;
199 if (level
== PT32E_ROOT_LEVEL
) {
200 shadow_addr
= vcpu
->mmu
.pae_root
[(addr
>> 30) & 3];
201 shadow_addr
&= PT64_BASE_ADDR_MASK
;
206 u32 index
= SHADOW_PT_INDEX(addr
, level
);
207 u64
*shadow_ent
= ((u64
*)__va(shadow_addr
)) + index
;
208 struct kvm_mmu_page
*shadow_page
;
213 if (is_present_pte(*shadow_ent
) || is_io_pte(*shadow_ent
)) {
214 if (level
== PT_PAGE_TABLE_LEVEL
)
216 shadow_addr
= *shadow_ent
& PT64_BASE_ADDR_MASK
;
217 prev_shadow_ent
= shadow_ent
;
221 if (level
== PT_PAGE_TABLE_LEVEL
) {
223 if (walker
->level
== PT_DIRECTORY_LEVEL
) {
225 *prev_shadow_ent
|= PT_SHADOW_PS_MARK
;
226 FNAME(set_pde
)(vcpu
, *guest_ent
, shadow_ent
,
227 walker
->inherited_ar
,
230 ASSERT(walker
->level
== PT_PAGE_TABLE_LEVEL
);
231 FNAME(set_pte
)(vcpu
, *guest_ent
, shadow_ent
,
232 walker
->inherited_ar
,
238 if (level
- 1 == PT_PAGE_TABLE_LEVEL
239 && walker
->level
== PT_DIRECTORY_LEVEL
) {
241 table_gfn
= (*guest_ent
& PT_BASE_ADDR_MASK
)
245 table_gfn
= walker
->table_gfn
[level
- 2];
247 shadow_page
= kvm_mmu_get_page(vcpu
, table_gfn
, addr
, level
-1,
248 metaphysical
, shadow_ent
);
249 shadow_addr
= shadow_page
->page_hpa
;
250 shadow_pte
= shadow_addr
| PT_PRESENT_MASK
| PT_ACCESSED_MASK
251 | PT_WRITABLE_MASK
| PT_USER_MASK
;
252 *shadow_ent
= shadow_pte
;
253 prev_shadow_ent
= shadow_ent
;
258 * The guest faulted for write. We need to
260 * - check write permissions
261 * - update the guest pte dirty bit
262 * - update our own dirty page tracking structures
264 static int FNAME(fix_write_pf
)(struct kvm_vcpu
*vcpu
,
266 struct guest_walker
*walker
,
271 pt_element_t
*guest_ent
;
274 struct kvm_mmu_page
*page
;
276 if (is_writeble_pte(*shadow_ent
))
277 return !user
|| (*shadow_ent
& PT_USER_MASK
);
279 writable_shadow
= *shadow_ent
& PT_SHADOW_WRITABLE_MASK
;
282 * User mode access. Fail if it's a kernel page or a read-only
285 if (!(*shadow_ent
& PT_SHADOW_USER_MASK
) || !writable_shadow
)
287 ASSERT(*shadow_ent
& PT_USER_MASK
);
290 * Kernel mode access. Fail if it's a read-only page and
291 * supervisor write protection is enabled.
293 if (!writable_shadow
) {
294 if (is_write_protection(vcpu
))
296 *shadow_ent
&= ~PT_USER_MASK
;
299 guest_ent
= walker
->ptep
;
301 if (!is_present_pte(*guest_ent
)) {
310 * Usermode page faults won't be for page table updates.
312 while ((page
= kvm_mmu_lookup_page(vcpu
, gfn
)) != NULL
) {
313 pgprintk("%s: zap %lx %x\n",
314 __FUNCTION__
, gfn
, page
->role
.word
);
315 kvm_mmu_zap_page(vcpu
, page
);
317 } else if (kvm_mmu_lookup_page(vcpu
, gfn
)) {
318 pgprintk("%s: found shadow page for %lx, marking ro\n",
320 *guest_ent
|= PT_DIRTY_MASK
;
324 mark_page_dirty(vcpu
->kvm
, gfn
);
325 *shadow_ent
|= PT_WRITABLE_MASK
;
326 *guest_ent
|= PT_DIRTY_MASK
;
327 rmap_add(vcpu
, shadow_ent
);
333 * Page fault handler. There are several causes for a page fault:
334 * - there is no shadow pte for the guest pte
335 * - write access through a shadow pte marked read only so that we can set
337 * - write access to a shadow pte marked read only so we can update the page
338 * dirty bitmap, when userspace requests it
339 * - mmio access; in this case we will never install a present shadow pte
340 * - normal guest page fault due to the guest pte marked not present, not
341 * writable, or not executable
343 * Returns: 1 if we need to emulate the instruction, 0 otherwise, or
344 * a negative value on error.
346 static int FNAME(page_fault
)(struct kvm_vcpu
*vcpu
, gva_t addr
,
349 int write_fault
= error_code
& PFERR_WRITE_MASK
;
350 int pte_present
= error_code
& PFERR_PRESENT_MASK
;
351 int user_fault
= error_code
& PFERR_USER_MASK
;
352 struct guest_walker walker
;
358 pgprintk("%s: addr %lx err %x\n", __FUNCTION__
, addr
, error_code
);
359 kvm_mmu_audit(vcpu
, "pre page fault");
361 r
= mmu_topup_memory_caches(vcpu
);
366 * Look up the shadow pte for the faulting address.
368 FNAME(walk_addr
)(&walker
, vcpu
, addr
);
369 shadow_pte
= FNAME(fetch
)(vcpu
, addr
, &walker
);
372 * The page is not mapped by the guest. Let the guest handle it.
375 pgprintk("%s: not mapped\n", __FUNCTION__
);
376 inject_page_fault(vcpu
, addr
, error_code
);
377 FNAME(release_walker
)(&walker
);
381 pgprintk("%s: shadow pte %p %llx\n", __FUNCTION__
,
382 shadow_pte
, *shadow_pte
);
385 * Update the shadow pte.
388 fixed
= FNAME(fix_write_pf
)(vcpu
, shadow_pte
, &walker
, addr
,
389 user_fault
, &write_pt
);
391 fixed
= fix_read_pf(shadow_pte
);
393 pgprintk("%s: updated shadow pte %p %llx\n", __FUNCTION__
,
394 shadow_pte
, *shadow_pte
);
396 FNAME(release_walker
)(&walker
);
399 * mmio: emulate if accessible, otherwise its a guest fault.
401 if (is_io_pte(*shadow_pte
)) {
402 if (may_access(*shadow_pte
, write_fault
, user_fault
))
404 pgprintk("%s: io work, no access\n", __FUNCTION__
);
405 inject_page_fault(vcpu
, addr
,
406 error_code
| PFERR_PRESENT_MASK
);
407 kvm_mmu_audit(vcpu
, "post page fault (io)");
412 * pte not present, guest page fault.
414 if (pte_present
&& !fixed
&& !write_pt
) {
415 inject_page_fault(vcpu
, addr
, error_code
);
416 kvm_mmu_audit(vcpu
, "post page fault (guest)");
421 kvm_mmu_audit(vcpu
, "post page fault (fixed)");
426 static gpa_t
FNAME(gva_to_gpa
)(struct kvm_vcpu
*vcpu
, gva_t vaddr
)
428 struct guest_walker walker
;
429 pt_element_t guest_pte
;
432 FNAME(walk_addr
)(&walker
, vcpu
, vaddr
);
433 guest_pte
= *walker
.ptep
;
434 FNAME(release_walker
)(&walker
);
436 if (!is_present_pte(guest_pte
))
439 if (walker
.level
== PT_DIRECTORY_LEVEL
) {
440 ASSERT((guest_pte
& PT_PAGE_SIZE_MASK
));
441 ASSERT(PTTYPE
== 64 || is_pse(vcpu
));
443 gpa
= (guest_pte
& PT_DIR_BASE_ADDR_MASK
) | (vaddr
&
444 (PT_LEVEL_MASK(PT_PAGE_TABLE_LEVEL
) | ~PAGE_MASK
));
446 if (PTTYPE
== 32 && is_cpuid_PSE36())
447 gpa
|= (guest_pte
& PT32_DIR_PSE36_MASK
) <<
448 (32 - PT32_DIR_PSE36_SHIFT
);
450 gpa
= (guest_pte
& PT_BASE_ADDR_MASK
);
451 gpa
|= (vaddr
& ~PAGE_MASK
);
460 #undef PT_BASE_ADDR_MASK
462 #undef SHADOW_PT_INDEX
464 #undef PT_PTE_COPY_MASK
465 #undef PT_NON_PTE_COPY_MASK
466 #undef PT_DIR_BASE_ADDR_MASK
467 #undef PT_MAX_FULL_LEVELS