2 * Kernel-based Virtual Machine driver for Linux
6 * Copyright (C) 2006 Qumranet, Inc.
9 * Yaniv Kamay <yaniv@qumranet.com>
10 * Avi Kivity <avi@qumranet.com>
12 * This work is licensed under the terms of the GNU GPL, version 2. See
13 * the COPYING file in the top-level directory.
18 #include "x86_emulate.h"
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/vmalloc.h>
24 #include <linux/highmem.h>
25 #include <linux/sched.h>
29 MODULE_AUTHOR("Qumranet");
30 MODULE_LICENSE("GPL");
32 #define IOPM_ALLOC_ORDER 2
33 #define MSRPM_ALLOC_ORDER 1
39 #define DR7_GD_MASK (1 << 13)
40 #define DR6_BD_MASK (1 << 13)
42 #define SEG_TYPE_LDT 2
43 #define SEG_TYPE_BUSY_TSS16 3
45 #define KVM_EFER_LMA (1 << 10)
46 #define KVM_EFER_LME (1 << 8)
48 #define SVM_FEATURE_NPT (1 << 0)
49 #define SVM_FEATURE_LBRV (1 << 1)
50 #define SVM_DEATURE_SVML (1 << 2)
52 static void kvm_reput_irq(struct vcpu_svm
*svm
);
54 static inline struct vcpu_svm
*to_svm(struct kvm_vcpu
*vcpu
)
56 return container_of(vcpu
, struct vcpu_svm
, vcpu
);
59 unsigned long iopm_base
;
60 unsigned long msrpm_base
;
62 struct kvm_ldttss_desc
{
65 unsigned base1
: 8, type
: 5, dpl
: 2, p
: 1;
66 unsigned limit1
: 4, zero0
: 3, g
: 1, base2
: 8;
69 } __attribute__((packed
));
77 struct kvm_ldttss_desc
*tss_desc
;
79 struct page
*save_area
;
82 static DEFINE_PER_CPU(struct svm_cpu_data
*, svm_data
);
83 static uint32_t svm_features
;
85 struct svm_init_data
{
90 static u32 msrpm_ranges
[] = {0, 0xc0000000, 0xc0010000};
92 #define NUM_MSR_MAPS ARRAY_SIZE(msrpm_ranges)
93 #define MSRS_RANGE_SIZE 2048
94 #define MSRS_IN_RANGE (MSRS_RANGE_SIZE * 8 / 2)
96 #define MAX_INST_SIZE 15
98 static inline u32
svm_has(u32 feat
)
100 return svm_features
& feat
;
103 static inline u8
pop_irq(struct kvm_vcpu
*vcpu
)
105 int word_index
= __ffs(vcpu
->irq_summary
);
106 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
107 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
109 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
110 if (!vcpu
->irq_pending
[word_index
])
111 clear_bit(word_index
, &vcpu
->irq_summary
);
115 static inline void push_irq(struct kvm_vcpu
*vcpu
, u8 irq
)
117 set_bit(irq
, vcpu
->irq_pending
);
118 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->irq_summary
);
121 static inline void clgi(void)
123 asm volatile (SVM_CLGI
);
126 static inline void stgi(void)
128 asm volatile (SVM_STGI
);
131 static inline void invlpga(unsigned long addr
, u32 asid
)
133 asm volatile (SVM_INVLPGA :: "a"(addr
), "c"(asid
));
136 static inline unsigned long kvm_read_cr2(void)
140 asm volatile ("mov %%cr2, %0" : "=r" (cr2
));
144 static inline void kvm_write_cr2(unsigned long val
)
146 asm volatile ("mov %0, %%cr2" :: "r" (val
));
149 static inline unsigned long read_dr6(void)
153 asm volatile ("mov %%dr6, %0" : "=r" (dr6
));
157 static inline void write_dr6(unsigned long val
)
159 asm volatile ("mov %0, %%dr6" :: "r" (val
));
162 static inline unsigned long read_dr7(void)
166 asm volatile ("mov %%dr7, %0" : "=r" (dr7
));
170 static inline void write_dr7(unsigned long val
)
172 asm volatile ("mov %0, %%dr7" :: "r" (val
));
175 static inline void force_new_asid(struct kvm_vcpu
*vcpu
)
177 to_svm(vcpu
)->asid_generation
--;
180 static inline void flush_guest_tlb(struct kvm_vcpu
*vcpu
)
182 force_new_asid(vcpu
);
185 static void svm_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
187 if (!(efer
& KVM_EFER_LMA
))
188 efer
&= ~KVM_EFER_LME
;
190 to_svm(vcpu
)->vmcb
->save
.efer
= efer
| MSR_EFER_SVME_MASK
;
191 vcpu
->shadow_efer
= efer
;
194 static void svm_inject_gp(struct kvm_vcpu
*vcpu
, unsigned error_code
)
196 struct vcpu_svm
*svm
= to_svm(vcpu
);
198 svm
->vmcb
->control
.event_inj
= SVM_EVTINJ_VALID
|
199 SVM_EVTINJ_VALID_ERR
|
200 SVM_EVTINJ_TYPE_EXEPT
|
202 svm
->vmcb
->control
.event_inj_err
= error_code
;
205 static void inject_ud(struct kvm_vcpu
*vcpu
)
207 to_svm(vcpu
)->vmcb
->control
.event_inj
= SVM_EVTINJ_VALID
|
208 SVM_EVTINJ_TYPE_EXEPT
|
212 static int is_page_fault(uint32_t info
)
214 info
&= SVM_EVTINJ_VEC_MASK
| SVM_EVTINJ_TYPE_MASK
| SVM_EVTINJ_VALID
;
215 return info
== (PF_VECTOR
| SVM_EVTINJ_VALID
| SVM_EVTINJ_TYPE_EXEPT
);
218 static int is_external_interrupt(u32 info
)
220 info
&= SVM_EVTINJ_TYPE_MASK
| SVM_EVTINJ_VALID
;
221 return info
== (SVM_EVTINJ_VALID
| SVM_EVTINJ_TYPE_INTR
);
224 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
226 struct vcpu_svm
*svm
= to_svm(vcpu
);
228 if (!svm
->next_rip
) {
229 printk(KERN_DEBUG
"%s: NOP\n", __FUNCTION__
);
232 if (svm
->next_rip
- svm
->vmcb
->save
.rip
> MAX_INST_SIZE
)
233 printk(KERN_ERR
"%s: ip 0x%llx next 0x%llx\n",
238 vcpu
->rip
= svm
->vmcb
->save
.rip
= svm
->next_rip
;
239 svm
->vmcb
->control
.int_state
&= ~SVM_INTERRUPT_SHADOW_MASK
;
241 vcpu
->interrupt_window_open
= 1;
244 static int has_svm(void)
246 uint32_t eax
, ebx
, ecx
, edx
;
248 if (boot_cpu_data
.x86_vendor
!= X86_VENDOR_AMD
) {
249 printk(KERN_INFO
"has_svm: not amd\n");
253 cpuid(0x80000000, &eax
, &ebx
, &ecx
, &edx
);
254 if (eax
< SVM_CPUID_FUNC
) {
255 printk(KERN_INFO
"has_svm: can't execute cpuid_8000000a\n");
259 cpuid(0x80000001, &eax
, &ebx
, &ecx
, &edx
);
260 if (!(ecx
& (1 << SVM_CPUID_FEATURE_SHIFT
))) {
261 printk(KERN_DEBUG
"has_svm: svm not available\n");
267 static void svm_hardware_disable(void *garbage
)
269 struct svm_cpu_data
*svm_data
270 = per_cpu(svm_data
, raw_smp_processor_id());
275 wrmsrl(MSR_VM_HSAVE_PA
, 0);
276 rdmsrl(MSR_EFER
, efer
);
277 wrmsrl(MSR_EFER
, efer
& ~MSR_EFER_SVME_MASK
);
278 per_cpu(svm_data
, raw_smp_processor_id()) = NULL
;
279 __free_page(svm_data
->save_area
);
284 static void svm_hardware_enable(void *garbage
)
287 struct svm_cpu_data
*svm_data
;
290 struct desc_ptr gdt_descr
;
292 struct desc_ptr gdt_descr
;
294 struct desc_struct
*gdt
;
295 int me
= raw_smp_processor_id();
298 printk(KERN_ERR
"svm_cpu_init: err EOPNOTSUPP on %d\n", me
);
301 svm_data
= per_cpu(svm_data
, me
);
304 printk(KERN_ERR
"svm_cpu_init: svm_data is NULL on %d\n",
309 svm_data
->asid_generation
= 1;
310 svm_data
->max_asid
= cpuid_ebx(SVM_CPUID_FUNC
) - 1;
311 svm_data
->next_asid
= svm_data
->max_asid
+ 1;
312 svm_features
= cpuid_edx(SVM_CPUID_FUNC
);
314 asm volatile ("sgdt %0" : "=m"(gdt_descr
));
315 gdt
= (struct desc_struct
*)gdt_descr
.address
;
316 svm_data
->tss_desc
= (struct kvm_ldttss_desc
*)(gdt
+ GDT_ENTRY_TSS
);
318 rdmsrl(MSR_EFER
, efer
);
319 wrmsrl(MSR_EFER
, efer
| MSR_EFER_SVME_MASK
);
321 wrmsrl(MSR_VM_HSAVE_PA
,
322 page_to_pfn(svm_data
->save_area
) << PAGE_SHIFT
);
325 static int svm_cpu_init(int cpu
)
327 struct svm_cpu_data
*svm_data
;
330 svm_data
= kzalloc(sizeof(struct svm_cpu_data
), GFP_KERNEL
);
334 svm_data
->save_area
= alloc_page(GFP_KERNEL
);
336 if (!svm_data
->save_area
)
339 per_cpu(svm_data
, cpu
) = svm_data
;
349 static void set_msr_interception(u32
*msrpm
, unsigned msr
,
354 for (i
= 0; i
< NUM_MSR_MAPS
; i
++) {
355 if (msr
>= msrpm_ranges
[i
] &&
356 msr
< msrpm_ranges
[i
] + MSRS_IN_RANGE
) {
357 u32 msr_offset
= (i
* MSRS_IN_RANGE
+ msr
-
358 msrpm_ranges
[i
]) * 2;
360 u32
*base
= msrpm
+ (msr_offset
/ 32);
361 u32 msr_shift
= msr_offset
% 32;
362 u32 mask
= ((write
) ? 0 : 2) | ((read
) ? 0 : 1);
363 *base
= (*base
& ~(0x3 << msr_shift
)) |
371 static __init
int svm_hardware_setup(void)
374 struct page
*iopm_pages
;
375 struct page
*msrpm_pages
;
376 void *iopm_va
, *msrpm_va
;
379 iopm_pages
= alloc_pages(GFP_KERNEL
, IOPM_ALLOC_ORDER
);
384 iopm_va
= page_address(iopm_pages
);
385 memset(iopm_va
, 0xff, PAGE_SIZE
* (1 << IOPM_ALLOC_ORDER
));
386 clear_bit(0x80, iopm_va
); /* allow direct access to PC debug port */
387 iopm_base
= page_to_pfn(iopm_pages
) << PAGE_SHIFT
;
390 msrpm_pages
= alloc_pages(GFP_KERNEL
, MSRPM_ALLOC_ORDER
);
396 msrpm_va
= page_address(msrpm_pages
);
397 memset(msrpm_va
, 0xff, PAGE_SIZE
* (1 << MSRPM_ALLOC_ORDER
));
398 msrpm_base
= page_to_pfn(msrpm_pages
) << PAGE_SHIFT
;
401 set_msr_interception(msrpm_va
, MSR_GS_BASE
, 1, 1);
402 set_msr_interception(msrpm_va
, MSR_FS_BASE
, 1, 1);
403 set_msr_interception(msrpm_va
, MSR_KERNEL_GS_BASE
, 1, 1);
404 set_msr_interception(msrpm_va
, MSR_LSTAR
, 1, 1);
405 set_msr_interception(msrpm_va
, MSR_CSTAR
, 1, 1);
406 set_msr_interception(msrpm_va
, MSR_SYSCALL_MASK
, 1, 1);
408 set_msr_interception(msrpm_va
, MSR_K6_STAR
, 1, 1);
409 set_msr_interception(msrpm_va
, MSR_IA32_SYSENTER_CS
, 1, 1);
410 set_msr_interception(msrpm_va
, MSR_IA32_SYSENTER_ESP
, 1, 1);
411 set_msr_interception(msrpm_va
, MSR_IA32_SYSENTER_EIP
, 1, 1);
413 for_each_online_cpu(cpu
) {
414 r
= svm_cpu_init(cpu
);
421 __free_pages(msrpm_pages
, MSRPM_ALLOC_ORDER
);
424 __free_pages(iopm_pages
, IOPM_ALLOC_ORDER
);
429 static __exit
void svm_hardware_unsetup(void)
431 __free_pages(pfn_to_page(msrpm_base
>> PAGE_SHIFT
), MSRPM_ALLOC_ORDER
);
432 __free_pages(pfn_to_page(iopm_base
>> PAGE_SHIFT
), IOPM_ALLOC_ORDER
);
433 iopm_base
= msrpm_base
= 0;
436 static void init_seg(struct vmcb_seg
*seg
)
439 seg
->attrib
= SVM_SELECTOR_P_MASK
| SVM_SELECTOR_S_MASK
|
440 SVM_SELECTOR_WRITE_MASK
; /* Read/Write Data Segment */
445 static void init_sys_seg(struct vmcb_seg
*seg
, uint32_t type
)
448 seg
->attrib
= SVM_SELECTOR_P_MASK
| type
;
453 static void init_vmcb(struct vmcb
*vmcb
)
455 struct vmcb_control_area
*control
= &vmcb
->control
;
456 struct vmcb_save_area
*save
= &vmcb
->save
;
458 control
->intercept_cr_read
= INTERCEPT_CR0_MASK
|
462 control
->intercept_cr_write
= INTERCEPT_CR0_MASK
|
466 control
->intercept_dr_read
= INTERCEPT_DR0_MASK
|
471 control
->intercept_dr_write
= INTERCEPT_DR0_MASK
|
478 control
->intercept_exceptions
= (1 << PF_VECTOR
) |
482 control
->intercept
= (1ULL << INTERCEPT_INTR
) |
483 (1ULL << INTERCEPT_NMI
) |
484 (1ULL << INTERCEPT_SMI
) |
486 * selective cr0 intercept bug?
487 * 0: 0f 22 d8 mov %eax,%cr3
488 * 3: 0f 20 c0 mov %cr0,%eax
489 * 6: 0d 00 00 00 80 or $0x80000000,%eax
490 * b: 0f 22 c0 mov %eax,%cr0
491 * set cr3 ->interception
492 * get cr0 ->interception
493 * set cr0 -> no interception
495 /* (1ULL << INTERCEPT_SELECTIVE_CR0) | */
496 (1ULL << INTERCEPT_CPUID
) |
497 (1ULL << INTERCEPT_INVD
) |
498 (1ULL << INTERCEPT_HLT
) |
499 (1ULL << INTERCEPT_INVLPGA
) |
500 (1ULL << INTERCEPT_IOIO_PROT
) |
501 (1ULL << INTERCEPT_MSR_PROT
) |
502 (1ULL << INTERCEPT_TASK_SWITCH
) |
503 (1ULL << INTERCEPT_SHUTDOWN
) |
504 (1ULL << INTERCEPT_VMRUN
) |
505 (1ULL << INTERCEPT_VMMCALL
) |
506 (1ULL << INTERCEPT_VMLOAD
) |
507 (1ULL << INTERCEPT_VMSAVE
) |
508 (1ULL << INTERCEPT_STGI
) |
509 (1ULL << INTERCEPT_CLGI
) |
510 (1ULL << INTERCEPT_SKINIT
) |
511 (1ULL << INTERCEPT_WBINVD
) |
512 (1ULL << INTERCEPT_MONITOR
) |
513 (1ULL << INTERCEPT_MWAIT
);
515 control
->iopm_base_pa
= iopm_base
;
516 control
->msrpm_base_pa
= msrpm_base
;
517 control
->tsc_offset
= 0;
518 control
->int_ctl
= V_INTR_MASKING_MASK
;
526 save
->cs
.selector
= 0xf000;
527 /* Executable/Readable Code Segment */
528 save
->cs
.attrib
= SVM_SELECTOR_READ_MASK
| SVM_SELECTOR_P_MASK
|
529 SVM_SELECTOR_S_MASK
| SVM_SELECTOR_CODE_MASK
;
530 save
->cs
.limit
= 0xffff;
532 * cs.base should really be 0xffff0000, but vmx can't handle that, so
533 * be consistent with it.
535 * Replace when we have real mode working for vmx.
537 save
->cs
.base
= 0xf0000;
539 save
->gdtr
.limit
= 0xffff;
540 save
->idtr
.limit
= 0xffff;
542 init_sys_seg(&save
->ldtr
, SEG_TYPE_LDT
);
543 init_sys_seg(&save
->tr
, SEG_TYPE_BUSY_TSS16
);
545 save
->efer
= MSR_EFER_SVME_MASK
;
546 save
->dr6
= 0xffff0ff0;
549 save
->rip
= 0x0000fff0;
552 * cr0 val on cpu init should be 0x60000010, we enable cpu
553 * cache by default. the orderly way is to enable cache in bios.
555 save
->cr0
= 0x00000010 | X86_CR0_PG
| X86_CR0_WP
;
556 save
->cr4
= X86_CR4_PAE
;
560 static int svm_vcpu_reset(struct kvm_vcpu
*vcpu
)
562 struct vcpu_svm
*svm
= to_svm(vcpu
);
564 init_vmcb(svm
->vmcb
);
566 if (vcpu
->vcpu_id
!= 0) {
567 svm
->vmcb
->save
.rip
= 0;
568 svm
->vmcb
->save
.cs
.base
= svm
->vcpu
.sipi_vector
<< 12;
569 svm
->vmcb
->save
.cs
.selector
= svm
->vcpu
.sipi_vector
<< 8;
575 static struct kvm_vcpu
*svm_create_vcpu(struct kvm
*kvm
, unsigned int id
)
577 struct vcpu_svm
*svm
;
581 svm
= kmem_cache_zalloc(kvm_vcpu_cache
, GFP_KERNEL
);
587 err
= kvm_vcpu_init(&svm
->vcpu
, kvm
, id
);
591 page
= alloc_page(GFP_KERNEL
);
597 svm
->vmcb
= page_address(page
);
598 clear_page(svm
->vmcb
);
599 svm
->vmcb_pa
= page_to_pfn(page
) << PAGE_SHIFT
;
600 svm
->asid_generation
= 0;
601 memset(svm
->db_regs
, 0, sizeof(svm
->db_regs
));
602 init_vmcb(svm
->vmcb
);
605 svm
->vcpu
.fpu_active
= 1;
606 svm
->vcpu
.apic_base
= 0xfee00000 | MSR_IA32_APICBASE_ENABLE
;
607 if (svm
->vcpu
.vcpu_id
== 0)
608 svm
->vcpu
.apic_base
|= MSR_IA32_APICBASE_BSP
;
613 kvm_vcpu_uninit(&svm
->vcpu
);
615 kmem_cache_free(kvm_vcpu_cache
, svm
);
620 static void svm_free_vcpu(struct kvm_vcpu
*vcpu
)
622 struct vcpu_svm
*svm
= to_svm(vcpu
);
624 __free_page(pfn_to_page(svm
->vmcb_pa
>> PAGE_SHIFT
));
625 kvm_vcpu_uninit(vcpu
);
626 kmem_cache_free(kvm_vcpu_cache
, svm
);
629 static void svm_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
631 struct vcpu_svm
*svm
= to_svm(vcpu
);
634 if (unlikely(cpu
!= vcpu
->cpu
)) {
638 * Make sure that the guest sees a monotonically
642 delta
= vcpu
->host_tsc
- tsc_this
;
643 svm
->vmcb
->control
.tsc_offset
+= delta
;
645 kvm_migrate_apic_timer(vcpu
);
648 for (i
= 0; i
< NR_HOST_SAVE_USER_MSRS
; i
++)
649 rdmsrl(host_save_user_msrs
[i
], svm
->host_user_msrs
[i
]);
652 static void svm_vcpu_put(struct kvm_vcpu
*vcpu
)
654 struct vcpu_svm
*svm
= to_svm(vcpu
);
657 ++vcpu
->stat
.host_state_reload
;
658 for (i
= 0; i
< NR_HOST_SAVE_USER_MSRS
; i
++)
659 wrmsrl(host_save_user_msrs
[i
], svm
->host_user_msrs
[i
]);
661 rdtscll(vcpu
->host_tsc
);
662 kvm_put_guest_fpu(vcpu
);
665 static void svm_vcpu_decache(struct kvm_vcpu
*vcpu
)
669 static void svm_cache_regs(struct kvm_vcpu
*vcpu
)
671 struct vcpu_svm
*svm
= to_svm(vcpu
);
673 vcpu
->regs
[VCPU_REGS_RAX
] = svm
->vmcb
->save
.rax
;
674 vcpu
->regs
[VCPU_REGS_RSP
] = svm
->vmcb
->save
.rsp
;
675 vcpu
->rip
= svm
->vmcb
->save
.rip
;
678 static void svm_decache_regs(struct kvm_vcpu
*vcpu
)
680 struct vcpu_svm
*svm
= to_svm(vcpu
);
681 svm
->vmcb
->save
.rax
= vcpu
->regs
[VCPU_REGS_RAX
];
682 svm
->vmcb
->save
.rsp
= vcpu
->regs
[VCPU_REGS_RSP
];
683 svm
->vmcb
->save
.rip
= vcpu
->rip
;
686 static unsigned long svm_get_rflags(struct kvm_vcpu
*vcpu
)
688 return to_svm(vcpu
)->vmcb
->save
.rflags
;
691 static void svm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
693 to_svm(vcpu
)->vmcb
->save
.rflags
= rflags
;
696 static struct vmcb_seg
*svm_seg(struct kvm_vcpu
*vcpu
, int seg
)
698 struct vmcb_save_area
*save
= &to_svm(vcpu
)->vmcb
->save
;
701 case VCPU_SREG_CS
: return &save
->cs
;
702 case VCPU_SREG_DS
: return &save
->ds
;
703 case VCPU_SREG_ES
: return &save
->es
;
704 case VCPU_SREG_FS
: return &save
->fs
;
705 case VCPU_SREG_GS
: return &save
->gs
;
706 case VCPU_SREG_SS
: return &save
->ss
;
707 case VCPU_SREG_TR
: return &save
->tr
;
708 case VCPU_SREG_LDTR
: return &save
->ldtr
;
714 static u64
svm_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
716 struct vmcb_seg
*s
= svm_seg(vcpu
, seg
);
721 static void svm_get_segment(struct kvm_vcpu
*vcpu
,
722 struct kvm_segment
*var
, int seg
)
724 struct vmcb_seg
*s
= svm_seg(vcpu
, seg
);
727 var
->limit
= s
->limit
;
728 var
->selector
= s
->selector
;
729 var
->type
= s
->attrib
& SVM_SELECTOR_TYPE_MASK
;
730 var
->s
= (s
->attrib
>> SVM_SELECTOR_S_SHIFT
) & 1;
731 var
->dpl
= (s
->attrib
>> SVM_SELECTOR_DPL_SHIFT
) & 3;
732 var
->present
= (s
->attrib
>> SVM_SELECTOR_P_SHIFT
) & 1;
733 var
->avl
= (s
->attrib
>> SVM_SELECTOR_AVL_SHIFT
) & 1;
734 var
->l
= (s
->attrib
>> SVM_SELECTOR_L_SHIFT
) & 1;
735 var
->db
= (s
->attrib
>> SVM_SELECTOR_DB_SHIFT
) & 1;
736 var
->g
= (s
->attrib
>> SVM_SELECTOR_G_SHIFT
) & 1;
737 var
->unusable
= !var
->present
;
740 static void svm_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
742 struct vcpu_svm
*svm
= to_svm(vcpu
);
744 dt
->limit
= svm
->vmcb
->save
.idtr
.limit
;
745 dt
->base
= svm
->vmcb
->save
.idtr
.base
;
748 static void svm_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
750 struct vcpu_svm
*svm
= to_svm(vcpu
);
752 svm
->vmcb
->save
.idtr
.limit
= dt
->limit
;
753 svm
->vmcb
->save
.idtr
.base
= dt
->base
;
756 static void svm_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
758 struct vcpu_svm
*svm
= to_svm(vcpu
);
760 dt
->limit
= svm
->vmcb
->save
.gdtr
.limit
;
761 dt
->base
= svm
->vmcb
->save
.gdtr
.base
;
764 static void svm_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
766 struct vcpu_svm
*svm
= to_svm(vcpu
);
768 svm
->vmcb
->save
.gdtr
.limit
= dt
->limit
;
769 svm
->vmcb
->save
.gdtr
.base
= dt
->base
;
772 static void svm_decache_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
776 static void svm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
778 struct vcpu_svm
*svm
= to_svm(vcpu
);
781 if (vcpu
->shadow_efer
& KVM_EFER_LME
) {
782 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
783 vcpu
->shadow_efer
|= KVM_EFER_LMA
;
784 svm
->vmcb
->save
.efer
|= KVM_EFER_LMA
| KVM_EFER_LME
;
787 if (is_paging(vcpu
) && !(cr0
& X86_CR0_PG
)) {
788 vcpu
->shadow_efer
&= ~KVM_EFER_LMA
;
789 svm
->vmcb
->save
.efer
&= ~(KVM_EFER_LMA
| KVM_EFER_LME
);
793 if ((vcpu
->cr0
& X86_CR0_TS
) && !(cr0
& X86_CR0_TS
)) {
794 svm
->vmcb
->control
.intercept_exceptions
&= ~(1 << NM_VECTOR
);
795 vcpu
->fpu_active
= 1;
799 cr0
|= X86_CR0_PG
| X86_CR0_WP
;
800 cr0
&= ~(X86_CR0_CD
| X86_CR0_NW
);
801 svm
->vmcb
->save
.cr0
= cr0
;
804 static void svm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
807 to_svm(vcpu
)->vmcb
->save
.cr4
= cr4
| X86_CR4_PAE
;
810 static void svm_set_segment(struct kvm_vcpu
*vcpu
,
811 struct kvm_segment
*var
, int seg
)
813 struct vcpu_svm
*svm
= to_svm(vcpu
);
814 struct vmcb_seg
*s
= svm_seg(vcpu
, seg
);
817 s
->limit
= var
->limit
;
818 s
->selector
= var
->selector
;
822 s
->attrib
= (var
->type
& SVM_SELECTOR_TYPE_MASK
);
823 s
->attrib
|= (var
->s
& 1) << SVM_SELECTOR_S_SHIFT
;
824 s
->attrib
|= (var
->dpl
& 3) << SVM_SELECTOR_DPL_SHIFT
;
825 s
->attrib
|= (var
->present
& 1) << SVM_SELECTOR_P_SHIFT
;
826 s
->attrib
|= (var
->avl
& 1) << SVM_SELECTOR_AVL_SHIFT
;
827 s
->attrib
|= (var
->l
& 1) << SVM_SELECTOR_L_SHIFT
;
828 s
->attrib
|= (var
->db
& 1) << SVM_SELECTOR_DB_SHIFT
;
829 s
->attrib
|= (var
->g
& 1) << SVM_SELECTOR_G_SHIFT
;
831 if (seg
== VCPU_SREG_CS
)
833 = (svm
->vmcb
->save
.cs
.attrib
834 >> SVM_SELECTOR_DPL_SHIFT
) & 3;
840 svm(vcpu)->vmcb->control.int_ctl &= ~V_TPR_MASK;
841 svm(vcpu)->vmcb->control.int_ctl |= (sregs->cr8 & V_TPR_MASK);
845 static int svm_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
850 static int svm_get_irq(struct kvm_vcpu
*vcpu
)
852 struct vcpu_svm
*svm
= to_svm(vcpu
);
853 u32 exit_int_info
= svm
->vmcb
->control
.exit_int_info
;
855 if (is_external_interrupt(exit_int_info
))
856 return exit_int_info
& SVM_EVTINJ_VEC_MASK
;
860 static void load_host_msrs(struct kvm_vcpu
*vcpu
)
863 wrmsrl(MSR_GS_BASE
, to_svm(vcpu
)->host_gs_base
);
867 static void save_host_msrs(struct kvm_vcpu
*vcpu
)
870 rdmsrl(MSR_GS_BASE
, to_svm(vcpu
)->host_gs_base
);
874 static void new_asid(struct vcpu_svm
*svm
, struct svm_cpu_data
*svm_data
)
876 if (svm_data
->next_asid
> svm_data
->max_asid
) {
877 ++svm_data
->asid_generation
;
878 svm_data
->next_asid
= 1;
879 svm
->vmcb
->control
.tlb_ctl
= TLB_CONTROL_FLUSH_ALL_ASID
;
882 svm
->vcpu
.cpu
= svm_data
->cpu
;
883 svm
->asid_generation
= svm_data
->asid_generation
;
884 svm
->vmcb
->control
.asid
= svm_data
->next_asid
++;
887 static unsigned long svm_get_dr(struct kvm_vcpu
*vcpu
, int dr
)
889 return to_svm(vcpu
)->db_regs
[dr
];
892 static void svm_set_dr(struct kvm_vcpu
*vcpu
, int dr
, unsigned long value
,
895 struct vcpu_svm
*svm
= to_svm(vcpu
);
899 if (svm
->vmcb
->save
.dr7
& DR7_GD_MASK
) {
900 svm
->vmcb
->save
.dr7
&= ~DR7_GD_MASK
;
901 svm
->vmcb
->save
.dr6
|= DR6_BD_MASK
;
902 *exception
= DB_VECTOR
;
908 svm
->db_regs
[dr
] = value
;
911 if (vcpu
->cr4
& X86_CR4_DE
) {
912 *exception
= UD_VECTOR
;
916 if (value
& ~((1ULL << 32) - 1)) {
917 *exception
= GP_VECTOR
;
920 svm
->vmcb
->save
.dr7
= value
;
924 printk(KERN_DEBUG
"%s: unexpected dr %u\n",
926 *exception
= UD_VECTOR
;
931 static int pf_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
933 u32 exit_int_info
= svm
->vmcb
->control
.exit_int_info
;
934 struct kvm
*kvm
= svm
->vcpu
.kvm
;
938 if (!irqchip_in_kernel(kvm
) &&
939 is_external_interrupt(exit_int_info
))
940 push_irq(&svm
->vcpu
, exit_int_info
& SVM_EVTINJ_VEC_MASK
);
942 fault_address
= svm
->vmcb
->control
.exit_info_2
;
943 error_code
= svm
->vmcb
->control
.exit_info_1
;
944 return kvm_mmu_page_fault(&svm
->vcpu
, fault_address
, error_code
);
947 static int ud_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
951 er
= emulate_instruction(&svm
->vcpu
, kvm_run
, 0, 0, 0);
952 if (er
!= EMULATE_DONE
)
953 inject_ud(&svm
->vcpu
);
958 static int nm_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
960 svm
->vmcb
->control
.intercept_exceptions
&= ~(1 << NM_VECTOR
);
961 if (!(svm
->vcpu
.cr0
& X86_CR0_TS
))
962 svm
->vmcb
->save
.cr0
&= ~X86_CR0_TS
;
963 svm
->vcpu
.fpu_active
= 1;
968 static int shutdown_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
971 * VMCB is undefined after a SHUTDOWN intercept
972 * so reinitialize it.
974 clear_page(svm
->vmcb
);
975 init_vmcb(svm
->vmcb
);
977 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
981 static int io_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
983 u32 io_info
= svm
->vmcb
->control
.exit_info_1
; /* address size bug? */
984 int size
, down
, in
, string
, rep
;
987 ++svm
->vcpu
.stat
.io_exits
;
989 svm
->next_rip
= svm
->vmcb
->control
.exit_info_2
;
991 string
= (io_info
& SVM_IOIO_STR_MASK
) != 0;
994 if (emulate_instruction(&svm
->vcpu
,
995 kvm_run
, 0, 0, 0) == EMULATE_DO_MMIO
)
1000 in
= (io_info
& SVM_IOIO_TYPE_MASK
) != 0;
1001 port
= io_info
>> 16;
1002 size
= (io_info
& SVM_IOIO_SIZE_MASK
) >> SVM_IOIO_SIZE_SHIFT
;
1003 rep
= (io_info
& SVM_IOIO_REP_MASK
) != 0;
1004 down
= (svm
->vmcb
->save
.rflags
& X86_EFLAGS_DF
) != 0;
1006 return kvm_emulate_pio(&svm
->vcpu
, kvm_run
, in
, size
, port
);
1009 static int nop_on_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1014 static int halt_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1016 svm
->next_rip
= svm
->vmcb
->save
.rip
+ 1;
1017 skip_emulated_instruction(&svm
->vcpu
);
1018 return kvm_emulate_halt(&svm
->vcpu
);
1021 static int vmmcall_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1023 svm
->next_rip
= svm
->vmcb
->save
.rip
+ 3;
1024 skip_emulated_instruction(&svm
->vcpu
);
1025 kvm_emulate_hypercall(&svm
->vcpu
);
1029 static int invalid_op_interception(struct vcpu_svm
*svm
,
1030 struct kvm_run
*kvm_run
)
1032 inject_ud(&svm
->vcpu
);
1036 static int task_switch_interception(struct vcpu_svm
*svm
,
1037 struct kvm_run
*kvm_run
)
1039 pr_unimpl(&svm
->vcpu
, "%s: task switch is unsupported\n", __FUNCTION__
);
1040 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1044 static int cpuid_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1046 svm
->next_rip
= svm
->vmcb
->save
.rip
+ 2;
1047 kvm_emulate_cpuid(&svm
->vcpu
);
1051 static int emulate_on_interception(struct vcpu_svm
*svm
,
1052 struct kvm_run
*kvm_run
)
1054 if (emulate_instruction(&svm
->vcpu
, NULL
, 0, 0, 0) != EMULATE_DONE
)
1055 pr_unimpl(&svm
->vcpu
, "%s: failed\n", __FUNCTION__
);
1059 static int svm_get_msr(struct kvm_vcpu
*vcpu
, unsigned ecx
, u64
*data
)
1061 struct vcpu_svm
*svm
= to_svm(vcpu
);
1064 case MSR_IA32_TIME_STAMP_COUNTER
: {
1068 *data
= svm
->vmcb
->control
.tsc_offset
+ tsc
;
1072 *data
= svm
->vmcb
->save
.star
;
1074 #ifdef CONFIG_X86_64
1076 *data
= svm
->vmcb
->save
.lstar
;
1079 *data
= svm
->vmcb
->save
.cstar
;
1081 case MSR_KERNEL_GS_BASE
:
1082 *data
= svm
->vmcb
->save
.kernel_gs_base
;
1084 case MSR_SYSCALL_MASK
:
1085 *data
= svm
->vmcb
->save
.sfmask
;
1088 case MSR_IA32_SYSENTER_CS
:
1089 *data
= svm
->vmcb
->save
.sysenter_cs
;
1091 case MSR_IA32_SYSENTER_EIP
:
1092 *data
= svm
->vmcb
->save
.sysenter_eip
;
1094 case MSR_IA32_SYSENTER_ESP
:
1095 *data
= svm
->vmcb
->save
.sysenter_esp
;
1098 return kvm_get_msr_common(vcpu
, ecx
, data
);
1103 static int rdmsr_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1105 u32 ecx
= svm
->vcpu
.regs
[VCPU_REGS_RCX
];
1108 if (svm_get_msr(&svm
->vcpu
, ecx
, &data
))
1109 svm_inject_gp(&svm
->vcpu
, 0);
1111 svm
->vmcb
->save
.rax
= data
& 0xffffffff;
1112 svm
->vcpu
.regs
[VCPU_REGS_RDX
] = data
>> 32;
1113 svm
->next_rip
= svm
->vmcb
->save
.rip
+ 2;
1114 skip_emulated_instruction(&svm
->vcpu
);
1119 static int svm_set_msr(struct kvm_vcpu
*vcpu
, unsigned ecx
, u64 data
)
1121 struct vcpu_svm
*svm
= to_svm(vcpu
);
1124 case MSR_IA32_TIME_STAMP_COUNTER
: {
1128 svm
->vmcb
->control
.tsc_offset
= data
- tsc
;
1132 svm
->vmcb
->save
.star
= data
;
1134 #ifdef CONFIG_X86_64
1136 svm
->vmcb
->save
.lstar
= data
;
1139 svm
->vmcb
->save
.cstar
= data
;
1141 case MSR_KERNEL_GS_BASE
:
1142 svm
->vmcb
->save
.kernel_gs_base
= data
;
1144 case MSR_SYSCALL_MASK
:
1145 svm
->vmcb
->save
.sfmask
= data
;
1148 case MSR_IA32_SYSENTER_CS
:
1149 svm
->vmcb
->save
.sysenter_cs
= data
;
1151 case MSR_IA32_SYSENTER_EIP
:
1152 svm
->vmcb
->save
.sysenter_eip
= data
;
1154 case MSR_IA32_SYSENTER_ESP
:
1155 svm
->vmcb
->save
.sysenter_esp
= data
;
1158 return kvm_set_msr_common(vcpu
, ecx
, data
);
1163 static int wrmsr_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1165 u32 ecx
= svm
->vcpu
.regs
[VCPU_REGS_RCX
];
1166 u64 data
= (svm
->vmcb
->save
.rax
& -1u)
1167 | ((u64
)(svm
->vcpu
.regs
[VCPU_REGS_RDX
] & -1u) << 32);
1168 svm
->next_rip
= svm
->vmcb
->save
.rip
+ 2;
1169 if (svm_set_msr(&svm
->vcpu
, ecx
, data
))
1170 svm_inject_gp(&svm
->vcpu
, 0);
1172 skip_emulated_instruction(&svm
->vcpu
);
1176 static int msr_interception(struct vcpu_svm
*svm
, struct kvm_run
*kvm_run
)
1178 if (svm
->vmcb
->control
.exit_info_1
)
1179 return wrmsr_interception(svm
, kvm_run
);
1181 return rdmsr_interception(svm
, kvm_run
);
1184 static int interrupt_window_interception(struct vcpu_svm
*svm
,
1185 struct kvm_run
*kvm_run
)
1187 svm
->vmcb
->control
.intercept
&= ~(1ULL << INTERCEPT_VINTR
);
1188 svm
->vmcb
->control
.int_ctl
&= ~V_IRQ_MASK
;
1190 * If the user space waits to inject interrupts, exit as soon as
1193 if (kvm_run
->request_interrupt_window
&&
1194 !svm
->vcpu
.irq_summary
) {
1195 ++svm
->vcpu
.stat
.irq_window_exits
;
1196 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
1203 static int (*svm_exit_handlers
[])(struct vcpu_svm
*svm
,
1204 struct kvm_run
*kvm_run
) = {
1205 [SVM_EXIT_READ_CR0
] = emulate_on_interception
,
1206 [SVM_EXIT_READ_CR3
] = emulate_on_interception
,
1207 [SVM_EXIT_READ_CR4
] = emulate_on_interception
,
1209 [SVM_EXIT_WRITE_CR0
] = emulate_on_interception
,
1210 [SVM_EXIT_WRITE_CR3
] = emulate_on_interception
,
1211 [SVM_EXIT_WRITE_CR4
] = emulate_on_interception
,
1212 [SVM_EXIT_READ_DR0
] = emulate_on_interception
,
1213 [SVM_EXIT_READ_DR1
] = emulate_on_interception
,
1214 [SVM_EXIT_READ_DR2
] = emulate_on_interception
,
1215 [SVM_EXIT_READ_DR3
] = emulate_on_interception
,
1216 [SVM_EXIT_WRITE_DR0
] = emulate_on_interception
,
1217 [SVM_EXIT_WRITE_DR1
] = emulate_on_interception
,
1218 [SVM_EXIT_WRITE_DR2
] = emulate_on_interception
,
1219 [SVM_EXIT_WRITE_DR3
] = emulate_on_interception
,
1220 [SVM_EXIT_WRITE_DR5
] = emulate_on_interception
,
1221 [SVM_EXIT_WRITE_DR7
] = emulate_on_interception
,
1222 [SVM_EXIT_EXCP_BASE
+ UD_VECTOR
] = ud_interception
,
1223 [SVM_EXIT_EXCP_BASE
+ PF_VECTOR
] = pf_interception
,
1224 [SVM_EXIT_EXCP_BASE
+ NM_VECTOR
] = nm_interception
,
1225 [SVM_EXIT_INTR
] = nop_on_interception
,
1226 [SVM_EXIT_NMI
] = nop_on_interception
,
1227 [SVM_EXIT_SMI
] = nop_on_interception
,
1228 [SVM_EXIT_INIT
] = nop_on_interception
,
1229 [SVM_EXIT_VINTR
] = interrupt_window_interception
,
1230 /* [SVM_EXIT_CR0_SEL_WRITE] = emulate_on_interception, */
1231 [SVM_EXIT_CPUID
] = cpuid_interception
,
1232 [SVM_EXIT_INVD
] = emulate_on_interception
,
1233 [SVM_EXIT_HLT
] = halt_interception
,
1234 [SVM_EXIT_INVLPG
] = emulate_on_interception
,
1235 [SVM_EXIT_INVLPGA
] = invalid_op_interception
,
1236 [SVM_EXIT_IOIO
] = io_interception
,
1237 [SVM_EXIT_MSR
] = msr_interception
,
1238 [SVM_EXIT_TASK_SWITCH
] = task_switch_interception
,
1239 [SVM_EXIT_SHUTDOWN
] = shutdown_interception
,
1240 [SVM_EXIT_VMRUN
] = invalid_op_interception
,
1241 [SVM_EXIT_VMMCALL
] = vmmcall_interception
,
1242 [SVM_EXIT_VMLOAD
] = invalid_op_interception
,
1243 [SVM_EXIT_VMSAVE
] = invalid_op_interception
,
1244 [SVM_EXIT_STGI
] = invalid_op_interception
,
1245 [SVM_EXIT_CLGI
] = invalid_op_interception
,
1246 [SVM_EXIT_SKINIT
] = invalid_op_interception
,
1247 [SVM_EXIT_WBINVD
] = emulate_on_interception
,
1248 [SVM_EXIT_MONITOR
] = invalid_op_interception
,
1249 [SVM_EXIT_MWAIT
] = invalid_op_interception
,
1253 static int handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
1255 struct vcpu_svm
*svm
= to_svm(vcpu
);
1256 u32 exit_code
= svm
->vmcb
->control
.exit_code
;
1260 if (svm
->vmcb
->control
.exit_code
== SVM_EXIT_ERR
) {
1261 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
1262 kvm_run
->fail_entry
.hardware_entry_failure_reason
1263 = svm
->vmcb
->control
.exit_code
;
1267 if (is_external_interrupt(svm
->vmcb
->control
.exit_int_info
) &&
1268 exit_code
!= SVM_EXIT_EXCP_BASE
+ PF_VECTOR
)
1269 printk(KERN_ERR
"%s: unexpected exit_ini_info 0x%x "
1271 __FUNCTION__
, svm
->vmcb
->control
.exit_int_info
,
1274 if (exit_code
>= ARRAY_SIZE(svm_exit_handlers
)
1275 || !svm_exit_handlers
[exit_code
]) {
1276 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1277 kvm_run
->hw
.hardware_exit_reason
= exit_code
;
1281 return svm_exit_handlers
[exit_code
](svm
, kvm_run
);
1284 static void reload_tss(struct kvm_vcpu
*vcpu
)
1286 int cpu
= raw_smp_processor_id();
1288 struct svm_cpu_data
*svm_data
= per_cpu(svm_data
, cpu
);
1289 svm_data
->tss_desc
->type
= 9; /* available 32/64-bit TSS */
1293 static void pre_svm_run(struct vcpu_svm
*svm
)
1295 int cpu
= raw_smp_processor_id();
1297 struct svm_cpu_data
*svm_data
= per_cpu(svm_data
, cpu
);
1299 svm
->vmcb
->control
.tlb_ctl
= TLB_CONTROL_DO_NOTHING
;
1300 if (svm
->vcpu
.cpu
!= cpu
||
1301 svm
->asid_generation
!= svm_data
->asid_generation
)
1302 new_asid(svm
, svm_data
);
1306 static inline void svm_inject_irq(struct vcpu_svm
*svm
, int irq
)
1308 struct vmcb_control_area
*control
;
1310 control
= &svm
->vmcb
->control
;
1311 control
->int_vector
= irq
;
1312 control
->int_ctl
&= ~V_INTR_PRIO_MASK
;
1313 control
->int_ctl
|= V_IRQ_MASK
|
1314 ((/*control->int_vector >> 4*/ 0xf) << V_INTR_PRIO_SHIFT
);
1317 static void svm_set_irq(struct kvm_vcpu
*vcpu
, int irq
)
1319 struct vcpu_svm
*svm
= to_svm(vcpu
);
1321 svm_inject_irq(svm
, irq
);
1324 static void svm_intr_assist(struct kvm_vcpu
*vcpu
)
1326 struct vcpu_svm
*svm
= to_svm(vcpu
);
1327 struct vmcb
*vmcb
= svm
->vmcb
;
1328 int intr_vector
= -1;
1330 if ((vmcb
->control
.exit_int_info
& SVM_EVTINJ_VALID
) &&
1331 ((vmcb
->control
.exit_int_info
& SVM_EVTINJ_TYPE_MASK
) == 0)) {
1332 intr_vector
= vmcb
->control
.exit_int_info
&
1333 SVM_EVTINJ_VEC_MASK
;
1334 vmcb
->control
.exit_int_info
= 0;
1335 svm_inject_irq(svm
, intr_vector
);
1339 if (vmcb
->control
.int_ctl
& V_IRQ_MASK
)
1342 if (!kvm_cpu_has_interrupt(vcpu
))
1345 if (!(vmcb
->save
.rflags
& X86_EFLAGS_IF
) ||
1346 (vmcb
->control
.int_state
& SVM_INTERRUPT_SHADOW_MASK
) ||
1347 (vmcb
->control
.event_inj
& SVM_EVTINJ_VALID
)) {
1348 /* unable to deliver irq, set pending irq */
1349 vmcb
->control
.intercept
|= (1ULL << INTERCEPT_VINTR
);
1350 svm_inject_irq(svm
, 0x0);
1353 /* Okay, we can deliver the interrupt: grab it and update PIC state. */
1354 intr_vector
= kvm_cpu_get_interrupt(vcpu
);
1355 svm_inject_irq(svm
, intr_vector
);
1356 kvm_timer_intr_post(vcpu
, intr_vector
);
1359 static void kvm_reput_irq(struct vcpu_svm
*svm
)
1361 struct vmcb_control_area
*control
= &svm
->vmcb
->control
;
1363 if ((control
->int_ctl
& V_IRQ_MASK
)
1364 && !irqchip_in_kernel(svm
->vcpu
.kvm
)) {
1365 control
->int_ctl
&= ~V_IRQ_MASK
;
1366 push_irq(&svm
->vcpu
, control
->int_vector
);
1369 svm
->vcpu
.interrupt_window_open
=
1370 !(control
->int_state
& SVM_INTERRUPT_SHADOW_MASK
);
1373 static void svm_do_inject_vector(struct vcpu_svm
*svm
)
1375 struct kvm_vcpu
*vcpu
= &svm
->vcpu
;
1376 int word_index
= __ffs(vcpu
->irq_summary
);
1377 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
1378 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1380 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
1381 if (!vcpu
->irq_pending
[word_index
])
1382 clear_bit(word_index
, &vcpu
->irq_summary
);
1383 svm_inject_irq(svm
, irq
);
1386 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1387 struct kvm_run
*kvm_run
)
1389 struct vcpu_svm
*svm
= to_svm(vcpu
);
1390 struct vmcb_control_area
*control
= &svm
->vmcb
->control
;
1392 svm
->vcpu
.interrupt_window_open
=
1393 (!(control
->int_state
& SVM_INTERRUPT_SHADOW_MASK
) &&
1394 (svm
->vmcb
->save
.rflags
& X86_EFLAGS_IF
));
1396 if (svm
->vcpu
.interrupt_window_open
&& svm
->vcpu
.irq_summary
)
1398 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1400 svm_do_inject_vector(svm
);
1403 * Interrupts blocked. Wait for unblock.
1405 if (!svm
->vcpu
.interrupt_window_open
&&
1406 (svm
->vcpu
.irq_summary
|| kvm_run
->request_interrupt_window
))
1407 control
->intercept
|= 1ULL << INTERCEPT_VINTR
;
1409 control
->intercept
&= ~(1ULL << INTERCEPT_VINTR
);
1412 static int svm_set_tss_addr(struct kvm
*kvm
, unsigned int addr
)
1417 static void save_db_regs(unsigned long *db_regs
)
1419 asm volatile ("mov %%dr0, %0" : "=r"(db_regs
[0]));
1420 asm volatile ("mov %%dr1, %0" : "=r"(db_regs
[1]));
1421 asm volatile ("mov %%dr2, %0" : "=r"(db_regs
[2]));
1422 asm volatile ("mov %%dr3, %0" : "=r"(db_regs
[3]));
1425 static void load_db_regs(unsigned long *db_regs
)
1427 asm volatile ("mov %0, %%dr0" : : "r"(db_regs
[0]));
1428 asm volatile ("mov %0, %%dr1" : : "r"(db_regs
[1]));
1429 asm volatile ("mov %0, %%dr2" : : "r"(db_regs
[2]));
1430 asm volatile ("mov %0, %%dr3" : : "r"(db_regs
[3]));
1433 static void svm_flush_tlb(struct kvm_vcpu
*vcpu
)
1435 force_new_asid(vcpu
);
1438 static void svm_prepare_guest_switch(struct kvm_vcpu
*vcpu
)
1442 static void svm_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1444 struct vcpu_svm
*svm
= to_svm(vcpu
);
1451 save_host_msrs(vcpu
);
1452 fs_selector
= read_fs();
1453 gs_selector
= read_gs();
1454 ldt_selector
= read_ldt();
1455 svm
->host_cr2
= kvm_read_cr2();
1456 svm
->host_dr6
= read_dr6();
1457 svm
->host_dr7
= read_dr7();
1458 svm
->vmcb
->save
.cr2
= vcpu
->cr2
;
1460 if (svm
->vmcb
->save
.dr7
& 0xff) {
1462 save_db_regs(svm
->host_db_regs
);
1463 load_db_regs(svm
->db_regs
);
1471 #ifdef CONFIG_X86_64
1477 #ifdef CONFIG_X86_64
1478 "mov %c[rbx](%[svm]), %%rbx \n\t"
1479 "mov %c[rcx](%[svm]), %%rcx \n\t"
1480 "mov %c[rdx](%[svm]), %%rdx \n\t"
1481 "mov %c[rsi](%[svm]), %%rsi \n\t"
1482 "mov %c[rdi](%[svm]), %%rdi \n\t"
1483 "mov %c[rbp](%[svm]), %%rbp \n\t"
1484 "mov %c[r8](%[svm]), %%r8 \n\t"
1485 "mov %c[r9](%[svm]), %%r9 \n\t"
1486 "mov %c[r10](%[svm]), %%r10 \n\t"
1487 "mov %c[r11](%[svm]), %%r11 \n\t"
1488 "mov %c[r12](%[svm]), %%r12 \n\t"
1489 "mov %c[r13](%[svm]), %%r13 \n\t"
1490 "mov %c[r14](%[svm]), %%r14 \n\t"
1491 "mov %c[r15](%[svm]), %%r15 \n\t"
1493 "mov %c[rbx](%[svm]), %%ebx \n\t"
1494 "mov %c[rcx](%[svm]), %%ecx \n\t"
1495 "mov %c[rdx](%[svm]), %%edx \n\t"
1496 "mov %c[rsi](%[svm]), %%esi \n\t"
1497 "mov %c[rdi](%[svm]), %%edi \n\t"
1498 "mov %c[rbp](%[svm]), %%ebp \n\t"
1501 #ifdef CONFIG_X86_64
1502 /* Enter guest mode */
1504 "mov %c[vmcb](%[svm]), %%rax \n\t"
1510 /* Enter guest mode */
1512 "mov %c[vmcb](%[svm]), %%eax \n\t"
1519 /* Save guest registers, load host registers */
1520 #ifdef CONFIG_X86_64
1521 "mov %%rbx, %c[rbx](%[svm]) \n\t"
1522 "mov %%rcx, %c[rcx](%[svm]) \n\t"
1523 "mov %%rdx, %c[rdx](%[svm]) \n\t"
1524 "mov %%rsi, %c[rsi](%[svm]) \n\t"
1525 "mov %%rdi, %c[rdi](%[svm]) \n\t"
1526 "mov %%rbp, %c[rbp](%[svm]) \n\t"
1527 "mov %%r8, %c[r8](%[svm]) \n\t"
1528 "mov %%r9, %c[r9](%[svm]) \n\t"
1529 "mov %%r10, %c[r10](%[svm]) \n\t"
1530 "mov %%r11, %c[r11](%[svm]) \n\t"
1531 "mov %%r12, %c[r12](%[svm]) \n\t"
1532 "mov %%r13, %c[r13](%[svm]) \n\t"
1533 "mov %%r14, %c[r14](%[svm]) \n\t"
1534 "mov %%r15, %c[r15](%[svm]) \n\t"
1538 "mov %%ebx, %c[rbx](%[svm]) \n\t"
1539 "mov %%ecx, %c[rcx](%[svm]) \n\t"
1540 "mov %%edx, %c[rdx](%[svm]) \n\t"
1541 "mov %%esi, %c[rsi](%[svm]) \n\t"
1542 "mov %%edi, %c[rdi](%[svm]) \n\t"
1543 "mov %%ebp, %c[rbp](%[svm]) \n\t"
1549 [vmcb
]"i"(offsetof(struct vcpu_svm
, vmcb_pa
)),
1550 [rbx
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_RBX
])),
1551 [rcx
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_RCX
])),
1552 [rdx
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_RDX
])),
1553 [rsi
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_RSI
])),
1554 [rdi
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_RDI
])),
1555 [rbp
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_RBP
]))
1556 #ifdef CONFIG_X86_64
1557 , [r8
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_R8
])),
1558 [r9
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_R9
])),
1559 [r10
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_R10
])),
1560 [r11
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_R11
])),
1561 [r12
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_R12
])),
1562 [r13
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_R13
])),
1563 [r14
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_R14
])),
1564 [r15
]"i"(offsetof(struct vcpu_svm
, vcpu
.regs
[VCPU_REGS_R15
]))
1567 #ifdef CONFIG_X86_64
1568 , "rbx", "rcx", "rdx", "rsi", "rdi"
1569 , "r8", "r9", "r10", "r11" , "r12", "r13", "r14", "r15"
1571 , "ebx", "ecx", "edx" , "esi", "edi"
1575 if ((svm
->vmcb
->save
.dr7
& 0xff))
1576 load_db_regs(svm
->host_db_regs
);
1578 vcpu
->cr2
= svm
->vmcb
->save
.cr2
;
1580 write_dr6(svm
->host_dr6
);
1581 write_dr7(svm
->host_dr7
);
1582 kvm_write_cr2(svm
->host_cr2
);
1584 load_fs(fs_selector
);
1585 load_gs(gs_selector
);
1586 load_ldt(ldt_selector
);
1587 load_host_msrs(vcpu
);
1591 local_irq_disable();
1598 static void svm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long root
)
1600 struct vcpu_svm
*svm
= to_svm(vcpu
);
1602 svm
->vmcb
->save
.cr3
= root
;
1603 force_new_asid(vcpu
);
1605 if (vcpu
->fpu_active
) {
1606 svm
->vmcb
->control
.intercept_exceptions
|= (1 << NM_VECTOR
);
1607 svm
->vmcb
->save
.cr0
|= X86_CR0_TS
;
1608 vcpu
->fpu_active
= 0;
1612 static void svm_inject_page_fault(struct kvm_vcpu
*vcpu
,
1616 struct vcpu_svm
*svm
= to_svm(vcpu
);
1617 uint32_t exit_int_info
= svm
->vmcb
->control
.exit_int_info
;
1619 ++vcpu
->stat
.pf_guest
;
1621 if (is_page_fault(exit_int_info
)) {
1623 svm
->vmcb
->control
.event_inj_err
= 0;
1624 svm
->vmcb
->control
.event_inj
= SVM_EVTINJ_VALID
|
1625 SVM_EVTINJ_VALID_ERR
|
1626 SVM_EVTINJ_TYPE_EXEPT
|
1631 svm
->vmcb
->save
.cr2
= addr
;
1632 svm
->vmcb
->control
.event_inj
= SVM_EVTINJ_VALID
|
1633 SVM_EVTINJ_VALID_ERR
|
1634 SVM_EVTINJ_TYPE_EXEPT
|
1636 svm
->vmcb
->control
.event_inj_err
= err_code
;
1640 static int is_disabled(void)
1644 rdmsrl(MSR_VM_CR
, vm_cr
);
1645 if (vm_cr
& (1 << SVM_VM_CR_SVM_DISABLE
))
1652 svm_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1655 * Patch in the VMMCALL instruction:
1657 hypercall
[0] = 0x0f;
1658 hypercall
[1] = 0x01;
1659 hypercall
[2] = 0xd9;
1662 static void svm_check_processor_compat(void *rtn
)
1667 static struct kvm_x86_ops svm_x86_ops
= {
1668 .cpu_has_kvm_support
= has_svm
,
1669 .disabled_by_bios
= is_disabled
,
1670 .hardware_setup
= svm_hardware_setup
,
1671 .hardware_unsetup
= svm_hardware_unsetup
,
1672 .check_processor_compatibility
= svm_check_processor_compat
,
1673 .hardware_enable
= svm_hardware_enable
,
1674 .hardware_disable
= svm_hardware_disable
,
1676 .vcpu_create
= svm_create_vcpu
,
1677 .vcpu_free
= svm_free_vcpu
,
1678 .vcpu_reset
= svm_vcpu_reset
,
1680 .prepare_guest_switch
= svm_prepare_guest_switch
,
1681 .vcpu_load
= svm_vcpu_load
,
1682 .vcpu_put
= svm_vcpu_put
,
1683 .vcpu_decache
= svm_vcpu_decache
,
1685 .set_guest_debug
= svm_guest_debug
,
1686 .get_msr
= svm_get_msr
,
1687 .set_msr
= svm_set_msr
,
1688 .get_segment_base
= svm_get_segment_base
,
1689 .get_segment
= svm_get_segment
,
1690 .set_segment
= svm_set_segment
,
1691 .get_cs_db_l_bits
= kvm_get_cs_db_l_bits
,
1692 .decache_cr4_guest_bits
= svm_decache_cr4_guest_bits
,
1693 .set_cr0
= svm_set_cr0
,
1694 .set_cr3
= svm_set_cr3
,
1695 .set_cr4
= svm_set_cr4
,
1696 .set_efer
= svm_set_efer
,
1697 .get_idt
= svm_get_idt
,
1698 .set_idt
= svm_set_idt
,
1699 .get_gdt
= svm_get_gdt
,
1700 .set_gdt
= svm_set_gdt
,
1701 .get_dr
= svm_get_dr
,
1702 .set_dr
= svm_set_dr
,
1703 .cache_regs
= svm_cache_regs
,
1704 .decache_regs
= svm_decache_regs
,
1705 .get_rflags
= svm_get_rflags
,
1706 .set_rflags
= svm_set_rflags
,
1708 .tlb_flush
= svm_flush_tlb
,
1709 .inject_page_fault
= svm_inject_page_fault
,
1711 .inject_gp
= svm_inject_gp
,
1713 .run
= svm_vcpu_run
,
1714 .handle_exit
= handle_exit
,
1715 .skip_emulated_instruction
= skip_emulated_instruction
,
1716 .patch_hypercall
= svm_patch_hypercall
,
1717 .get_irq
= svm_get_irq
,
1718 .set_irq
= svm_set_irq
,
1719 .inject_pending_irq
= svm_intr_assist
,
1720 .inject_pending_vectors
= do_interrupt_requests
,
1722 .set_tss_addr
= svm_set_tss_addr
,
1725 static int __init
svm_init(void)
1727 return kvm_init(&svm_x86_ops
, sizeof(struct vcpu_svm
),
1731 static void __exit
svm_exit(void)
1736 module_init(svm_init
)
1737 module_exit(svm_exit
)