2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
21 #include <linux/module.h>
22 #include <linux/kernel.h>
24 #include <linux/highmem.h>
25 #include <linux/profile.h>
29 #include "segment_descriptor.h"
31 MODULE_AUTHOR("Qumranet");
32 MODULE_LICENSE("GPL");
34 static DEFINE_PER_CPU(struct vmcs
*, vmxarea
);
35 static DEFINE_PER_CPU(struct vmcs
*, current_vmcs
);
43 static struct vmcs_descriptor
{
49 #define VMX_SEGMENT_FIELD(seg) \
50 [VCPU_SREG_##seg] = { \
51 .selector = GUEST_##seg##_SELECTOR, \
52 .base = GUEST_##seg##_BASE, \
53 .limit = GUEST_##seg##_LIMIT, \
54 .ar_bytes = GUEST_##seg##_AR_BYTES, \
57 static struct kvm_vmx_segment_field
{
62 } kvm_vmx_segment_fields
[] = {
63 VMX_SEGMENT_FIELD(CS
),
64 VMX_SEGMENT_FIELD(DS
),
65 VMX_SEGMENT_FIELD(ES
),
66 VMX_SEGMENT_FIELD(FS
),
67 VMX_SEGMENT_FIELD(GS
),
68 VMX_SEGMENT_FIELD(SS
),
69 VMX_SEGMENT_FIELD(TR
),
70 VMX_SEGMENT_FIELD(LDTR
),
73 static const u32 vmx_msr_index
[] = {
75 MSR_SYSCALL_MASK
, MSR_LSTAR
, MSR_CSTAR
, MSR_KERNEL_GS_BASE
,
77 MSR_EFER
, MSR_K6_STAR
,
79 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
82 static unsigned msr_offset_kernel_gs_base
;
85 static inline int is_page_fault(u32 intr_info
)
87 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
88 INTR_INFO_VALID_MASK
)) ==
89 (INTR_TYPE_EXCEPTION
| PF_VECTOR
| INTR_INFO_VALID_MASK
);
92 static inline int is_external_interrupt(u32 intr_info
)
94 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VALID_MASK
))
95 == (INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
98 static struct vmx_msr_entry
*find_msr_entry(struct kvm_vcpu
*vcpu
, u32 msr
)
102 for (i
= 0; i
< vcpu
->nmsrs
; ++i
)
103 if (vcpu
->guest_msrs
[i
].index
== msr
)
104 return &vcpu
->guest_msrs
[i
];
108 static void vmcs_clear(struct vmcs
*vmcs
)
110 u64 phys_addr
= __pa(vmcs
);
113 asm volatile (ASM_VMX_VMCLEAR_RAX
"; setna %0"
114 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
117 printk(KERN_ERR
"kvm: vmclear fail: %p/%llx\n",
121 static void __vcpu_clear(void *arg
)
123 struct kvm_vcpu
*vcpu
= arg
;
124 int cpu
= raw_smp_processor_id();
126 if (vcpu
->cpu
== cpu
)
127 vmcs_clear(vcpu
->vmcs
);
128 if (per_cpu(current_vmcs
, cpu
) == vcpu
->vmcs
)
129 per_cpu(current_vmcs
, cpu
) = NULL
;
132 static void vcpu_clear(struct kvm_vcpu
*vcpu
)
134 if (vcpu
->cpu
!= raw_smp_processor_id() && vcpu
->cpu
!= -1)
135 smp_call_function_single(vcpu
->cpu
, __vcpu_clear
, vcpu
, 0, 1);
141 static unsigned long vmcs_readl(unsigned long field
)
145 asm volatile (ASM_VMX_VMREAD_RDX_RAX
146 : "=a"(value
) : "d"(field
) : "cc");
150 static u16
vmcs_read16(unsigned long field
)
152 return vmcs_readl(field
);
155 static u32
vmcs_read32(unsigned long field
)
157 return vmcs_readl(field
);
160 static u64
vmcs_read64(unsigned long field
)
163 return vmcs_readl(field
);
165 return vmcs_readl(field
) | ((u64
)vmcs_readl(field
+1) << 32);
169 static noinline
void vmwrite_error(unsigned long field
, unsigned long value
)
171 printk(KERN_ERR
"vmwrite error: reg %lx value %lx (err %d)\n",
172 field
, value
, vmcs_read32(VM_INSTRUCTION_ERROR
));
176 static void vmcs_writel(unsigned long field
, unsigned long value
)
180 asm volatile (ASM_VMX_VMWRITE_RAX_RDX
"; setna %0"
181 : "=q"(error
) : "a"(value
), "d"(field
) : "cc" );
183 vmwrite_error(field
, value
);
186 static void vmcs_write16(unsigned long field
, u16 value
)
188 vmcs_writel(field
, value
);
191 static void vmcs_write32(unsigned long field
, u32 value
)
193 vmcs_writel(field
, value
);
196 static void vmcs_write64(unsigned long field
, u64 value
)
199 vmcs_writel(field
, value
);
201 vmcs_writel(field
, value
);
203 vmcs_writel(field
+1, value
>> 32);
208 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
209 * vcpu mutex is already taken.
211 static void vmx_vcpu_load(struct kvm_vcpu
*vcpu
)
213 u64 phys_addr
= __pa(vcpu
->vmcs
);
218 if (vcpu
->cpu
!= cpu
)
221 if (per_cpu(current_vmcs
, cpu
) != vcpu
->vmcs
) {
224 per_cpu(current_vmcs
, cpu
) = vcpu
->vmcs
;
225 asm volatile (ASM_VMX_VMPTRLD_RAX
"; setna %0"
226 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
229 printk(KERN_ERR
"kvm: vmptrld %p/%llx fail\n",
230 vcpu
->vmcs
, phys_addr
);
233 if (vcpu
->cpu
!= cpu
) {
234 struct descriptor_table dt
;
235 unsigned long sysenter_esp
;
239 * Linux uses per-cpu TSS and GDT, so set these when switching
242 vmcs_writel(HOST_TR_BASE
, read_tr_base()); /* 22.2.4 */
244 vmcs_writel(HOST_GDTR_BASE
, dt
.base
); /* 22.2.4 */
246 rdmsrl(MSR_IA32_SYSENTER_ESP
, sysenter_esp
);
247 vmcs_writel(HOST_IA32_SYSENTER_ESP
, sysenter_esp
); /* 22.2.3 */
251 static void vmx_vcpu_put(struct kvm_vcpu
*vcpu
)
256 static void vmx_vcpu_decache(struct kvm_vcpu
*vcpu
)
261 static unsigned long vmx_get_rflags(struct kvm_vcpu
*vcpu
)
263 return vmcs_readl(GUEST_RFLAGS
);
266 static void vmx_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
268 vmcs_writel(GUEST_RFLAGS
, rflags
);
271 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
274 u32 interruptibility
;
276 rip
= vmcs_readl(GUEST_RIP
);
277 rip
+= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
278 vmcs_writel(GUEST_RIP
, rip
);
281 * We emulated an instruction, so temporary interrupt blocking
282 * should be removed, if set.
284 interruptibility
= vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
);
285 if (interruptibility
& 3)
286 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
,
287 interruptibility
& ~3);
288 vcpu
->interrupt_window_open
= 1;
291 static void vmx_inject_gp(struct kvm_vcpu
*vcpu
, unsigned error_code
)
293 printk(KERN_DEBUG
"inject_general_protection: rip 0x%lx\n",
294 vmcs_readl(GUEST_RIP
));
295 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, error_code
);
296 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
298 INTR_TYPE_EXCEPTION
|
299 INTR_INFO_DELIEVER_CODE_MASK
|
300 INTR_INFO_VALID_MASK
);
304 * reads and returns guest's timestamp counter "register"
305 * guest_tsc = host_tsc + tsc_offset -- 21.3
307 static u64
guest_read_tsc(void)
309 u64 host_tsc
, tsc_offset
;
312 tsc_offset
= vmcs_read64(TSC_OFFSET
);
313 return host_tsc
+ tsc_offset
;
317 * writes 'guest_tsc' into guest's timestamp counter "register"
318 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
320 static void guest_write_tsc(u64 guest_tsc
)
325 vmcs_write64(TSC_OFFSET
, guest_tsc
- host_tsc
);
328 static void reload_tss(void)
330 #ifndef CONFIG_X86_64
333 * VT restores TR but not its size. Useless.
335 struct descriptor_table gdt
;
336 struct segment_descriptor
*descs
;
339 descs
= (void *)gdt
.base
;
340 descs
[GDT_ENTRY_TSS
].type
= 9; /* available TSS */
346 * Reads an msr value (of 'msr_index') into 'pdata'.
347 * Returns 0 on success, non-0 otherwise.
348 * Assumes vcpu_load() was already called.
350 static int vmx_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
353 struct vmx_msr_entry
*msr
;
356 printk(KERN_ERR
"BUG: get_msr called with NULL pdata\n");
363 data
= vmcs_readl(GUEST_FS_BASE
);
366 data
= vmcs_readl(GUEST_GS_BASE
);
369 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
371 case MSR_IA32_TIME_STAMP_COUNTER
:
372 data
= guest_read_tsc();
374 case MSR_IA32_SYSENTER_CS
:
375 data
= vmcs_read32(GUEST_SYSENTER_CS
);
377 case MSR_IA32_SYSENTER_EIP
:
378 data
= vmcs_readl(GUEST_SYSENTER_EIP
);
380 case MSR_IA32_SYSENTER_ESP
:
381 data
= vmcs_readl(GUEST_SYSENTER_ESP
);
384 msr
= find_msr_entry(vcpu
, msr_index
);
389 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
397 * Writes msr value into into the appropriate "register".
398 * Returns 0 on success, non-0 otherwise.
399 * Assumes vcpu_load() was already called.
401 static int vmx_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
403 struct vmx_msr_entry
*msr
;
407 return kvm_set_msr_common(vcpu
, msr_index
, data
);
409 vmcs_writel(GUEST_FS_BASE
, data
);
412 vmcs_writel(GUEST_GS_BASE
, data
);
415 case MSR_IA32_SYSENTER_CS
:
416 vmcs_write32(GUEST_SYSENTER_CS
, data
);
418 case MSR_IA32_SYSENTER_EIP
:
419 vmcs_writel(GUEST_SYSENTER_EIP
, data
);
421 case MSR_IA32_SYSENTER_ESP
:
422 vmcs_writel(GUEST_SYSENTER_ESP
, data
);
424 case MSR_IA32_TIME_STAMP_COUNTER
:
425 guest_write_tsc(data
);
428 msr
= find_msr_entry(vcpu
, msr_index
);
433 return kvm_set_msr_common(vcpu
, msr_index
, data
);
442 * Sync the rsp and rip registers into the vcpu structure. This allows
443 * registers to be accessed by indexing vcpu->regs.
445 static void vcpu_load_rsp_rip(struct kvm_vcpu
*vcpu
)
447 vcpu
->regs
[VCPU_REGS_RSP
] = vmcs_readl(GUEST_RSP
);
448 vcpu
->rip
= vmcs_readl(GUEST_RIP
);
452 * Syncs rsp and rip back into the vmcs. Should be called after possible
455 static void vcpu_put_rsp_rip(struct kvm_vcpu
*vcpu
)
457 vmcs_writel(GUEST_RSP
, vcpu
->regs
[VCPU_REGS_RSP
]);
458 vmcs_writel(GUEST_RIP
, vcpu
->rip
);
461 static int set_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
463 unsigned long dr7
= 0x400;
464 u32 exception_bitmap
;
467 exception_bitmap
= vmcs_read32(EXCEPTION_BITMAP
);
468 old_singlestep
= vcpu
->guest_debug
.singlestep
;
470 vcpu
->guest_debug
.enabled
= dbg
->enabled
;
471 if (vcpu
->guest_debug
.enabled
) {
474 dr7
|= 0x200; /* exact */
475 for (i
= 0; i
< 4; ++i
) {
476 if (!dbg
->breakpoints
[i
].enabled
)
478 vcpu
->guest_debug
.bp
[i
] = dbg
->breakpoints
[i
].address
;
479 dr7
|= 2 << (i
*2); /* global enable */
480 dr7
|= 0 << (i
*4+16); /* execution breakpoint */
483 exception_bitmap
|= (1u << 1); /* Trap debug exceptions */
485 vcpu
->guest_debug
.singlestep
= dbg
->singlestep
;
487 exception_bitmap
&= ~(1u << 1); /* Ignore debug exceptions */
488 vcpu
->guest_debug
.singlestep
= 0;
491 if (old_singlestep
&& !vcpu
->guest_debug
.singlestep
) {
494 flags
= vmcs_readl(GUEST_RFLAGS
);
495 flags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
496 vmcs_writel(GUEST_RFLAGS
, flags
);
499 vmcs_write32(EXCEPTION_BITMAP
, exception_bitmap
);
500 vmcs_writel(GUEST_DR7
, dr7
);
505 static __init
int cpu_has_kvm_support(void)
507 unsigned long ecx
= cpuid_ecx(1);
508 return test_bit(5, &ecx
); /* CPUID.1:ECX.VMX[bit 5] -> VT */
511 static __init
int vmx_disabled_by_bios(void)
515 rdmsrl(MSR_IA32_FEATURE_CONTROL
, msr
);
516 return (msr
& 5) == 1; /* locked but not enabled */
519 static void hardware_enable(void *garbage
)
521 int cpu
= raw_smp_processor_id();
522 u64 phys_addr
= __pa(per_cpu(vmxarea
, cpu
));
525 rdmsrl(MSR_IA32_FEATURE_CONTROL
, old
);
527 /* enable and lock */
528 wrmsrl(MSR_IA32_FEATURE_CONTROL
, old
| 5);
529 write_cr4(read_cr4() | CR4_VMXE
); /* FIXME: not cpu hotplug safe */
530 asm volatile (ASM_VMX_VMXON_RAX
: : "a"(&phys_addr
), "m"(phys_addr
)
534 static void hardware_disable(void *garbage
)
536 asm volatile (ASM_VMX_VMXOFF
: : : "cc");
539 static __init
void setup_vmcs_descriptor(void)
541 u32 vmx_msr_low
, vmx_msr_high
;
543 rdmsr(MSR_IA32_VMX_BASIC
, vmx_msr_low
, vmx_msr_high
);
544 vmcs_descriptor
.size
= vmx_msr_high
& 0x1fff;
545 vmcs_descriptor
.order
= get_order(vmcs_descriptor
.size
);
546 vmcs_descriptor
.revision_id
= vmx_msr_low
;
549 static struct vmcs
*alloc_vmcs_cpu(int cpu
)
551 int node
= cpu_to_node(cpu
);
555 pages
= alloc_pages_node(node
, GFP_KERNEL
, vmcs_descriptor
.order
);
558 vmcs
= page_address(pages
);
559 memset(vmcs
, 0, vmcs_descriptor
.size
);
560 vmcs
->revision_id
= vmcs_descriptor
.revision_id
; /* vmcs revision id */
564 static struct vmcs
*alloc_vmcs(void)
566 return alloc_vmcs_cpu(raw_smp_processor_id());
569 static void free_vmcs(struct vmcs
*vmcs
)
571 free_pages((unsigned long)vmcs
, vmcs_descriptor
.order
);
574 static __exit
void free_kvm_area(void)
578 for_each_online_cpu(cpu
)
579 free_vmcs(per_cpu(vmxarea
, cpu
));
582 extern struct vmcs
*alloc_vmcs_cpu(int cpu
);
584 static __init
int alloc_kvm_area(void)
588 for_each_online_cpu(cpu
) {
591 vmcs
= alloc_vmcs_cpu(cpu
);
597 per_cpu(vmxarea
, cpu
) = vmcs
;
602 static __init
int hardware_setup(void)
604 setup_vmcs_descriptor();
605 return alloc_kvm_area();
608 static __exit
void hardware_unsetup(void)
613 static void update_exception_bitmap(struct kvm_vcpu
*vcpu
)
615 if (vcpu
->rmode
.active
)
616 vmcs_write32(EXCEPTION_BITMAP
, ~0);
618 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
621 static void fix_pmode_dataseg(int seg
, struct kvm_save_segment
*save
)
623 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
625 if (vmcs_readl(sf
->base
) == save
->base
&& (save
->base
& AR_S_MASK
)) {
626 vmcs_write16(sf
->selector
, save
->selector
);
627 vmcs_writel(sf
->base
, save
->base
);
628 vmcs_write32(sf
->limit
, save
->limit
);
629 vmcs_write32(sf
->ar_bytes
, save
->ar
);
631 u32 dpl
= (vmcs_read16(sf
->selector
) & SELECTOR_RPL_MASK
)
633 vmcs_write32(sf
->ar_bytes
, 0x93 | dpl
);
637 static void enter_pmode(struct kvm_vcpu
*vcpu
)
641 vcpu
->rmode
.active
= 0;
643 vmcs_writel(GUEST_TR_BASE
, vcpu
->rmode
.tr
.base
);
644 vmcs_write32(GUEST_TR_LIMIT
, vcpu
->rmode
.tr
.limit
);
645 vmcs_write32(GUEST_TR_AR_BYTES
, vcpu
->rmode
.tr
.ar
);
647 flags
= vmcs_readl(GUEST_RFLAGS
);
648 flags
&= ~(IOPL_MASK
| X86_EFLAGS_VM
);
649 flags
|= (vcpu
->rmode
.save_iopl
<< IOPL_SHIFT
);
650 vmcs_writel(GUEST_RFLAGS
, flags
);
652 vmcs_writel(GUEST_CR4
, (vmcs_readl(GUEST_CR4
) & ~CR4_VME_MASK
) |
653 (vmcs_readl(CR4_READ_SHADOW
) & CR4_VME_MASK
));
655 update_exception_bitmap(vcpu
);
657 fix_pmode_dataseg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
658 fix_pmode_dataseg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
659 fix_pmode_dataseg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
660 fix_pmode_dataseg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
662 vmcs_write16(GUEST_SS_SELECTOR
, 0);
663 vmcs_write32(GUEST_SS_AR_BYTES
, 0x93);
665 vmcs_write16(GUEST_CS_SELECTOR
,
666 vmcs_read16(GUEST_CS_SELECTOR
) & ~SELECTOR_RPL_MASK
);
667 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
670 static int rmode_tss_base(struct kvm
* kvm
)
672 gfn_t base_gfn
= kvm
->memslots
[0].base_gfn
+ kvm
->memslots
[0].npages
- 3;
673 return base_gfn
<< PAGE_SHIFT
;
676 static void fix_rmode_seg(int seg
, struct kvm_save_segment
*save
)
678 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
680 save
->selector
= vmcs_read16(sf
->selector
);
681 save
->base
= vmcs_readl(sf
->base
);
682 save
->limit
= vmcs_read32(sf
->limit
);
683 save
->ar
= vmcs_read32(sf
->ar_bytes
);
684 vmcs_write16(sf
->selector
, vmcs_readl(sf
->base
) >> 4);
685 vmcs_write32(sf
->limit
, 0xffff);
686 vmcs_write32(sf
->ar_bytes
, 0xf3);
689 static void enter_rmode(struct kvm_vcpu
*vcpu
)
693 vcpu
->rmode
.active
= 1;
695 vcpu
->rmode
.tr
.base
= vmcs_readl(GUEST_TR_BASE
);
696 vmcs_writel(GUEST_TR_BASE
, rmode_tss_base(vcpu
->kvm
));
698 vcpu
->rmode
.tr
.limit
= vmcs_read32(GUEST_TR_LIMIT
);
699 vmcs_write32(GUEST_TR_LIMIT
, RMODE_TSS_SIZE
- 1);
701 vcpu
->rmode
.tr
.ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
702 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
704 flags
= vmcs_readl(GUEST_RFLAGS
);
705 vcpu
->rmode
.save_iopl
= (flags
& IOPL_MASK
) >> IOPL_SHIFT
;
707 flags
|= IOPL_MASK
| X86_EFLAGS_VM
;
709 vmcs_writel(GUEST_RFLAGS
, flags
);
710 vmcs_writel(GUEST_CR4
, vmcs_readl(GUEST_CR4
) | CR4_VME_MASK
);
711 update_exception_bitmap(vcpu
);
713 vmcs_write16(GUEST_SS_SELECTOR
, vmcs_readl(GUEST_SS_BASE
) >> 4);
714 vmcs_write32(GUEST_SS_LIMIT
, 0xffff);
715 vmcs_write32(GUEST_SS_AR_BYTES
, 0xf3);
717 vmcs_write32(GUEST_CS_AR_BYTES
, 0xf3);
718 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
719 if (vmcs_readl(GUEST_CS_BASE
) == 0xffff0000)
720 vmcs_writel(GUEST_CS_BASE
, 0xf0000);
721 vmcs_write16(GUEST_CS_SELECTOR
, vmcs_readl(GUEST_CS_BASE
) >> 4);
723 fix_rmode_seg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
724 fix_rmode_seg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
725 fix_rmode_seg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
726 fix_rmode_seg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
731 static void enter_lmode(struct kvm_vcpu
*vcpu
)
735 guest_tr_ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
736 if ((guest_tr_ar
& AR_TYPE_MASK
) != AR_TYPE_BUSY_64_TSS
) {
737 printk(KERN_DEBUG
"%s: tss fixup for long mode. \n",
739 vmcs_write32(GUEST_TR_AR_BYTES
,
740 (guest_tr_ar
& ~AR_TYPE_MASK
)
741 | AR_TYPE_BUSY_64_TSS
);
744 vcpu
->shadow_efer
|= EFER_LMA
;
746 find_msr_entry(vcpu
, MSR_EFER
)->data
|= EFER_LMA
| EFER_LME
;
747 vmcs_write32(VM_ENTRY_CONTROLS
,
748 vmcs_read32(VM_ENTRY_CONTROLS
)
749 | VM_ENTRY_CONTROLS_IA32E_MASK
);
752 static void exit_lmode(struct kvm_vcpu
*vcpu
)
754 vcpu
->shadow_efer
&= ~EFER_LMA
;
756 vmcs_write32(VM_ENTRY_CONTROLS
,
757 vmcs_read32(VM_ENTRY_CONTROLS
)
758 & ~VM_ENTRY_CONTROLS_IA32E_MASK
);
763 static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
765 vcpu
->cr0
&= KVM_GUEST_CR0_MASK
;
766 vcpu
->cr0
|= vmcs_readl(GUEST_CR0
) & ~KVM_GUEST_CR0_MASK
;
768 vcpu
->cr4
&= KVM_GUEST_CR4_MASK
;
769 vcpu
->cr4
|= vmcs_readl(GUEST_CR4
) & ~KVM_GUEST_CR4_MASK
;
772 static void vmx_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
774 if (vcpu
->rmode
.active
&& (cr0
& CR0_PE_MASK
))
777 if (!vcpu
->rmode
.active
&& !(cr0
& CR0_PE_MASK
))
781 if (vcpu
->shadow_efer
& EFER_LME
) {
782 if (!is_paging(vcpu
) && (cr0
& CR0_PG_MASK
))
784 if (is_paging(vcpu
) && !(cr0
& CR0_PG_MASK
))
789 vmcs_writel(CR0_READ_SHADOW
, cr0
);
790 vmcs_writel(GUEST_CR0
,
791 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
795 static void vmx_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
797 vmcs_writel(GUEST_CR3
, cr3
);
800 static void vmx_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
802 vmcs_writel(CR4_READ_SHADOW
, cr4
);
803 vmcs_writel(GUEST_CR4
, cr4
| (vcpu
->rmode
.active
?
804 KVM_RMODE_VM_CR4_ALWAYS_ON
: KVM_PMODE_VM_CR4_ALWAYS_ON
));
810 static void vmx_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
812 struct vmx_msr_entry
*msr
= find_msr_entry(vcpu
, MSR_EFER
);
814 vcpu
->shadow_efer
= efer
;
815 if (efer
& EFER_LMA
) {
816 vmcs_write32(VM_ENTRY_CONTROLS
,
817 vmcs_read32(VM_ENTRY_CONTROLS
) |
818 VM_ENTRY_CONTROLS_IA32E_MASK
);
822 vmcs_write32(VM_ENTRY_CONTROLS
,
823 vmcs_read32(VM_ENTRY_CONTROLS
) &
824 ~VM_ENTRY_CONTROLS_IA32E_MASK
);
826 msr
->data
= efer
& ~EFER_LME
;
832 static u64
vmx_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
834 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
836 return vmcs_readl(sf
->base
);
839 static void vmx_get_segment(struct kvm_vcpu
*vcpu
,
840 struct kvm_segment
*var
, int seg
)
842 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
845 var
->base
= vmcs_readl(sf
->base
);
846 var
->limit
= vmcs_read32(sf
->limit
);
847 var
->selector
= vmcs_read16(sf
->selector
);
848 ar
= vmcs_read32(sf
->ar_bytes
);
849 if (ar
& AR_UNUSABLE_MASK
)
852 var
->s
= (ar
>> 4) & 1;
853 var
->dpl
= (ar
>> 5) & 3;
854 var
->present
= (ar
>> 7) & 1;
855 var
->avl
= (ar
>> 12) & 1;
856 var
->l
= (ar
>> 13) & 1;
857 var
->db
= (ar
>> 14) & 1;
858 var
->g
= (ar
>> 15) & 1;
859 var
->unusable
= (ar
>> 16) & 1;
862 static void vmx_set_segment(struct kvm_vcpu
*vcpu
,
863 struct kvm_segment
*var
, int seg
)
865 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
868 vmcs_writel(sf
->base
, var
->base
);
869 vmcs_write32(sf
->limit
, var
->limit
);
870 vmcs_write16(sf
->selector
, var
->selector
);
871 if (vcpu
->rmode
.active
&& var
->s
) {
873 * Hack real-mode segments into vm86 compatibility.
875 if (var
->base
== 0xffff0000 && var
->selector
== 0xf000)
876 vmcs_writel(sf
->base
, 0xf0000);
878 } else if (var
->unusable
)
882 ar
|= (var
->s
& 1) << 4;
883 ar
|= (var
->dpl
& 3) << 5;
884 ar
|= (var
->present
& 1) << 7;
885 ar
|= (var
->avl
& 1) << 12;
886 ar
|= (var
->l
& 1) << 13;
887 ar
|= (var
->db
& 1) << 14;
888 ar
|= (var
->g
& 1) << 15;
890 if (ar
== 0) /* a 0 value means unusable */
891 ar
= AR_UNUSABLE_MASK
;
892 vmcs_write32(sf
->ar_bytes
, ar
);
895 static void vmx_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
897 u32 ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
899 *db
= (ar
>> 14) & 1;
903 static void vmx_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
905 dt
->limit
= vmcs_read32(GUEST_IDTR_LIMIT
);
906 dt
->base
= vmcs_readl(GUEST_IDTR_BASE
);
909 static void vmx_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
911 vmcs_write32(GUEST_IDTR_LIMIT
, dt
->limit
);
912 vmcs_writel(GUEST_IDTR_BASE
, dt
->base
);
915 static void vmx_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
917 dt
->limit
= vmcs_read32(GUEST_GDTR_LIMIT
);
918 dt
->base
= vmcs_readl(GUEST_GDTR_BASE
);
921 static void vmx_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
923 vmcs_write32(GUEST_GDTR_LIMIT
, dt
->limit
);
924 vmcs_writel(GUEST_GDTR_BASE
, dt
->base
);
927 static int init_rmode_tss(struct kvm
* kvm
)
929 struct page
*p1
, *p2
, *p3
;
930 gfn_t fn
= rmode_tss_base(kvm
) >> PAGE_SHIFT
;
933 p1
= gfn_to_page(kvm
, fn
++);
934 p2
= gfn_to_page(kvm
, fn
++);
935 p3
= gfn_to_page(kvm
, fn
);
937 if (!p1
|| !p2
|| !p3
) {
938 kvm_printf(kvm
,"%s: gfn_to_page failed\n", __FUNCTION__
);
942 page
= kmap_atomic(p1
, KM_USER0
);
943 memset(page
, 0, PAGE_SIZE
);
944 *(u16
*)(page
+ 0x66) = TSS_BASE_SIZE
+ TSS_REDIRECTION_SIZE
;
945 kunmap_atomic(page
, KM_USER0
);
947 page
= kmap_atomic(p2
, KM_USER0
);
948 memset(page
, 0, PAGE_SIZE
);
949 kunmap_atomic(page
, KM_USER0
);
951 page
= kmap_atomic(p3
, KM_USER0
);
952 memset(page
, 0, PAGE_SIZE
);
953 *(page
+ RMODE_TSS_SIZE
- 2 * PAGE_SIZE
- 1) = ~0;
954 kunmap_atomic(page
, KM_USER0
);
959 static void vmcs_write32_fixedbits(u32 msr
, u32 vmcs_field
, u32 val
)
961 u32 msr_high
, msr_low
;
963 rdmsr(msr
, msr_low
, msr_high
);
967 vmcs_write32(vmcs_field
, val
);
970 static void seg_setup(int seg
)
972 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
974 vmcs_write16(sf
->selector
, 0);
975 vmcs_writel(sf
->base
, 0);
976 vmcs_write32(sf
->limit
, 0xffff);
977 vmcs_write32(sf
->ar_bytes
, 0x93);
981 * Sets up the vmcs for emulated real mode.
983 static int vmx_vcpu_setup(struct kvm_vcpu
*vcpu
)
985 u32 host_sysenter_cs
;
988 struct descriptor_table dt
;
992 extern asmlinkage
void kvm_vmx_return(void);
994 if (!init_rmode_tss(vcpu
->kvm
)) {
999 memset(vcpu
->regs
, 0, sizeof(vcpu
->regs
));
1000 vcpu
->regs
[VCPU_REGS_RDX
] = get_rdx_init_val();
1002 vcpu
->apic_base
= 0xfee00000 |
1003 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP
|
1004 MSR_IA32_APICBASE_ENABLE
;
1009 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1010 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1012 vmcs_write16(GUEST_CS_SELECTOR
, 0xf000);
1013 vmcs_writel(GUEST_CS_BASE
, 0x000f0000);
1014 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1015 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1017 seg_setup(VCPU_SREG_DS
);
1018 seg_setup(VCPU_SREG_ES
);
1019 seg_setup(VCPU_SREG_FS
);
1020 seg_setup(VCPU_SREG_GS
);
1021 seg_setup(VCPU_SREG_SS
);
1023 vmcs_write16(GUEST_TR_SELECTOR
, 0);
1024 vmcs_writel(GUEST_TR_BASE
, 0);
1025 vmcs_write32(GUEST_TR_LIMIT
, 0xffff);
1026 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1028 vmcs_write16(GUEST_LDTR_SELECTOR
, 0);
1029 vmcs_writel(GUEST_LDTR_BASE
, 0);
1030 vmcs_write32(GUEST_LDTR_LIMIT
, 0xffff);
1031 vmcs_write32(GUEST_LDTR_AR_BYTES
, 0x00082);
1033 vmcs_write32(GUEST_SYSENTER_CS
, 0);
1034 vmcs_writel(GUEST_SYSENTER_ESP
, 0);
1035 vmcs_writel(GUEST_SYSENTER_EIP
, 0);
1037 vmcs_writel(GUEST_RFLAGS
, 0x02);
1038 vmcs_writel(GUEST_RIP
, 0xfff0);
1039 vmcs_writel(GUEST_RSP
, 0);
1041 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1042 vmcs_writel(GUEST_DR7
, 0x400);
1044 vmcs_writel(GUEST_GDTR_BASE
, 0);
1045 vmcs_write32(GUEST_GDTR_LIMIT
, 0xffff);
1047 vmcs_writel(GUEST_IDTR_BASE
, 0);
1048 vmcs_write32(GUEST_IDTR_LIMIT
, 0xffff);
1050 vmcs_write32(GUEST_ACTIVITY_STATE
, 0);
1051 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
, 0);
1052 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS
, 0);
1055 vmcs_write64(IO_BITMAP_A
, 0);
1056 vmcs_write64(IO_BITMAP_B
, 0);
1060 vmcs_write64(VMCS_LINK_POINTER
, -1ull); /* 22.3.1.5 */
1062 /* Special registers */
1063 vmcs_write64(GUEST_IA32_DEBUGCTL
, 0);
1066 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS
,
1067 PIN_BASED_VM_EXEC_CONTROL
,
1068 PIN_BASED_EXT_INTR_MASK
/* 20.6.1 */
1069 | PIN_BASED_NMI_EXITING
/* 20.6.1 */
1071 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS
,
1072 CPU_BASED_VM_EXEC_CONTROL
,
1073 CPU_BASED_HLT_EXITING
/* 20.6.2 */
1074 | CPU_BASED_CR8_LOAD_EXITING
/* 20.6.2 */
1075 | CPU_BASED_CR8_STORE_EXITING
/* 20.6.2 */
1076 | CPU_BASED_UNCOND_IO_EXITING
/* 20.6.2 */
1077 | CPU_BASED_MOV_DR_EXITING
1078 | CPU_BASED_USE_TSC_OFFSETING
/* 21.3 */
1081 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
1082 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK
, 0);
1083 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH
, 0);
1084 vmcs_write32(CR3_TARGET_COUNT
, 0); /* 22.2.1 */
1086 vmcs_writel(HOST_CR0
, read_cr0()); /* 22.2.3 */
1087 vmcs_writel(HOST_CR4
, read_cr4()); /* 22.2.3, 22.2.5 */
1088 vmcs_writel(HOST_CR3
, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1090 vmcs_write16(HOST_CS_SELECTOR
, __KERNEL_CS
); /* 22.2.4 */
1091 vmcs_write16(HOST_DS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1092 vmcs_write16(HOST_ES_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1093 vmcs_write16(HOST_FS_SELECTOR
, read_fs()); /* 22.2.4 */
1094 vmcs_write16(HOST_GS_SELECTOR
, read_gs()); /* 22.2.4 */
1095 vmcs_write16(HOST_SS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1096 #ifdef CONFIG_X86_64
1097 rdmsrl(MSR_FS_BASE
, a
);
1098 vmcs_writel(HOST_FS_BASE
, a
); /* 22.2.4 */
1099 rdmsrl(MSR_GS_BASE
, a
);
1100 vmcs_writel(HOST_GS_BASE
, a
); /* 22.2.4 */
1102 vmcs_writel(HOST_FS_BASE
, 0); /* 22.2.4 */
1103 vmcs_writel(HOST_GS_BASE
, 0); /* 22.2.4 */
1106 vmcs_write16(HOST_TR_SELECTOR
, GDT_ENTRY_TSS
*8); /* 22.2.4 */
1109 vmcs_writel(HOST_IDTR_BASE
, dt
.base
); /* 22.2.4 */
1112 vmcs_writel(HOST_RIP
, (unsigned long)kvm_vmx_return
); /* 22.2.5 */
1114 rdmsr(MSR_IA32_SYSENTER_CS
, host_sysenter_cs
, junk
);
1115 vmcs_write32(HOST_IA32_SYSENTER_CS
, host_sysenter_cs
);
1116 rdmsrl(MSR_IA32_SYSENTER_ESP
, a
);
1117 vmcs_writel(HOST_IA32_SYSENTER_ESP
, a
); /* 22.2.3 */
1118 rdmsrl(MSR_IA32_SYSENTER_EIP
, a
);
1119 vmcs_writel(HOST_IA32_SYSENTER_EIP
, a
); /* 22.2.3 */
1121 for (i
= 0; i
< NR_VMX_MSR
; ++i
) {
1122 u32 index
= vmx_msr_index
[i
];
1123 u32 data_low
, data_high
;
1125 int j
= vcpu
->nmsrs
;
1127 if (rdmsr_safe(index
, &data_low
, &data_high
) < 0)
1129 if (wrmsr_safe(index
, data_low
, data_high
) < 0)
1131 data
= data_low
| ((u64
)data_high
<< 32);
1132 vcpu
->host_msrs
[j
].index
= index
;
1133 vcpu
->host_msrs
[j
].reserved
= 0;
1134 vcpu
->host_msrs
[j
].data
= data
;
1135 vcpu
->guest_msrs
[j
] = vcpu
->host_msrs
[j
];
1136 #ifdef CONFIG_X86_64
1137 if (index
== MSR_KERNEL_GS_BASE
)
1138 msr_offset_kernel_gs_base
= j
;
1143 nr_good_msrs
= vcpu
->nmsrs
- NR_BAD_MSRS
;
1144 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR
,
1145 virt_to_phys(vcpu
->guest_msrs
+ NR_BAD_MSRS
));
1146 vmcs_writel(VM_EXIT_MSR_STORE_ADDR
,
1147 virt_to_phys(vcpu
->guest_msrs
+ NR_BAD_MSRS
));
1148 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR
,
1149 virt_to_phys(vcpu
->host_msrs
+ NR_BAD_MSRS
));
1150 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS
, VM_EXIT_CONTROLS
,
1151 (HOST_IS_64
<< 9)); /* 22.2,1, 20.7.1 */
1152 vmcs_write32(VM_EXIT_MSR_STORE_COUNT
, nr_good_msrs
); /* 22.2.2 */
1153 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
1154 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
1157 /* 22.2.1, 20.8.1 */
1158 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS
,
1159 VM_ENTRY_CONTROLS
, 0);
1160 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, 0); /* 22.2.1 */
1162 #ifdef CONFIG_X86_64
1163 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR
, 0);
1164 vmcs_writel(TPR_THRESHOLD
, 0);
1167 vmcs_writel(CR0_GUEST_HOST_MASK
, KVM_GUEST_CR0_MASK
);
1168 vmcs_writel(CR4_GUEST_HOST_MASK
, KVM_GUEST_CR4_MASK
);
1170 vcpu
->cr0
= 0x60000010;
1171 vmx_set_cr0(vcpu
, vcpu
->cr0
); // enter rmode
1172 vmx_set_cr4(vcpu
, 0);
1173 #ifdef CONFIG_X86_64
1174 vmx_set_efer(vcpu
, 0);
1183 static void inject_rmode_irq(struct kvm_vcpu
*vcpu
, int irq
)
1188 unsigned long flags
;
1189 unsigned long ss_base
= vmcs_readl(GUEST_SS_BASE
);
1190 u16 sp
= vmcs_readl(GUEST_RSP
);
1191 u32 ss_limit
= vmcs_read32(GUEST_SS_LIMIT
);
1193 if (sp
> ss_limit
|| sp
< 6 ) {
1194 vcpu_printf(vcpu
, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1196 vmcs_readl(GUEST_RSP
),
1197 vmcs_readl(GUEST_SS_BASE
),
1198 vmcs_read32(GUEST_SS_LIMIT
));
1202 if (kvm_read_guest(vcpu
, irq
* sizeof(ent
), sizeof(ent
), &ent
) !=
1204 vcpu_printf(vcpu
, "%s: read guest err\n", __FUNCTION__
);
1208 flags
= vmcs_readl(GUEST_RFLAGS
);
1209 cs
= vmcs_readl(GUEST_CS_BASE
) >> 4;
1210 ip
= vmcs_readl(GUEST_RIP
);
1213 if (kvm_write_guest(vcpu
, ss_base
+ sp
- 2, 2, &flags
) != 2 ||
1214 kvm_write_guest(vcpu
, ss_base
+ sp
- 4, 2, &cs
) != 2 ||
1215 kvm_write_guest(vcpu
, ss_base
+ sp
- 6, 2, &ip
) != 2) {
1216 vcpu_printf(vcpu
, "%s: write guest err\n", __FUNCTION__
);
1220 vmcs_writel(GUEST_RFLAGS
, flags
&
1221 ~( X86_EFLAGS_IF
| X86_EFLAGS_AC
| X86_EFLAGS_TF
));
1222 vmcs_write16(GUEST_CS_SELECTOR
, ent
[1]) ;
1223 vmcs_writel(GUEST_CS_BASE
, ent
[1] << 4);
1224 vmcs_writel(GUEST_RIP
, ent
[0]);
1225 vmcs_writel(GUEST_RSP
, (vmcs_readl(GUEST_RSP
) & ~0xffff) | (sp
- 6));
1228 static void kvm_do_inject_irq(struct kvm_vcpu
*vcpu
)
1230 int word_index
= __ffs(vcpu
->irq_summary
);
1231 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
1232 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1234 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
1235 if (!vcpu
->irq_pending
[word_index
])
1236 clear_bit(word_index
, &vcpu
->irq_summary
);
1238 if (vcpu
->rmode
.active
) {
1239 inject_rmode_irq(vcpu
, irq
);
1242 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1243 irq
| INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
1247 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1248 struct kvm_run
*kvm_run
)
1250 u32 cpu_based_vm_exec_control
;
1252 vcpu
->interrupt_window_open
=
1253 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
1254 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
1256 if (vcpu
->interrupt_window_open
&&
1257 vcpu
->irq_summary
&&
1258 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
) & INTR_INFO_VALID_MASK
))
1260 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1262 kvm_do_inject_irq(vcpu
);
1264 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
1265 if (!vcpu
->interrupt_window_open
&&
1266 (vcpu
->irq_summary
|| kvm_run
->request_interrupt_window
))
1268 * Interrupts blocked. Wait for unblock.
1270 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
1272 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
1273 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
1276 static void kvm_guest_debug_pre(struct kvm_vcpu
*vcpu
)
1278 struct kvm_guest_debug
*dbg
= &vcpu
->guest_debug
;
1280 set_debugreg(dbg
->bp
[0], 0);
1281 set_debugreg(dbg
->bp
[1], 1);
1282 set_debugreg(dbg
->bp
[2], 2);
1283 set_debugreg(dbg
->bp
[3], 3);
1285 if (dbg
->singlestep
) {
1286 unsigned long flags
;
1288 flags
= vmcs_readl(GUEST_RFLAGS
);
1289 flags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
1290 vmcs_writel(GUEST_RFLAGS
, flags
);
1294 static int handle_rmode_exception(struct kvm_vcpu
*vcpu
,
1295 int vec
, u32 err_code
)
1297 if (!vcpu
->rmode
.active
)
1300 if (vec
== GP_VECTOR
&& err_code
== 0)
1301 if (emulate_instruction(vcpu
, NULL
, 0, 0) == EMULATE_DONE
)
1306 static int handle_exception(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1308 u32 intr_info
, error_code
;
1309 unsigned long cr2
, rip
;
1311 enum emulation_result er
;
1314 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1315 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
1317 if ((vect_info
& VECTORING_INFO_VALID_MASK
) &&
1318 !is_page_fault(intr_info
)) {
1319 printk(KERN_ERR
"%s: unexpected, vectoring info 0x%x "
1320 "intr info 0x%x\n", __FUNCTION__
, vect_info
, intr_info
);
1323 if (is_external_interrupt(vect_info
)) {
1324 int irq
= vect_info
& VECTORING_INFO_VECTOR_MASK
;
1325 set_bit(irq
, vcpu
->irq_pending
);
1326 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->irq_summary
);
1329 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) { /* nmi */
1334 rip
= vmcs_readl(GUEST_RIP
);
1335 if (intr_info
& INTR_INFO_DELIEVER_CODE_MASK
)
1336 error_code
= vmcs_read32(VM_EXIT_INTR_ERROR_CODE
);
1337 if (is_page_fault(intr_info
)) {
1338 cr2
= vmcs_readl(EXIT_QUALIFICATION
);
1340 spin_lock(&vcpu
->kvm
->lock
);
1341 r
= kvm_mmu_page_fault(vcpu
, cr2
, error_code
);
1343 spin_unlock(&vcpu
->kvm
->lock
);
1347 spin_unlock(&vcpu
->kvm
->lock
);
1351 er
= emulate_instruction(vcpu
, kvm_run
, cr2
, error_code
);
1352 spin_unlock(&vcpu
->kvm
->lock
);
1357 case EMULATE_DO_MMIO
:
1358 ++kvm_stat
.mmio_exits
;
1359 kvm_run
->exit_reason
= KVM_EXIT_MMIO
;
1362 vcpu_printf(vcpu
, "%s: emulate fail\n", __FUNCTION__
);
1369 if (vcpu
->rmode
.active
&&
1370 handle_rmode_exception(vcpu
, intr_info
& INTR_INFO_VECTOR_MASK
,
1374 if ((intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
)) == (INTR_TYPE_EXCEPTION
| 1)) {
1375 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
1378 kvm_run
->exit_reason
= KVM_EXIT_EXCEPTION
;
1379 kvm_run
->ex
.exception
= intr_info
& INTR_INFO_VECTOR_MASK
;
1380 kvm_run
->ex
.error_code
= error_code
;
1384 static int handle_external_interrupt(struct kvm_vcpu
*vcpu
,
1385 struct kvm_run
*kvm_run
)
1387 ++kvm_stat
.irq_exits
;
1391 static int handle_triple_fault(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1393 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
1397 static int get_io_count(struct kvm_vcpu
*vcpu
, unsigned long *count
)
1404 if ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_VM
)) {
1407 u32 cs_ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1409 countr_size
= (cs_ar
& AR_L_MASK
) ? 8:
1410 (cs_ar
& AR_DB_MASK
) ? 4: 2;
1413 rip
= vmcs_readl(GUEST_RIP
);
1414 if (countr_size
!= 8)
1415 rip
+= vmcs_readl(GUEST_CS_BASE
);
1417 n
= kvm_read_guest(vcpu
, rip
, sizeof(inst
), &inst
);
1419 for (i
= 0; i
< n
; i
++) {
1420 switch (((u8
*)&inst
)[i
]) {
1433 countr_size
= (countr_size
== 2) ? 4: (countr_size
>> 1);
1441 *count
= vcpu
->regs
[VCPU_REGS_RCX
] & (~0ULL >> (64 - countr_size
));
1442 //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1446 static int handle_io(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1448 u64 exit_qualification
;
1449 int size
, down
, in
, string
, rep
;
1451 unsigned long count
;
1454 ++kvm_stat
.io_exits
;
1455 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1456 in
= (exit_qualification
& 8) != 0;
1457 size
= (exit_qualification
& 7) + 1;
1458 string
= (exit_qualification
& 16) != 0;
1459 down
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_DF
) != 0;
1461 rep
= (exit_qualification
& 32) != 0;
1462 port
= exit_qualification
>> 16;
1465 if (rep
&& !get_io_count(vcpu
, &count
))
1467 address
= vmcs_readl(GUEST_LINEAR_ADDRESS
);
1469 return kvm_setup_pio(vcpu
, kvm_run
, in
, size
, count
, string
, down
,
1470 address
, rep
, port
);
1474 vmx_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1477 * Patch in the VMCALL instruction:
1479 hypercall
[0] = 0x0f;
1480 hypercall
[1] = 0x01;
1481 hypercall
[2] = 0xc1;
1482 hypercall
[3] = 0xc3;
1485 static int handle_cr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1487 u64 exit_qualification
;
1491 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1492 cr
= exit_qualification
& 15;
1493 reg
= (exit_qualification
>> 8) & 15;
1494 switch ((exit_qualification
>> 4) & 3) {
1495 case 0: /* mov to cr */
1498 vcpu_load_rsp_rip(vcpu
);
1499 set_cr0(vcpu
, vcpu
->regs
[reg
]);
1500 skip_emulated_instruction(vcpu
);
1503 vcpu_load_rsp_rip(vcpu
);
1504 set_cr3(vcpu
, vcpu
->regs
[reg
]);
1505 skip_emulated_instruction(vcpu
);
1508 vcpu_load_rsp_rip(vcpu
);
1509 set_cr4(vcpu
, vcpu
->regs
[reg
]);
1510 skip_emulated_instruction(vcpu
);
1513 vcpu_load_rsp_rip(vcpu
);
1514 set_cr8(vcpu
, vcpu
->regs
[reg
]);
1515 skip_emulated_instruction(vcpu
);
1519 case 1: /*mov from cr*/
1522 vcpu_load_rsp_rip(vcpu
);
1523 vcpu
->regs
[reg
] = vcpu
->cr3
;
1524 vcpu_put_rsp_rip(vcpu
);
1525 skip_emulated_instruction(vcpu
);
1528 printk(KERN_DEBUG
"handle_cr: read CR8 "
1529 "cpu erratum AA15\n");
1530 vcpu_load_rsp_rip(vcpu
);
1531 vcpu
->regs
[reg
] = vcpu
->cr8
;
1532 vcpu_put_rsp_rip(vcpu
);
1533 skip_emulated_instruction(vcpu
);
1538 lmsw(vcpu
, (exit_qualification
>> LMSW_SOURCE_DATA_SHIFT
) & 0x0f);
1540 skip_emulated_instruction(vcpu
);
1545 kvm_run
->exit_reason
= 0;
1546 printk(KERN_ERR
"kvm: unhandled control register: op %d cr %d\n",
1547 (int)(exit_qualification
>> 4) & 3, cr
);
1551 static int handle_dr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1553 u64 exit_qualification
;
1558 * FIXME: this code assumes the host is debugging the guest.
1559 * need to deal with guest debugging itself too.
1561 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1562 dr
= exit_qualification
& 7;
1563 reg
= (exit_qualification
>> 8) & 15;
1564 vcpu_load_rsp_rip(vcpu
);
1565 if (exit_qualification
& 16) {
1577 vcpu
->regs
[reg
] = val
;
1581 vcpu_put_rsp_rip(vcpu
);
1582 skip_emulated_instruction(vcpu
);
1586 static int handle_cpuid(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1588 kvm_emulate_cpuid(vcpu
);
1592 static int handle_rdmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1594 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1597 if (vmx_get_msr(vcpu
, ecx
, &data
)) {
1598 vmx_inject_gp(vcpu
, 0);
1602 /* FIXME: handling of bits 32:63 of rax, rdx */
1603 vcpu
->regs
[VCPU_REGS_RAX
] = data
& -1u;
1604 vcpu
->regs
[VCPU_REGS_RDX
] = (data
>> 32) & -1u;
1605 skip_emulated_instruction(vcpu
);
1609 static int handle_wrmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1611 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1612 u64 data
= (vcpu
->regs
[VCPU_REGS_RAX
] & -1u)
1613 | ((u64
)(vcpu
->regs
[VCPU_REGS_RDX
] & -1u) << 32);
1615 if (vmx_set_msr(vcpu
, ecx
, data
) != 0) {
1616 vmx_inject_gp(vcpu
, 0);
1620 skip_emulated_instruction(vcpu
);
1624 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
1625 struct kvm_run
*kvm_run
)
1627 kvm_run
->if_flag
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) != 0;
1628 kvm_run
->cr8
= vcpu
->cr8
;
1629 kvm_run
->apic_base
= vcpu
->apic_base
;
1630 kvm_run
->ready_for_interrupt_injection
= (vcpu
->interrupt_window_open
&&
1631 vcpu
->irq_summary
== 0);
1634 static int handle_interrupt_window(struct kvm_vcpu
*vcpu
,
1635 struct kvm_run
*kvm_run
)
1638 * If the user space waits to inject interrupts, exit as soon as
1641 if (kvm_run
->request_interrupt_window
&&
1642 !vcpu
->irq_summary
) {
1643 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
1644 ++kvm_stat
.irq_window_exits
;
1650 static int handle_halt(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1652 skip_emulated_instruction(vcpu
);
1653 if (vcpu
->irq_summary
)
1656 kvm_run
->exit_reason
= KVM_EXIT_HLT
;
1657 ++kvm_stat
.halt_exits
;
1661 static int handle_vmcall(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1663 skip_emulated_instruction(vcpu
);
1664 return kvm_hypercall(vcpu
, kvm_run
);
1668 * The exit handlers return 1 if the exit was handled fully and guest execution
1669 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1670 * to be done to userspace and return 0.
1672 static int (*kvm_vmx_exit_handlers
[])(struct kvm_vcpu
*vcpu
,
1673 struct kvm_run
*kvm_run
) = {
1674 [EXIT_REASON_EXCEPTION_NMI
] = handle_exception
,
1675 [EXIT_REASON_EXTERNAL_INTERRUPT
] = handle_external_interrupt
,
1676 [EXIT_REASON_TRIPLE_FAULT
] = handle_triple_fault
,
1677 [EXIT_REASON_IO_INSTRUCTION
] = handle_io
,
1678 [EXIT_REASON_CR_ACCESS
] = handle_cr
,
1679 [EXIT_REASON_DR_ACCESS
] = handle_dr
,
1680 [EXIT_REASON_CPUID
] = handle_cpuid
,
1681 [EXIT_REASON_MSR_READ
] = handle_rdmsr
,
1682 [EXIT_REASON_MSR_WRITE
] = handle_wrmsr
,
1683 [EXIT_REASON_PENDING_INTERRUPT
] = handle_interrupt_window
,
1684 [EXIT_REASON_HLT
] = handle_halt
,
1685 [EXIT_REASON_VMCALL
] = handle_vmcall
,
1688 static const int kvm_vmx_max_exit_handlers
=
1689 sizeof(kvm_vmx_exit_handlers
) / sizeof(*kvm_vmx_exit_handlers
);
1692 * The guest has exited. See if we can fix it or if we need userspace
1695 static int kvm_handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
1697 u32 vectoring_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1698 u32 exit_reason
= vmcs_read32(VM_EXIT_REASON
);
1700 if ( (vectoring_info
& VECTORING_INFO_VALID_MASK
) &&
1701 exit_reason
!= EXIT_REASON_EXCEPTION_NMI
)
1702 printk(KERN_WARNING
"%s: unexpected, valid vectoring info and "
1703 "exit reason is 0x%x\n", __FUNCTION__
, exit_reason
);
1704 kvm_run
->instruction_length
= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
1705 if (exit_reason
< kvm_vmx_max_exit_handlers
1706 && kvm_vmx_exit_handlers
[exit_reason
])
1707 return kvm_vmx_exit_handlers
[exit_reason
](vcpu
, kvm_run
);
1709 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1710 kvm_run
->hw
.hardware_exit_reason
= exit_reason
;
1716 * Check if userspace requested an interrupt window, and that the
1717 * interrupt window is open.
1719 * No need to exit to userspace if we already have an interrupt queued.
1721 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
1722 struct kvm_run
*kvm_run
)
1724 return (!vcpu
->irq_summary
&&
1725 kvm_run
->request_interrupt_window
&&
1726 vcpu
->interrupt_window_open
&&
1727 (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
));
1730 static int vmx_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1733 u16 fs_sel
, gs_sel
, ldt_sel
;
1734 int fs_gs_ldt_reload_needed
;
1739 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1740 * allow segment selectors with cpl > 0 or ti == 1.
1744 ldt_sel
= read_ldt();
1745 fs_gs_ldt_reload_needed
= (fs_sel
& 7) | (gs_sel
& 7) | ldt_sel
;
1746 if (!fs_gs_ldt_reload_needed
) {
1747 vmcs_write16(HOST_FS_SELECTOR
, fs_sel
);
1748 vmcs_write16(HOST_GS_SELECTOR
, gs_sel
);
1750 vmcs_write16(HOST_FS_SELECTOR
, 0);
1751 vmcs_write16(HOST_GS_SELECTOR
, 0);
1754 #ifdef CONFIG_X86_64
1755 vmcs_writel(HOST_FS_BASE
, read_msr(MSR_FS_BASE
));
1756 vmcs_writel(HOST_GS_BASE
, read_msr(MSR_GS_BASE
));
1758 vmcs_writel(HOST_FS_BASE
, segment_base(fs_sel
));
1759 vmcs_writel(HOST_GS_BASE
, segment_base(gs_sel
));
1762 if (!vcpu
->mmio_read_completed
)
1763 do_interrupt_requests(vcpu
, kvm_run
);
1765 if (vcpu
->guest_debug
.enabled
)
1766 kvm_guest_debug_pre(vcpu
);
1768 fx_save(vcpu
->host_fx_image
);
1769 fx_restore(vcpu
->guest_fx_image
);
1771 #ifdef CONFIG_X86_64
1772 save_msrs(vcpu
->host_msrs
+ msr_offset_kernel_gs_base
, 1);
1774 load_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1777 /* Store host registers */
1779 #ifdef CONFIG_X86_64
1780 "push %%rax; push %%rbx; push %%rdx;"
1781 "push %%rsi; push %%rdi; push %%rbp;"
1782 "push %%r8; push %%r9; push %%r10; push %%r11;"
1783 "push %%r12; push %%r13; push %%r14; push %%r15;"
1785 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1787 "pusha; push %%ecx \n\t"
1788 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1790 /* Check if vmlaunch of vmresume is needed */
1792 /* Load guest registers. Don't clobber flags. */
1793 #ifdef CONFIG_X86_64
1794 "mov %c[cr2](%3), %%rax \n\t"
1795 "mov %%rax, %%cr2 \n\t"
1796 "mov %c[rax](%3), %%rax \n\t"
1797 "mov %c[rbx](%3), %%rbx \n\t"
1798 "mov %c[rdx](%3), %%rdx \n\t"
1799 "mov %c[rsi](%3), %%rsi \n\t"
1800 "mov %c[rdi](%3), %%rdi \n\t"
1801 "mov %c[rbp](%3), %%rbp \n\t"
1802 "mov %c[r8](%3), %%r8 \n\t"
1803 "mov %c[r9](%3), %%r9 \n\t"
1804 "mov %c[r10](%3), %%r10 \n\t"
1805 "mov %c[r11](%3), %%r11 \n\t"
1806 "mov %c[r12](%3), %%r12 \n\t"
1807 "mov %c[r13](%3), %%r13 \n\t"
1808 "mov %c[r14](%3), %%r14 \n\t"
1809 "mov %c[r15](%3), %%r15 \n\t"
1810 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1812 "mov %c[cr2](%3), %%eax \n\t"
1813 "mov %%eax, %%cr2 \n\t"
1814 "mov %c[rax](%3), %%eax \n\t"
1815 "mov %c[rbx](%3), %%ebx \n\t"
1816 "mov %c[rdx](%3), %%edx \n\t"
1817 "mov %c[rsi](%3), %%esi \n\t"
1818 "mov %c[rdi](%3), %%edi \n\t"
1819 "mov %c[rbp](%3), %%ebp \n\t"
1820 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1822 /* Enter guest mode */
1824 ASM_VMX_VMLAUNCH
"\n\t"
1825 "jmp kvm_vmx_return \n\t"
1826 "launched: " ASM_VMX_VMRESUME
"\n\t"
1827 ".globl kvm_vmx_return \n\t"
1829 /* Save guest registers, load host registers, keep flags */
1830 #ifdef CONFIG_X86_64
1831 "xchg %3, (%%rsp) \n\t"
1832 "mov %%rax, %c[rax](%3) \n\t"
1833 "mov %%rbx, %c[rbx](%3) \n\t"
1834 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1835 "mov %%rdx, %c[rdx](%3) \n\t"
1836 "mov %%rsi, %c[rsi](%3) \n\t"
1837 "mov %%rdi, %c[rdi](%3) \n\t"
1838 "mov %%rbp, %c[rbp](%3) \n\t"
1839 "mov %%r8, %c[r8](%3) \n\t"
1840 "mov %%r9, %c[r9](%3) \n\t"
1841 "mov %%r10, %c[r10](%3) \n\t"
1842 "mov %%r11, %c[r11](%3) \n\t"
1843 "mov %%r12, %c[r12](%3) \n\t"
1844 "mov %%r13, %c[r13](%3) \n\t"
1845 "mov %%r14, %c[r14](%3) \n\t"
1846 "mov %%r15, %c[r15](%3) \n\t"
1847 "mov %%cr2, %%rax \n\t"
1848 "mov %%rax, %c[cr2](%3) \n\t"
1849 "mov (%%rsp), %3 \n\t"
1851 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1852 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1853 "pop %%rbp; pop %%rdi; pop %%rsi;"
1854 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
1856 "xchg %3, (%%esp) \n\t"
1857 "mov %%eax, %c[rax](%3) \n\t"
1858 "mov %%ebx, %c[rbx](%3) \n\t"
1859 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1860 "mov %%edx, %c[rdx](%3) \n\t"
1861 "mov %%esi, %c[rsi](%3) \n\t"
1862 "mov %%edi, %c[rdi](%3) \n\t"
1863 "mov %%ebp, %c[rbp](%3) \n\t"
1864 "mov %%cr2, %%eax \n\t"
1865 "mov %%eax, %c[cr2](%3) \n\t"
1866 "mov (%%esp), %3 \n\t"
1868 "pop %%ecx; popa \n\t"
1873 : "r"(vcpu
->launched
), "d"((unsigned long)HOST_RSP
),
1875 [rax
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RAX
])),
1876 [rbx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBX
])),
1877 [rcx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RCX
])),
1878 [rdx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDX
])),
1879 [rsi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RSI
])),
1880 [rdi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDI
])),
1881 [rbp
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBP
])),
1882 #ifdef CONFIG_X86_64
1883 [r8
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R8
])),
1884 [r9
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R9
])),
1885 [r10
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R10
])),
1886 [r11
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R11
])),
1887 [r12
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R12
])),
1888 [r13
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R13
])),
1889 [r14
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R14
])),
1890 [r15
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R15
])),
1892 [cr2
]"i"(offsetof(struct kvm_vcpu
, cr2
))
1896 * Reload segment selectors ASAP. (it's needed for a functional
1897 * kernel: x86 relies on having __KERNEL_PDA in %fs and x86_64
1898 * relies on having 0 in %gs for the CPU PDA to work.)
1900 if (fs_gs_ldt_reload_needed
) {
1904 * If we have to reload gs, we must take care to
1905 * preserve our gs base.
1907 local_irq_disable();
1909 #ifdef CONFIG_X86_64
1910 wrmsrl(MSR_GS_BASE
, vmcs_readl(HOST_GS_BASE
));
1918 save_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1919 load_msrs(vcpu
->host_msrs
, NR_BAD_MSRS
);
1921 fx_save(vcpu
->guest_fx_image
);
1922 fx_restore(vcpu
->host_fx_image
);
1923 vcpu
->interrupt_window_open
= (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0;
1925 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS
));
1928 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
1929 kvm_run
->fail_entry
.hardware_entry_failure_reason
1930 = vmcs_read32(VM_INSTRUCTION_ERROR
);
1934 * Profile KVM exit RIPs:
1936 if (unlikely(prof_on
== KVM_PROFILING
))
1937 profile_hit(KVM_PROFILING
, (void *)vmcs_readl(GUEST_RIP
));
1940 r
= kvm_handle_exit(kvm_run
, vcpu
);
1942 /* Give scheduler a change to reschedule. */
1943 if (signal_pending(current
)) {
1944 ++kvm_stat
.signal_exits
;
1945 post_kvm_run_save(vcpu
, kvm_run
);
1946 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
1950 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
1951 ++kvm_stat
.request_irq_exits
;
1952 post_kvm_run_save(vcpu
, kvm_run
);
1953 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
1962 post_kvm_run_save(vcpu
, kvm_run
);
1966 static void vmx_flush_tlb(struct kvm_vcpu
*vcpu
)
1968 vmcs_writel(GUEST_CR3
, vmcs_readl(GUEST_CR3
));
1971 static void vmx_inject_page_fault(struct kvm_vcpu
*vcpu
,
1975 u32 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1977 ++kvm_stat
.pf_guest
;
1979 if (is_page_fault(vect_info
)) {
1980 printk(KERN_DEBUG
"inject_page_fault: "
1981 "double fault 0x%lx @ 0x%lx\n",
1982 addr
, vmcs_readl(GUEST_RIP
));
1983 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, 0);
1984 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1986 INTR_TYPE_EXCEPTION
|
1987 INTR_INFO_DELIEVER_CODE_MASK
|
1988 INTR_INFO_VALID_MASK
);
1992 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, err_code
);
1993 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1995 INTR_TYPE_EXCEPTION
|
1996 INTR_INFO_DELIEVER_CODE_MASK
|
1997 INTR_INFO_VALID_MASK
);
2001 static void vmx_free_vmcs(struct kvm_vcpu
*vcpu
)
2004 on_each_cpu(__vcpu_clear
, vcpu
, 0, 1);
2005 free_vmcs(vcpu
->vmcs
);
2010 static void vmx_free_vcpu(struct kvm_vcpu
*vcpu
)
2012 vmx_free_vmcs(vcpu
);
2015 static int vmx_create_vcpu(struct kvm_vcpu
*vcpu
)
2019 vcpu
->guest_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2020 if (!vcpu
->guest_msrs
)
2023 vcpu
->host_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2024 if (!vcpu
->host_msrs
)
2025 goto out_free_guest_msrs
;
2027 vmcs
= alloc_vmcs();
2038 kfree(vcpu
->host_msrs
);
2039 vcpu
->host_msrs
= NULL
;
2041 out_free_guest_msrs
:
2042 kfree(vcpu
->guest_msrs
);
2043 vcpu
->guest_msrs
= NULL
;
2048 static struct kvm_arch_ops vmx_arch_ops
= {
2049 .cpu_has_kvm_support
= cpu_has_kvm_support
,
2050 .disabled_by_bios
= vmx_disabled_by_bios
,
2051 .hardware_setup
= hardware_setup
,
2052 .hardware_unsetup
= hardware_unsetup
,
2053 .hardware_enable
= hardware_enable
,
2054 .hardware_disable
= hardware_disable
,
2056 .vcpu_create
= vmx_create_vcpu
,
2057 .vcpu_free
= vmx_free_vcpu
,
2059 .vcpu_load
= vmx_vcpu_load
,
2060 .vcpu_put
= vmx_vcpu_put
,
2061 .vcpu_decache
= vmx_vcpu_decache
,
2063 .set_guest_debug
= set_guest_debug
,
2064 .get_msr
= vmx_get_msr
,
2065 .set_msr
= vmx_set_msr
,
2066 .get_segment_base
= vmx_get_segment_base
,
2067 .get_segment
= vmx_get_segment
,
2068 .set_segment
= vmx_set_segment
,
2069 .get_cs_db_l_bits
= vmx_get_cs_db_l_bits
,
2070 .decache_cr0_cr4_guest_bits
= vmx_decache_cr0_cr4_guest_bits
,
2071 .set_cr0
= vmx_set_cr0
,
2072 .set_cr3
= vmx_set_cr3
,
2073 .set_cr4
= vmx_set_cr4
,
2074 #ifdef CONFIG_X86_64
2075 .set_efer
= vmx_set_efer
,
2077 .get_idt
= vmx_get_idt
,
2078 .set_idt
= vmx_set_idt
,
2079 .get_gdt
= vmx_get_gdt
,
2080 .set_gdt
= vmx_set_gdt
,
2081 .cache_regs
= vcpu_load_rsp_rip
,
2082 .decache_regs
= vcpu_put_rsp_rip
,
2083 .get_rflags
= vmx_get_rflags
,
2084 .set_rflags
= vmx_set_rflags
,
2086 .tlb_flush
= vmx_flush_tlb
,
2087 .inject_page_fault
= vmx_inject_page_fault
,
2089 .inject_gp
= vmx_inject_gp
,
2091 .run
= vmx_vcpu_run
,
2092 .skip_emulated_instruction
= skip_emulated_instruction
,
2093 .vcpu_setup
= vmx_vcpu_setup
,
2094 .patch_hypercall
= vmx_patch_hypercall
,
2097 static int __init
vmx_init(void)
2099 return kvm_init_arch(&vmx_arch_ops
, THIS_MODULE
);
2102 static void __exit
vmx_exit(void)
2107 module_init(vmx_init
)
2108 module_exit(vmx_exit
)