2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
20 #include <linux/module.h>
21 #include <linux/kernel.h>
23 #include <linux/highmem.h>
24 #include <linux/profile.h>
28 #include "segment_descriptor.h"
30 MODULE_AUTHOR("Qumranet");
31 MODULE_LICENSE("GPL");
33 static DEFINE_PER_CPU(struct vmcs
*, vmxarea
);
34 static DEFINE_PER_CPU(struct vmcs
*, current_vmcs
);
42 static struct vmcs_descriptor
{
48 #define VMX_SEGMENT_FIELD(seg) \
49 [VCPU_SREG_##seg] = { \
50 .selector = GUEST_##seg##_SELECTOR, \
51 .base = GUEST_##seg##_BASE, \
52 .limit = GUEST_##seg##_LIMIT, \
53 .ar_bytes = GUEST_##seg##_AR_BYTES, \
56 static struct kvm_vmx_segment_field
{
61 } kvm_vmx_segment_fields
[] = {
62 VMX_SEGMENT_FIELD(CS
),
63 VMX_SEGMENT_FIELD(DS
),
64 VMX_SEGMENT_FIELD(ES
),
65 VMX_SEGMENT_FIELD(FS
),
66 VMX_SEGMENT_FIELD(GS
),
67 VMX_SEGMENT_FIELD(SS
),
68 VMX_SEGMENT_FIELD(TR
),
69 VMX_SEGMENT_FIELD(LDTR
),
73 * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
74 * away by decrementing the array size.
76 static const u32 vmx_msr_index
[] = {
78 MSR_SYSCALL_MASK
, MSR_LSTAR
, MSR_CSTAR
, MSR_KERNEL_GS_BASE
,
80 MSR_EFER
, MSR_K6_STAR
,
82 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
85 static unsigned msr_offset_kernel_gs_base
;
86 #define NR_64BIT_MSRS 4
88 * avoid save/load MSR_SYSCALL_MASK and MSR_LSTAR by std vt
89 * mechanism (cpu bug AA24)
93 #define NR_64BIT_MSRS 0
97 static inline int is_page_fault(u32 intr_info
)
99 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
100 INTR_INFO_VALID_MASK
)) ==
101 (INTR_TYPE_EXCEPTION
| PF_VECTOR
| INTR_INFO_VALID_MASK
);
104 static inline int is_external_interrupt(u32 intr_info
)
106 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VALID_MASK
))
107 == (INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
110 static struct vmx_msr_entry
*find_msr_entry(struct kvm_vcpu
*vcpu
, u32 msr
)
114 for (i
= 0; i
< vcpu
->nmsrs
; ++i
)
115 if (vcpu
->guest_msrs
[i
].index
== msr
)
116 return &vcpu
->guest_msrs
[i
];
120 static void vmcs_clear(struct vmcs
*vmcs
)
122 u64 phys_addr
= __pa(vmcs
);
125 asm volatile (ASM_VMX_VMCLEAR_RAX
"; setna %0"
126 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
129 printk(KERN_ERR
"kvm: vmclear fail: %p/%llx\n",
133 static void __vcpu_clear(void *arg
)
135 struct kvm_vcpu
*vcpu
= arg
;
136 int cpu
= raw_smp_processor_id();
138 if (vcpu
->cpu
== cpu
)
139 vmcs_clear(vcpu
->vmcs
);
140 if (per_cpu(current_vmcs
, cpu
) == vcpu
->vmcs
)
141 per_cpu(current_vmcs
, cpu
) = NULL
;
144 static void vcpu_clear(struct kvm_vcpu
*vcpu
)
146 if (vcpu
->cpu
!= raw_smp_processor_id() && vcpu
->cpu
!= -1)
147 smp_call_function_single(vcpu
->cpu
, __vcpu_clear
, vcpu
, 0, 1);
153 static unsigned long vmcs_readl(unsigned long field
)
157 asm volatile (ASM_VMX_VMREAD_RDX_RAX
158 : "=a"(value
) : "d"(field
) : "cc");
162 static u16
vmcs_read16(unsigned long field
)
164 return vmcs_readl(field
);
167 static u32
vmcs_read32(unsigned long field
)
169 return vmcs_readl(field
);
172 static u64
vmcs_read64(unsigned long field
)
175 return vmcs_readl(field
);
177 return vmcs_readl(field
) | ((u64
)vmcs_readl(field
+1) << 32);
181 static noinline
void vmwrite_error(unsigned long field
, unsigned long value
)
183 printk(KERN_ERR
"vmwrite error: reg %lx value %lx (err %d)\n",
184 field
, value
, vmcs_read32(VM_INSTRUCTION_ERROR
));
188 static void vmcs_writel(unsigned long field
, unsigned long value
)
192 asm volatile (ASM_VMX_VMWRITE_RAX_RDX
"; setna %0"
193 : "=q"(error
) : "a"(value
), "d"(field
) : "cc" );
195 vmwrite_error(field
, value
);
198 static void vmcs_write16(unsigned long field
, u16 value
)
200 vmcs_writel(field
, value
);
203 static void vmcs_write32(unsigned long field
, u32 value
)
205 vmcs_writel(field
, value
);
208 static void vmcs_write64(unsigned long field
, u64 value
)
211 vmcs_writel(field
, value
);
213 vmcs_writel(field
, value
);
215 vmcs_writel(field
+1, value
>> 32);
220 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
221 * vcpu mutex is already taken.
223 static void vmx_vcpu_load(struct kvm_vcpu
*vcpu
)
225 u64 phys_addr
= __pa(vcpu
->vmcs
);
230 if (vcpu
->cpu
!= cpu
)
233 if (per_cpu(current_vmcs
, cpu
) != vcpu
->vmcs
) {
236 per_cpu(current_vmcs
, cpu
) = vcpu
->vmcs
;
237 asm volatile (ASM_VMX_VMPTRLD_RAX
"; setna %0"
238 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
241 printk(KERN_ERR
"kvm: vmptrld %p/%llx fail\n",
242 vcpu
->vmcs
, phys_addr
);
245 if (vcpu
->cpu
!= cpu
) {
246 struct descriptor_table dt
;
247 unsigned long sysenter_esp
;
251 * Linux uses per-cpu TSS and GDT, so set these when switching
254 vmcs_writel(HOST_TR_BASE
, read_tr_base()); /* 22.2.4 */
256 vmcs_writel(HOST_GDTR_BASE
, dt
.base
); /* 22.2.4 */
258 rdmsrl(MSR_IA32_SYSENTER_ESP
, sysenter_esp
);
259 vmcs_writel(HOST_IA32_SYSENTER_ESP
, sysenter_esp
); /* 22.2.3 */
263 static void vmx_vcpu_put(struct kvm_vcpu
*vcpu
)
268 static void vmx_vcpu_decache(struct kvm_vcpu
*vcpu
)
273 static unsigned long vmx_get_rflags(struct kvm_vcpu
*vcpu
)
275 return vmcs_readl(GUEST_RFLAGS
);
278 static void vmx_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
280 vmcs_writel(GUEST_RFLAGS
, rflags
);
283 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
286 u32 interruptibility
;
288 rip
= vmcs_readl(GUEST_RIP
);
289 rip
+= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
290 vmcs_writel(GUEST_RIP
, rip
);
293 * We emulated an instruction, so temporary interrupt blocking
294 * should be removed, if set.
296 interruptibility
= vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
);
297 if (interruptibility
& 3)
298 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
,
299 interruptibility
& ~3);
300 vcpu
->interrupt_window_open
= 1;
303 static void vmx_inject_gp(struct kvm_vcpu
*vcpu
, unsigned error_code
)
305 printk(KERN_DEBUG
"inject_general_protection: rip 0x%lx\n",
306 vmcs_readl(GUEST_RIP
));
307 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, error_code
);
308 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
310 INTR_TYPE_EXCEPTION
|
311 INTR_INFO_DELIEVER_CODE_MASK
|
312 INTR_INFO_VALID_MASK
);
316 * Set up the vmcs to automatically save and restore system
317 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
318 * mode, as fiddling with msrs is very expensive.
320 static void setup_msrs(struct kvm_vcpu
*vcpu
)
322 int nr_skip
, nr_good_msrs
;
324 if (is_long_mode(vcpu
))
325 nr_skip
= NR_BAD_MSRS
;
327 nr_skip
= NR_64BIT_MSRS
;
328 nr_good_msrs
= vcpu
->nmsrs
- nr_skip
;
331 * MSR_K6_STAR is only needed on long mode guests, and only
332 * if efer.sce is enabled.
334 if (find_msr_entry(vcpu
, MSR_K6_STAR
)) {
337 if (is_long_mode(vcpu
) && (vcpu
->shadow_efer
& EFER_SCE
))
342 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR
,
343 virt_to_phys(vcpu
->guest_msrs
+ nr_skip
));
344 vmcs_writel(VM_EXIT_MSR_STORE_ADDR
,
345 virt_to_phys(vcpu
->guest_msrs
+ nr_skip
));
346 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR
,
347 virt_to_phys(vcpu
->host_msrs
+ nr_skip
));
348 vmcs_write32(VM_EXIT_MSR_STORE_COUNT
, nr_good_msrs
); /* 22.2.2 */
349 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
350 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
354 * reads and returns guest's timestamp counter "register"
355 * guest_tsc = host_tsc + tsc_offset -- 21.3
357 static u64
guest_read_tsc(void)
359 u64 host_tsc
, tsc_offset
;
362 tsc_offset
= vmcs_read64(TSC_OFFSET
);
363 return host_tsc
+ tsc_offset
;
367 * writes 'guest_tsc' into guest's timestamp counter "register"
368 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
370 static void guest_write_tsc(u64 guest_tsc
)
375 vmcs_write64(TSC_OFFSET
, guest_tsc
- host_tsc
);
378 static void reload_tss(void)
380 #ifndef CONFIG_X86_64
383 * VT restores TR but not its size. Useless.
385 struct descriptor_table gdt
;
386 struct segment_descriptor
*descs
;
389 descs
= (void *)gdt
.base
;
390 descs
[GDT_ENTRY_TSS
].type
= 9; /* available TSS */
396 * Reads an msr value (of 'msr_index') into 'pdata'.
397 * Returns 0 on success, non-0 otherwise.
398 * Assumes vcpu_load() was already called.
400 static int vmx_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
403 struct vmx_msr_entry
*msr
;
406 printk(KERN_ERR
"BUG: get_msr called with NULL pdata\n");
413 data
= vmcs_readl(GUEST_FS_BASE
);
416 data
= vmcs_readl(GUEST_GS_BASE
);
419 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
421 case MSR_IA32_TIME_STAMP_COUNTER
:
422 data
= guest_read_tsc();
424 case MSR_IA32_SYSENTER_CS
:
425 data
= vmcs_read32(GUEST_SYSENTER_CS
);
427 case MSR_IA32_SYSENTER_EIP
:
428 data
= vmcs_readl(GUEST_SYSENTER_EIP
);
430 case MSR_IA32_SYSENTER_ESP
:
431 data
= vmcs_readl(GUEST_SYSENTER_ESP
);
434 msr
= find_msr_entry(vcpu
, msr_index
);
439 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
447 * Writes msr value into into the appropriate "register".
448 * Returns 0 on success, non-0 otherwise.
449 * Assumes vcpu_load() was already called.
451 static int vmx_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
453 struct vmx_msr_entry
*msr
;
457 return kvm_set_msr_common(vcpu
, msr_index
, data
);
459 vmcs_writel(GUEST_FS_BASE
, data
);
462 vmcs_writel(GUEST_GS_BASE
, data
);
465 case MSR_IA32_SYSENTER_CS
:
466 vmcs_write32(GUEST_SYSENTER_CS
, data
);
468 case MSR_IA32_SYSENTER_EIP
:
469 vmcs_writel(GUEST_SYSENTER_EIP
, data
);
471 case MSR_IA32_SYSENTER_ESP
:
472 vmcs_writel(GUEST_SYSENTER_ESP
, data
);
474 case MSR_IA32_TIME_STAMP_COUNTER
:
475 guest_write_tsc(data
);
478 msr
= find_msr_entry(vcpu
, msr_index
);
483 return kvm_set_msr_common(vcpu
, msr_index
, data
);
492 * Sync the rsp and rip registers into the vcpu structure. This allows
493 * registers to be accessed by indexing vcpu->regs.
495 static void vcpu_load_rsp_rip(struct kvm_vcpu
*vcpu
)
497 vcpu
->regs
[VCPU_REGS_RSP
] = vmcs_readl(GUEST_RSP
);
498 vcpu
->rip
= vmcs_readl(GUEST_RIP
);
502 * Syncs rsp and rip back into the vmcs. Should be called after possible
505 static void vcpu_put_rsp_rip(struct kvm_vcpu
*vcpu
)
507 vmcs_writel(GUEST_RSP
, vcpu
->regs
[VCPU_REGS_RSP
]);
508 vmcs_writel(GUEST_RIP
, vcpu
->rip
);
511 static int set_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
513 unsigned long dr7
= 0x400;
514 u32 exception_bitmap
;
517 exception_bitmap
= vmcs_read32(EXCEPTION_BITMAP
);
518 old_singlestep
= vcpu
->guest_debug
.singlestep
;
520 vcpu
->guest_debug
.enabled
= dbg
->enabled
;
521 if (vcpu
->guest_debug
.enabled
) {
524 dr7
|= 0x200; /* exact */
525 for (i
= 0; i
< 4; ++i
) {
526 if (!dbg
->breakpoints
[i
].enabled
)
528 vcpu
->guest_debug
.bp
[i
] = dbg
->breakpoints
[i
].address
;
529 dr7
|= 2 << (i
*2); /* global enable */
530 dr7
|= 0 << (i
*4+16); /* execution breakpoint */
533 exception_bitmap
|= (1u << 1); /* Trap debug exceptions */
535 vcpu
->guest_debug
.singlestep
= dbg
->singlestep
;
537 exception_bitmap
&= ~(1u << 1); /* Ignore debug exceptions */
538 vcpu
->guest_debug
.singlestep
= 0;
541 if (old_singlestep
&& !vcpu
->guest_debug
.singlestep
) {
544 flags
= vmcs_readl(GUEST_RFLAGS
);
545 flags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
546 vmcs_writel(GUEST_RFLAGS
, flags
);
549 vmcs_write32(EXCEPTION_BITMAP
, exception_bitmap
);
550 vmcs_writel(GUEST_DR7
, dr7
);
555 static __init
int cpu_has_kvm_support(void)
557 unsigned long ecx
= cpuid_ecx(1);
558 return test_bit(5, &ecx
); /* CPUID.1:ECX.VMX[bit 5] -> VT */
561 static __init
int vmx_disabled_by_bios(void)
565 rdmsrl(MSR_IA32_FEATURE_CONTROL
, msr
);
566 return (msr
& 5) == 1; /* locked but not enabled */
569 static void hardware_enable(void *garbage
)
571 int cpu
= raw_smp_processor_id();
572 u64 phys_addr
= __pa(per_cpu(vmxarea
, cpu
));
575 rdmsrl(MSR_IA32_FEATURE_CONTROL
, old
);
577 /* enable and lock */
578 wrmsrl(MSR_IA32_FEATURE_CONTROL
, old
| 5);
579 write_cr4(read_cr4() | CR4_VMXE
); /* FIXME: not cpu hotplug safe */
580 asm volatile (ASM_VMX_VMXON_RAX
: : "a"(&phys_addr
), "m"(phys_addr
)
584 static void hardware_disable(void *garbage
)
586 asm volatile (ASM_VMX_VMXOFF
: : : "cc");
589 static __init
void setup_vmcs_descriptor(void)
591 u32 vmx_msr_low
, vmx_msr_high
;
593 rdmsr(MSR_IA32_VMX_BASIC
, vmx_msr_low
, vmx_msr_high
);
594 vmcs_descriptor
.size
= vmx_msr_high
& 0x1fff;
595 vmcs_descriptor
.order
= get_order(vmcs_descriptor
.size
);
596 vmcs_descriptor
.revision_id
= vmx_msr_low
;
599 static struct vmcs
*alloc_vmcs_cpu(int cpu
)
601 int node
= cpu_to_node(cpu
);
605 pages
= alloc_pages_node(node
, GFP_KERNEL
, vmcs_descriptor
.order
);
608 vmcs
= page_address(pages
);
609 memset(vmcs
, 0, vmcs_descriptor
.size
);
610 vmcs
->revision_id
= vmcs_descriptor
.revision_id
; /* vmcs revision id */
614 static struct vmcs
*alloc_vmcs(void)
616 return alloc_vmcs_cpu(raw_smp_processor_id());
619 static void free_vmcs(struct vmcs
*vmcs
)
621 free_pages((unsigned long)vmcs
, vmcs_descriptor
.order
);
624 static __exit
void free_kvm_area(void)
628 for_each_online_cpu(cpu
)
629 free_vmcs(per_cpu(vmxarea
, cpu
));
632 extern struct vmcs
*alloc_vmcs_cpu(int cpu
);
634 static __init
int alloc_kvm_area(void)
638 for_each_online_cpu(cpu
) {
641 vmcs
= alloc_vmcs_cpu(cpu
);
647 per_cpu(vmxarea
, cpu
) = vmcs
;
652 static __init
int hardware_setup(void)
654 setup_vmcs_descriptor();
655 return alloc_kvm_area();
658 static __exit
void hardware_unsetup(void)
663 static void update_exception_bitmap(struct kvm_vcpu
*vcpu
)
665 if (vcpu
->rmode
.active
)
666 vmcs_write32(EXCEPTION_BITMAP
, ~0);
668 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
671 static void fix_pmode_dataseg(int seg
, struct kvm_save_segment
*save
)
673 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
675 if (vmcs_readl(sf
->base
) == save
->base
&& (save
->base
& AR_S_MASK
)) {
676 vmcs_write16(sf
->selector
, save
->selector
);
677 vmcs_writel(sf
->base
, save
->base
);
678 vmcs_write32(sf
->limit
, save
->limit
);
679 vmcs_write32(sf
->ar_bytes
, save
->ar
);
681 u32 dpl
= (vmcs_read16(sf
->selector
) & SELECTOR_RPL_MASK
)
683 vmcs_write32(sf
->ar_bytes
, 0x93 | dpl
);
687 static void enter_pmode(struct kvm_vcpu
*vcpu
)
691 vcpu
->rmode
.active
= 0;
693 vmcs_writel(GUEST_TR_BASE
, vcpu
->rmode
.tr
.base
);
694 vmcs_write32(GUEST_TR_LIMIT
, vcpu
->rmode
.tr
.limit
);
695 vmcs_write32(GUEST_TR_AR_BYTES
, vcpu
->rmode
.tr
.ar
);
697 flags
= vmcs_readl(GUEST_RFLAGS
);
698 flags
&= ~(IOPL_MASK
| X86_EFLAGS_VM
);
699 flags
|= (vcpu
->rmode
.save_iopl
<< IOPL_SHIFT
);
700 vmcs_writel(GUEST_RFLAGS
, flags
);
702 vmcs_writel(GUEST_CR4
, (vmcs_readl(GUEST_CR4
) & ~CR4_VME_MASK
) |
703 (vmcs_readl(CR4_READ_SHADOW
) & CR4_VME_MASK
));
705 update_exception_bitmap(vcpu
);
707 fix_pmode_dataseg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
708 fix_pmode_dataseg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
709 fix_pmode_dataseg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
710 fix_pmode_dataseg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
712 vmcs_write16(GUEST_SS_SELECTOR
, 0);
713 vmcs_write32(GUEST_SS_AR_BYTES
, 0x93);
715 vmcs_write16(GUEST_CS_SELECTOR
,
716 vmcs_read16(GUEST_CS_SELECTOR
) & ~SELECTOR_RPL_MASK
);
717 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
720 static int rmode_tss_base(struct kvm
* kvm
)
722 gfn_t base_gfn
= kvm
->memslots
[0].base_gfn
+ kvm
->memslots
[0].npages
- 3;
723 return base_gfn
<< PAGE_SHIFT
;
726 static void fix_rmode_seg(int seg
, struct kvm_save_segment
*save
)
728 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
730 save
->selector
= vmcs_read16(sf
->selector
);
731 save
->base
= vmcs_readl(sf
->base
);
732 save
->limit
= vmcs_read32(sf
->limit
);
733 save
->ar
= vmcs_read32(sf
->ar_bytes
);
734 vmcs_write16(sf
->selector
, vmcs_readl(sf
->base
) >> 4);
735 vmcs_write32(sf
->limit
, 0xffff);
736 vmcs_write32(sf
->ar_bytes
, 0xf3);
739 static void enter_rmode(struct kvm_vcpu
*vcpu
)
743 vcpu
->rmode
.active
= 1;
745 vcpu
->rmode
.tr
.base
= vmcs_readl(GUEST_TR_BASE
);
746 vmcs_writel(GUEST_TR_BASE
, rmode_tss_base(vcpu
->kvm
));
748 vcpu
->rmode
.tr
.limit
= vmcs_read32(GUEST_TR_LIMIT
);
749 vmcs_write32(GUEST_TR_LIMIT
, RMODE_TSS_SIZE
- 1);
751 vcpu
->rmode
.tr
.ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
752 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
754 flags
= vmcs_readl(GUEST_RFLAGS
);
755 vcpu
->rmode
.save_iopl
= (flags
& IOPL_MASK
) >> IOPL_SHIFT
;
757 flags
|= IOPL_MASK
| X86_EFLAGS_VM
;
759 vmcs_writel(GUEST_RFLAGS
, flags
);
760 vmcs_writel(GUEST_CR4
, vmcs_readl(GUEST_CR4
) | CR4_VME_MASK
);
761 update_exception_bitmap(vcpu
);
763 vmcs_write16(GUEST_SS_SELECTOR
, vmcs_readl(GUEST_SS_BASE
) >> 4);
764 vmcs_write32(GUEST_SS_LIMIT
, 0xffff);
765 vmcs_write32(GUEST_SS_AR_BYTES
, 0xf3);
767 vmcs_write32(GUEST_CS_AR_BYTES
, 0xf3);
768 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
769 if (vmcs_readl(GUEST_CS_BASE
) == 0xffff0000)
770 vmcs_writel(GUEST_CS_BASE
, 0xf0000);
771 vmcs_write16(GUEST_CS_SELECTOR
, vmcs_readl(GUEST_CS_BASE
) >> 4);
773 fix_rmode_seg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
774 fix_rmode_seg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
775 fix_rmode_seg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
776 fix_rmode_seg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
781 static void enter_lmode(struct kvm_vcpu
*vcpu
)
785 guest_tr_ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
786 if ((guest_tr_ar
& AR_TYPE_MASK
) != AR_TYPE_BUSY_64_TSS
) {
787 printk(KERN_DEBUG
"%s: tss fixup for long mode. \n",
789 vmcs_write32(GUEST_TR_AR_BYTES
,
790 (guest_tr_ar
& ~AR_TYPE_MASK
)
791 | AR_TYPE_BUSY_64_TSS
);
794 vcpu
->shadow_efer
|= EFER_LMA
;
796 find_msr_entry(vcpu
, MSR_EFER
)->data
|= EFER_LMA
| EFER_LME
;
797 vmcs_write32(VM_ENTRY_CONTROLS
,
798 vmcs_read32(VM_ENTRY_CONTROLS
)
799 | VM_ENTRY_CONTROLS_IA32E_MASK
);
802 static void exit_lmode(struct kvm_vcpu
*vcpu
)
804 vcpu
->shadow_efer
&= ~EFER_LMA
;
806 vmcs_write32(VM_ENTRY_CONTROLS
,
807 vmcs_read32(VM_ENTRY_CONTROLS
)
808 & ~VM_ENTRY_CONTROLS_IA32E_MASK
);
813 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
815 vcpu
->cr4
&= KVM_GUEST_CR4_MASK
;
816 vcpu
->cr4
|= vmcs_readl(GUEST_CR4
) & ~KVM_GUEST_CR4_MASK
;
819 static void vmx_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
821 if (vcpu
->rmode
.active
&& (cr0
& CR0_PE_MASK
))
824 if (!vcpu
->rmode
.active
&& !(cr0
& CR0_PE_MASK
))
828 if (vcpu
->shadow_efer
& EFER_LME
) {
829 if (!is_paging(vcpu
) && (cr0
& CR0_PG_MASK
))
831 if (is_paging(vcpu
) && !(cr0
& CR0_PG_MASK
))
836 vmcs_writel(CR0_READ_SHADOW
, cr0
);
837 vmcs_writel(GUEST_CR0
,
838 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
842 static void vmx_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
844 vmcs_writel(GUEST_CR3
, cr3
);
847 static void vmx_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
849 vmcs_writel(CR4_READ_SHADOW
, cr4
);
850 vmcs_writel(GUEST_CR4
, cr4
| (vcpu
->rmode
.active
?
851 KVM_RMODE_VM_CR4_ALWAYS_ON
: KVM_PMODE_VM_CR4_ALWAYS_ON
));
857 static void vmx_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
859 struct vmx_msr_entry
*msr
= find_msr_entry(vcpu
, MSR_EFER
);
861 vcpu
->shadow_efer
= efer
;
862 if (efer
& EFER_LMA
) {
863 vmcs_write32(VM_ENTRY_CONTROLS
,
864 vmcs_read32(VM_ENTRY_CONTROLS
) |
865 VM_ENTRY_CONTROLS_IA32E_MASK
);
869 vmcs_write32(VM_ENTRY_CONTROLS
,
870 vmcs_read32(VM_ENTRY_CONTROLS
) &
871 ~VM_ENTRY_CONTROLS_IA32E_MASK
);
873 msr
->data
= efer
& ~EFER_LME
;
880 static u64
vmx_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
882 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
884 return vmcs_readl(sf
->base
);
887 static void vmx_get_segment(struct kvm_vcpu
*vcpu
,
888 struct kvm_segment
*var
, int seg
)
890 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
893 var
->base
= vmcs_readl(sf
->base
);
894 var
->limit
= vmcs_read32(sf
->limit
);
895 var
->selector
= vmcs_read16(sf
->selector
);
896 ar
= vmcs_read32(sf
->ar_bytes
);
897 if (ar
& AR_UNUSABLE_MASK
)
900 var
->s
= (ar
>> 4) & 1;
901 var
->dpl
= (ar
>> 5) & 3;
902 var
->present
= (ar
>> 7) & 1;
903 var
->avl
= (ar
>> 12) & 1;
904 var
->l
= (ar
>> 13) & 1;
905 var
->db
= (ar
>> 14) & 1;
906 var
->g
= (ar
>> 15) & 1;
907 var
->unusable
= (ar
>> 16) & 1;
910 static void vmx_set_segment(struct kvm_vcpu
*vcpu
,
911 struct kvm_segment
*var
, int seg
)
913 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
916 vmcs_writel(sf
->base
, var
->base
);
917 vmcs_write32(sf
->limit
, var
->limit
);
918 vmcs_write16(sf
->selector
, var
->selector
);
919 if (vcpu
->rmode
.active
&& var
->s
) {
921 * Hack real-mode segments into vm86 compatibility.
923 if (var
->base
== 0xffff0000 && var
->selector
== 0xf000)
924 vmcs_writel(sf
->base
, 0xf0000);
926 } else if (var
->unusable
)
930 ar
|= (var
->s
& 1) << 4;
931 ar
|= (var
->dpl
& 3) << 5;
932 ar
|= (var
->present
& 1) << 7;
933 ar
|= (var
->avl
& 1) << 12;
934 ar
|= (var
->l
& 1) << 13;
935 ar
|= (var
->db
& 1) << 14;
936 ar
|= (var
->g
& 1) << 15;
938 if (ar
== 0) /* a 0 value means unusable */
939 ar
= AR_UNUSABLE_MASK
;
940 vmcs_write32(sf
->ar_bytes
, ar
);
943 static void vmx_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
945 u32 ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
947 *db
= (ar
>> 14) & 1;
951 static void vmx_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
953 dt
->limit
= vmcs_read32(GUEST_IDTR_LIMIT
);
954 dt
->base
= vmcs_readl(GUEST_IDTR_BASE
);
957 static void vmx_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
959 vmcs_write32(GUEST_IDTR_LIMIT
, dt
->limit
);
960 vmcs_writel(GUEST_IDTR_BASE
, dt
->base
);
963 static void vmx_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
965 dt
->limit
= vmcs_read32(GUEST_GDTR_LIMIT
);
966 dt
->base
= vmcs_readl(GUEST_GDTR_BASE
);
969 static void vmx_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
971 vmcs_write32(GUEST_GDTR_LIMIT
, dt
->limit
);
972 vmcs_writel(GUEST_GDTR_BASE
, dt
->base
);
975 static int init_rmode_tss(struct kvm
* kvm
)
977 struct page
*p1
, *p2
, *p3
;
978 gfn_t fn
= rmode_tss_base(kvm
) >> PAGE_SHIFT
;
981 p1
= gfn_to_page(kvm
, fn
++);
982 p2
= gfn_to_page(kvm
, fn
++);
983 p3
= gfn_to_page(kvm
, fn
);
985 if (!p1
|| !p2
|| !p3
) {
986 kvm_printf(kvm
,"%s: gfn_to_page failed\n", __FUNCTION__
);
990 page
= kmap_atomic(p1
, KM_USER0
);
991 memset(page
, 0, PAGE_SIZE
);
992 *(u16
*)(page
+ 0x66) = TSS_BASE_SIZE
+ TSS_REDIRECTION_SIZE
;
993 kunmap_atomic(page
, KM_USER0
);
995 page
= kmap_atomic(p2
, KM_USER0
);
996 memset(page
, 0, PAGE_SIZE
);
997 kunmap_atomic(page
, KM_USER0
);
999 page
= kmap_atomic(p3
, KM_USER0
);
1000 memset(page
, 0, PAGE_SIZE
);
1001 *(page
+ RMODE_TSS_SIZE
- 2 * PAGE_SIZE
- 1) = ~0;
1002 kunmap_atomic(page
, KM_USER0
);
1007 static void vmcs_write32_fixedbits(u32 msr
, u32 vmcs_field
, u32 val
)
1009 u32 msr_high
, msr_low
;
1011 rdmsr(msr
, msr_low
, msr_high
);
1015 vmcs_write32(vmcs_field
, val
);
1018 static void seg_setup(int seg
)
1020 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1022 vmcs_write16(sf
->selector
, 0);
1023 vmcs_writel(sf
->base
, 0);
1024 vmcs_write32(sf
->limit
, 0xffff);
1025 vmcs_write32(sf
->ar_bytes
, 0x93);
1029 * Sets up the vmcs for emulated real mode.
1031 static int vmx_vcpu_setup(struct kvm_vcpu
*vcpu
)
1033 u32 host_sysenter_cs
;
1036 struct descriptor_table dt
;
1039 extern asmlinkage
void kvm_vmx_return(void);
1041 if (!init_rmode_tss(vcpu
->kvm
)) {
1046 memset(vcpu
->regs
, 0, sizeof(vcpu
->regs
));
1047 vcpu
->regs
[VCPU_REGS_RDX
] = get_rdx_init_val();
1049 vcpu
->apic_base
= 0xfee00000 |
1050 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP
|
1051 MSR_IA32_APICBASE_ENABLE
;
1056 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1057 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1059 vmcs_write16(GUEST_CS_SELECTOR
, 0xf000);
1060 vmcs_writel(GUEST_CS_BASE
, 0x000f0000);
1061 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1062 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1064 seg_setup(VCPU_SREG_DS
);
1065 seg_setup(VCPU_SREG_ES
);
1066 seg_setup(VCPU_SREG_FS
);
1067 seg_setup(VCPU_SREG_GS
);
1068 seg_setup(VCPU_SREG_SS
);
1070 vmcs_write16(GUEST_TR_SELECTOR
, 0);
1071 vmcs_writel(GUEST_TR_BASE
, 0);
1072 vmcs_write32(GUEST_TR_LIMIT
, 0xffff);
1073 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1075 vmcs_write16(GUEST_LDTR_SELECTOR
, 0);
1076 vmcs_writel(GUEST_LDTR_BASE
, 0);
1077 vmcs_write32(GUEST_LDTR_LIMIT
, 0xffff);
1078 vmcs_write32(GUEST_LDTR_AR_BYTES
, 0x00082);
1080 vmcs_write32(GUEST_SYSENTER_CS
, 0);
1081 vmcs_writel(GUEST_SYSENTER_ESP
, 0);
1082 vmcs_writel(GUEST_SYSENTER_EIP
, 0);
1084 vmcs_writel(GUEST_RFLAGS
, 0x02);
1085 vmcs_writel(GUEST_RIP
, 0xfff0);
1086 vmcs_writel(GUEST_RSP
, 0);
1088 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1089 vmcs_writel(GUEST_DR7
, 0x400);
1091 vmcs_writel(GUEST_GDTR_BASE
, 0);
1092 vmcs_write32(GUEST_GDTR_LIMIT
, 0xffff);
1094 vmcs_writel(GUEST_IDTR_BASE
, 0);
1095 vmcs_write32(GUEST_IDTR_LIMIT
, 0xffff);
1097 vmcs_write32(GUEST_ACTIVITY_STATE
, 0);
1098 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
, 0);
1099 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS
, 0);
1102 vmcs_write64(IO_BITMAP_A
, 0);
1103 vmcs_write64(IO_BITMAP_B
, 0);
1107 vmcs_write64(VMCS_LINK_POINTER
, -1ull); /* 22.3.1.5 */
1109 /* Special registers */
1110 vmcs_write64(GUEST_IA32_DEBUGCTL
, 0);
1113 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS
,
1114 PIN_BASED_VM_EXEC_CONTROL
,
1115 PIN_BASED_EXT_INTR_MASK
/* 20.6.1 */
1116 | PIN_BASED_NMI_EXITING
/* 20.6.1 */
1118 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS
,
1119 CPU_BASED_VM_EXEC_CONTROL
,
1120 CPU_BASED_HLT_EXITING
/* 20.6.2 */
1121 | CPU_BASED_CR8_LOAD_EXITING
/* 20.6.2 */
1122 | CPU_BASED_CR8_STORE_EXITING
/* 20.6.2 */
1123 | CPU_BASED_UNCOND_IO_EXITING
/* 20.6.2 */
1124 | CPU_BASED_MOV_DR_EXITING
1125 | CPU_BASED_USE_TSC_OFFSETING
/* 21.3 */
1128 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
1129 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK
, 0);
1130 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH
, 0);
1131 vmcs_write32(CR3_TARGET_COUNT
, 0); /* 22.2.1 */
1133 vmcs_writel(HOST_CR0
, read_cr0()); /* 22.2.3 */
1134 vmcs_writel(HOST_CR4
, read_cr4()); /* 22.2.3, 22.2.5 */
1135 vmcs_writel(HOST_CR3
, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1137 vmcs_write16(HOST_CS_SELECTOR
, __KERNEL_CS
); /* 22.2.4 */
1138 vmcs_write16(HOST_DS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1139 vmcs_write16(HOST_ES_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1140 vmcs_write16(HOST_FS_SELECTOR
, read_fs()); /* 22.2.4 */
1141 vmcs_write16(HOST_GS_SELECTOR
, read_gs()); /* 22.2.4 */
1142 vmcs_write16(HOST_SS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1143 #ifdef CONFIG_X86_64
1144 rdmsrl(MSR_FS_BASE
, a
);
1145 vmcs_writel(HOST_FS_BASE
, a
); /* 22.2.4 */
1146 rdmsrl(MSR_GS_BASE
, a
);
1147 vmcs_writel(HOST_GS_BASE
, a
); /* 22.2.4 */
1149 vmcs_writel(HOST_FS_BASE
, 0); /* 22.2.4 */
1150 vmcs_writel(HOST_GS_BASE
, 0); /* 22.2.4 */
1153 vmcs_write16(HOST_TR_SELECTOR
, GDT_ENTRY_TSS
*8); /* 22.2.4 */
1156 vmcs_writel(HOST_IDTR_BASE
, dt
.base
); /* 22.2.4 */
1159 vmcs_writel(HOST_RIP
, (unsigned long)kvm_vmx_return
); /* 22.2.5 */
1161 rdmsr(MSR_IA32_SYSENTER_CS
, host_sysenter_cs
, junk
);
1162 vmcs_write32(HOST_IA32_SYSENTER_CS
, host_sysenter_cs
);
1163 rdmsrl(MSR_IA32_SYSENTER_ESP
, a
);
1164 vmcs_writel(HOST_IA32_SYSENTER_ESP
, a
); /* 22.2.3 */
1165 rdmsrl(MSR_IA32_SYSENTER_EIP
, a
);
1166 vmcs_writel(HOST_IA32_SYSENTER_EIP
, a
); /* 22.2.3 */
1168 for (i
= 0; i
< NR_VMX_MSR
; ++i
) {
1169 u32 index
= vmx_msr_index
[i
];
1170 u32 data_low
, data_high
;
1172 int j
= vcpu
->nmsrs
;
1174 if (rdmsr_safe(index
, &data_low
, &data_high
) < 0)
1176 if (wrmsr_safe(index
, data_low
, data_high
) < 0)
1178 data
= data_low
| ((u64
)data_high
<< 32);
1179 vcpu
->host_msrs
[j
].index
= index
;
1180 vcpu
->host_msrs
[j
].reserved
= 0;
1181 vcpu
->host_msrs
[j
].data
= data
;
1182 vcpu
->guest_msrs
[j
] = vcpu
->host_msrs
[j
];
1183 #ifdef CONFIG_X86_64
1184 if (index
== MSR_KERNEL_GS_BASE
)
1185 msr_offset_kernel_gs_base
= j
;
1192 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS
, VM_EXIT_CONTROLS
,
1193 (HOST_IS_64
<< 9)); /* 22.2,1, 20.7.1 */
1195 /* 22.2.1, 20.8.1 */
1196 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS
,
1197 VM_ENTRY_CONTROLS
, 0);
1198 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, 0); /* 22.2.1 */
1200 #ifdef CONFIG_X86_64
1201 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR
, 0);
1202 vmcs_writel(TPR_THRESHOLD
, 0);
1205 vmcs_writel(CR0_GUEST_HOST_MASK
, ~0UL);
1206 vmcs_writel(CR4_GUEST_HOST_MASK
, KVM_GUEST_CR4_MASK
);
1208 vcpu
->cr0
= 0x60000010;
1209 vmx_set_cr0(vcpu
, vcpu
->cr0
); // enter rmode
1210 vmx_set_cr4(vcpu
, 0);
1211 #ifdef CONFIG_X86_64
1212 vmx_set_efer(vcpu
, 0);
1221 static void inject_rmode_irq(struct kvm_vcpu
*vcpu
, int irq
)
1226 unsigned long flags
;
1227 unsigned long ss_base
= vmcs_readl(GUEST_SS_BASE
);
1228 u16 sp
= vmcs_readl(GUEST_RSP
);
1229 u32 ss_limit
= vmcs_read32(GUEST_SS_LIMIT
);
1231 if (sp
> ss_limit
|| sp
< 6 ) {
1232 vcpu_printf(vcpu
, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1234 vmcs_readl(GUEST_RSP
),
1235 vmcs_readl(GUEST_SS_BASE
),
1236 vmcs_read32(GUEST_SS_LIMIT
));
1240 if (kvm_read_guest(vcpu
, irq
* sizeof(ent
), sizeof(ent
), &ent
) !=
1242 vcpu_printf(vcpu
, "%s: read guest err\n", __FUNCTION__
);
1246 flags
= vmcs_readl(GUEST_RFLAGS
);
1247 cs
= vmcs_readl(GUEST_CS_BASE
) >> 4;
1248 ip
= vmcs_readl(GUEST_RIP
);
1251 if (kvm_write_guest(vcpu
, ss_base
+ sp
- 2, 2, &flags
) != 2 ||
1252 kvm_write_guest(vcpu
, ss_base
+ sp
- 4, 2, &cs
) != 2 ||
1253 kvm_write_guest(vcpu
, ss_base
+ sp
- 6, 2, &ip
) != 2) {
1254 vcpu_printf(vcpu
, "%s: write guest err\n", __FUNCTION__
);
1258 vmcs_writel(GUEST_RFLAGS
, flags
&
1259 ~( X86_EFLAGS_IF
| X86_EFLAGS_AC
| X86_EFLAGS_TF
));
1260 vmcs_write16(GUEST_CS_SELECTOR
, ent
[1]) ;
1261 vmcs_writel(GUEST_CS_BASE
, ent
[1] << 4);
1262 vmcs_writel(GUEST_RIP
, ent
[0]);
1263 vmcs_writel(GUEST_RSP
, (vmcs_readl(GUEST_RSP
) & ~0xffff) | (sp
- 6));
1266 static void kvm_do_inject_irq(struct kvm_vcpu
*vcpu
)
1268 int word_index
= __ffs(vcpu
->irq_summary
);
1269 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
1270 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1272 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
1273 if (!vcpu
->irq_pending
[word_index
])
1274 clear_bit(word_index
, &vcpu
->irq_summary
);
1276 if (vcpu
->rmode
.active
) {
1277 inject_rmode_irq(vcpu
, irq
);
1280 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1281 irq
| INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
1285 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1286 struct kvm_run
*kvm_run
)
1288 u32 cpu_based_vm_exec_control
;
1290 vcpu
->interrupt_window_open
=
1291 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
1292 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
1294 if (vcpu
->interrupt_window_open
&&
1295 vcpu
->irq_summary
&&
1296 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
) & INTR_INFO_VALID_MASK
))
1298 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1300 kvm_do_inject_irq(vcpu
);
1302 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
1303 if (!vcpu
->interrupt_window_open
&&
1304 (vcpu
->irq_summary
|| kvm_run
->request_interrupt_window
))
1306 * Interrupts blocked. Wait for unblock.
1308 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
1310 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
1311 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
1314 static void kvm_guest_debug_pre(struct kvm_vcpu
*vcpu
)
1316 struct kvm_guest_debug
*dbg
= &vcpu
->guest_debug
;
1318 set_debugreg(dbg
->bp
[0], 0);
1319 set_debugreg(dbg
->bp
[1], 1);
1320 set_debugreg(dbg
->bp
[2], 2);
1321 set_debugreg(dbg
->bp
[3], 3);
1323 if (dbg
->singlestep
) {
1324 unsigned long flags
;
1326 flags
= vmcs_readl(GUEST_RFLAGS
);
1327 flags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
1328 vmcs_writel(GUEST_RFLAGS
, flags
);
1332 static int handle_rmode_exception(struct kvm_vcpu
*vcpu
,
1333 int vec
, u32 err_code
)
1335 if (!vcpu
->rmode
.active
)
1338 if (vec
== GP_VECTOR
&& err_code
== 0)
1339 if (emulate_instruction(vcpu
, NULL
, 0, 0) == EMULATE_DONE
)
1344 static int handle_exception(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1346 u32 intr_info
, error_code
;
1347 unsigned long cr2
, rip
;
1349 enum emulation_result er
;
1352 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1353 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
1355 if ((vect_info
& VECTORING_INFO_VALID_MASK
) &&
1356 !is_page_fault(intr_info
)) {
1357 printk(KERN_ERR
"%s: unexpected, vectoring info 0x%x "
1358 "intr info 0x%x\n", __FUNCTION__
, vect_info
, intr_info
);
1361 if (is_external_interrupt(vect_info
)) {
1362 int irq
= vect_info
& VECTORING_INFO_VECTOR_MASK
;
1363 set_bit(irq
, vcpu
->irq_pending
);
1364 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->irq_summary
);
1367 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) { /* nmi */
1372 rip
= vmcs_readl(GUEST_RIP
);
1373 if (intr_info
& INTR_INFO_DELIEVER_CODE_MASK
)
1374 error_code
= vmcs_read32(VM_EXIT_INTR_ERROR_CODE
);
1375 if (is_page_fault(intr_info
)) {
1376 cr2
= vmcs_readl(EXIT_QUALIFICATION
);
1378 spin_lock(&vcpu
->kvm
->lock
);
1379 r
= kvm_mmu_page_fault(vcpu
, cr2
, error_code
);
1381 spin_unlock(&vcpu
->kvm
->lock
);
1385 spin_unlock(&vcpu
->kvm
->lock
);
1389 er
= emulate_instruction(vcpu
, kvm_run
, cr2
, error_code
);
1390 spin_unlock(&vcpu
->kvm
->lock
);
1395 case EMULATE_DO_MMIO
:
1396 ++vcpu
->stat
.mmio_exits
;
1397 kvm_run
->exit_reason
= KVM_EXIT_MMIO
;
1400 vcpu_printf(vcpu
, "%s: emulate fail\n", __FUNCTION__
);
1407 if (vcpu
->rmode
.active
&&
1408 handle_rmode_exception(vcpu
, intr_info
& INTR_INFO_VECTOR_MASK
,
1412 if ((intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
)) == (INTR_TYPE_EXCEPTION
| 1)) {
1413 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
1416 kvm_run
->exit_reason
= KVM_EXIT_EXCEPTION
;
1417 kvm_run
->ex
.exception
= intr_info
& INTR_INFO_VECTOR_MASK
;
1418 kvm_run
->ex
.error_code
= error_code
;
1422 static int handle_external_interrupt(struct kvm_vcpu
*vcpu
,
1423 struct kvm_run
*kvm_run
)
1425 ++vcpu
->stat
.irq_exits
;
1429 static int handle_triple_fault(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1431 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
1435 static int get_io_count(struct kvm_vcpu
*vcpu
, unsigned long *count
)
1442 if ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_VM
)) {
1445 u32 cs_ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1447 countr_size
= (cs_ar
& AR_L_MASK
) ? 8:
1448 (cs_ar
& AR_DB_MASK
) ? 4: 2;
1451 rip
= vmcs_readl(GUEST_RIP
);
1452 if (countr_size
!= 8)
1453 rip
+= vmcs_readl(GUEST_CS_BASE
);
1455 n
= kvm_read_guest(vcpu
, rip
, sizeof(inst
), &inst
);
1457 for (i
= 0; i
< n
; i
++) {
1458 switch (((u8
*)&inst
)[i
]) {
1471 countr_size
= (countr_size
== 2) ? 4: (countr_size
>> 1);
1479 *count
= vcpu
->regs
[VCPU_REGS_RCX
] & (~0ULL >> (64 - countr_size
));
1480 //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1484 static int handle_io(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1486 u64 exit_qualification
;
1487 int size
, down
, in
, string
, rep
;
1489 unsigned long count
;
1492 ++vcpu
->stat
.io_exits
;
1493 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1494 in
= (exit_qualification
& 8) != 0;
1495 size
= (exit_qualification
& 7) + 1;
1496 string
= (exit_qualification
& 16) != 0;
1497 down
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_DF
) != 0;
1499 rep
= (exit_qualification
& 32) != 0;
1500 port
= exit_qualification
>> 16;
1503 if (rep
&& !get_io_count(vcpu
, &count
))
1505 address
= vmcs_readl(GUEST_LINEAR_ADDRESS
);
1507 return kvm_setup_pio(vcpu
, kvm_run
, in
, size
, count
, string
, down
,
1508 address
, rep
, port
);
1512 vmx_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1515 * Patch in the VMCALL instruction:
1517 hypercall
[0] = 0x0f;
1518 hypercall
[1] = 0x01;
1519 hypercall
[2] = 0xc1;
1520 hypercall
[3] = 0xc3;
1523 static int handle_cr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1525 u64 exit_qualification
;
1529 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1530 cr
= exit_qualification
& 15;
1531 reg
= (exit_qualification
>> 8) & 15;
1532 switch ((exit_qualification
>> 4) & 3) {
1533 case 0: /* mov to cr */
1536 vcpu_load_rsp_rip(vcpu
);
1537 set_cr0(vcpu
, vcpu
->regs
[reg
]);
1538 skip_emulated_instruction(vcpu
);
1541 vcpu_load_rsp_rip(vcpu
);
1542 set_cr3(vcpu
, vcpu
->regs
[reg
]);
1543 skip_emulated_instruction(vcpu
);
1546 vcpu_load_rsp_rip(vcpu
);
1547 set_cr4(vcpu
, vcpu
->regs
[reg
]);
1548 skip_emulated_instruction(vcpu
);
1551 vcpu_load_rsp_rip(vcpu
);
1552 set_cr8(vcpu
, vcpu
->regs
[reg
]);
1553 skip_emulated_instruction(vcpu
);
1558 vcpu_load_rsp_rip(vcpu
);
1559 set_cr0(vcpu
, vcpu
->cr0
& ~CR0_TS_MASK
);
1560 skip_emulated_instruction(vcpu
);
1562 case 1: /*mov from cr*/
1565 vcpu_load_rsp_rip(vcpu
);
1566 vcpu
->regs
[reg
] = vcpu
->cr3
;
1567 vcpu_put_rsp_rip(vcpu
);
1568 skip_emulated_instruction(vcpu
);
1571 vcpu_load_rsp_rip(vcpu
);
1572 vcpu
->regs
[reg
] = vcpu
->cr8
;
1573 vcpu_put_rsp_rip(vcpu
);
1574 skip_emulated_instruction(vcpu
);
1579 lmsw(vcpu
, (exit_qualification
>> LMSW_SOURCE_DATA_SHIFT
) & 0x0f);
1581 skip_emulated_instruction(vcpu
);
1586 kvm_run
->exit_reason
= 0;
1587 printk(KERN_ERR
"kvm: unhandled control register: op %d cr %d\n",
1588 (int)(exit_qualification
>> 4) & 3, cr
);
1592 static int handle_dr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1594 u64 exit_qualification
;
1599 * FIXME: this code assumes the host is debugging the guest.
1600 * need to deal with guest debugging itself too.
1602 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1603 dr
= exit_qualification
& 7;
1604 reg
= (exit_qualification
>> 8) & 15;
1605 vcpu_load_rsp_rip(vcpu
);
1606 if (exit_qualification
& 16) {
1618 vcpu
->regs
[reg
] = val
;
1622 vcpu_put_rsp_rip(vcpu
);
1623 skip_emulated_instruction(vcpu
);
1627 static int handle_cpuid(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1629 kvm_emulate_cpuid(vcpu
);
1633 static int handle_rdmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1635 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1638 if (vmx_get_msr(vcpu
, ecx
, &data
)) {
1639 vmx_inject_gp(vcpu
, 0);
1643 /* FIXME: handling of bits 32:63 of rax, rdx */
1644 vcpu
->regs
[VCPU_REGS_RAX
] = data
& -1u;
1645 vcpu
->regs
[VCPU_REGS_RDX
] = (data
>> 32) & -1u;
1646 skip_emulated_instruction(vcpu
);
1650 static int handle_wrmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1652 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1653 u64 data
= (vcpu
->regs
[VCPU_REGS_RAX
] & -1u)
1654 | ((u64
)(vcpu
->regs
[VCPU_REGS_RDX
] & -1u) << 32);
1656 if (vmx_set_msr(vcpu
, ecx
, data
) != 0) {
1657 vmx_inject_gp(vcpu
, 0);
1661 skip_emulated_instruction(vcpu
);
1665 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
1666 struct kvm_run
*kvm_run
)
1668 kvm_run
->if_flag
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) != 0;
1669 kvm_run
->cr8
= vcpu
->cr8
;
1670 kvm_run
->apic_base
= vcpu
->apic_base
;
1671 kvm_run
->ready_for_interrupt_injection
= (vcpu
->interrupt_window_open
&&
1672 vcpu
->irq_summary
== 0);
1675 static int handle_interrupt_window(struct kvm_vcpu
*vcpu
,
1676 struct kvm_run
*kvm_run
)
1679 * If the user space waits to inject interrupts, exit as soon as
1682 if (kvm_run
->request_interrupt_window
&&
1683 !vcpu
->irq_summary
) {
1684 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
1685 ++vcpu
->stat
.irq_window_exits
;
1691 static int handle_halt(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1693 skip_emulated_instruction(vcpu
);
1694 if (vcpu
->irq_summary
)
1697 kvm_run
->exit_reason
= KVM_EXIT_HLT
;
1698 ++vcpu
->stat
.halt_exits
;
1702 static int handle_vmcall(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1704 skip_emulated_instruction(vcpu
);
1705 return kvm_hypercall(vcpu
, kvm_run
);
1709 * The exit handlers return 1 if the exit was handled fully and guest execution
1710 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1711 * to be done to userspace and return 0.
1713 static int (*kvm_vmx_exit_handlers
[])(struct kvm_vcpu
*vcpu
,
1714 struct kvm_run
*kvm_run
) = {
1715 [EXIT_REASON_EXCEPTION_NMI
] = handle_exception
,
1716 [EXIT_REASON_EXTERNAL_INTERRUPT
] = handle_external_interrupt
,
1717 [EXIT_REASON_TRIPLE_FAULT
] = handle_triple_fault
,
1718 [EXIT_REASON_IO_INSTRUCTION
] = handle_io
,
1719 [EXIT_REASON_CR_ACCESS
] = handle_cr
,
1720 [EXIT_REASON_DR_ACCESS
] = handle_dr
,
1721 [EXIT_REASON_CPUID
] = handle_cpuid
,
1722 [EXIT_REASON_MSR_READ
] = handle_rdmsr
,
1723 [EXIT_REASON_MSR_WRITE
] = handle_wrmsr
,
1724 [EXIT_REASON_PENDING_INTERRUPT
] = handle_interrupt_window
,
1725 [EXIT_REASON_HLT
] = handle_halt
,
1726 [EXIT_REASON_VMCALL
] = handle_vmcall
,
1729 static const int kvm_vmx_max_exit_handlers
=
1730 sizeof(kvm_vmx_exit_handlers
) / sizeof(*kvm_vmx_exit_handlers
);
1733 * The guest has exited. See if we can fix it or if we need userspace
1736 static int kvm_handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
1738 u32 vectoring_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1739 u32 exit_reason
= vmcs_read32(VM_EXIT_REASON
);
1741 if ( (vectoring_info
& VECTORING_INFO_VALID_MASK
) &&
1742 exit_reason
!= EXIT_REASON_EXCEPTION_NMI
)
1743 printk(KERN_WARNING
"%s: unexpected, valid vectoring info and "
1744 "exit reason is 0x%x\n", __FUNCTION__
, exit_reason
);
1745 kvm_run
->instruction_length
= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
1746 if (exit_reason
< kvm_vmx_max_exit_handlers
1747 && kvm_vmx_exit_handlers
[exit_reason
])
1748 return kvm_vmx_exit_handlers
[exit_reason
](vcpu
, kvm_run
);
1750 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1751 kvm_run
->hw
.hardware_exit_reason
= exit_reason
;
1757 * Check if userspace requested an interrupt window, and that the
1758 * interrupt window is open.
1760 * No need to exit to userspace if we already have an interrupt queued.
1762 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
1763 struct kvm_run
*kvm_run
)
1765 return (!vcpu
->irq_summary
&&
1766 kvm_run
->request_interrupt_window
&&
1767 vcpu
->interrupt_window_open
&&
1768 (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
));
1771 static int vmx_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1774 u16 fs_sel
, gs_sel
, ldt_sel
;
1775 int fs_gs_ldt_reload_needed
;
1780 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1781 * allow segment selectors with cpl > 0 or ti == 1.
1785 ldt_sel
= read_ldt();
1786 fs_gs_ldt_reload_needed
= (fs_sel
& 7) | (gs_sel
& 7) | ldt_sel
;
1787 if (!fs_gs_ldt_reload_needed
) {
1788 vmcs_write16(HOST_FS_SELECTOR
, fs_sel
);
1789 vmcs_write16(HOST_GS_SELECTOR
, gs_sel
);
1791 vmcs_write16(HOST_FS_SELECTOR
, 0);
1792 vmcs_write16(HOST_GS_SELECTOR
, 0);
1795 #ifdef CONFIG_X86_64
1796 vmcs_writel(HOST_FS_BASE
, read_msr(MSR_FS_BASE
));
1797 vmcs_writel(HOST_GS_BASE
, read_msr(MSR_GS_BASE
));
1799 vmcs_writel(HOST_FS_BASE
, segment_base(fs_sel
));
1800 vmcs_writel(HOST_GS_BASE
, segment_base(gs_sel
));
1803 if (!vcpu
->mmio_read_completed
)
1804 do_interrupt_requests(vcpu
, kvm_run
);
1806 if (vcpu
->guest_debug
.enabled
)
1807 kvm_guest_debug_pre(vcpu
);
1809 fx_save(vcpu
->host_fx_image
);
1810 fx_restore(vcpu
->guest_fx_image
);
1812 #ifdef CONFIG_X86_64
1813 if (is_long_mode(vcpu
)) {
1814 save_msrs(vcpu
->host_msrs
+ msr_offset_kernel_gs_base
, 1);
1815 load_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1820 /* Store host registers */
1822 #ifdef CONFIG_X86_64
1823 "push %%rax; push %%rbx; push %%rdx;"
1824 "push %%rsi; push %%rdi; push %%rbp;"
1825 "push %%r8; push %%r9; push %%r10; push %%r11;"
1826 "push %%r12; push %%r13; push %%r14; push %%r15;"
1828 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1830 "pusha; push %%ecx \n\t"
1831 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1833 /* Check if vmlaunch of vmresume is needed */
1835 /* Load guest registers. Don't clobber flags. */
1836 #ifdef CONFIG_X86_64
1837 "mov %c[cr2](%3), %%rax \n\t"
1838 "mov %%rax, %%cr2 \n\t"
1839 "mov %c[rax](%3), %%rax \n\t"
1840 "mov %c[rbx](%3), %%rbx \n\t"
1841 "mov %c[rdx](%3), %%rdx \n\t"
1842 "mov %c[rsi](%3), %%rsi \n\t"
1843 "mov %c[rdi](%3), %%rdi \n\t"
1844 "mov %c[rbp](%3), %%rbp \n\t"
1845 "mov %c[r8](%3), %%r8 \n\t"
1846 "mov %c[r9](%3), %%r9 \n\t"
1847 "mov %c[r10](%3), %%r10 \n\t"
1848 "mov %c[r11](%3), %%r11 \n\t"
1849 "mov %c[r12](%3), %%r12 \n\t"
1850 "mov %c[r13](%3), %%r13 \n\t"
1851 "mov %c[r14](%3), %%r14 \n\t"
1852 "mov %c[r15](%3), %%r15 \n\t"
1853 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1855 "mov %c[cr2](%3), %%eax \n\t"
1856 "mov %%eax, %%cr2 \n\t"
1857 "mov %c[rax](%3), %%eax \n\t"
1858 "mov %c[rbx](%3), %%ebx \n\t"
1859 "mov %c[rdx](%3), %%edx \n\t"
1860 "mov %c[rsi](%3), %%esi \n\t"
1861 "mov %c[rdi](%3), %%edi \n\t"
1862 "mov %c[rbp](%3), %%ebp \n\t"
1863 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1865 /* Enter guest mode */
1867 ASM_VMX_VMLAUNCH
"\n\t"
1868 "jmp kvm_vmx_return \n\t"
1869 "launched: " ASM_VMX_VMRESUME
"\n\t"
1870 ".globl kvm_vmx_return \n\t"
1872 /* Save guest registers, load host registers, keep flags */
1873 #ifdef CONFIG_X86_64
1874 "xchg %3, (%%rsp) \n\t"
1875 "mov %%rax, %c[rax](%3) \n\t"
1876 "mov %%rbx, %c[rbx](%3) \n\t"
1877 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1878 "mov %%rdx, %c[rdx](%3) \n\t"
1879 "mov %%rsi, %c[rsi](%3) \n\t"
1880 "mov %%rdi, %c[rdi](%3) \n\t"
1881 "mov %%rbp, %c[rbp](%3) \n\t"
1882 "mov %%r8, %c[r8](%3) \n\t"
1883 "mov %%r9, %c[r9](%3) \n\t"
1884 "mov %%r10, %c[r10](%3) \n\t"
1885 "mov %%r11, %c[r11](%3) \n\t"
1886 "mov %%r12, %c[r12](%3) \n\t"
1887 "mov %%r13, %c[r13](%3) \n\t"
1888 "mov %%r14, %c[r14](%3) \n\t"
1889 "mov %%r15, %c[r15](%3) \n\t"
1890 "mov %%cr2, %%rax \n\t"
1891 "mov %%rax, %c[cr2](%3) \n\t"
1892 "mov (%%rsp), %3 \n\t"
1894 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1895 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1896 "pop %%rbp; pop %%rdi; pop %%rsi;"
1897 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
1899 "xchg %3, (%%esp) \n\t"
1900 "mov %%eax, %c[rax](%3) \n\t"
1901 "mov %%ebx, %c[rbx](%3) \n\t"
1902 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1903 "mov %%edx, %c[rdx](%3) \n\t"
1904 "mov %%esi, %c[rsi](%3) \n\t"
1905 "mov %%edi, %c[rdi](%3) \n\t"
1906 "mov %%ebp, %c[rbp](%3) \n\t"
1907 "mov %%cr2, %%eax \n\t"
1908 "mov %%eax, %c[cr2](%3) \n\t"
1909 "mov (%%esp), %3 \n\t"
1911 "pop %%ecx; popa \n\t"
1916 : "r"(vcpu
->launched
), "d"((unsigned long)HOST_RSP
),
1918 [rax
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RAX
])),
1919 [rbx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBX
])),
1920 [rcx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RCX
])),
1921 [rdx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDX
])),
1922 [rsi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RSI
])),
1923 [rdi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDI
])),
1924 [rbp
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBP
])),
1925 #ifdef CONFIG_X86_64
1926 [r8
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R8
])),
1927 [r9
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R9
])),
1928 [r10
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R10
])),
1929 [r11
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R11
])),
1930 [r12
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R12
])),
1931 [r13
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R13
])),
1932 [r14
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R14
])),
1933 [r15
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R15
])),
1935 [cr2
]"i"(offsetof(struct kvm_vcpu
, cr2
))
1939 * Reload segment selectors ASAP. (it's needed for a functional
1940 * kernel: x86 relies on having __KERNEL_PDA in %fs and x86_64
1941 * relies on having 0 in %gs for the CPU PDA to work.)
1943 if (fs_gs_ldt_reload_needed
) {
1947 * If we have to reload gs, we must take care to
1948 * preserve our gs base.
1950 local_irq_disable();
1952 #ifdef CONFIG_X86_64
1953 wrmsrl(MSR_GS_BASE
, vmcs_readl(HOST_GS_BASE
));
1961 #ifdef CONFIG_X86_64
1962 if (is_long_mode(vcpu
)) {
1963 save_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1964 load_msrs(vcpu
->host_msrs
, NR_BAD_MSRS
);
1968 fx_save(vcpu
->guest_fx_image
);
1969 fx_restore(vcpu
->host_fx_image
);
1970 vcpu
->interrupt_window_open
= (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0;
1972 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS
));
1975 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
1976 kvm_run
->fail_entry
.hardware_entry_failure_reason
1977 = vmcs_read32(VM_INSTRUCTION_ERROR
);
1981 * Profile KVM exit RIPs:
1983 if (unlikely(prof_on
== KVM_PROFILING
))
1984 profile_hit(KVM_PROFILING
, (void *)vmcs_readl(GUEST_RIP
));
1987 r
= kvm_handle_exit(kvm_run
, vcpu
);
1989 /* Give scheduler a change to reschedule. */
1990 if (signal_pending(current
)) {
1991 ++vcpu
->stat
.signal_exits
;
1992 post_kvm_run_save(vcpu
, kvm_run
);
1993 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
1997 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
1998 ++vcpu
->stat
.request_irq_exits
;
1999 post_kvm_run_save(vcpu
, kvm_run
);
2000 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
2009 post_kvm_run_save(vcpu
, kvm_run
);
2013 static void vmx_flush_tlb(struct kvm_vcpu
*vcpu
)
2015 vmcs_writel(GUEST_CR3
, vmcs_readl(GUEST_CR3
));
2018 static void vmx_inject_page_fault(struct kvm_vcpu
*vcpu
,
2022 u32 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
2024 ++vcpu
->stat
.pf_guest
;
2026 if (is_page_fault(vect_info
)) {
2027 printk(KERN_DEBUG
"inject_page_fault: "
2028 "double fault 0x%lx @ 0x%lx\n",
2029 addr
, vmcs_readl(GUEST_RIP
));
2030 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, 0);
2031 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2033 INTR_TYPE_EXCEPTION
|
2034 INTR_INFO_DELIEVER_CODE_MASK
|
2035 INTR_INFO_VALID_MASK
);
2039 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, err_code
);
2040 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2042 INTR_TYPE_EXCEPTION
|
2043 INTR_INFO_DELIEVER_CODE_MASK
|
2044 INTR_INFO_VALID_MASK
);
2048 static void vmx_free_vmcs(struct kvm_vcpu
*vcpu
)
2051 on_each_cpu(__vcpu_clear
, vcpu
, 0, 1);
2052 free_vmcs(vcpu
->vmcs
);
2057 static void vmx_free_vcpu(struct kvm_vcpu
*vcpu
)
2059 vmx_free_vmcs(vcpu
);
2062 static int vmx_create_vcpu(struct kvm_vcpu
*vcpu
)
2066 vcpu
->guest_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2067 if (!vcpu
->guest_msrs
)
2070 vcpu
->host_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2071 if (!vcpu
->host_msrs
)
2072 goto out_free_guest_msrs
;
2074 vmcs
= alloc_vmcs();
2085 kfree(vcpu
->host_msrs
);
2086 vcpu
->host_msrs
= NULL
;
2088 out_free_guest_msrs
:
2089 kfree(vcpu
->guest_msrs
);
2090 vcpu
->guest_msrs
= NULL
;
2095 static struct kvm_arch_ops vmx_arch_ops
= {
2096 .cpu_has_kvm_support
= cpu_has_kvm_support
,
2097 .disabled_by_bios
= vmx_disabled_by_bios
,
2098 .hardware_setup
= hardware_setup
,
2099 .hardware_unsetup
= hardware_unsetup
,
2100 .hardware_enable
= hardware_enable
,
2101 .hardware_disable
= hardware_disable
,
2103 .vcpu_create
= vmx_create_vcpu
,
2104 .vcpu_free
= vmx_free_vcpu
,
2106 .vcpu_load
= vmx_vcpu_load
,
2107 .vcpu_put
= vmx_vcpu_put
,
2108 .vcpu_decache
= vmx_vcpu_decache
,
2110 .set_guest_debug
= set_guest_debug
,
2111 .get_msr
= vmx_get_msr
,
2112 .set_msr
= vmx_set_msr
,
2113 .get_segment_base
= vmx_get_segment_base
,
2114 .get_segment
= vmx_get_segment
,
2115 .set_segment
= vmx_set_segment
,
2116 .get_cs_db_l_bits
= vmx_get_cs_db_l_bits
,
2117 .decache_cr4_guest_bits
= vmx_decache_cr4_guest_bits
,
2118 .set_cr0
= vmx_set_cr0
,
2119 .set_cr3
= vmx_set_cr3
,
2120 .set_cr4
= vmx_set_cr4
,
2121 #ifdef CONFIG_X86_64
2122 .set_efer
= vmx_set_efer
,
2124 .get_idt
= vmx_get_idt
,
2125 .set_idt
= vmx_set_idt
,
2126 .get_gdt
= vmx_get_gdt
,
2127 .set_gdt
= vmx_set_gdt
,
2128 .cache_regs
= vcpu_load_rsp_rip
,
2129 .decache_regs
= vcpu_put_rsp_rip
,
2130 .get_rflags
= vmx_get_rflags
,
2131 .set_rflags
= vmx_set_rflags
,
2133 .tlb_flush
= vmx_flush_tlb
,
2134 .inject_page_fault
= vmx_inject_page_fault
,
2136 .inject_gp
= vmx_inject_gp
,
2138 .run
= vmx_vcpu_run
,
2139 .skip_emulated_instruction
= skip_emulated_instruction
,
2140 .vcpu_setup
= vmx_vcpu_setup
,
2141 .patch_hypercall
= vmx_patch_hypercall
,
2144 static int __init
vmx_init(void)
2146 return kvm_init_arch(&vmx_arch_ops
, THIS_MODULE
);
2149 static void __exit
vmx_exit(void)
2154 module_init(vmx_init
)
2155 module_exit(vmx_exit
)