2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
20 #include <linux/module.h>
21 #include <linux/kernel.h>
23 #include <linux/highmem.h>
24 #include <linux/profile.h>
28 #include "segment_descriptor.h"
30 MODULE_AUTHOR("Qumranet");
31 MODULE_LICENSE("GPL");
33 static DEFINE_PER_CPU(struct vmcs
*, vmxarea
);
34 static DEFINE_PER_CPU(struct vmcs
*, current_vmcs
);
42 static struct vmcs_descriptor
{
48 #define VMX_SEGMENT_FIELD(seg) \
49 [VCPU_SREG_##seg] = { \
50 .selector = GUEST_##seg##_SELECTOR, \
51 .base = GUEST_##seg##_BASE, \
52 .limit = GUEST_##seg##_LIMIT, \
53 .ar_bytes = GUEST_##seg##_AR_BYTES, \
56 static struct kvm_vmx_segment_field
{
61 } kvm_vmx_segment_fields
[] = {
62 VMX_SEGMENT_FIELD(CS
),
63 VMX_SEGMENT_FIELD(DS
),
64 VMX_SEGMENT_FIELD(ES
),
65 VMX_SEGMENT_FIELD(FS
),
66 VMX_SEGMENT_FIELD(GS
),
67 VMX_SEGMENT_FIELD(SS
),
68 VMX_SEGMENT_FIELD(TR
),
69 VMX_SEGMENT_FIELD(LDTR
),
72 static const u32 vmx_msr_index
[] = {
74 MSR_SYSCALL_MASK
, MSR_LSTAR
, MSR_CSTAR
, MSR_KERNEL_GS_BASE
,
76 MSR_EFER
, MSR_K6_STAR
,
78 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
81 static unsigned msr_offset_kernel_gs_base
;
82 #define NR_64BIT_MSRS 4
84 * avoid save/load MSR_SYSCALL_MASK and MSR_LSTAR by std vt
85 * mechanism (cpu bug AA24)
89 #define NR_64BIT_MSRS 0
93 static inline int is_page_fault(u32 intr_info
)
95 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
96 INTR_INFO_VALID_MASK
)) ==
97 (INTR_TYPE_EXCEPTION
| PF_VECTOR
| INTR_INFO_VALID_MASK
);
100 static inline int is_external_interrupt(u32 intr_info
)
102 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VALID_MASK
))
103 == (INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
106 static struct vmx_msr_entry
*find_msr_entry(struct kvm_vcpu
*vcpu
, u32 msr
)
110 for (i
= 0; i
< vcpu
->nmsrs
; ++i
)
111 if (vcpu
->guest_msrs
[i
].index
== msr
)
112 return &vcpu
->guest_msrs
[i
];
116 static void vmcs_clear(struct vmcs
*vmcs
)
118 u64 phys_addr
= __pa(vmcs
);
121 asm volatile (ASM_VMX_VMCLEAR_RAX
"; setna %0"
122 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
125 printk(KERN_ERR
"kvm: vmclear fail: %p/%llx\n",
129 static void __vcpu_clear(void *arg
)
131 struct kvm_vcpu
*vcpu
= arg
;
132 int cpu
= raw_smp_processor_id();
134 if (vcpu
->cpu
== cpu
)
135 vmcs_clear(vcpu
->vmcs
);
136 if (per_cpu(current_vmcs
, cpu
) == vcpu
->vmcs
)
137 per_cpu(current_vmcs
, cpu
) = NULL
;
140 static void vcpu_clear(struct kvm_vcpu
*vcpu
)
142 if (vcpu
->cpu
!= raw_smp_processor_id() && vcpu
->cpu
!= -1)
143 smp_call_function_single(vcpu
->cpu
, __vcpu_clear
, vcpu
, 0, 1);
149 static unsigned long vmcs_readl(unsigned long field
)
153 asm volatile (ASM_VMX_VMREAD_RDX_RAX
154 : "=a"(value
) : "d"(field
) : "cc");
158 static u16
vmcs_read16(unsigned long field
)
160 return vmcs_readl(field
);
163 static u32
vmcs_read32(unsigned long field
)
165 return vmcs_readl(field
);
168 static u64
vmcs_read64(unsigned long field
)
171 return vmcs_readl(field
);
173 return vmcs_readl(field
) | ((u64
)vmcs_readl(field
+1) << 32);
177 static noinline
void vmwrite_error(unsigned long field
, unsigned long value
)
179 printk(KERN_ERR
"vmwrite error: reg %lx value %lx (err %d)\n",
180 field
, value
, vmcs_read32(VM_INSTRUCTION_ERROR
));
184 static void vmcs_writel(unsigned long field
, unsigned long value
)
188 asm volatile (ASM_VMX_VMWRITE_RAX_RDX
"; setna %0"
189 : "=q"(error
) : "a"(value
), "d"(field
) : "cc" );
191 vmwrite_error(field
, value
);
194 static void vmcs_write16(unsigned long field
, u16 value
)
196 vmcs_writel(field
, value
);
199 static void vmcs_write32(unsigned long field
, u32 value
)
201 vmcs_writel(field
, value
);
204 static void vmcs_write64(unsigned long field
, u64 value
)
207 vmcs_writel(field
, value
);
209 vmcs_writel(field
, value
);
211 vmcs_writel(field
+1, value
>> 32);
216 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
217 * vcpu mutex is already taken.
219 static void vmx_vcpu_load(struct kvm_vcpu
*vcpu
)
221 u64 phys_addr
= __pa(vcpu
->vmcs
);
226 if (vcpu
->cpu
!= cpu
)
229 if (per_cpu(current_vmcs
, cpu
) != vcpu
->vmcs
) {
232 per_cpu(current_vmcs
, cpu
) = vcpu
->vmcs
;
233 asm volatile (ASM_VMX_VMPTRLD_RAX
"; setna %0"
234 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
237 printk(KERN_ERR
"kvm: vmptrld %p/%llx fail\n",
238 vcpu
->vmcs
, phys_addr
);
241 if (vcpu
->cpu
!= cpu
) {
242 struct descriptor_table dt
;
243 unsigned long sysenter_esp
;
247 * Linux uses per-cpu TSS and GDT, so set these when switching
250 vmcs_writel(HOST_TR_BASE
, read_tr_base()); /* 22.2.4 */
252 vmcs_writel(HOST_GDTR_BASE
, dt
.base
); /* 22.2.4 */
254 rdmsrl(MSR_IA32_SYSENTER_ESP
, sysenter_esp
);
255 vmcs_writel(HOST_IA32_SYSENTER_ESP
, sysenter_esp
); /* 22.2.3 */
259 static void vmx_vcpu_put(struct kvm_vcpu
*vcpu
)
264 static void vmx_vcpu_decache(struct kvm_vcpu
*vcpu
)
269 static unsigned long vmx_get_rflags(struct kvm_vcpu
*vcpu
)
271 return vmcs_readl(GUEST_RFLAGS
);
274 static void vmx_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
276 vmcs_writel(GUEST_RFLAGS
, rflags
);
279 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
282 u32 interruptibility
;
284 rip
= vmcs_readl(GUEST_RIP
);
285 rip
+= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
286 vmcs_writel(GUEST_RIP
, rip
);
289 * We emulated an instruction, so temporary interrupt blocking
290 * should be removed, if set.
292 interruptibility
= vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
);
293 if (interruptibility
& 3)
294 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
,
295 interruptibility
& ~3);
296 vcpu
->interrupt_window_open
= 1;
299 static void vmx_inject_gp(struct kvm_vcpu
*vcpu
, unsigned error_code
)
301 printk(KERN_DEBUG
"inject_general_protection: rip 0x%lx\n",
302 vmcs_readl(GUEST_RIP
));
303 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, error_code
);
304 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
306 INTR_TYPE_EXCEPTION
|
307 INTR_INFO_DELIEVER_CODE_MASK
|
308 INTR_INFO_VALID_MASK
);
312 * Set up the vmcs to automatically save and restore system
313 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
314 * mode, as fiddling with msrs is very expensive.
316 static void setup_msrs(struct kvm_vcpu
*vcpu
)
318 int nr_skip
, nr_good_msrs
;
320 if (is_long_mode(vcpu
))
321 nr_skip
= NR_BAD_MSRS
;
323 nr_skip
= NR_64BIT_MSRS
;
324 nr_good_msrs
= vcpu
->nmsrs
- nr_skip
;
326 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR
,
327 virt_to_phys(vcpu
->guest_msrs
+ nr_skip
));
328 vmcs_writel(VM_EXIT_MSR_STORE_ADDR
,
329 virt_to_phys(vcpu
->guest_msrs
+ nr_skip
));
330 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR
,
331 virt_to_phys(vcpu
->host_msrs
+ nr_skip
));
332 vmcs_write32(VM_EXIT_MSR_STORE_COUNT
, nr_good_msrs
); /* 22.2.2 */
333 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
334 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
338 * reads and returns guest's timestamp counter "register"
339 * guest_tsc = host_tsc + tsc_offset -- 21.3
341 static u64
guest_read_tsc(void)
343 u64 host_tsc
, tsc_offset
;
346 tsc_offset
= vmcs_read64(TSC_OFFSET
);
347 return host_tsc
+ tsc_offset
;
351 * writes 'guest_tsc' into guest's timestamp counter "register"
352 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
354 static void guest_write_tsc(u64 guest_tsc
)
359 vmcs_write64(TSC_OFFSET
, guest_tsc
- host_tsc
);
362 static void reload_tss(void)
364 #ifndef CONFIG_X86_64
367 * VT restores TR but not its size. Useless.
369 struct descriptor_table gdt
;
370 struct segment_descriptor
*descs
;
373 descs
= (void *)gdt
.base
;
374 descs
[GDT_ENTRY_TSS
].type
= 9; /* available TSS */
380 * Reads an msr value (of 'msr_index') into 'pdata'.
381 * Returns 0 on success, non-0 otherwise.
382 * Assumes vcpu_load() was already called.
384 static int vmx_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
387 struct vmx_msr_entry
*msr
;
390 printk(KERN_ERR
"BUG: get_msr called with NULL pdata\n");
397 data
= vmcs_readl(GUEST_FS_BASE
);
400 data
= vmcs_readl(GUEST_GS_BASE
);
403 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
405 case MSR_IA32_TIME_STAMP_COUNTER
:
406 data
= guest_read_tsc();
408 case MSR_IA32_SYSENTER_CS
:
409 data
= vmcs_read32(GUEST_SYSENTER_CS
);
411 case MSR_IA32_SYSENTER_EIP
:
412 data
= vmcs_readl(GUEST_SYSENTER_EIP
);
414 case MSR_IA32_SYSENTER_ESP
:
415 data
= vmcs_readl(GUEST_SYSENTER_ESP
);
418 msr
= find_msr_entry(vcpu
, msr_index
);
423 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
431 * Writes msr value into into the appropriate "register".
432 * Returns 0 on success, non-0 otherwise.
433 * Assumes vcpu_load() was already called.
435 static int vmx_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
437 struct vmx_msr_entry
*msr
;
441 return kvm_set_msr_common(vcpu
, msr_index
, data
);
443 vmcs_writel(GUEST_FS_BASE
, data
);
446 vmcs_writel(GUEST_GS_BASE
, data
);
449 case MSR_IA32_SYSENTER_CS
:
450 vmcs_write32(GUEST_SYSENTER_CS
, data
);
452 case MSR_IA32_SYSENTER_EIP
:
453 vmcs_writel(GUEST_SYSENTER_EIP
, data
);
455 case MSR_IA32_SYSENTER_ESP
:
456 vmcs_writel(GUEST_SYSENTER_ESP
, data
);
458 case MSR_IA32_TIME_STAMP_COUNTER
:
459 guest_write_tsc(data
);
462 msr
= find_msr_entry(vcpu
, msr_index
);
467 return kvm_set_msr_common(vcpu
, msr_index
, data
);
476 * Sync the rsp and rip registers into the vcpu structure. This allows
477 * registers to be accessed by indexing vcpu->regs.
479 static void vcpu_load_rsp_rip(struct kvm_vcpu
*vcpu
)
481 vcpu
->regs
[VCPU_REGS_RSP
] = vmcs_readl(GUEST_RSP
);
482 vcpu
->rip
= vmcs_readl(GUEST_RIP
);
486 * Syncs rsp and rip back into the vmcs. Should be called after possible
489 static void vcpu_put_rsp_rip(struct kvm_vcpu
*vcpu
)
491 vmcs_writel(GUEST_RSP
, vcpu
->regs
[VCPU_REGS_RSP
]);
492 vmcs_writel(GUEST_RIP
, vcpu
->rip
);
495 static int set_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
497 unsigned long dr7
= 0x400;
498 u32 exception_bitmap
;
501 exception_bitmap
= vmcs_read32(EXCEPTION_BITMAP
);
502 old_singlestep
= vcpu
->guest_debug
.singlestep
;
504 vcpu
->guest_debug
.enabled
= dbg
->enabled
;
505 if (vcpu
->guest_debug
.enabled
) {
508 dr7
|= 0x200; /* exact */
509 for (i
= 0; i
< 4; ++i
) {
510 if (!dbg
->breakpoints
[i
].enabled
)
512 vcpu
->guest_debug
.bp
[i
] = dbg
->breakpoints
[i
].address
;
513 dr7
|= 2 << (i
*2); /* global enable */
514 dr7
|= 0 << (i
*4+16); /* execution breakpoint */
517 exception_bitmap
|= (1u << 1); /* Trap debug exceptions */
519 vcpu
->guest_debug
.singlestep
= dbg
->singlestep
;
521 exception_bitmap
&= ~(1u << 1); /* Ignore debug exceptions */
522 vcpu
->guest_debug
.singlestep
= 0;
525 if (old_singlestep
&& !vcpu
->guest_debug
.singlestep
) {
528 flags
= vmcs_readl(GUEST_RFLAGS
);
529 flags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
530 vmcs_writel(GUEST_RFLAGS
, flags
);
533 vmcs_write32(EXCEPTION_BITMAP
, exception_bitmap
);
534 vmcs_writel(GUEST_DR7
, dr7
);
539 static __init
int cpu_has_kvm_support(void)
541 unsigned long ecx
= cpuid_ecx(1);
542 return test_bit(5, &ecx
); /* CPUID.1:ECX.VMX[bit 5] -> VT */
545 static __init
int vmx_disabled_by_bios(void)
549 rdmsrl(MSR_IA32_FEATURE_CONTROL
, msr
);
550 return (msr
& 5) == 1; /* locked but not enabled */
553 static void hardware_enable(void *garbage
)
555 int cpu
= raw_smp_processor_id();
556 u64 phys_addr
= __pa(per_cpu(vmxarea
, cpu
));
559 rdmsrl(MSR_IA32_FEATURE_CONTROL
, old
);
561 /* enable and lock */
562 wrmsrl(MSR_IA32_FEATURE_CONTROL
, old
| 5);
563 write_cr4(read_cr4() | CR4_VMXE
); /* FIXME: not cpu hotplug safe */
564 asm volatile (ASM_VMX_VMXON_RAX
: : "a"(&phys_addr
), "m"(phys_addr
)
568 static void hardware_disable(void *garbage
)
570 asm volatile (ASM_VMX_VMXOFF
: : : "cc");
573 static __init
void setup_vmcs_descriptor(void)
575 u32 vmx_msr_low
, vmx_msr_high
;
577 rdmsr(MSR_IA32_VMX_BASIC
, vmx_msr_low
, vmx_msr_high
);
578 vmcs_descriptor
.size
= vmx_msr_high
& 0x1fff;
579 vmcs_descriptor
.order
= get_order(vmcs_descriptor
.size
);
580 vmcs_descriptor
.revision_id
= vmx_msr_low
;
583 static struct vmcs
*alloc_vmcs_cpu(int cpu
)
585 int node
= cpu_to_node(cpu
);
589 pages
= alloc_pages_node(node
, GFP_KERNEL
, vmcs_descriptor
.order
);
592 vmcs
= page_address(pages
);
593 memset(vmcs
, 0, vmcs_descriptor
.size
);
594 vmcs
->revision_id
= vmcs_descriptor
.revision_id
; /* vmcs revision id */
598 static struct vmcs
*alloc_vmcs(void)
600 return alloc_vmcs_cpu(raw_smp_processor_id());
603 static void free_vmcs(struct vmcs
*vmcs
)
605 free_pages((unsigned long)vmcs
, vmcs_descriptor
.order
);
608 static __exit
void free_kvm_area(void)
612 for_each_online_cpu(cpu
)
613 free_vmcs(per_cpu(vmxarea
, cpu
));
616 extern struct vmcs
*alloc_vmcs_cpu(int cpu
);
618 static __init
int alloc_kvm_area(void)
622 for_each_online_cpu(cpu
) {
625 vmcs
= alloc_vmcs_cpu(cpu
);
631 per_cpu(vmxarea
, cpu
) = vmcs
;
636 static __init
int hardware_setup(void)
638 setup_vmcs_descriptor();
639 return alloc_kvm_area();
642 static __exit
void hardware_unsetup(void)
647 static void update_exception_bitmap(struct kvm_vcpu
*vcpu
)
649 if (vcpu
->rmode
.active
)
650 vmcs_write32(EXCEPTION_BITMAP
, ~0);
652 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
655 static void fix_pmode_dataseg(int seg
, struct kvm_save_segment
*save
)
657 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
659 if (vmcs_readl(sf
->base
) == save
->base
&& (save
->base
& AR_S_MASK
)) {
660 vmcs_write16(sf
->selector
, save
->selector
);
661 vmcs_writel(sf
->base
, save
->base
);
662 vmcs_write32(sf
->limit
, save
->limit
);
663 vmcs_write32(sf
->ar_bytes
, save
->ar
);
665 u32 dpl
= (vmcs_read16(sf
->selector
) & SELECTOR_RPL_MASK
)
667 vmcs_write32(sf
->ar_bytes
, 0x93 | dpl
);
671 static void enter_pmode(struct kvm_vcpu
*vcpu
)
675 vcpu
->rmode
.active
= 0;
677 vmcs_writel(GUEST_TR_BASE
, vcpu
->rmode
.tr
.base
);
678 vmcs_write32(GUEST_TR_LIMIT
, vcpu
->rmode
.tr
.limit
);
679 vmcs_write32(GUEST_TR_AR_BYTES
, vcpu
->rmode
.tr
.ar
);
681 flags
= vmcs_readl(GUEST_RFLAGS
);
682 flags
&= ~(IOPL_MASK
| X86_EFLAGS_VM
);
683 flags
|= (vcpu
->rmode
.save_iopl
<< IOPL_SHIFT
);
684 vmcs_writel(GUEST_RFLAGS
, flags
);
686 vmcs_writel(GUEST_CR4
, (vmcs_readl(GUEST_CR4
) & ~CR4_VME_MASK
) |
687 (vmcs_readl(CR4_READ_SHADOW
) & CR4_VME_MASK
));
689 update_exception_bitmap(vcpu
);
691 fix_pmode_dataseg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
692 fix_pmode_dataseg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
693 fix_pmode_dataseg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
694 fix_pmode_dataseg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
696 vmcs_write16(GUEST_SS_SELECTOR
, 0);
697 vmcs_write32(GUEST_SS_AR_BYTES
, 0x93);
699 vmcs_write16(GUEST_CS_SELECTOR
,
700 vmcs_read16(GUEST_CS_SELECTOR
) & ~SELECTOR_RPL_MASK
);
701 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
704 static int rmode_tss_base(struct kvm
* kvm
)
706 gfn_t base_gfn
= kvm
->memslots
[0].base_gfn
+ kvm
->memslots
[0].npages
- 3;
707 return base_gfn
<< PAGE_SHIFT
;
710 static void fix_rmode_seg(int seg
, struct kvm_save_segment
*save
)
712 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
714 save
->selector
= vmcs_read16(sf
->selector
);
715 save
->base
= vmcs_readl(sf
->base
);
716 save
->limit
= vmcs_read32(sf
->limit
);
717 save
->ar
= vmcs_read32(sf
->ar_bytes
);
718 vmcs_write16(sf
->selector
, vmcs_readl(sf
->base
) >> 4);
719 vmcs_write32(sf
->limit
, 0xffff);
720 vmcs_write32(sf
->ar_bytes
, 0xf3);
723 static void enter_rmode(struct kvm_vcpu
*vcpu
)
727 vcpu
->rmode
.active
= 1;
729 vcpu
->rmode
.tr
.base
= vmcs_readl(GUEST_TR_BASE
);
730 vmcs_writel(GUEST_TR_BASE
, rmode_tss_base(vcpu
->kvm
));
732 vcpu
->rmode
.tr
.limit
= vmcs_read32(GUEST_TR_LIMIT
);
733 vmcs_write32(GUEST_TR_LIMIT
, RMODE_TSS_SIZE
- 1);
735 vcpu
->rmode
.tr
.ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
736 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
738 flags
= vmcs_readl(GUEST_RFLAGS
);
739 vcpu
->rmode
.save_iopl
= (flags
& IOPL_MASK
) >> IOPL_SHIFT
;
741 flags
|= IOPL_MASK
| X86_EFLAGS_VM
;
743 vmcs_writel(GUEST_RFLAGS
, flags
);
744 vmcs_writel(GUEST_CR4
, vmcs_readl(GUEST_CR4
) | CR4_VME_MASK
);
745 update_exception_bitmap(vcpu
);
747 vmcs_write16(GUEST_SS_SELECTOR
, vmcs_readl(GUEST_SS_BASE
) >> 4);
748 vmcs_write32(GUEST_SS_LIMIT
, 0xffff);
749 vmcs_write32(GUEST_SS_AR_BYTES
, 0xf3);
751 vmcs_write32(GUEST_CS_AR_BYTES
, 0xf3);
752 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
753 if (vmcs_readl(GUEST_CS_BASE
) == 0xffff0000)
754 vmcs_writel(GUEST_CS_BASE
, 0xf0000);
755 vmcs_write16(GUEST_CS_SELECTOR
, vmcs_readl(GUEST_CS_BASE
) >> 4);
757 fix_rmode_seg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
758 fix_rmode_seg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
759 fix_rmode_seg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
760 fix_rmode_seg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
765 static void enter_lmode(struct kvm_vcpu
*vcpu
)
769 guest_tr_ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
770 if ((guest_tr_ar
& AR_TYPE_MASK
) != AR_TYPE_BUSY_64_TSS
) {
771 printk(KERN_DEBUG
"%s: tss fixup for long mode. \n",
773 vmcs_write32(GUEST_TR_AR_BYTES
,
774 (guest_tr_ar
& ~AR_TYPE_MASK
)
775 | AR_TYPE_BUSY_64_TSS
);
778 vcpu
->shadow_efer
|= EFER_LMA
;
780 find_msr_entry(vcpu
, MSR_EFER
)->data
|= EFER_LMA
| EFER_LME
;
781 vmcs_write32(VM_ENTRY_CONTROLS
,
782 vmcs_read32(VM_ENTRY_CONTROLS
)
783 | VM_ENTRY_CONTROLS_IA32E_MASK
);
786 static void exit_lmode(struct kvm_vcpu
*vcpu
)
788 vcpu
->shadow_efer
&= ~EFER_LMA
;
790 vmcs_write32(VM_ENTRY_CONTROLS
,
791 vmcs_read32(VM_ENTRY_CONTROLS
)
792 & ~VM_ENTRY_CONTROLS_IA32E_MASK
);
797 static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
799 vcpu
->cr0
&= KVM_GUEST_CR0_MASK
;
800 vcpu
->cr0
|= vmcs_readl(GUEST_CR0
) & ~KVM_GUEST_CR0_MASK
;
802 vcpu
->cr4
&= KVM_GUEST_CR4_MASK
;
803 vcpu
->cr4
|= vmcs_readl(GUEST_CR4
) & ~KVM_GUEST_CR4_MASK
;
806 static void vmx_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
808 if (vcpu
->rmode
.active
&& (cr0
& CR0_PE_MASK
))
811 if (!vcpu
->rmode
.active
&& !(cr0
& CR0_PE_MASK
))
815 if (vcpu
->shadow_efer
& EFER_LME
) {
816 if (!is_paging(vcpu
) && (cr0
& CR0_PG_MASK
))
818 if (is_paging(vcpu
) && !(cr0
& CR0_PG_MASK
))
823 vmcs_writel(CR0_READ_SHADOW
, cr0
);
824 vmcs_writel(GUEST_CR0
,
825 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
829 static void vmx_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
831 vmcs_writel(GUEST_CR3
, cr3
);
834 static void vmx_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
836 vmcs_writel(CR4_READ_SHADOW
, cr4
);
837 vmcs_writel(GUEST_CR4
, cr4
| (vcpu
->rmode
.active
?
838 KVM_RMODE_VM_CR4_ALWAYS_ON
: KVM_PMODE_VM_CR4_ALWAYS_ON
));
844 static void vmx_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
846 struct vmx_msr_entry
*msr
= find_msr_entry(vcpu
, MSR_EFER
);
848 vcpu
->shadow_efer
= efer
;
849 if (efer
& EFER_LMA
) {
850 vmcs_write32(VM_ENTRY_CONTROLS
,
851 vmcs_read32(VM_ENTRY_CONTROLS
) |
852 VM_ENTRY_CONTROLS_IA32E_MASK
);
856 vmcs_write32(VM_ENTRY_CONTROLS
,
857 vmcs_read32(VM_ENTRY_CONTROLS
) &
858 ~VM_ENTRY_CONTROLS_IA32E_MASK
);
860 msr
->data
= efer
& ~EFER_LME
;
867 static u64
vmx_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
869 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
871 return vmcs_readl(sf
->base
);
874 static void vmx_get_segment(struct kvm_vcpu
*vcpu
,
875 struct kvm_segment
*var
, int seg
)
877 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
880 var
->base
= vmcs_readl(sf
->base
);
881 var
->limit
= vmcs_read32(sf
->limit
);
882 var
->selector
= vmcs_read16(sf
->selector
);
883 ar
= vmcs_read32(sf
->ar_bytes
);
884 if (ar
& AR_UNUSABLE_MASK
)
887 var
->s
= (ar
>> 4) & 1;
888 var
->dpl
= (ar
>> 5) & 3;
889 var
->present
= (ar
>> 7) & 1;
890 var
->avl
= (ar
>> 12) & 1;
891 var
->l
= (ar
>> 13) & 1;
892 var
->db
= (ar
>> 14) & 1;
893 var
->g
= (ar
>> 15) & 1;
894 var
->unusable
= (ar
>> 16) & 1;
897 static void vmx_set_segment(struct kvm_vcpu
*vcpu
,
898 struct kvm_segment
*var
, int seg
)
900 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
903 vmcs_writel(sf
->base
, var
->base
);
904 vmcs_write32(sf
->limit
, var
->limit
);
905 vmcs_write16(sf
->selector
, var
->selector
);
906 if (vcpu
->rmode
.active
&& var
->s
) {
908 * Hack real-mode segments into vm86 compatibility.
910 if (var
->base
== 0xffff0000 && var
->selector
== 0xf000)
911 vmcs_writel(sf
->base
, 0xf0000);
913 } else if (var
->unusable
)
917 ar
|= (var
->s
& 1) << 4;
918 ar
|= (var
->dpl
& 3) << 5;
919 ar
|= (var
->present
& 1) << 7;
920 ar
|= (var
->avl
& 1) << 12;
921 ar
|= (var
->l
& 1) << 13;
922 ar
|= (var
->db
& 1) << 14;
923 ar
|= (var
->g
& 1) << 15;
925 if (ar
== 0) /* a 0 value means unusable */
926 ar
= AR_UNUSABLE_MASK
;
927 vmcs_write32(sf
->ar_bytes
, ar
);
930 static void vmx_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
932 u32 ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
934 *db
= (ar
>> 14) & 1;
938 static void vmx_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
940 dt
->limit
= vmcs_read32(GUEST_IDTR_LIMIT
);
941 dt
->base
= vmcs_readl(GUEST_IDTR_BASE
);
944 static void vmx_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
946 vmcs_write32(GUEST_IDTR_LIMIT
, dt
->limit
);
947 vmcs_writel(GUEST_IDTR_BASE
, dt
->base
);
950 static void vmx_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
952 dt
->limit
= vmcs_read32(GUEST_GDTR_LIMIT
);
953 dt
->base
= vmcs_readl(GUEST_GDTR_BASE
);
956 static void vmx_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
958 vmcs_write32(GUEST_GDTR_LIMIT
, dt
->limit
);
959 vmcs_writel(GUEST_GDTR_BASE
, dt
->base
);
962 static int init_rmode_tss(struct kvm
* kvm
)
964 struct page
*p1
, *p2
, *p3
;
965 gfn_t fn
= rmode_tss_base(kvm
) >> PAGE_SHIFT
;
968 p1
= gfn_to_page(kvm
, fn
++);
969 p2
= gfn_to_page(kvm
, fn
++);
970 p3
= gfn_to_page(kvm
, fn
);
972 if (!p1
|| !p2
|| !p3
) {
973 kvm_printf(kvm
,"%s: gfn_to_page failed\n", __FUNCTION__
);
977 page
= kmap_atomic(p1
, KM_USER0
);
978 memset(page
, 0, PAGE_SIZE
);
979 *(u16
*)(page
+ 0x66) = TSS_BASE_SIZE
+ TSS_REDIRECTION_SIZE
;
980 kunmap_atomic(page
, KM_USER0
);
982 page
= kmap_atomic(p2
, KM_USER0
);
983 memset(page
, 0, PAGE_SIZE
);
984 kunmap_atomic(page
, KM_USER0
);
986 page
= kmap_atomic(p3
, KM_USER0
);
987 memset(page
, 0, PAGE_SIZE
);
988 *(page
+ RMODE_TSS_SIZE
- 2 * PAGE_SIZE
- 1) = ~0;
989 kunmap_atomic(page
, KM_USER0
);
994 static void vmcs_write32_fixedbits(u32 msr
, u32 vmcs_field
, u32 val
)
996 u32 msr_high
, msr_low
;
998 rdmsr(msr
, msr_low
, msr_high
);
1002 vmcs_write32(vmcs_field
, val
);
1005 static void seg_setup(int seg
)
1007 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1009 vmcs_write16(sf
->selector
, 0);
1010 vmcs_writel(sf
->base
, 0);
1011 vmcs_write32(sf
->limit
, 0xffff);
1012 vmcs_write32(sf
->ar_bytes
, 0x93);
1016 * Sets up the vmcs for emulated real mode.
1018 static int vmx_vcpu_setup(struct kvm_vcpu
*vcpu
)
1020 u32 host_sysenter_cs
;
1023 struct descriptor_table dt
;
1026 extern asmlinkage
void kvm_vmx_return(void);
1028 if (!init_rmode_tss(vcpu
->kvm
)) {
1033 memset(vcpu
->regs
, 0, sizeof(vcpu
->regs
));
1034 vcpu
->regs
[VCPU_REGS_RDX
] = get_rdx_init_val();
1036 vcpu
->apic_base
= 0xfee00000 |
1037 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP
|
1038 MSR_IA32_APICBASE_ENABLE
;
1043 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1044 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1046 vmcs_write16(GUEST_CS_SELECTOR
, 0xf000);
1047 vmcs_writel(GUEST_CS_BASE
, 0x000f0000);
1048 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1049 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1051 seg_setup(VCPU_SREG_DS
);
1052 seg_setup(VCPU_SREG_ES
);
1053 seg_setup(VCPU_SREG_FS
);
1054 seg_setup(VCPU_SREG_GS
);
1055 seg_setup(VCPU_SREG_SS
);
1057 vmcs_write16(GUEST_TR_SELECTOR
, 0);
1058 vmcs_writel(GUEST_TR_BASE
, 0);
1059 vmcs_write32(GUEST_TR_LIMIT
, 0xffff);
1060 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1062 vmcs_write16(GUEST_LDTR_SELECTOR
, 0);
1063 vmcs_writel(GUEST_LDTR_BASE
, 0);
1064 vmcs_write32(GUEST_LDTR_LIMIT
, 0xffff);
1065 vmcs_write32(GUEST_LDTR_AR_BYTES
, 0x00082);
1067 vmcs_write32(GUEST_SYSENTER_CS
, 0);
1068 vmcs_writel(GUEST_SYSENTER_ESP
, 0);
1069 vmcs_writel(GUEST_SYSENTER_EIP
, 0);
1071 vmcs_writel(GUEST_RFLAGS
, 0x02);
1072 vmcs_writel(GUEST_RIP
, 0xfff0);
1073 vmcs_writel(GUEST_RSP
, 0);
1075 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1076 vmcs_writel(GUEST_DR7
, 0x400);
1078 vmcs_writel(GUEST_GDTR_BASE
, 0);
1079 vmcs_write32(GUEST_GDTR_LIMIT
, 0xffff);
1081 vmcs_writel(GUEST_IDTR_BASE
, 0);
1082 vmcs_write32(GUEST_IDTR_LIMIT
, 0xffff);
1084 vmcs_write32(GUEST_ACTIVITY_STATE
, 0);
1085 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
, 0);
1086 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS
, 0);
1089 vmcs_write64(IO_BITMAP_A
, 0);
1090 vmcs_write64(IO_BITMAP_B
, 0);
1094 vmcs_write64(VMCS_LINK_POINTER
, -1ull); /* 22.3.1.5 */
1096 /* Special registers */
1097 vmcs_write64(GUEST_IA32_DEBUGCTL
, 0);
1100 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS
,
1101 PIN_BASED_VM_EXEC_CONTROL
,
1102 PIN_BASED_EXT_INTR_MASK
/* 20.6.1 */
1103 | PIN_BASED_NMI_EXITING
/* 20.6.1 */
1105 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS
,
1106 CPU_BASED_VM_EXEC_CONTROL
,
1107 CPU_BASED_HLT_EXITING
/* 20.6.2 */
1108 | CPU_BASED_CR8_LOAD_EXITING
/* 20.6.2 */
1109 | CPU_BASED_CR8_STORE_EXITING
/* 20.6.2 */
1110 | CPU_BASED_UNCOND_IO_EXITING
/* 20.6.2 */
1111 | CPU_BASED_MOV_DR_EXITING
1112 | CPU_BASED_USE_TSC_OFFSETING
/* 21.3 */
1115 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
1116 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK
, 0);
1117 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH
, 0);
1118 vmcs_write32(CR3_TARGET_COUNT
, 0); /* 22.2.1 */
1120 vmcs_writel(HOST_CR0
, read_cr0()); /* 22.2.3 */
1121 vmcs_writel(HOST_CR4
, read_cr4()); /* 22.2.3, 22.2.5 */
1122 vmcs_writel(HOST_CR3
, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1124 vmcs_write16(HOST_CS_SELECTOR
, __KERNEL_CS
); /* 22.2.4 */
1125 vmcs_write16(HOST_DS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1126 vmcs_write16(HOST_ES_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1127 vmcs_write16(HOST_FS_SELECTOR
, read_fs()); /* 22.2.4 */
1128 vmcs_write16(HOST_GS_SELECTOR
, read_gs()); /* 22.2.4 */
1129 vmcs_write16(HOST_SS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1130 #ifdef CONFIG_X86_64
1131 rdmsrl(MSR_FS_BASE
, a
);
1132 vmcs_writel(HOST_FS_BASE
, a
); /* 22.2.4 */
1133 rdmsrl(MSR_GS_BASE
, a
);
1134 vmcs_writel(HOST_GS_BASE
, a
); /* 22.2.4 */
1136 vmcs_writel(HOST_FS_BASE
, 0); /* 22.2.4 */
1137 vmcs_writel(HOST_GS_BASE
, 0); /* 22.2.4 */
1140 vmcs_write16(HOST_TR_SELECTOR
, GDT_ENTRY_TSS
*8); /* 22.2.4 */
1143 vmcs_writel(HOST_IDTR_BASE
, dt
.base
); /* 22.2.4 */
1146 vmcs_writel(HOST_RIP
, (unsigned long)kvm_vmx_return
); /* 22.2.5 */
1148 rdmsr(MSR_IA32_SYSENTER_CS
, host_sysenter_cs
, junk
);
1149 vmcs_write32(HOST_IA32_SYSENTER_CS
, host_sysenter_cs
);
1150 rdmsrl(MSR_IA32_SYSENTER_ESP
, a
);
1151 vmcs_writel(HOST_IA32_SYSENTER_ESP
, a
); /* 22.2.3 */
1152 rdmsrl(MSR_IA32_SYSENTER_EIP
, a
);
1153 vmcs_writel(HOST_IA32_SYSENTER_EIP
, a
); /* 22.2.3 */
1155 for (i
= 0; i
< NR_VMX_MSR
; ++i
) {
1156 u32 index
= vmx_msr_index
[i
];
1157 u32 data_low
, data_high
;
1159 int j
= vcpu
->nmsrs
;
1161 if (rdmsr_safe(index
, &data_low
, &data_high
) < 0)
1163 if (wrmsr_safe(index
, data_low
, data_high
) < 0)
1165 data
= data_low
| ((u64
)data_high
<< 32);
1166 vcpu
->host_msrs
[j
].index
= index
;
1167 vcpu
->host_msrs
[j
].reserved
= 0;
1168 vcpu
->host_msrs
[j
].data
= data
;
1169 vcpu
->guest_msrs
[j
] = vcpu
->host_msrs
[j
];
1170 #ifdef CONFIG_X86_64
1171 if (index
== MSR_KERNEL_GS_BASE
)
1172 msr_offset_kernel_gs_base
= j
;
1179 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS
, VM_EXIT_CONTROLS
,
1180 (HOST_IS_64
<< 9)); /* 22.2,1, 20.7.1 */
1182 /* 22.2.1, 20.8.1 */
1183 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS
,
1184 VM_ENTRY_CONTROLS
, 0);
1185 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, 0); /* 22.2.1 */
1187 #ifdef CONFIG_X86_64
1188 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR
, 0);
1189 vmcs_writel(TPR_THRESHOLD
, 0);
1192 vmcs_writel(CR0_GUEST_HOST_MASK
, KVM_GUEST_CR0_MASK
);
1193 vmcs_writel(CR4_GUEST_HOST_MASK
, KVM_GUEST_CR4_MASK
);
1195 vcpu
->cr0
= 0x60000010;
1196 vmx_set_cr0(vcpu
, vcpu
->cr0
); // enter rmode
1197 vmx_set_cr4(vcpu
, 0);
1198 #ifdef CONFIG_X86_64
1199 vmx_set_efer(vcpu
, 0);
1208 static void inject_rmode_irq(struct kvm_vcpu
*vcpu
, int irq
)
1213 unsigned long flags
;
1214 unsigned long ss_base
= vmcs_readl(GUEST_SS_BASE
);
1215 u16 sp
= vmcs_readl(GUEST_RSP
);
1216 u32 ss_limit
= vmcs_read32(GUEST_SS_LIMIT
);
1218 if (sp
> ss_limit
|| sp
< 6 ) {
1219 vcpu_printf(vcpu
, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1221 vmcs_readl(GUEST_RSP
),
1222 vmcs_readl(GUEST_SS_BASE
),
1223 vmcs_read32(GUEST_SS_LIMIT
));
1227 if (kvm_read_guest(vcpu
, irq
* sizeof(ent
), sizeof(ent
), &ent
) !=
1229 vcpu_printf(vcpu
, "%s: read guest err\n", __FUNCTION__
);
1233 flags
= vmcs_readl(GUEST_RFLAGS
);
1234 cs
= vmcs_readl(GUEST_CS_BASE
) >> 4;
1235 ip
= vmcs_readl(GUEST_RIP
);
1238 if (kvm_write_guest(vcpu
, ss_base
+ sp
- 2, 2, &flags
) != 2 ||
1239 kvm_write_guest(vcpu
, ss_base
+ sp
- 4, 2, &cs
) != 2 ||
1240 kvm_write_guest(vcpu
, ss_base
+ sp
- 6, 2, &ip
) != 2) {
1241 vcpu_printf(vcpu
, "%s: write guest err\n", __FUNCTION__
);
1245 vmcs_writel(GUEST_RFLAGS
, flags
&
1246 ~( X86_EFLAGS_IF
| X86_EFLAGS_AC
| X86_EFLAGS_TF
));
1247 vmcs_write16(GUEST_CS_SELECTOR
, ent
[1]) ;
1248 vmcs_writel(GUEST_CS_BASE
, ent
[1] << 4);
1249 vmcs_writel(GUEST_RIP
, ent
[0]);
1250 vmcs_writel(GUEST_RSP
, (vmcs_readl(GUEST_RSP
) & ~0xffff) | (sp
- 6));
1253 static void kvm_do_inject_irq(struct kvm_vcpu
*vcpu
)
1255 int word_index
= __ffs(vcpu
->irq_summary
);
1256 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
1257 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1259 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
1260 if (!vcpu
->irq_pending
[word_index
])
1261 clear_bit(word_index
, &vcpu
->irq_summary
);
1263 if (vcpu
->rmode
.active
) {
1264 inject_rmode_irq(vcpu
, irq
);
1267 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1268 irq
| INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
1272 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1273 struct kvm_run
*kvm_run
)
1275 u32 cpu_based_vm_exec_control
;
1277 vcpu
->interrupt_window_open
=
1278 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
1279 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
1281 if (vcpu
->interrupt_window_open
&&
1282 vcpu
->irq_summary
&&
1283 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
) & INTR_INFO_VALID_MASK
))
1285 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1287 kvm_do_inject_irq(vcpu
);
1289 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
1290 if (!vcpu
->interrupt_window_open
&&
1291 (vcpu
->irq_summary
|| kvm_run
->request_interrupt_window
))
1293 * Interrupts blocked. Wait for unblock.
1295 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
1297 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
1298 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
1301 static void kvm_guest_debug_pre(struct kvm_vcpu
*vcpu
)
1303 struct kvm_guest_debug
*dbg
= &vcpu
->guest_debug
;
1305 set_debugreg(dbg
->bp
[0], 0);
1306 set_debugreg(dbg
->bp
[1], 1);
1307 set_debugreg(dbg
->bp
[2], 2);
1308 set_debugreg(dbg
->bp
[3], 3);
1310 if (dbg
->singlestep
) {
1311 unsigned long flags
;
1313 flags
= vmcs_readl(GUEST_RFLAGS
);
1314 flags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
1315 vmcs_writel(GUEST_RFLAGS
, flags
);
1319 static int handle_rmode_exception(struct kvm_vcpu
*vcpu
,
1320 int vec
, u32 err_code
)
1322 if (!vcpu
->rmode
.active
)
1325 if (vec
== GP_VECTOR
&& err_code
== 0)
1326 if (emulate_instruction(vcpu
, NULL
, 0, 0) == EMULATE_DONE
)
1331 static int handle_exception(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1333 u32 intr_info
, error_code
;
1334 unsigned long cr2
, rip
;
1336 enum emulation_result er
;
1339 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1340 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
1342 if ((vect_info
& VECTORING_INFO_VALID_MASK
) &&
1343 !is_page_fault(intr_info
)) {
1344 printk(KERN_ERR
"%s: unexpected, vectoring info 0x%x "
1345 "intr info 0x%x\n", __FUNCTION__
, vect_info
, intr_info
);
1348 if (is_external_interrupt(vect_info
)) {
1349 int irq
= vect_info
& VECTORING_INFO_VECTOR_MASK
;
1350 set_bit(irq
, vcpu
->irq_pending
);
1351 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->irq_summary
);
1354 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) { /* nmi */
1359 rip
= vmcs_readl(GUEST_RIP
);
1360 if (intr_info
& INTR_INFO_DELIEVER_CODE_MASK
)
1361 error_code
= vmcs_read32(VM_EXIT_INTR_ERROR_CODE
);
1362 if (is_page_fault(intr_info
)) {
1363 cr2
= vmcs_readl(EXIT_QUALIFICATION
);
1365 spin_lock(&vcpu
->kvm
->lock
);
1366 r
= kvm_mmu_page_fault(vcpu
, cr2
, error_code
);
1368 spin_unlock(&vcpu
->kvm
->lock
);
1372 spin_unlock(&vcpu
->kvm
->lock
);
1376 er
= emulate_instruction(vcpu
, kvm_run
, cr2
, error_code
);
1377 spin_unlock(&vcpu
->kvm
->lock
);
1382 case EMULATE_DO_MMIO
:
1383 ++kvm_stat
.mmio_exits
;
1384 kvm_run
->exit_reason
= KVM_EXIT_MMIO
;
1387 vcpu_printf(vcpu
, "%s: emulate fail\n", __FUNCTION__
);
1394 if (vcpu
->rmode
.active
&&
1395 handle_rmode_exception(vcpu
, intr_info
& INTR_INFO_VECTOR_MASK
,
1399 if ((intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
)) == (INTR_TYPE_EXCEPTION
| 1)) {
1400 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
1403 kvm_run
->exit_reason
= KVM_EXIT_EXCEPTION
;
1404 kvm_run
->ex
.exception
= intr_info
& INTR_INFO_VECTOR_MASK
;
1405 kvm_run
->ex
.error_code
= error_code
;
1409 static int handle_external_interrupt(struct kvm_vcpu
*vcpu
,
1410 struct kvm_run
*kvm_run
)
1412 ++kvm_stat
.irq_exits
;
1416 static int handle_triple_fault(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1418 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
1422 static int get_io_count(struct kvm_vcpu
*vcpu
, unsigned long *count
)
1429 if ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_VM
)) {
1432 u32 cs_ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1434 countr_size
= (cs_ar
& AR_L_MASK
) ? 8:
1435 (cs_ar
& AR_DB_MASK
) ? 4: 2;
1438 rip
= vmcs_readl(GUEST_RIP
);
1439 if (countr_size
!= 8)
1440 rip
+= vmcs_readl(GUEST_CS_BASE
);
1442 n
= kvm_read_guest(vcpu
, rip
, sizeof(inst
), &inst
);
1444 for (i
= 0; i
< n
; i
++) {
1445 switch (((u8
*)&inst
)[i
]) {
1458 countr_size
= (countr_size
== 2) ? 4: (countr_size
>> 1);
1466 *count
= vcpu
->regs
[VCPU_REGS_RCX
] & (~0ULL >> (64 - countr_size
));
1467 //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1471 static int handle_io(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1473 u64 exit_qualification
;
1474 int size
, down
, in
, string
, rep
;
1476 unsigned long count
;
1479 ++kvm_stat
.io_exits
;
1480 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1481 in
= (exit_qualification
& 8) != 0;
1482 size
= (exit_qualification
& 7) + 1;
1483 string
= (exit_qualification
& 16) != 0;
1484 down
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_DF
) != 0;
1486 rep
= (exit_qualification
& 32) != 0;
1487 port
= exit_qualification
>> 16;
1490 if (rep
&& !get_io_count(vcpu
, &count
))
1492 address
= vmcs_readl(GUEST_LINEAR_ADDRESS
);
1494 return kvm_setup_pio(vcpu
, kvm_run
, in
, size
, count
, string
, down
,
1495 address
, rep
, port
);
1499 vmx_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1502 * Patch in the VMCALL instruction:
1504 hypercall
[0] = 0x0f;
1505 hypercall
[1] = 0x01;
1506 hypercall
[2] = 0xc1;
1507 hypercall
[3] = 0xc3;
1510 static int handle_cr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1512 u64 exit_qualification
;
1516 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1517 cr
= exit_qualification
& 15;
1518 reg
= (exit_qualification
>> 8) & 15;
1519 switch ((exit_qualification
>> 4) & 3) {
1520 case 0: /* mov to cr */
1523 vcpu_load_rsp_rip(vcpu
);
1524 set_cr0(vcpu
, vcpu
->regs
[reg
]);
1525 skip_emulated_instruction(vcpu
);
1528 vcpu_load_rsp_rip(vcpu
);
1529 set_cr3(vcpu
, vcpu
->regs
[reg
]);
1530 skip_emulated_instruction(vcpu
);
1533 vcpu_load_rsp_rip(vcpu
);
1534 set_cr4(vcpu
, vcpu
->regs
[reg
]);
1535 skip_emulated_instruction(vcpu
);
1538 vcpu_load_rsp_rip(vcpu
);
1539 set_cr8(vcpu
, vcpu
->regs
[reg
]);
1540 skip_emulated_instruction(vcpu
);
1544 case 1: /*mov from cr*/
1547 vcpu_load_rsp_rip(vcpu
);
1548 vcpu
->regs
[reg
] = vcpu
->cr3
;
1549 vcpu_put_rsp_rip(vcpu
);
1550 skip_emulated_instruction(vcpu
);
1553 printk(KERN_DEBUG
"handle_cr: read CR8 "
1554 "cpu erratum AA15\n");
1555 vcpu_load_rsp_rip(vcpu
);
1556 vcpu
->regs
[reg
] = vcpu
->cr8
;
1557 vcpu_put_rsp_rip(vcpu
);
1558 skip_emulated_instruction(vcpu
);
1563 lmsw(vcpu
, (exit_qualification
>> LMSW_SOURCE_DATA_SHIFT
) & 0x0f);
1565 skip_emulated_instruction(vcpu
);
1570 kvm_run
->exit_reason
= 0;
1571 printk(KERN_ERR
"kvm: unhandled control register: op %d cr %d\n",
1572 (int)(exit_qualification
>> 4) & 3, cr
);
1576 static int handle_dr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1578 u64 exit_qualification
;
1583 * FIXME: this code assumes the host is debugging the guest.
1584 * need to deal with guest debugging itself too.
1586 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1587 dr
= exit_qualification
& 7;
1588 reg
= (exit_qualification
>> 8) & 15;
1589 vcpu_load_rsp_rip(vcpu
);
1590 if (exit_qualification
& 16) {
1602 vcpu
->regs
[reg
] = val
;
1606 vcpu_put_rsp_rip(vcpu
);
1607 skip_emulated_instruction(vcpu
);
1611 static int handle_cpuid(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1613 kvm_emulate_cpuid(vcpu
);
1617 static int handle_rdmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1619 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1622 if (vmx_get_msr(vcpu
, ecx
, &data
)) {
1623 vmx_inject_gp(vcpu
, 0);
1627 /* FIXME: handling of bits 32:63 of rax, rdx */
1628 vcpu
->regs
[VCPU_REGS_RAX
] = data
& -1u;
1629 vcpu
->regs
[VCPU_REGS_RDX
] = (data
>> 32) & -1u;
1630 skip_emulated_instruction(vcpu
);
1634 static int handle_wrmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1636 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1637 u64 data
= (vcpu
->regs
[VCPU_REGS_RAX
] & -1u)
1638 | ((u64
)(vcpu
->regs
[VCPU_REGS_RDX
] & -1u) << 32);
1640 if (vmx_set_msr(vcpu
, ecx
, data
) != 0) {
1641 vmx_inject_gp(vcpu
, 0);
1645 skip_emulated_instruction(vcpu
);
1649 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
1650 struct kvm_run
*kvm_run
)
1652 kvm_run
->if_flag
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) != 0;
1653 kvm_run
->cr8
= vcpu
->cr8
;
1654 kvm_run
->apic_base
= vcpu
->apic_base
;
1655 kvm_run
->ready_for_interrupt_injection
= (vcpu
->interrupt_window_open
&&
1656 vcpu
->irq_summary
== 0);
1659 static int handle_interrupt_window(struct kvm_vcpu
*vcpu
,
1660 struct kvm_run
*kvm_run
)
1663 * If the user space waits to inject interrupts, exit as soon as
1666 if (kvm_run
->request_interrupt_window
&&
1667 !vcpu
->irq_summary
) {
1668 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
1669 ++kvm_stat
.irq_window_exits
;
1675 static int handle_halt(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1677 skip_emulated_instruction(vcpu
);
1678 if (vcpu
->irq_summary
)
1681 kvm_run
->exit_reason
= KVM_EXIT_HLT
;
1682 ++kvm_stat
.halt_exits
;
1686 static int handle_vmcall(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1688 skip_emulated_instruction(vcpu
);
1689 return kvm_hypercall(vcpu
, kvm_run
);
1693 * The exit handlers return 1 if the exit was handled fully and guest execution
1694 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1695 * to be done to userspace and return 0.
1697 static int (*kvm_vmx_exit_handlers
[])(struct kvm_vcpu
*vcpu
,
1698 struct kvm_run
*kvm_run
) = {
1699 [EXIT_REASON_EXCEPTION_NMI
] = handle_exception
,
1700 [EXIT_REASON_EXTERNAL_INTERRUPT
] = handle_external_interrupt
,
1701 [EXIT_REASON_TRIPLE_FAULT
] = handle_triple_fault
,
1702 [EXIT_REASON_IO_INSTRUCTION
] = handle_io
,
1703 [EXIT_REASON_CR_ACCESS
] = handle_cr
,
1704 [EXIT_REASON_DR_ACCESS
] = handle_dr
,
1705 [EXIT_REASON_CPUID
] = handle_cpuid
,
1706 [EXIT_REASON_MSR_READ
] = handle_rdmsr
,
1707 [EXIT_REASON_MSR_WRITE
] = handle_wrmsr
,
1708 [EXIT_REASON_PENDING_INTERRUPT
] = handle_interrupt_window
,
1709 [EXIT_REASON_HLT
] = handle_halt
,
1710 [EXIT_REASON_VMCALL
] = handle_vmcall
,
1713 static const int kvm_vmx_max_exit_handlers
=
1714 sizeof(kvm_vmx_exit_handlers
) / sizeof(*kvm_vmx_exit_handlers
);
1717 * The guest has exited. See if we can fix it or if we need userspace
1720 static int kvm_handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
1722 u32 vectoring_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1723 u32 exit_reason
= vmcs_read32(VM_EXIT_REASON
);
1725 if ( (vectoring_info
& VECTORING_INFO_VALID_MASK
) &&
1726 exit_reason
!= EXIT_REASON_EXCEPTION_NMI
)
1727 printk(KERN_WARNING
"%s: unexpected, valid vectoring info and "
1728 "exit reason is 0x%x\n", __FUNCTION__
, exit_reason
);
1729 kvm_run
->instruction_length
= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
1730 if (exit_reason
< kvm_vmx_max_exit_handlers
1731 && kvm_vmx_exit_handlers
[exit_reason
])
1732 return kvm_vmx_exit_handlers
[exit_reason
](vcpu
, kvm_run
);
1734 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1735 kvm_run
->hw
.hardware_exit_reason
= exit_reason
;
1741 * Check if userspace requested an interrupt window, and that the
1742 * interrupt window is open.
1744 * No need to exit to userspace if we already have an interrupt queued.
1746 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
1747 struct kvm_run
*kvm_run
)
1749 return (!vcpu
->irq_summary
&&
1750 kvm_run
->request_interrupt_window
&&
1751 vcpu
->interrupt_window_open
&&
1752 (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
));
1755 static int vmx_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1758 u16 fs_sel
, gs_sel
, ldt_sel
;
1759 int fs_gs_ldt_reload_needed
;
1764 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1765 * allow segment selectors with cpl > 0 or ti == 1.
1769 ldt_sel
= read_ldt();
1770 fs_gs_ldt_reload_needed
= (fs_sel
& 7) | (gs_sel
& 7) | ldt_sel
;
1771 if (!fs_gs_ldt_reload_needed
) {
1772 vmcs_write16(HOST_FS_SELECTOR
, fs_sel
);
1773 vmcs_write16(HOST_GS_SELECTOR
, gs_sel
);
1775 vmcs_write16(HOST_FS_SELECTOR
, 0);
1776 vmcs_write16(HOST_GS_SELECTOR
, 0);
1779 #ifdef CONFIG_X86_64
1780 vmcs_writel(HOST_FS_BASE
, read_msr(MSR_FS_BASE
));
1781 vmcs_writel(HOST_GS_BASE
, read_msr(MSR_GS_BASE
));
1783 vmcs_writel(HOST_FS_BASE
, segment_base(fs_sel
));
1784 vmcs_writel(HOST_GS_BASE
, segment_base(gs_sel
));
1787 if (!vcpu
->mmio_read_completed
)
1788 do_interrupt_requests(vcpu
, kvm_run
);
1790 if (vcpu
->guest_debug
.enabled
)
1791 kvm_guest_debug_pre(vcpu
);
1793 fx_save(vcpu
->host_fx_image
);
1794 fx_restore(vcpu
->guest_fx_image
);
1796 #ifdef CONFIG_X86_64
1797 if (is_long_mode(vcpu
)) {
1798 save_msrs(vcpu
->host_msrs
+ msr_offset_kernel_gs_base
, 1);
1799 load_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1804 /* Store host registers */
1806 #ifdef CONFIG_X86_64
1807 "push %%rax; push %%rbx; push %%rdx;"
1808 "push %%rsi; push %%rdi; push %%rbp;"
1809 "push %%r8; push %%r9; push %%r10; push %%r11;"
1810 "push %%r12; push %%r13; push %%r14; push %%r15;"
1812 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1814 "pusha; push %%ecx \n\t"
1815 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1817 /* Check if vmlaunch of vmresume is needed */
1819 /* Load guest registers. Don't clobber flags. */
1820 #ifdef CONFIG_X86_64
1821 "mov %c[cr2](%3), %%rax \n\t"
1822 "mov %%rax, %%cr2 \n\t"
1823 "mov %c[rax](%3), %%rax \n\t"
1824 "mov %c[rbx](%3), %%rbx \n\t"
1825 "mov %c[rdx](%3), %%rdx \n\t"
1826 "mov %c[rsi](%3), %%rsi \n\t"
1827 "mov %c[rdi](%3), %%rdi \n\t"
1828 "mov %c[rbp](%3), %%rbp \n\t"
1829 "mov %c[r8](%3), %%r8 \n\t"
1830 "mov %c[r9](%3), %%r9 \n\t"
1831 "mov %c[r10](%3), %%r10 \n\t"
1832 "mov %c[r11](%3), %%r11 \n\t"
1833 "mov %c[r12](%3), %%r12 \n\t"
1834 "mov %c[r13](%3), %%r13 \n\t"
1835 "mov %c[r14](%3), %%r14 \n\t"
1836 "mov %c[r15](%3), %%r15 \n\t"
1837 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1839 "mov %c[cr2](%3), %%eax \n\t"
1840 "mov %%eax, %%cr2 \n\t"
1841 "mov %c[rax](%3), %%eax \n\t"
1842 "mov %c[rbx](%3), %%ebx \n\t"
1843 "mov %c[rdx](%3), %%edx \n\t"
1844 "mov %c[rsi](%3), %%esi \n\t"
1845 "mov %c[rdi](%3), %%edi \n\t"
1846 "mov %c[rbp](%3), %%ebp \n\t"
1847 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1849 /* Enter guest mode */
1851 ASM_VMX_VMLAUNCH
"\n\t"
1852 "jmp kvm_vmx_return \n\t"
1853 "launched: " ASM_VMX_VMRESUME
"\n\t"
1854 ".globl kvm_vmx_return \n\t"
1856 /* Save guest registers, load host registers, keep flags */
1857 #ifdef CONFIG_X86_64
1858 "xchg %3, (%%rsp) \n\t"
1859 "mov %%rax, %c[rax](%3) \n\t"
1860 "mov %%rbx, %c[rbx](%3) \n\t"
1861 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1862 "mov %%rdx, %c[rdx](%3) \n\t"
1863 "mov %%rsi, %c[rsi](%3) \n\t"
1864 "mov %%rdi, %c[rdi](%3) \n\t"
1865 "mov %%rbp, %c[rbp](%3) \n\t"
1866 "mov %%r8, %c[r8](%3) \n\t"
1867 "mov %%r9, %c[r9](%3) \n\t"
1868 "mov %%r10, %c[r10](%3) \n\t"
1869 "mov %%r11, %c[r11](%3) \n\t"
1870 "mov %%r12, %c[r12](%3) \n\t"
1871 "mov %%r13, %c[r13](%3) \n\t"
1872 "mov %%r14, %c[r14](%3) \n\t"
1873 "mov %%r15, %c[r15](%3) \n\t"
1874 "mov %%cr2, %%rax \n\t"
1875 "mov %%rax, %c[cr2](%3) \n\t"
1876 "mov (%%rsp), %3 \n\t"
1878 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1879 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1880 "pop %%rbp; pop %%rdi; pop %%rsi;"
1881 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
1883 "xchg %3, (%%esp) \n\t"
1884 "mov %%eax, %c[rax](%3) \n\t"
1885 "mov %%ebx, %c[rbx](%3) \n\t"
1886 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1887 "mov %%edx, %c[rdx](%3) \n\t"
1888 "mov %%esi, %c[rsi](%3) \n\t"
1889 "mov %%edi, %c[rdi](%3) \n\t"
1890 "mov %%ebp, %c[rbp](%3) \n\t"
1891 "mov %%cr2, %%eax \n\t"
1892 "mov %%eax, %c[cr2](%3) \n\t"
1893 "mov (%%esp), %3 \n\t"
1895 "pop %%ecx; popa \n\t"
1900 : "r"(vcpu
->launched
), "d"((unsigned long)HOST_RSP
),
1902 [rax
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RAX
])),
1903 [rbx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBX
])),
1904 [rcx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RCX
])),
1905 [rdx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDX
])),
1906 [rsi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RSI
])),
1907 [rdi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDI
])),
1908 [rbp
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBP
])),
1909 #ifdef CONFIG_X86_64
1910 [r8
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R8
])),
1911 [r9
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R9
])),
1912 [r10
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R10
])),
1913 [r11
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R11
])),
1914 [r12
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R12
])),
1915 [r13
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R13
])),
1916 [r14
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R14
])),
1917 [r15
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R15
])),
1919 [cr2
]"i"(offsetof(struct kvm_vcpu
, cr2
))
1923 * Reload segment selectors ASAP. (it's needed for a functional
1924 * kernel: x86 relies on having __KERNEL_PDA in %fs and x86_64
1925 * relies on having 0 in %gs for the CPU PDA to work.)
1927 if (fs_gs_ldt_reload_needed
) {
1931 * If we have to reload gs, we must take care to
1932 * preserve our gs base.
1934 local_irq_disable();
1936 #ifdef CONFIG_X86_64
1937 wrmsrl(MSR_GS_BASE
, vmcs_readl(HOST_GS_BASE
));
1945 #ifdef CONFIG_X86_64
1946 if (is_long_mode(vcpu
)) {
1947 save_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1948 load_msrs(vcpu
->host_msrs
, NR_BAD_MSRS
);
1952 fx_save(vcpu
->guest_fx_image
);
1953 fx_restore(vcpu
->host_fx_image
);
1954 vcpu
->interrupt_window_open
= (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0;
1956 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS
));
1959 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
1960 kvm_run
->fail_entry
.hardware_entry_failure_reason
1961 = vmcs_read32(VM_INSTRUCTION_ERROR
);
1965 * Profile KVM exit RIPs:
1967 if (unlikely(prof_on
== KVM_PROFILING
))
1968 profile_hit(KVM_PROFILING
, (void *)vmcs_readl(GUEST_RIP
));
1971 r
= kvm_handle_exit(kvm_run
, vcpu
);
1973 /* Give scheduler a change to reschedule. */
1974 if (signal_pending(current
)) {
1975 ++kvm_stat
.signal_exits
;
1976 post_kvm_run_save(vcpu
, kvm_run
);
1977 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
1981 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
1982 ++kvm_stat
.request_irq_exits
;
1983 post_kvm_run_save(vcpu
, kvm_run
);
1984 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
1993 post_kvm_run_save(vcpu
, kvm_run
);
1997 static void vmx_flush_tlb(struct kvm_vcpu
*vcpu
)
1999 vmcs_writel(GUEST_CR3
, vmcs_readl(GUEST_CR3
));
2002 static void vmx_inject_page_fault(struct kvm_vcpu
*vcpu
,
2006 u32 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
2008 ++kvm_stat
.pf_guest
;
2010 if (is_page_fault(vect_info
)) {
2011 printk(KERN_DEBUG
"inject_page_fault: "
2012 "double fault 0x%lx @ 0x%lx\n",
2013 addr
, vmcs_readl(GUEST_RIP
));
2014 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, 0);
2015 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2017 INTR_TYPE_EXCEPTION
|
2018 INTR_INFO_DELIEVER_CODE_MASK
|
2019 INTR_INFO_VALID_MASK
);
2023 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, err_code
);
2024 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2026 INTR_TYPE_EXCEPTION
|
2027 INTR_INFO_DELIEVER_CODE_MASK
|
2028 INTR_INFO_VALID_MASK
);
2032 static void vmx_free_vmcs(struct kvm_vcpu
*vcpu
)
2035 on_each_cpu(__vcpu_clear
, vcpu
, 0, 1);
2036 free_vmcs(vcpu
->vmcs
);
2041 static void vmx_free_vcpu(struct kvm_vcpu
*vcpu
)
2043 vmx_free_vmcs(vcpu
);
2046 static int vmx_create_vcpu(struct kvm_vcpu
*vcpu
)
2050 vcpu
->guest_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2051 if (!vcpu
->guest_msrs
)
2054 vcpu
->host_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2055 if (!vcpu
->host_msrs
)
2056 goto out_free_guest_msrs
;
2058 vmcs
= alloc_vmcs();
2069 kfree(vcpu
->host_msrs
);
2070 vcpu
->host_msrs
= NULL
;
2072 out_free_guest_msrs
:
2073 kfree(vcpu
->guest_msrs
);
2074 vcpu
->guest_msrs
= NULL
;
2079 static struct kvm_arch_ops vmx_arch_ops
= {
2080 .cpu_has_kvm_support
= cpu_has_kvm_support
,
2081 .disabled_by_bios
= vmx_disabled_by_bios
,
2082 .hardware_setup
= hardware_setup
,
2083 .hardware_unsetup
= hardware_unsetup
,
2084 .hardware_enable
= hardware_enable
,
2085 .hardware_disable
= hardware_disable
,
2087 .vcpu_create
= vmx_create_vcpu
,
2088 .vcpu_free
= vmx_free_vcpu
,
2090 .vcpu_load
= vmx_vcpu_load
,
2091 .vcpu_put
= vmx_vcpu_put
,
2092 .vcpu_decache
= vmx_vcpu_decache
,
2094 .set_guest_debug
= set_guest_debug
,
2095 .get_msr
= vmx_get_msr
,
2096 .set_msr
= vmx_set_msr
,
2097 .get_segment_base
= vmx_get_segment_base
,
2098 .get_segment
= vmx_get_segment
,
2099 .set_segment
= vmx_set_segment
,
2100 .get_cs_db_l_bits
= vmx_get_cs_db_l_bits
,
2101 .decache_cr0_cr4_guest_bits
= vmx_decache_cr0_cr4_guest_bits
,
2102 .set_cr0
= vmx_set_cr0
,
2103 .set_cr3
= vmx_set_cr3
,
2104 .set_cr4
= vmx_set_cr4
,
2105 #ifdef CONFIG_X86_64
2106 .set_efer
= vmx_set_efer
,
2108 .get_idt
= vmx_get_idt
,
2109 .set_idt
= vmx_set_idt
,
2110 .get_gdt
= vmx_get_gdt
,
2111 .set_gdt
= vmx_set_gdt
,
2112 .cache_regs
= vcpu_load_rsp_rip
,
2113 .decache_regs
= vcpu_put_rsp_rip
,
2114 .get_rflags
= vmx_get_rflags
,
2115 .set_rflags
= vmx_set_rflags
,
2117 .tlb_flush
= vmx_flush_tlb
,
2118 .inject_page_fault
= vmx_inject_page_fault
,
2120 .inject_gp
= vmx_inject_gp
,
2122 .run
= vmx_vcpu_run
,
2123 .skip_emulated_instruction
= skip_emulated_instruction
,
2124 .vcpu_setup
= vmx_vcpu_setup
,
2125 .patch_hypercall
= vmx_patch_hypercall
,
2128 static int __init
vmx_init(void)
2130 return kvm_init_arch(&vmx_arch_ops
, THIS_MODULE
);
2133 static void __exit
vmx_exit(void)
2138 module_init(vmx_init
)
2139 module_exit(vmx_exit
)