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KVM: Workaround vmx inability to virtualize the reset state
[deliverable/linux.git] / drivers / kvm / vmx.c
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * Copyright (C) 2006 Qumranet, Inc.
8 *
9 * Authors:
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
12 *
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
15 *
16 */
17
18 #include "kvm.h"
19 #include "vmx.h"
20 #include "kvm_vmx.h"
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/mm.h>
24 #include <linux/highmem.h>
25 #include <linux/profile.h>
26 #include <asm/io.h>
27 #include <asm/desc.h>
28
29 #include "segment_descriptor.h"
30
31 MODULE_AUTHOR("Qumranet");
32 MODULE_LICENSE("GPL");
33
34 static DEFINE_PER_CPU(struct vmcs *, vmxarea);
35 static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
36
37 #ifdef CONFIG_X86_64
38 #define HOST_IS_64 1
39 #else
40 #define HOST_IS_64 0
41 #endif
42
43 static struct vmcs_descriptor {
44 int size;
45 int order;
46 u32 revision_id;
47 } vmcs_descriptor;
48
49 #define VMX_SEGMENT_FIELD(seg) \
50 [VCPU_SREG_##seg] = { \
51 .selector = GUEST_##seg##_SELECTOR, \
52 .base = GUEST_##seg##_BASE, \
53 .limit = GUEST_##seg##_LIMIT, \
54 .ar_bytes = GUEST_##seg##_AR_BYTES, \
55 }
56
57 static struct kvm_vmx_segment_field {
58 unsigned selector;
59 unsigned base;
60 unsigned limit;
61 unsigned ar_bytes;
62 } kvm_vmx_segment_fields[] = {
63 VMX_SEGMENT_FIELD(CS),
64 VMX_SEGMENT_FIELD(DS),
65 VMX_SEGMENT_FIELD(ES),
66 VMX_SEGMENT_FIELD(FS),
67 VMX_SEGMENT_FIELD(GS),
68 VMX_SEGMENT_FIELD(SS),
69 VMX_SEGMENT_FIELD(TR),
70 VMX_SEGMENT_FIELD(LDTR),
71 };
72
73 static const u32 vmx_msr_index[] = {
74 #ifdef CONFIG_X86_64
75 MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
76 #endif
77 MSR_EFER, MSR_K6_STAR,
78 };
79 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
80
81 static inline int is_page_fault(u32 intr_info)
82 {
83 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
84 INTR_INFO_VALID_MASK)) ==
85 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
86 }
87
88 static inline int is_external_interrupt(u32 intr_info)
89 {
90 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
91 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
92 }
93
94 static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
95 {
96 int i;
97
98 for (i = 0; i < vcpu->nmsrs; ++i)
99 if (vcpu->guest_msrs[i].index == msr)
100 return &vcpu->guest_msrs[i];
101 return NULL;
102 }
103
104 static void vmcs_clear(struct vmcs *vmcs)
105 {
106 u64 phys_addr = __pa(vmcs);
107 u8 error;
108
109 asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
110 : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
111 : "cc", "memory");
112 if (error)
113 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
114 vmcs, phys_addr);
115 }
116
117 static void __vcpu_clear(void *arg)
118 {
119 struct kvm_vcpu *vcpu = arg;
120 int cpu = raw_smp_processor_id();
121
122 if (vcpu->cpu == cpu)
123 vmcs_clear(vcpu->vmcs);
124 if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
125 per_cpu(current_vmcs, cpu) = NULL;
126 }
127
128 static void vcpu_clear(struct kvm_vcpu *vcpu)
129 {
130 if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
131 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
132 else
133 __vcpu_clear(vcpu);
134 vcpu->launched = 0;
135 }
136
137 static unsigned long vmcs_readl(unsigned long field)
138 {
139 unsigned long value;
140
141 asm volatile (ASM_VMX_VMREAD_RDX_RAX
142 : "=a"(value) : "d"(field) : "cc");
143 return value;
144 }
145
146 static u16 vmcs_read16(unsigned long field)
147 {
148 return vmcs_readl(field);
149 }
150
151 static u32 vmcs_read32(unsigned long field)
152 {
153 return vmcs_readl(field);
154 }
155
156 static u64 vmcs_read64(unsigned long field)
157 {
158 #ifdef CONFIG_X86_64
159 return vmcs_readl(field);
160 #else
161 return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
162 #endif
163 }
164
165 static noinline void vmwrite_error(unsigned long field, unsigned long value)
166 {
167 printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
168 field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
169 dump_stack();
170 }
171
172 static void vmcs_writel(unsigned long field, unsigned long value)
173 {
174 u8 error;
175
176 asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
177 : "=q"(error) : "a"(value), "d"(field) : "cc" );
178 if (unlikely(error))
179 vmwrite_error(field, value);
180 }
181
182 static void vmcs_write16(unsigned long field, u16 value)
183 {
184 vmcs_writel(field, value);
185 }
186
187 static void vmcs_write32(unsigned long field, u32 value)
188 {
189 vmcs_writel(field, value);
190 }
191
192 static void vmcs_write64(unsigned long field, u64 value)
193 {
194 #ifdef CONFIG_X86_64
195 vmcs_writel(field, value);
196 #else
197 vmcs_writel(field, value);
198 asm volatile ("");
199 vmcs_writel(field+1, value >> 32);
200 #endif
201 }
202
203 /*
204 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
205 * vcpu mutex is already taken.
206 */
207 static void vmx_vcpu_load(struct kvm_vcpu *vcpu)
208 {
209 u64 phys_addr = __pa(vcpu->vmcs);
210 int cpu;
211
212 cpu = get_cpu();
213
214 if (vcpu->cpu != cpu)
215 vcpu_clear(vcpu);
216
217 if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
218 u8 error;
219
220 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
221 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
222 : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
223 : "cc");
224 if (error)
225 printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
226 vcpu->vmcs, phys_addr);
227 }
228
229 if (vcpu->cpu != cpu) {
230 struct descriptor_table dt;
231 unsigned long sysenter_esp;
232
233 vcpu->cpu = cpu;
234 /*
235 * Linux uses per-cpu TSS and GDT, so set these when switching
236 * processors.
237 */
238 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
239 get_gdt(&dt);
240 vmcs_writel(HOST_GDTR_BASE, dt.base); /* 22.2.4 */
241
242 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
243 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
244 }
245 }
246
247 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
248 {
249 put_cpu();
250 }
251
252 static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
253 {
254 vcpu_clear(vcpu);
255 }
256
257 static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
258 {
259 return vmcs_readl(GUEST_RFLAGS);
260 }
261
262 static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
263 {
264 vmcs_writel(GUEST_RFLAGS, rflags);
265 }
266
267 static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
268 {
269 unsigned long rip;
270 u32 interruptibility;
271
272 rip = vmcs_readl(GUEST_RIP);
273 rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
274 vmcs_writel(GUEST_RIP, rip);
275
276 /*
277 * We emulated an instruction, so temporary interrupt blocking
278 * should be removed, if set.
279 */
280 interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
281 if (interruptibility & 3)
282 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
283 interruptibility & ~3);
284 vcpu->interrupt_window_open = 1;
285 }
286
287 static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
288 {
289 printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
290 vmcs_readl(GUEST_RIP));
291 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
292 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
293 GP_VECTOR |
294 INTR_TYPE_EXCEPTION |
295 INTR_INFO_DELIEVER_CODE_MASK |
296 INTR_INFO_VALID_MASK);
297 }
298
299 /*
300 * reads and returns guest's timestamp counter "register"
301 * guest_tsc = host_tsc + tsc_offset -- 21.3
302 */
303 static u64 guest_read_tsc(void)
304 {
305 u64 host_tsc, tsc_offset;
306
307 rdtscll(host_tsc);
308 tsc_offset = vmcs_read64(TSC_OFFSET);
309 return host_tsc + tsc_offset;
310 }
311
312 /*
313 * writes 'guest_tsc' into guest's timestamp counter "register"
314 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
315 */
316 static void guest_write_tsc(u64 guest_tsc)
317 {
318 u64 host_tsc;
319
320 rdtscll(host_tsc);
321 vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
322 }
323
324 static void reload_tss(void)
325 {
326 #ifndef CONFIG_X86_64
327
328 /*
329 * VT restores TR but not its size. Useless.
330 */
331 struct descriptor_table gdt;
332 struct segment_descriptor *descs;
333
334 get_gdt(&gdt);
335 descs = (void *)gdt.base;
336 descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
337 load_TR_desc();
338 #endif
339 }
340
341 /*
342 * Reads an msr value (of 'msr_index') into 'pdata'.
343 * Returns 0 on success, non-0 otherwise.
344 * Assumes vcpu_load() was already called.
345 */
346 static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
347 {
348 u64 data;
349 struct vmx_msr_entry *msr;
350
351 if (!pdata) {
352 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
353 return -EINVAL;
354 }
355
356 switch (msr_index) {
357 #ifdef CONFIG_X86_64
358 case MSR_FS_BASE:
359 data = vmcs_readl(GUEST_FS_BASE);
360 break;
361 case MSR_GS_BASE:
362 data = vmcs_readl(GUEST_GS_BASE);
363 break;
364 case MSR_EFER:
365 return kvm_get_msr_common(vcpu, msr_index, pdata);
366 #endif
367 case MSR_IA32_TIME_STAMP_COUNTER:
368 data = guest_read_tsc();
369 break;
370 case MSR_IA32_SYSENTER_CS:
371 data = vmcs_read32(GUEST_SYSENTER_CS);
372 break;
373 case MSR_IA32_SYSENTER_EIP:
374 data = vmcs_readl(GUEST_SYSENTER_EIP);
375 break;
376 case MSR_IA32_SYSENTER_ESP:
377 data = vmcs_readl(GUEST_SYSENTER_ESP);
378 break;
379 default:
380 msr = find_msr_entry(vcpu, msr_index);
381 if (msr) {
382 data = msr->data;
383 break;
384 }
385 return kvm_get_msr_common(vcpu, msr_index, pdata);
386 }
387
388 *pdata = data;
389 return 0;
390 }
391
392 /*
393 * Writes msr value into into the appropriate "register".
394 * Returns 0 on success, non-0 otherwise.
395 * Assumes vcpu_load() was already called.
396 */
397 static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
398 {
399 struct vmx_msr_entry *msr;
400 switch (msr_index) {
401 #ifdef CONFIG_X86_64
402 case MSR_EFER:
403 return kvm_set_msr_common(vcpu, msr_index, data);
404 case MSR_FS_BASE:
405 vmcs_writel(GUEST_FS_BASE, data);
406 break;
407 case MSR_GS_BASE:
408 vmcs_writel(GUEST_GS_BASE, data);
409 break;
410 #endif
411 case MSR_IA32_SYSENTER_CS:
412 vmcs_write32(GUEST_SYSENTER_CS, data);
413 break;
414 case MSR_IA32_SYSENTER_EIP:
415 vmcs_writel(GUEST_SYSENTER_EIP, data);
416 break;
417 case MSR_IA32_SYSENTER_ESP:
418 vmcs_writel(GUEST_SYSENTER_ESP, data);
419 break;
420 case MSR_IA32_TIME_STAMP_COUNTER:
421 guest_write_tsc(data);
422 break;
423 default:
424 msr = find_msr_entry(vcpu, msr_index);
425 if (msr) {
426 msr->data = data;
427 break;
428 }
429 return kvm_set_msr_common(vcpu, msr_index, data);
430 msr->data = data;
431 break;
432 }
433
434 return 0;
435 }
436
437 /*
438 * Sync the rsp and rip registers into the vcpu structure. This allows
439 * registers to be accessed by indexing vcpu->regs.
440 */
441 static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
442 {
443 vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
444 vcpu->rip = vmcs_readl(GUEST_RIP);
445 }
446
447 /*
448 * Syncs rsp and rip back into the vmcs. Should be called after possible
449 * modification.
450 */
451 static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
452 {
453 vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
454 vmcs_writel(GUEST_RIP, vcpu->rip);
455 }
456
457 static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
458 {
459 unsigned long dr7 = 0x400;
460 u32 exception_bitmap;
461 int old_singlestep;
462
463 exception_bitmap = vmcs_read32(EXCEPTION_BITMAP);
464 old_singlestep = vcpu->guest_debug.singlestep;
465
466 vcpu->guest_debug.enabled = dbg->enabled;
467 if (vcpu->guest_debug.enabled) {
468 int i;
469
470 dr7 |= 0x200; /* exact */
471 for (i = 0; i < 4; ++i) {
472 if (!dbg->breakpoints[i].enabled)
473 continue;
474 vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
475 dr7 |= 2 << (i*2); /* global enable */
476 dr7 |= 0 << (i*4+16); /* execution breakpoint */
477 }
478
479 exception_bitmap |= (1u << 1); /* Trap debug exceptions */
480
481 vcpu->guest_debug.singlestep = dbg->singlestep;
482 } else {
483 exception_bitmap &= ~(1u << 1); /* Ignore debug exceptions */
484 vcpu->guest_debug.singlestep = 0;
485 }
486
487 if (old_singlestep && !vcpu->guest_debug.singlestep) {
488 unsigned long flags;
489
490 flags = vmcs_readl(GUEST_RFLAGS);
491 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
492 vmcs_writel(GUEST_RFLAGS, flags);
493 }
494
495 vmcs_write32(EXCEPTION_BITMAP, exception_bitmap);
496 vmcs_writel(GUEST_DR7, dr7);
497
498 return 0;
499 }
500
501 static __init int cpu_has_kvm_support(void)
502 {
503 unsigned long ecx = cpuid_ecx(1);
504 return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
505 }
506
507 static __init int vmx_disabled_by_bios(void)
508 {
509 u64 msr;
510
511 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
512 return (msr & 5) == 1; /* locked but not enabled */
513 }
514
515 static void hardware_enable(void *garbage)
516 {
517 int cpu = raw_smp_processor_id();
518 u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
519 u64 old;
520
521 rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
522 if ((old & 5) != 5)
523 /* enable and lock */
524 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
525 write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
526 asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
527 : "memory", "cc");
528 }
529
530 static void hardware_disable(void *garbage)
531 {
532 asm volatile (ASM_VMX_VMXOFF : : : "cc");
533 }
534
535 static __init void setup_vmcs_descriptor(void)
536 {
537 u32 vmx_msr_low, vmx_msr_high;
538
539 rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
540 vmcs_descriptor.size = vmx_msr_high & 0x1fff;
541 vmcs_descriptor.order = get_order(vmcs_descriptor.size);
542 vmcs_descriptor.revision_id = vmx_msr_low;
543 }
544
545 static struct vmcs *alloc_vmcs_cpu(int cpu)
546 {
547 int node = cpu_to_node(cpu);
548 struct page *pages;
549 struct vmcs *vmcs;
550
551 pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
552 if (!pages)
553 return NULL;
554 vmcs = page_address(pages);
555 memset(vmcs, 0, vmcs_descriptor.size);
556 vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
557 return vmcs;
558 }
559
560 static struct vmcs *alloc_vmcs(void)
561 {
562 return alloc_vmcs_cpu(raw_smp_processor_id());
563 }
564
565 static void free_vmcs(struct vmcs *vmcs)
566 {
567 free_pages((unsigned long)vmcs, vmcs_descriptor.order);
568 }
569
570 static __exit void free_kvm_area(void)
571 {
572 int cpu;
573
574 for_each_online_cpu(cpu)
575 free_vmcs(per_cpu(vmxarea, cpu));
576 }
577
578 extern struct vmcs *alloc_vmcs_cpu(int cpu);
579
580 static __init int alloc_kvm_area(void)
581 {
582 int cpu;
583
584 for_each_online_cpu(cpu) {
585 struct vmcs *vmcs;
586
587 vmcs = alloc_vmcs_cpu(cpu);
588 if (!vmcs) {
589 free_kvm_area();
590 return -ENOMEM;
591 }
592
593 per_cpu(vmxarea, cpu) = vmcs;
594 }
595 return 0;
596 }
597
598 static __init int hardware_setup(void)
599 {
600 setup_vmcs_descriptor();
601 return alloc_kvm_area();
602 }
603
604 static __exit void hardware_unsetup(void)
605 {
606 free_kvm_area();
607 }
608
609 static void update_exception_bitmap(struct kvm_vcpu *vcpu)
610 {
611 if (vcpu->rmode.active)
612 vmcs_write32(EXCEPTION_BITMAP, ~0);
613 else
614 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
615 }
616
617 static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
618 {
619 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
620
621 if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
622 vmcs_write16(sf->selector, save->selector);
623 vmcs_writel(sf->base, save->base);
624 vmcs_write32(sf->limit, save->limit);
625 vmcs_write32(sf->ar_bytes, save->ar);
626 } else {
627 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
628 << AR_DPL_SHIFT;
629 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
630 }
631 }
632
633 static void enter_pmode(struct kvm_vcpu *vcpu)
634 {
635 unsigned long flags;
636
637 vcpu->rmode.active = 0;
638
639 vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
640 vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
641 vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
642
643 flags = vmcs_readl(GUEST_RFLAGS);
644 flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
645 flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
646 vmcs_writel(GUEST_RFLAGS, flags);
647
648 vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
649 (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
650
651 update_exception_bitmap(vcpu);
652
653 fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
654 fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
655 fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
656 fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
657
658 vmcs_write16(GUEST_SS_SELECTOR, 0);
659 vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
660
661 vmcs_write16(GUEST_CS_SELECTOR,
662 vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
663 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
664 }
665
666 static int rmode_tss_base(struct kvm* kvm)
667 {
668 gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
669 return base_gfn << PAGE_SHIFT;
670 }
671
672 static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
673 {
674 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
675
676 save->selector = vmcs_read16(sf->selector);
677 save->base = vmcs_readl(sf->base);
678 save->limit = vmcs_read32(sf->limit);
679 save->ar = vmcs_read32(sf->ar_bytes);
680 vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
681 vmcs_write32(sf->limit, 0xffff);
682 vmcs_write32(sf->ar_bytes, 0xf3);
683 }
684
685 static void enter_rmode(struct kvm_vcpu *vcpu)
686 {
687 unsigned long flags;
688
689 vcpu->rmode.active = 1;
690
691 vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
692 vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
693
694 vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
695 vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
696
697 vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
698 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
699
700 flags = vmcs_readl(GUEST_RFLAGS);
701 vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
702
703 flags |= IOPL_MASK | X86_EFLAGS_VM;
704
705 vmcs_writel(GUEST_RFLAGS, flags);
706 vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
707 update_exception_bitmap(vcpu);
708
709 vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
710 vmcs_write32(GUEST_SS_LIMIT, 0xffff);
711 vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
712
713 vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
714 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
715 if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
716 vmcs_writel(GUEST_CS_BASE, 0xf0000);
717 vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
718
719 fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
720 fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
721 fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
722 fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
723 }
724
725 #ifdef CONFIG_X86_64
726
727 static void enter_lmode(struct kvm_vcpu *vcpu)
728 {
729 u32 guest_tr_ar;
730
731 guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
732 if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
733 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
734 __FUNCTION__);
735 vmcs_write32(GUEST_TR_AR_BYTES,
736 (guest_tr_ar & ~AR_TYPE_MASK)
737 | AR_TYPE_BUSY_64_TSS);
738 }
739
740 vcpu->shadow_efer |= EFER_LMA;
741
742 find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
743 vmcs_write32(VM_ENTRY_CONTROLS,
744 vmcs_read32(VM_ENTRY_CONTROLS)
745 | VM_ENTRY_CONTROLS_IA32E_MASK);
746 }
747
748 static void exit_lmode(struct kvm_vcpu *vcpu)
749 {
750 vcpu->shadow_efer &= ~EFER_LMA;
751
752 vmcs_write32(VM_ENTRY_CONTROLS,
753 vmcs_read32(VM_ENTRY_CONTROLS)
754 & ~VM_ENTRY_CONTROLS_IA32E_MASK);
755 }
756
757 #endif
758
759 static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
760 {
761 vcpu->cr0 &= KVM_GUEST_CR0_MASK;
762 vcpu->cr0 |= vmcs_readl(GUEST_CR0) & ~KVM_GUEST_CR0_MASK;
763
764 vcpu->cr4 &= KVM_GUEST_CR4_MASK;
765 vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
766 }
767
768 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
769 {
770 if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
771 enter_pmode(vcpu);
772
773 if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
774 enter_rmode(vcpu);
775
776 #ifdef CONFIG_X86_64
777 if (vcpu->shadow_efer & EFER_LME) {
778 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
779 enter_lmode(vcpu);
780 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
781 exit_lmode(vcpu);
782 }
783 #endif
784
785 vmcs_writel(CR0_READ_SHADOW, cr0);
786 vmcs_writel(GUEST_CR0,
787 (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
788 vcpu->cr0 = cr0;
789 }
790
791 /*
792 * Used when restoring the VM to avoid corrupting segment registers
793 */
794 static void vmx_set_cr0_no_modeswitch(struct kvm_vcpu *vcpu, unsigned long cr0)
795 {
796 if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
797 enter_rmode(vcpu);
798
799 vcpu->rmode.active = ((cr0 & CR0_PE_MASK) == 0);
800 update_exception_bitmap(vcpu);
801 vmcs_writel(CR0_READ_SHADOW, cr0);
802 vmcs_writel(GUEST_CR0,
803 (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
804 vcpu->cr0 = cr0;
805 }
806
807 static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
808 {
809 vmcs_writel(GUEST_CR3, cr3);
810 }
811
812 static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
813 {
814 vmcs_writel(CR4_READ_SHADOW, cr4);
815 vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
816 KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
817 vcpu->cr4 = cr4;
818 }
819
820 #ifdef CONFIG_X86_64
821
822 static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
823 {
824 struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
825
826 vcpu->shadow_efer = efer;
827 if (efer & EFER_LMA) {
828 vmcs_write32(VM_ENTRY_CONTROLS,
829 vmcs_read32(VM_ENTRY_CONTROLS) |
830 VM_ENTRY_CONTROLS_IA32E_MASK);
831 msr->data = efer;
832
833 } else {
834 vmcs_write32(VM_ENTRY_CONTROLS,
835 vmcs_read32(VM_ENTRY_CONTROLS) &
836 ~VM_ENTRY_CONTROLS_IA32E_MASK);
837
838 msr->data = efer & ~EFER_LME;
839 }
840 }
841
842 #endif
843
844 static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
845 {
846 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
847
848 return vmcs_readl(sf->base);
849 }
850
851 static void vmx_get_segment(struct kvm_vcpu *vcpu,
852 struct kvm_segment *var, int seg)
853 {
854 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
855 u32 ar;
856
857 var->base = vmcs_readl(sf->base);
858 var->limit = vmcs_read32(sf->limit);
859 var->selector = vmcs_read16(sf->selector);
860 ar = vmcs_read32(sf->ar_bytes);
861 if (ar & AR_UNUSABLE_MASK)
862 ar = 0;
863 var->type = ar & 15;
864 var->s = (ar >> 4) & 1;
865 var->dpl = (ar >> 5) & 3;
866 var->present = (ar >> 7) & 1;
867 var->avl = (ar >> 12) & 1;
868 var->l = (ar >> 13) & 1;
869 var->db = (ar >> 14) & 1;
870 var->g = (ar >> 15) & 1;
871 var->unusable = (ar >> 16) & 1;
872 }
873
874 static void vmx_set_segment(struct kvm_vcpu *vcpu,
875 struct kvm_segment *var, int seg)
876 {
877 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
878 u32 ar;
879
880 vmcs_writel(sf->base, var->base);
881 vmcs_write32(sf->limit, var->limit);
882 vmcs_write16(sf->selector, var->selector);
883 if (var->unusable)
884 ar = 1 << 16;
885 else {
886 ar = var->type & 15;
887 ar |= (var->s & 1) << 4;
888 ar |= (var->dpl & 3) << 5;
889 ar |= (var->present & 1) << 7;
890 ar |= (var->avl & 1) << 12;
891 ar |= (var->l & 1) << 13;
892 ar |= (var->db & 1) << 14;
893 ar |= (var->g & 1) << 15;
894 }
895 if (ar == 0) /* a 0 value means unusable */
896 ar = AR_UNUSABLE_MASK;
897 vmcs_write32(sf->ar_bytes, ar);
898 }
899
900 static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
901 {
902 u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
903
904 *db = (ar >> 14) & 1;
905 *l = (ar >> 13) & 1;
906 }
907
908 static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
909 {
910 dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
911 dt->base = vmcs_readl(GUEST_IDTR_BASE);
912 }
913
914 static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
915 {
916 vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
917 vmcs_writel(GUEST_IDTR_BASE, dt->base);
918 }
919
920 static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
921 {
922 dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
923 dt->base = vmcs_readl(GUEST_GDTR_BASE);
924 }
925
926 static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
927 {
928 vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
929 vmcs_writel(GUEST_GDTR_BASE, dt->base);
930 }
931
932 static int init_rmode_tss(struct kvm* kvm)
933 {
934 struct page *p1, *p2, *p3;
935 gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
936 char *page;
937
938 p1 = _gfn_to_page(kvm, fn++);
939 p2 = _gfn_to_page(kvm, fn++);
940 p3 = _gfn_to_page(kvm, fn);
941
942 if (!p1 || !p2 || !p3) {
943 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
944 return 0;
945 }
946
947 page = kmap_atomic(p1, KM_USER0);
948 memset(page, 0, PAGE_SIZE);
949 *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
950 kunmap_atomic(page, KM_USER0);
951
952 page = kmap_atomic(p2, KM_USER0);
953 memset(page, 0, PAGE_SIZE);
954 kunmap_atomic(page, KM_USER0);
955
956 page = kmap_atomic(p3, KM_USER0);
957 memset(page, 0, PAGE_SIZE);
958 *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
959 kunmap_atomic(page, KM_USER0);
960
961 return 1;
962 }
963
964 static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
965 {
966 u32 msr_high, msr_low;
967
968 rdmsr(msr, msr_low, msr_high);
969
970 val &= msr_high;
971 val |= msr_low;
972 vmcs_write32(vmcs_field, val);
973 }
974
975 static void seg_setup(int seg)
976 {
977 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
978
979 vmcs_write16(sf->selector, 0);
980 vmcs_writel(sf->base, 0);
981 vmcs_write32(sf->limit, 0xffff);
982 vmcs_write32(sf->ar_bytes, 0x93);
983 }
984
985 /*
986 * Sets up the vmcs for emulated real mode.
987 */
988 static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
989 {
990 u32 host_sysenter_cs;
991 u32 junk;
992 unsigned long a;
993 struct descriptor_table dt;
994 int i;
995 int ret = 0;
996 int nr_good_msrs;
997 extern asmlinkage void kvm_vmx_return(void);
998
999 if (!init_rmode_tss(vcpu->kvm)) {
1000 ret = -ENOMEM;
1001 goto out;
1002 }
1003
1004 memset(vcpu->regs, 0, sizeof(vcpu->regs));
1005 vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
1006 vcpu->cr8 = 0;
1007 vcpu->apic_base = 0xfee00000 |
1008 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1009 MSR_IA32_APICBASE_ENABLE;
1010
1011 fx_init(vcpu);
1012
1013 /*
1014 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1015 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1016 */
1017 vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1018 vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1019 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1020 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1021
1022 seg_setup(VCPU_SREG_DS);
1023 seg_setup(VCPU_SREG_ES);
1024 seg_setup(VCPU_SREG_FS);
1025 seg_setup(VCPU_SREG_GS);
1026 seg_setup(VCPU_SREG_SS);
1027
1028 vmcs_write16(GUEST_TR_SELECTOR, 0);
1029 vmcs_writel(GUEST_TR_BASE, 0);
1030 vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1031 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1032
1033 vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1034 vmcs_writel(GUEST_LDTR_BASE, 0);
1035 vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1036 vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1037
1038 vmcs_write32(GUEST_SYSENTER_CS, 0);
1039 vmcs_writel(GUEST_SYSENTER_ESP, 0);
1040 vmcs_writel(GUEST_SYSENTER_EIP, 0);
1041
1042 vmcs_writel(GUEST_RFLAGS, 0x02);
1043 vmcs_writel(GUEST_RIP, 0xfff0);
1044 vmcs_writel(GUEST_RSP, 0);
1045
1046 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1047 vmcs_writel(GUEST_DR7, 0x400);
1048
1049 vmcs_writel(GUEST_GDTR_BASE, 0);
1050 vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1051
1052 vmcs_writel(GUEST_IDTR_BASE, 0);
1053 vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1054
1055 vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1056 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1057 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1058
1059 /* I/O */
1060 vmcs_write64(IO_BITMAP_A, 0);
1061 vmcs_write64(IO_BITMAP_B, 0);
1062
1063 guest_write_tsc(0);
1064
1065 vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1066
1067 /* Special registers */
1068 vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1069
1070 /* Control */
1071 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
1072 PIN_BASED_VM_EXEC_CONTROL,
1073 PIN_BASED_EXT_INTR_MASK /* 20.6.1 */
1074 | PIN_BASED_NMI_EXITING /* 20.6.1 */
1075 );
1076 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
1077 CPU_BASED_VM_EXEC_CONTROL,
1078 CPU_BASED_HLT_EXITING /* 20.6.2 */
1079 | CPU_BASED_CR8_LOAD_EXITING /* 20.6.2 */
1080 | CPU_BASED_CR8_STORE_EXITING /* 20.6.2 */
1081 | CPU_BASED_UNCOND_IO_EXITING /* 20.6.2 */
1082 | CPU_BASED_MOV_DR_EXITING
1083 | CPU_BASED_USE_TSC_OFFSETING /* 21.3 */
1084 );
1085
1086 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
1087 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1088 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1089 vmcs_write32(CR3_TARGET_COUNT, 0); /* 22.2.1 */
1090
1091 vmcs_writel(HOST_CR0, read_cr0()); /* 22.2.3 */
1092 vmcs_writel(HOST_CR4, read_cr4()); /* 22.2.3, 22.2.5 */
1093 vmcs_writel(HOST_CR3, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1094
1095 vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS); /* 22.2.4 */
1096 vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1097 vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1098 vmcs_write16(HOST_FS_SELECTOR, read_fs()); /* 22.2.4 */
1099 vmcs_write16(HOST_GS_SELECTOR, read_gs()); /* 22.2.4 */
1100 vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1101 #ifdef CONFIG_X86_64
1102 rdmsrl(MSR_FS_BASE, a);
1103 vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1104 rdmsrl(MSR_GS_BASE, a);
1105 vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1106 #else
1107 vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1108 vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1109 #endif
1110
1111 vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8); /* 22.2.4 */
1112
1113 get_idt(&dt);
1114 vmcs_writel(HOST_IDTR_BASE, dt.base); /* 22.2.4 */
1115
1116
1117 vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1118
1119 rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1120 vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1121 rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1122 vmcs_writel(HOST_IA32_SYSENTER_ESP, a); /* 22.2.3 */
1123 rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1124 vmcs_writel(HOST_IA32_SYSENTER_EIP, a); /* 22.2.3 */
1125
1126 for (i = 0; i < NR_VMX_MSR; ++i) {
1127 u32 index = vmx_msr_index[i];
1128 u32 data_low, data_high;
1129 u64 data;
1130 int j = vcpu->nmsrs;
1131
1132 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1133 continue;
1134 if (wrmsr_safe(index, data_low, data_high) < 0)
1135 continue;
1136 data = data_low | ((u64)data_high << 32);
1137 vcpu->host_msrs[j].index = index;
1138 vcpu->host_msrs[j].reserved = 0;
1139 vcpu->host_msrs[j].data = data;
1140 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1141 ++vcpu->nmsrs;
1142 }
1143 printk(KERN_DEBUG "kvm: msrs: %d\n", vcpu->nmsrs);
1144
1145 nr_good_msrs = vcpu->nmsrs - NR_BAD_MSRS;
1146 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
1147 virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1148 vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
1149 virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1150 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
1151 virt_to_phys(vcpu->host_msrs + NR_BAD_MSRS));
1152 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
1153 (HOST_IS_64 << 9)); /* 22.2,1, 20.7.1 */
1154 vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
1155 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1156 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1157
1158
1159 /* 22.2.1, 20.8.1 */
1160 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
1161 VM_ENTRY_CONTROLS, 0);
1162 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0); /* 22.2.1 */
1163
1164 #ifdef CONFIG_X86_64
1165 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1166 vmcs_writel(TPR_THRESHOLD, 0);
1167 #endif
1168
1169 vmcs_writel(CR0_GUEST_HOST_MASK, KVM_GUEST_CR0_MASK);
1170 vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1171
1172 vcpu->cr0 = 0x60000010;
1173 vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1174 vmx_set_cr4(vcpu, 0);
1175 #ifdef CONFIG_X86_64
1176 vmx_set_efer(vcpu, 0);
1177 #endif
1178
1179 return 0;
1180
1181 out:
1182 return ret;
1183 }
1184
1185 static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1186 {
1187 u16 ent[2];
1188 u16 cs;
1189 u16 ip;
1190 unsigned long flags;
1191 unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1192 u16 sp = vmcs_readl(GUEST_RSP);
1193 u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1194
1195 if (sp > ss_limit || sp - 6 > sp) {
1196 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1197 __FUNCTION__,
1198 vmcs_readl(GUEST_RSP),
1199 vmcs_readl(GUEST_SS_BASE),
1200 vmcs_read32(GUEST_SS_LIMIT));
1201 return;
1202 }
1203
1204 if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1205 sizeof(ent)) {
1206 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1207 return;
1208 }
1209
1210 flags = vmcs_readl(GUEST_RFLAGS);
1211 cs = vmcs_readl(GUEST_CS_BASE) >> 4;
1212 ip = vmcs_readl(GUEST_RIP);
1213
1214
1215 if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1216 kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1217 kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1218 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1219 return;
1220 }
1221
1222 vmcs_writel(GUEST_RFLAGS, flags &
1223 ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1224 vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1225 vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1226 vmcs_writel(GUEST_RIP, ent[0]);
1227 vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1228 }
1229
1230 static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1231 {
1232 int word_index = __ffs(vcpu->irq_summary);
1233 int bit_index = __ffs(vcpu->irq_pending[word_index]);
1234 int irq = word_index * BITS_PER_LONG + bit_index;
1235
1236 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1237 if (!vcpu->irq_pending[word_index])
1238 clear_bit(word_index, &vcpu->irq_summary);
1239
1240 if (vcpu->rmode.active) {
1241 inject_rmode_irq(vcpu, irq);
1242 return;
1243 }
1244 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1245 irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1246 }
1247
1248
1249 static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1250 struct kvm_run *kvm_run)
1251 {
1252 u32 cpu_based_vm_exec_control;
1253
1254 vcpu->interrupt_window_open =
1255 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1256 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1257
1258 if (vcpu->interrupt_window_open &&
1259 vcpu->irq_summary &&
1260 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
1261 /*
1262 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1263 */
1264 kvm_do_inject_irq(vcpu);
1265
1266 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1267 if (!vcpu->interrupt_window_open &&
1268 (vcpu->irq_summary || kvm_run->request_interrupt_window))
1269 /*
1270 * Interrupts blocked. Wait for unblock.
1271 */
1272 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1273 else
1274 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1275 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
1276 }
1277
1278 static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1279 {
1280 struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1281
1282 set_debugreg(dbg->bp[0], 0);
1283 set_debugreg(dbg->bp[1], 1);
1284 set_debugreg(dbg->bp[2], 2);
1285 set_debugreg(dbg->bp[3], 3);
1286
1287 if (dbg->singlestep) {
1288 unsigned long flags;
1289
1290 flags = vmcs_readl(GUEST_RFLAGS);
1291 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1292 vmcs_writel(GUEST_RFLAGS, flags);
1293 }
1294 }
1295
1296 static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1297 int vec, u32 err_code)
1298 {
1299 if (!vcpu->rmode.active)
1300 return 0;
1301
1302 if (vec == GP_VECTOR && err_code == 0)
1303 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1304 return 1;
1305 return 0;
1306 }
1307
1308 static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1309 {
1310 u32 intr_info, error_code;
1311 unsigned long cr2, rip;
1312 u32 vect_info;
1313 enum emulation_result er;
1314 int r;
1315
1316 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1317 intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1318
1319 if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1320 !is_page_fault(intr_info)) {
1321 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1322 "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1323 }
1324
1325 if (is_external_interrupt(vect_info)) {
1326 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1327 set_bit(irq, vcpu->irq_pending);
1328 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1329 }
1330
1331 if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1332 asm ("int $2");
1333 return 1;
1334 }
1335 error_code = 0;
1336 rip = vmcs_readl(GUEST_RIP);
1337 if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1338 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1339 if (is_page_fault(intr_info)) {
1340 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1341
1342 spin_lock(&vcpu->kvm->lock);
1343 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1344 if (r < 0) {
1345 spin_unlock(&vcpu->kvm->lock);
1346 return r;
1347 }
1348 if (!r) {
1349 spin_unlock(&vcpu->kvm->lock);
1350 return 1;
1351 }
1352
1353 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1354 spin_unlock(&vcpu->kvm->lock);
1355
1356 switch (er) {
1357 case EMULATE_DONE:
1358 return 1;
1359 case EMULATE_DO_MMIO:
1360 ++kvm_stat.mmio_exits;
1361 kvm_run->exit_reason = KVM_EXIT_MMIO;
1362 return 0;
1363 case EMULATE_FAIL:
1364 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1365 break;
1366 default:
1367 BUG();
1368 }
1369 }
1370
1371 if (vcpu->rmode.active &&
1372 handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1373 error_code))
1374 return 1;
1375
1376 if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1377 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1378 return 0;
1379 }
1380 kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1381 kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1382 kvm_run->ex.error_code = error_code;
1383 return 0;
1384 }
1385
1386 static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1387 struct kvm_run *kvm_run)
1388 {
1389 ++kvm_stat.irq_exits;
1390 return 1;
1391 }
1392
1393 static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1394 {
1395 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1396 return 0;
1397 }
1398
1399 static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
1400 {
1401 u64 inst;
1402 gva_t rip;
1403 int countr_size;
1404 int i, n;
1405
1406 if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1407 countr_size = 2;
1408 } else {
1409 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1410
1411 countr_size = (cs_ar & AR_L_MASK) ? 8:
1412 (cs_ar & AR_DB_MASK) ? 4: 2;
1413 }
1414
1415 rip = vmcs_readl(GUEST_RIP);
1416 if (countr_size != 8)
1417 rip += vmcs_readl(GUEST_CS_BASE);
1418
1419 n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1420
1421 for (i = 0; i < n; i++) {
1422 switch (((u8*)&inst)[i]) {
1423 case 0xf0:
1424 case 0xf2:
1425 case 0xf3:
1426 case 0x2e:
1427 case 0x36:
1428 case 0x3e:
1429 case 0x26:
1430 case 0x64:
1431 case 0x65:
1432 case 0x66:
1433 break;
1434 case 0x67:
1435 countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1436 default:
1437 goto done;
1438 }
1439 }
1440 return 0;
1441 done:
1442 countr_size *= 8;
1443 *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
1444 //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1445 return 1;
1446 }
1447
1448 static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1449 {
1450 u64 exit_qualification;
1451 int size, down, in, string, rep;
1452 unsigned port;
1453 unsigned long count;
1454 gva_t address;
1455
1456 ++kvm_stat.io_exits;
1457 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1458 in = (exit_qualification & 8) != 0;
1459 size = (exit_qualification & 7) + 1;
1460 string = (exit_qualification & 16) != 0;
1461 down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1462 count = 1;
1463 rep = (exit_qualification & 32) != 0;
1464 port = exit_qualification >> 16;
1465 address = 0;
1466 if (string) {
1467 if (rep && !get_io_count(vcpu, &count))
1468 return 1;
1469 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1470 }
1471 return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1472 address, rep, port);
1473 }
1474
1475 static void
1476 vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1477 {
1478 /*
1479 * Patch in the VMCALL instruction:
1480 */
1481 hypercall[0] = 0x0f;
1482 hypercall[1] = 0x01;
1483 hypercall[2] = 0xc1;
1484 hypercall[3] = 0xc3;
1485 }
1486
1487 static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1488 {
1489 u64 exit_qualification;
1490 int cr;
1491 int reg;
1492
1493 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1494 cr = exit_qualification & 15;
1495 reg = (exit_qualification >> 8) & 15;
1496 switch ((exit_qualification >> 4) & 3) {
1497 case 0: /* mov to cr */
1498 switch (cr) {
1499 case 0:
1500 vcpu_load_rsp_rip(vcpu);
1501 set_cr0(vcpu, vcpu->regs[reg]);
1502 skip_emulated_instruction(vcpu);
1503 return 1;
1504 case 3:
1505 vcpu_load_rsp_rip(vcpu);
1506 set_cr3(vcpu, vcpu->regs[reg]);
1507 skip_emulated_instruction(vcpu);
1508 return 1;
1509 case 4:
1510 vcpu_load_rsp_rip(vcpu);
1511 set_cr4(vcpu, vcpu->regs[reg]);
1512 skip_emulated_instruction(vcpu);
1513 return 1;
1514 case 8:
1515 vcpu_load_rsp_rip(vcpu);
1516 set_cr8(vcpu, vcpu->regs[reg]);
1517 skip_emulated_instruction(vcpu);
1518 return 1;
1519 };
1520 break;
1521 case 1: /*mov from cr*/
1522 switch (cr) {
1523 case 3:
1524 vcpu_load_rsp_rip(vcpu);
1525 vcpu->regs[reg] = vcpu->cr3;
1526 vcpu_put_rsp_rip(vcpu);
1527 skip_emulated_instruction(vcpu);
1528 return 1;
1529 case 8:
1530 printk(KERN_DEBUG "handle_cr: read CR8 "
1531 "cpu erratum AA15\n");
1532 vcpu_load_rsp_rip(vcpu);
1533 vcpu->regs[reg] = vcpu->cr8;
1534 vcpu_put_rsp_rip(vcpu);
1535 skip_emulated_instruction(vcpu);
1536 return 1;
1537 }
1538 break;
1539 case 3: /* lmsw */
1540 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1541
1542 skip_emulated_instruction(vcpu);
1543 return 1;
1544 default:
1545 break;
1546 }
1547 kvm_run->exit_reason = 0;
1548 printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1549 (int)(exit_qualification >> 4) & 3, cr);
1550 return 0;
1551 }
1552
1553 static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1554 {
1555 u64 exit_qualification;
1556 unsigned long val;
1557 int dr, reg;
1558
1559 /*
1560 * FIXME: this code assumes the host is debugging the guest.
1561 * need to deal with guest debugging itself too.
1562 */
1563 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1564 dr = exit_qualification & 7;
1565 reg = (exit_qualification >> 8) & 15;
1566 vcpu_load_rsp_rip(vcpu);
1567 if (exit_qualification & 16) {
1568 /* mov from dr */
1569 switch (dr) {
1570 case 6:
1571 val = 0xffff0ff0;
1572 break;
1573 case 7:
1574 val = 0x400;
1575 break;
1576 default:
1577 val = 0;
1578 }
1579 vcpu->regs[reg] = val;
1580 } else {
1581 /* mov to dr */
1582 }
1583 vcpu_put_rsp_rip(vcpu);
1584 skip_emulated_instruction(vcpu);
1585 return 1;
1586 }
1587
1588 static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1589 {
1590 kvm_emulate_cpuid(vcpu);
1591 return 1;
1592 }
1593
1594 static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1595 {
1596 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1597 u64 data;
1598
1599 if (vmx_get_msr(vcpu, ecx, &data)) {
1600 vmx_inject_gp(vcpu, 0);
1601 return 1;
1602 }
1603
1604 /* FIXME: handling of bits 32:63 of rax, rdx */
1605 vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1606 vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1607 skip_emulated_instruction(vcpu);
1608 return 1;
1609 }
1610
1611 static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1612 {
1613 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1614 u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1615 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1616
1617 if (vmx_set_msr(vcpu, ecx, data) != 0) {
1618 vmx_inject_gp(vcpu, 0);
1619 return 1;
1620 }
1621
1622 skip_emulated_instruction(vcpu);
1623 return 1;
1624 }
1625
1626 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1627 struct kvm_run *kvm_run)
1628 {
1629 kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1630 kvm_run->cr8 = vcpu->cr8;
1631 kvm_run->apic_base = vcpu->apic_base;
1632 kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1633 vcpu->irq_summary == 0);
1634 }
1635
1636 static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1637 struct kvm_run *kvm_run)
1638 {
1639 /*
1640 * If the user space waits to inject interrupts, exit as soon as
1641 * possible
1642 */
1643 if (kvm_run->request_interrupt_window &&
1644 !vcpu->irq_summary) {
1645 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1646 ++kvm_stat.irq_window_exits;
1647 return 0;
1648 }
1649 return 1;
1650 }
1651
1652 static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1653 {
1654 skip_emulated_instruction(vcpu);
1655 if (vcpu->irq_summary)
1656 return 1;
1657
1658 kvm_run->exit_reason = KVM_EXIT_HLT;
1659 ++kvm_stat.halt_exits;
1660 return 0;
1661 }
1662
1663 static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1664 {
1665 skip_emulated_instruction(vcpu);
1666 return kvm_hypercall(vcpu, kvm_run);
1667 }
1668
1669 /*
1670 * The exit handlers return 1 if the exit was handled fully and guest execution
1671 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1672 * to be done to userspace and return 0.
1673 */
1674 static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1675 struct kvm_run *kvm_run) = {
1676 [EXIT_REASON_EXCEPTION_NMI] = handle_exception,
1677 [EXIT_REASON_EXTERNAL_INTERRUPT] = handle_external_interrupt,
1678 [EXIT_REASON_TRIPLE_FAULT] = handle_triple_fault,
1679 [EXIT_REASON_IO_INSTRUCTION] = handle_io,
1680 [EXIT_REASON_CR_ACCESS] = handle_cr,
1681 [EXIT_REASON_DR_ACCESS] = handle_dr,
1682 [EXIT_REASON_CPUID] = handle_cpuid,
1683 [EXIT_REASON_MSR_READ] = handle_rdmsr,
1684 [EXIT_REASON_MSR_WRITE] = handle_wrmsr,
1685 [EXIT_REASON_PENDING_INTERRUPT] = handle_interrupt_window,
1686 [EXIT_REASON_HLT] = handle_halt,
1687 [EXIT_REASON_VMCALL] = handle_vmcall,
1688 };
1689
1690 static const int kvm_vmx_max_exit_handlers =
1691 sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1692
1693 /*
1694 * The guest has exited. See if we can fix it or if we need userspace
1695 * assistance.
1696 */
1697 static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1698 {
1699 u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1700 u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1701
1702 if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1703 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1704 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1705 "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1706 kvm_run->instruction_length = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1707 if (exit_reason < kvm_vmx_max_exit_handlers
1708 && kvm_vmx_exit_handlers[exit_reason])
1709 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1710 else {
1711 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1712 kvm_run->hw.hardware_exit_reason = exit_reason;
1713 }
1714 return 0;
1715 }
1716
1717 /*
1718 * Check if userspace requested an interrupt window, and that the
1719 * interrupt window is open.
1720 *
1721 * No need to exit to userspace if we already have an interrupt queued.
1722 */
1723 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1724 struct kvm_run *kvm_run)
1725 {
1726 return (!vcpu->irq_summary &&
1727 kvm_run->request_interrupt_window &&
1728 vcpu->interrupt_window_open &&
1729 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1730 }
1731
1732 static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1733 {
1734 u8 fail;
1735 u16 fs_sel, gs_sel, ldt_sel;
1736 int fs_gs_ldt_reload_needed;
1737 int r;
1738
1739 again:
1740 /*
1741 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1742 * allow segment selectors with cpl > 0 or ti == 1.
1743 */
1744 fs_sel = read_fs();
1745 gs_sel = read_gs();
1746 ldt_sel = read_ldt();
1747 fs_gs_ldt_reload_needed = (fs_sel & 7) | (gs_sel & 7) | ldt_sel;
1748 if (!fs_gs_ldt_reload_needed) {
1749 vmcs_write16(HOST_FS_SELECTOR, fs_sel);
1750 vmcs_write16(HOST_GS_SELECTOR, gs_sel);
1751 } else {
1752 vmcs_write16(HOST_FS_SELECTOR, 0);
1753 vmcs_write16(HOST_GS_SELECTOR, 0);
1754 }
1755
1756 #ifdef CONFIG_X86_64
1757 vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1758 vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1759 #else
1760 vmcs_writel(HOST_FS_BASE, segment_base(fs_sel));
1761 vmcs_writel(HOST_GS_BASE, segment_base(gs_sel));
1762 #endif
1763
1764 if (!vcpu->mmio_read_completed)
1765 do_interrupt_requests(vcpu, kvm_run);
1766
1767 if (vcpu->guest_debug.enabled)
1768 kvm_guest_debug_pre(vcpu);
1769
1770 fx_save(vcpu->host_fx_image);
1771 fx_restore(vcpu->guest_fx_image);
1772
1773 save_msrs(vcpu->host_msrs, vcpu->nmsrs);
1774 load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1775
1776 asm (
1777 /* Store host registers */
1778 "pushf \n\t"
1779 #ifdef CONFIG_X86_64
1780 "push %%rax; push %%rbx; push %%rdx;"
1781 "push %%rsi; push %%rdi; push %%rbp;"
1782 "push %%r8; push %%r9; push %%r10; push %%r11;"
1783 "push %%r12; push %%r13; push %%r14; push %%r15;"
1784 "push %%rcx \n\t"
1785 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1786 #else
1787 "pusha; push %%ecx \n\t"
1788 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1789 #endif
1790 /* Check if vmlaunch of vmresume is needed */
1791 "cmp $0, %1 \n\t"
1792 /* Load guest registers. Don't clobber flags. */
1793 #ifdef CONFIG_X86_64
1794 "mov %c[cr2](%3), %%rax \n\t"
1795 "mov %%rax, %%cr2 \n\t"
1796 "mov %c[rax](%3), %%rax \n\t"
1797 "mov %c[rbx](%3), %%rbx \n\t"
1798 "mov %c[rdx](%3), %%rdx \n\t"
1799 "mov %c[rsi](%3), %%rsi \n\t"
1800 "mov %c[rdi](%3), %%rdi \n\t"
1801 "mov %c[rbp](%3), %%rbp \n\t"
1802 "mov %c[r8](%3), %%r8 \n\t"
1803 "mov %c[r9](%3), %%r9 \n\t"
1804 "mov %c[r10](%3), %%r10 \n\t"
1805 "mov %c[r11](%3), %%r11 \n\t"
1806 "mov %c[r12](%3), %%r12 \n\t"
1807 "mov %c[r13](%3), %%r13 \n\t"
1808 "mov %c[r14](%3), %%r14 \n\t"
1809 "mov %c[r15](%3), %%r15 \n\t"
1810 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1811 #else
1812 "mov %c[cr2](%3), %%eax \n\t"
1813 "mov %%eax, %%cr2 \n\t"
1814 "mov %c[rax](%3), %%eax \n\t"
1815 "mov %c[rbx](%3), %%ebx \n\t"
1816 "mov %c[rdx](%3), %%edx \n\t"
1817 "mov %c[rsi](%3), %%esi \n\t"
1818 "mov %c[rdi](%3), %%edi \n\t"
1819 "mov %c[rbp](%3), %%ebp \n\t"
1820 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1821 #endif
1822 /* Enter guest mode */
1823 "jne launched \n\t"
1824 ASM_VMX_VMLAUNCH "\n\t"
1825 "jmp kvm_vmx_return \n\t"
1826 "launched: " ASM_VMX_VMRESUME "\n\t"
1827 ".globl kvm_vmx_return \n\t"
1828 "kvm_vmx_return: "
1829 /* Save guest registers, load host registers, keep flags */
1830 #ifdef CONFIG_X86_64
1831 "xchg %3, (%%rsp) \n\t"
1832 "mov %%rax, %c[rax](%3) \n\t"
1833 "mov %%rbx, %c[rbx](%3) \n\t"
1834 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1835 "mov %%rdx, %c[rdx](%3) \n\t"
1836 "mov %%rsi, %c[rsi](%3) \n\t"
1837 "mov %%rdi, %c[rdi](%3) \n\t"
1838 "mov %%rbp, %c[rbp](%3) \n\t"
1839 "mov %%r8, %c[r8](%3) \n\t"
1840 "mov %%r9, %c[r9](%3) \n\t"
1841 "mov %%r10, %c[r10](%3) \n\t"
1842 "mov %%r11, %c[r11](%3) \n\t"
1843 "mov %%r12, %c[r12](%3) \n\t"
1844 "mov %%r13, %c[r13](%3) \n\t"
1845 "mov %%r14, %c[r14](%3) \n\t"
1846 "mov %%r15, %c[r15](%3) \n\t"
1847 "mov %%cr2, %%rax \n\t"
1848 "mov %%rax, %c[cr2](%3) \n\t"
1849 "mov (%%rsp), %3 \n\t"
1850
1851 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1852 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1853 "pop %%rbp; pop %%rdi; pop %%rsi;"
1854 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
1855 #else
1856 "xchg %3, (%%esp) \n\t"
1857 "mov %%eax, %c[rax](%3) \n\t"
1858 "mov %%ebx, %c[rbx](%3) \n\t"
1859 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1860 "mov %%edx, %c[rdx](%3) \n\t"
1861 "mov %%esi, %c[rsi](%3) \n\t"
1862 "mov %%edi, %c[rdi](%3) \n\t"
1863 "mov %%ebp, %c[rbp](%3) \n\t"
1864 "mov %%cr2, %%eax \n\t"
1865 "mov %%eax, %c[cr2](%3) \n\t"
1866 "mov (%%esp), %3 \n\t"
1867
1868 "pop %%ecx; popa \n\t"
1869 #endif
1870 "setbe %0 \n\t"
1871 "popf \n\t"
1872 : "=q" (fail)
1873 : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
1874 "c"(vcpu),
1875 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
1876 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1877 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1878 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1879 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1880 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1881 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
1882 #ifdef CONFIG_X86_64
1883 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1884 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1885 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1886 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1887 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1888 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1889 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1890 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
1891 #endif
1892 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
1893 : "cc", "memory" );
1894
1895 /*
1896 * Reload segment selectors ASAP. (it's needed for a functional
1897 * kernel: x86 relies on having __KERNEL_PDA in %fs and x86_64
1898 * relies on having 0 in %gs for the CPU PDA to work.)
1899 */
1900 if (fs_gs_ldt_reload_needed) {
1901 load_ldt(ldt_sel);
1902 load_fs(fs_sel);
1903 /*
1904 * If we have to reload gs, we must take care to
1905 * preserve our gs base.
1906 */
1907 local_irq_disable();
1908 load_gs(gs_sel);
1909 #ifdef CONFIG_X86_64
1910 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
1911 #endif
1912 local_irq_enable();
1913
1914 reload_tss();
1915 }
1916 ++kvm_stat.exits;
1917
1918 save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1919 load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
1920
1921 fx_save(vcpu->guest_fx_image);
1922 fx_restore(vcpu->host_fx_image);
1923 vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
1924
1925 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
1926
1927 if (fail) {
1928 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
1929 kvm_run->fail_entry.hardware_entry_failure_reason
1930 = vmcs_read32(VM_INSTRUCTION_ERROR);
1931 r = 0;
1932 } else {
1933 /*
1934 * Profile KVM exit RIPs:
1935 */
1936 if (unlikely(prof_on == KVM_PROFILING))
1937 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
1938
1939 vcpu->launched = 1;
1940 r = kvm_handle_exit(kvm_run, vcpu);
1941 if (r > 0) {
1942 /* Give scheduler a change to reschedule. */
1943 if (signal_pending(current)) {
1944 ++kvm_stat.signal_exits;
1945 post_kvm_run_save(vcpu, kvm_run);
1946 kvm_run->exit_reason = KVM_EXIT_INTR;
1947 return -EINTR;
1948 }
1949
1950 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1951 ++kvm_stat.request_irq_exits;
1952 post_kvm_run_save(vcpu, kvm_run);
1953 kvm_run->exit_reason = KVM_EXIT_INTR;
1954 return -EINTR;
1955 }
1956
1957 kvm_resched(vcpu);
1958 goto again;
1959 }
1960 }
1961
1962 post_kvm_run_save(vcpu, kvm_run);
1963 return r;
1964 }
1965
1966 static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1967 {
1968 vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
1969 }
1970
1971 static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
1972 unsigned long addr,
1973 u32 err_code)
1974 {
1975 u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1976
1977 ++kvm_stat.pf_guest;
1978
1979 if (is_page_fault(vect_info)) {
1980 printk(KERN_DEBUG "inject_page_fault: "
1981 "double fault 0x%lx @ 0x%lx\n",
1982 addr, vmcs_readl(GUEST_RIP));
1983 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
1984 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1985 DF_VECTOR |
1986 INTR_TYPE_EXCEPTION |
1987 INTR_INFO_DELIEVER_CODE_MASK |
1988 INTR_INFO_VALID_MASK);
1989 return;
1990 }
1991 vcpu->cr2 = addr;
1992 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
1993 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1994 PF_VECTOR |
1995 INTR_TYPE_EXCEPTION |
1996 INTR_INFO_DELIEVER_CODE_MASK |
1997 INTR_INFO_VALID_MASK);
1998
1999 }
2000
2001 static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
2002 {
2003 if (vcpu->vmcs) {
2004 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
2005 free_vmcs(vcpu->vmcs);
2006 vcpu->vmcs = NULL;
2007 }
2008 }
2009
2010 static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2011 {
2012 vmx_free_vmcs(vcpu);
2013 }
2014
2015 static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
2016 {
2017 struct vmcs *vmcs;
2018
2019 vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2020 if (!vcpu->guest_msrs)
2021 return -ENOMEM;
2022
2023 vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2024 if (!vcpu->host_msrs)
2025 goto out_free_guest_msrs;
2026
2027 vmcs = alloc_vmcs();
2028 if (!vmcs)
2029 goto out_free_msrs;
2030
2031 vmcs_clear(vmcs);
2032 vcpu->vmcs = vmcs;
2033 vcpu->launched = 0;
2034
2035 return 0;
2036
2037 out_free_msrs:
2038 kfree(vcpu->host_msrs);
2039 vcpu->host_msrs = NULL;
2040
2041 out_free_guest_msrs:
2042 kfree(vcpu->guest_msrs);
2043 vcpu->guest_msrs = NULL;
2044
2045 return -ENOMEM;
2046 }
2047
2048 static struct kvm_arch_ops vmx_arch_ops = {
2049 .cpu_has_kvm_support = cpu_has_kvm_support,
2050 .disabled_by_bios = vmx_disabled_by_bios,
2051 .hardware_setup = hardware_setup,
2052 .hardware_unsetup = hardware_unsetup,
2053 .hardware_enable = hardware_enable,
2054 .hardware_disable = hardware_disable,
2055
2056 .vcpu_create = vmx_create_vcpu,
2057 .vcpu_free = vmx_free_vcpu,
2058
2059 .vcpu_load = vmx_vcpu_load,
2060 .vcpu_put = vmx_vcpu_put,
2061 .vcpu_decache = vmx_vcpu_decache,
2062
2063 .set_guest_debug = set_guest_debug,
2064 .get_msr = vmx_get_msr,
2065 .set_msr = vmx_set_msr,
2066 .get_segment_base = vmx_get_segment_base,
2067 .get_segment = vmx_get_segment,
2068 .set_segment = vmx_set_segment,
2069 .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
2070 .decache_cr0_cr4_guest_bits = vmx_decache_cr0_cr4_guest_bits,
2071 .set_cr0 = vmx_set_cr0,
2072 .set_cr0_no_modeswitch = vmx_set_cr0_no_modeswitch,
2073 .set_cr3 = vmx_set_cr3,
2074 .set_cr4 = vmx_set_cr4,
2075 #ifdef CONFIG_X86_64
2076 .set_efer = vmx_set_efer,
2077 #endif
2078 .get_idt = vmx_get_idt,
2079 .set_idt = vmx_set_idt,
2080 .get_gdt = vmx_get_gdt,
2081 .set_gdt = vmx_set_gdt,
2082 .cache_regs = vcpu_load_rsp_rip,
2083 .decache_regs = vcpu_put_rsp_rip,
2084 .get_rflags = vmx_get_rflags,
2085 .set_rflags = vmx_set_rflags,
2086
2087 .tlb_flush = vmx_flush_tlb,
2088 .inject_page_fault = vmx_inject_page_fault,
2089
2090 .inject_gp = vmx_inject_gp,
2091
2092 .run = vmx_vcpu_run,
2093 .skip_emulated_instruction = skip_emulated_instruction,
2094 .vcpu_setup = vmx_vcpu_setup,
2095 .patch_hypercall = vmx_patch_hypercall,
2096 };
2097
2098 static int __init vmx_init(void)
2099 {
2100 return kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
2101 }
2102
2103 static void __exit vmx_exit(void)
2104 {
2105 kvm_exit_arch();
2106 }
2107
2108 module_init(vmx_init)
2109 module_exit(vmx_exit)
Linux kernel - Deliverables
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