2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
21 #include <linux/module.h>
22 #include <linux/kernel.h>
24 #include <linux/highmem.h>
25 #include <linux/profile.h>
29 #include "segment_descriptor.h"
31 MODULE_AUTHOR("Qumranet");
32 MODULE_LICENSE("GPL");
34 static DEFINE_PER_CPU(struct vmcs
*, vmxarea
);
35 static DEFINE_PER_CPU(struct vmcs
*, current_vmcs
);
43 static struct vmcs_descriptor
{
49 #define VMX_SEGMENT_FIELD(seg) \
50 [VCPU_SREG_##seg] = { \
51 .selector = GUEST_##seg##_SELECTOR, \
52 .base = GUEST_##seg##_BASE, \
53 .limit = GUEST_##seg##_LIMIT, \
54 .ar_bytes = GUEST_##seg##_AR_BYTES, \
57 static struct kvm_vmx_segment_field
{
62 } kvm_vmx_segment_fields
[] = {
63 VMX_SEGMENT_FIELD(CS
),
64 VMX_SEGMENT_FIELD(DS
),
65 VMX_SEGMENT_FIELD(ES
),
66 VMX_SEGMENT_FIELD(FS
),
67 VMX_SEGMENT_FIELD(GS
),
68 VMX_SEGMENT_FIELD(SS
),
69 VMX_SEGMENT_FIELD(TR
),
70 VMX_SEGMENT_FIELD(LDTR
),
73 static const u32 vmx_msr_index
[] = {
75 MSR_SYSCALL_MASK
, MSR_LSTAR
, MSR_CSTAR
, MSR_KERNEL_GS_BASE
,
77 MSR_EFER
, MSR_K6_STAR
,
79 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
81 static inline int is_page_fault(u32 intr_info
)
83 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
84 INTR_INFO_VALID_MASK
)) ==
85 (INTR_TYPE_EXCEPTION
| PF_VECTOR
| INTR_INFO_VALID_MASK
);
88 static inline int is_external_interrupt(u32 intr_info
)
90 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VALID_MASK
))
91 == (INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
94 static struct vmx_msr_entry
*find_msr_entry(struct kvm_vcpu
*vcpu
, u32 msr
)
98 for (i
= 0; i
< vcpu
->nmsrs
; ++i
)
99 if (vcpu
->guest_msrs
[i
].index
== msr
)
100 return &vcpu
->guest_msrs
[i
];
104 static void vmcs_clear(struct vmcs
*vmcs
)
106 u64 phys_addr
= __pa(vmcs
);
109 asm volatile (ASM_VMX_VMCLEAR_RAX
"; setna %0"
110 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
113 printk(KERN_ERR
"kvm: vmclear fail: %p/%llx\n",
117 static void __vcpu_clear(void *arg
)
119 struct kvm_vcpu
*vcpu
= arg
;
120 int cpu
= raw_smp_processor_id();
122 if (vcpu
->cpu
== cpu
)
123 vmcs_clear(vcpu
->vmcs
);
124 if (per_cpu(current_vmcs
, cpu
) == vcpu
->vmcs
)
125 per_cpu(current_vmcs
, cpu
) = NULL
;
128 static void vcpu_clear(struct kvm_vcpu
*vcpu
)
130 if (vcpu
->cpu
!= raw_smp_processor_id() && vcpu
->cpu
!= -1)
131 smp_call_function_single(vcpu
->cpu
, __vcpu_clear
, vcpu
, 0, 1);
137 static unsigned long vmcs_readl(unsigned long field
)
141 asm volatile (ASM_VMX_VMREAD_RDX_RAX
142 : "=a"(value
) : "d"(field
) : "cc");
146 static u16
vmcs_read16(unsigned long field
)
148 return vmcs_readl(field
);
151 static u32
vmcs_read32(unsigned long field
)
153 return vmcs_readl(field
);
156 static u64
vmcs_read64(unsigned long field
)
159 return vmcs_readl(field
);
161 return vmcs_readl(field
) | ((u64
)vmcs_readl(field
+1) << 32);
165 static noinline
void vmwrite_error(unsigned long field
, unsigned long value
)
167 printk(KERN_ERR
"vmwrite error: reg %lx value %lx (err %d)\n",
168 field
, value
, vmcs_read32(VM_INSTRUCTION_ERROR
));
172 static void vmcs_writel(unsigned long field
, unsigned long value
)
176 asm volatile (ASM_VMX_VMWRITE_RAX_RDX
"; setna %0"
177 : "=q"(error
) : "a"(value
), "d"(field
) : "cc" );
179 vmwrite_error(field
, value
);
182 static void vmcs_write16(unsigned long field
, u16 value
)
184 vmcs_writel(field
, value
);
187 static void vmcs_write32(unsigned long field
, u32 value
)
189 vmcs_writel(field
, value
);
192 static void vmcs_write64(unsigned long field
, u64 value
)
195 vmcs_writel(field
, value
);
197 vmcs_writel(field
, value
);
199 vmcs_writel(field
+1, value
>> 32);
204 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
205 * vcpu mutex is already taken.
207 static void vmx_vcpu_load(struct kvm_vcpu
*vcpu
)
209 u64 phys_addr
= __pa(vcpu
->vmcs
);
214 if (vcpu
->cpu
!= cpu
)
217 if (per_cpu(current_vmcs
, cpu
) != vcpu
->vmcs
) {
220 per_cpu(current_vmcs
, cpu
) = vcpu
->vmcs
;
221 asm volatile (ASM_VMX_VMPTRLD_RAX
"; setna %0"
222 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
225 printk(KERN_ERR
"kvm: vmptrld %p/%llx fail\n",
226 vcpu
->vmcs
, phys_addr
);
229 if (vcpu
->cpu
!= cpu
) {
230 struct descriptor_table dt
;
231 unsigned long sysenter_esp
;
235 * Linux uses per-cpu TSS and GDT, so set these when switching
238 vmcs_writel(HOST_TR_BASE
, read_tr_base()); /* 22.2.4 */
240 vmcs_writel(HOST_GDTR_BASE
, dt
.base
); /* 22.2.4 */
242 rdmsrl(MSR_IA32_SYSENTER_ESP
, sysenter_esp
);
243 vmcs_writel(HOST_IA32_SYSENTER_ESP
, sysenter_esp
); /* 22.2.3 */
247 static void vmx_vcpu_put(struct kvm_vcpu
*vcpu
)
252 static void vmx_vcpu_decache(struct kvm_vcpu
*vcpu
)
257 static unsigned long vmx_get_rflags(struct kvm_vcpu
*vcpu
)
259 return vmcs_readl(GUEST_RFLAGS
);
262 static void vmx_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
264 vmcs_writel(GUEST_RFLAGS
, rflags
);
267 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
270 u32 interruptibility
;
272 rip
= vmcs_readl(GUEST_RIP
);
273 rip
+= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
274 vmcs_writel(GUEST_RIP
, rip
);
277 * We emulated an instruction, so temporary interrupt blocking
278 * should be removed, if set.
280 interruptibility
= vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
);
281 if (interruptibility
& 3)
282 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
,
283 interruptibility
& ~3);
284 vcpu
->interrupt_window_open
= 1;
287 static void vmx_inject_gp(struct kvm_vcpu
*vcpu
, unsigned error_code
)
289 printk(KERN_DEBUG
"inject_general_protection: rip 0x%lx\n",
290 vmcs_readl(GUEST_RIP
));
291 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, error_code
);
292 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
294 INTR_TYPE_EXCEPTION
|
295 INTR_INFO_DELIEVER_CODE_MASK
|
296 INTR_INFO_VALID_MASK
);
300 * reads and returns guest's timestamp counter "register"
301 * guest_tsc = host_tsc + tsc_offset -- 21.3
303 static u64
guest_read_tsc(void)
305 u64 host_tsc
, tsc_offset
;
308 tsc_offset
= vmcs_read64(TSC_OFFSET
);
309 return host_tsc
+ tsc_offset
;
313 * writes 'guest_tsc' into guest's timestamp counter "register"
314 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
316 static void guest_write_tsc(u64 guest_tsc
)
321 vmcs_write64(TSC_OFFSET
, guest_tsc
- host_tsc
);
324 static void reload_tss(void)
326 #ifndef CONFIG_X86_64
329 * VT restores TR but not its size. Useless.
331 struct descriptor_table gdt
;
332 struct segment_descriptor
*descs
;
335 descs
= (void *)gdt
.base
;
336 descs
[GDT_ENTRY_TSS
].type
= 9; /* available TSS */
342 * Reads an msr value (of 'msr_index') into 'pdata'.
343 * Returns 0 on success, non-0 otherwise.
344 * Assumes vcpu_load() was already called.
346 static int vmx_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
349 struct vmx_msr_entry
*msr
;
352 printk(KERN_ERR
"BUG: get_msr called with NULL pdata\n");
359 data
= vmcs_readl(GUEST_FS_BASE
);
362 data
= vmcs_readl(GUEST_GS_BASE
);
365 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
367 case MSR_IA32_TIME_STAMP_COUNTER
:
368 data
= guest_read_tsc();
370 case MSR_IA32_SYSENTER_CS
:
371 data
= vmcs_read32(GUEST_SYSENTER_CS
);
373 case MSR_IA32_SYSENTER_EIP
:
374 data
= vmcs_readl(GUEST_SYSENTER_EIP
);
376 case MSR_IA32_SYSENTER_ESP
:
377 data
= vmcs_readl(GUEST_SYSENTER_ESP
);
380 msr
= find_msr_entry(vcpu
, msr_index
);
385 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
393 * Writes msr value into into the appropriate "register".
394 * Returns 0 on success, non-0 otherwise.
395 * Assumes vcpu_load() was already called.
397 static int vmx_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
399 struct vmx_msr_entry
*msr
;
403 return kvm_set_msr_common(vcpu
, msr_index
, data
);
405 vmcs_writel(GUEST_FS_BASE
, data
);
408 vmcs_writel(GUEST_GS_BASE
, data
);
411 case MSR_IA32_SYSENTER_CS
:
412 vmcs_write32(GUEST_SYSENTER_CS
, data
);
414 case MSR_IA32_SYSENTER_EIP
:
415 vmcs_writel(GUEST_SYSENTER_EIP
, data
);
417 case MSR_IA32_SYSENTER_ESP
:
418 vmcs_writel(GUEST_SYSENTER_ESP
, data
);
420 case MSR_IA32_TIME_STAMP_COUNTER
:
421 guest_write_tsc(data
);
424 msr
= find_msr_entry(vcpu
, msr_index
);
429 return kvm_set_msr_common(vcpu
, msr_index
, data
);
438 * Sync the rsp and rip registers into the vcpu structure. This allows
439 * registers to be accessed by indexing vcpu->regs.
441 static void vcpu_load_rsp_rip(struct kvm_vcpu
*vcpu
)
443 vcpu
->regs
[VCPU_REGS_RSP
] = vmcs_readl(GUEST_RSP
);
444 vcpu
->rip
= vmcs_readl(GUEST_RIP
);
448 * Syncs rsp and rip back into the vmcs. Should be called after possible
451 static void vcpu_put_rsp_rip(struct kvm_vcpu
*vcpu
)
453 vmcs_writel(GUEST_RSP
, vcpu
->regs
[VCPU_REGS_RSP
]);
454 vmcs_writel(GUEST_RIP
, vcpu
->rip
);
457 static int set_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
459 unsigned long dr7
= 0x400;
460 u32 exception_bitmap
;
463 exception_bitmap
= vmcs_read32(EXCEPTION_BITMAP
);
464 old_singlestep
= vcpu
->guest_debug
.singlestep
;
466 vcpu
->guest_debug
.enabled
= dbg
->enabled
;
467 if (vcpu
->guest_debug
.enabled
) {
470 dr7
|= 0x200; /* exact */
471 for (i
= 0; i
< 4; ++i
) {
472 if (!dbg
->breakpoints
[i
].enabled
)
474 vcpu
->guest_debug
.bp
[i
] = dbg
->breakpoints
[i
].address
;
475 dr7
|= 2 << (i
*2); /* global enable */
476 dr7
|= 0 << (i
*4+16); /* execution breakpoint */
479 exception_bitmap
|= (1u << 1); /* Trap debug exceptions */
481 vcpu
->guest_debug
.singlestep
= dbg
->singlestep
;
483 exception_bitmap
&= ~(1u << 1); /* Ignore debug exceptions */
484 vcpu
->guest_debug
.singlestep
= 0;
487 if (old_singlestep
&& !vcpu
->guest_debug
.singlestep
) {
490 flags
= vmcs_readl(GUEST_RFLAGS
);
491 flags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
492 vmcs_writel(GUEST_RFLAGS
, flags
);
495 vmcs_write32(EXCEPTION_BITMAP
, exception_bitmap
);
496 vmcs_writel(GUEST_DR7
, dr7
);
501 static __init
int cpu_has_kvm_support(void)
503 unsigned long ecx
= cpuid_ecx(1);
504 return test_bit(5, &ecx
); /* CPUID.1:ECX.VMX[bit 5] -> VT */
507 static __init
int vmx_disabled_by_bios(void)
511 rdmsrl(MSR_IA32_FEATURE_CONTROL
, msr
);
512 return (msr
& 5) == 1; /* locked but not enabled */
515 static void hardware_enable(void *garbage
)
517 int cpu
= raw_smp_processor_id();
518 u64 phys_addr
= __pa(per_cpu(vmxarea
, cpu
));
521 rdmsrl(MSR_IA32_FEATURE_CONTROL
, old
);
523 /* enable and lock */
524 wrmsrl(MSR_IA32_FEATURE_CONTROL
, old
| 5);
525 write_cr4(read_cr4() | CR4_VMXE
); /* FIXME: not cpu hotplug safe */
526 asm volatile (ASM_VMX_VMXON_RAX
: : "a"(&phys_addr
), "m"(phys_addr
)
530 static void hardware_disable(void *garbage
)
532 asm volatile (ASM_VMX_VMXOFF
: : : "cc");
535 static __init
void setup_vmcs_descriptor(void)
537 u32 vmx_msr_low
, vmx_msr_high
;
539 rdmsr(MSR_IA32_VMX_BASIC
, vmx_msr_low
, vmx_msr_high
);
540 vmcs_descriptor
.size
= vmx_msr_high
& 0x1fff;
541 vmcs_descriptor
.order
= get_order(vmcs_descriptor
.size
);
542 vmcs_descriptor
.revision_id
= vmx_msr_low
;
545 static struct vmcs
*alloc_vmcs_cpu(int cpu
)
547 int node
= cpu_to_node(cpu
);
551 pages
= alloc_pages_node(node
, GFP_KERNEL
, vmcs_descriptor
.order
);
554 vmcs
= page_address(pages
);
555 memset(vmcs
, 0, vmcs_descriptor
.size
);
556 vmcs
->revision_id
= vmcs_descriptor
.revision_id
; /* vmcs revision id */
560 static struct vmcs
*alloc_vmcs(void)
562 return alloc_vmcs_cpu(raw_smp_processor_id());
565 static void free_vmcs(struct vmcs
*vmcs
)
567 free_pages((unsigned long)vmcs
, vmcs_descriptor
.order
);
570 static __exit
void free_kvm_area(void)
574 for_each_online_cpu(cpu
)
575 free_vmcs(per_cpu(vmxarea
, cpu
));
578 extern struct vmcs
*alloc_vmcs_cpu(int cpu
);
580 static __init
int alloc_kvm_area(void)
584 for_each_online_cpu(cpu
) {
587 vmcs
= alloc_vmcs_cpu(cpu
);
593 per_cpu(vmxarea
, cpu
) = vmcs
;
598 static __init
int hardware_setup(void)
600 setup_vmcs_descriptor();
601 return alloc_kvm_area();
604 static __exit
void hardware_unsetup(void)
609 static void update_exception_bitmap(struct kvm_vcpu
*vcpu
)
611 if (vcpu
->rmode
.active
)
612 vmcs_write32(EXCEPTION_BITMAP
, ~0);
614 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
617 static void fix_pmode_dataseg(int seg
, struct kvm_save_segment
*save
)
619 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
621 if (vmcs_readl(sf
->base
) == save
->base
&& (save
->base
& AR_S_MASK
)) {
622 vmcs_write16(sf
->selector
, save
->selector
);
623 vmcs_writel(sf
->base
, save
->base
);
624 vmcs_write32(sf
->limit
, save
->limit
);
625 vmcs_write32(sf
->ar_bytes
, save
->ar
);
627 u32 dpl
= (vmcs_read16(sf
->selector
) & SELECTOR_RPL_MASK
)
629 vmcs_write32(sf
->ar_bytes
, 0x93 | dpl
);
633 static void enter_pmode(struct kvm_vcpu
*vcpu
)
637 vcpu
->rmode
.active
= 0;
639 vmcs_writel(GUEST_TR_BASE
, vcpu
->rmode
.tr
.base
);
640 vmcs_write32(GUEST_TR_LIMIT
, vcpu
->rmode
.tr
.limit
);
641 vmcs_write32(GUEST_TR_AR_BYTES
, vcpu
->rmode
.tr
.ar
);
643 flags
= vmcs_readl(GUEST_RFLAGS
);
644 flags
&= ~(IOPL_MASK
| X86_EFLAGS_VM
);
645 flags
|= (vcpu
->rmode
.save_iopl
<< IOPL_SHIFT
);
646 vmcs_writel(GUEST_RFLAGS
, flags
);
648 vmcs_writel(GUEST_CR4
, (vmcs_readl(GUEST_CR4
) & ~CR4_VME_MASK
) |
649 (vmcs_readl(CR4_READ_SHADOW
) & CR4_VME_MASK
));
651 update_exception_bitmap(vcpu
);
653 fix_pmode_dataseg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
654 fix_pmode_dataseg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
655 fix_pmode_dataseg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
656 fix_pmode_dataseg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
658 vmcs_write16(GUEST_SS_SELECTOR
, 0);
659 vmcs_write32(GUEST_SS_AR_BYTES
, 0x93);
661 vmcs_write16(GUEST_CS_SELECTOR
,
662 vmcs_read16(GUEST_CS_SELECTOR
) & ~SELECTOR_RPL_MASK
);
663 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
666 static int rmode_tss_base(struct kvm
* kvm
)
668 gfn_t base_gfn
= kvm
->memslots
[0].base_gfn
+ kvm
->memslots
[0].npages
- 3;
669 return base_gfn
<< PAGE_SHIFT
;
672 static void fix_rmode_seg(int seg
, struct kvm_save_segment
*save
)
674 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
676 save
->selector
= vmcs_read16(sf
->selector
);
677 save
->base
= vmcs_readl(sf
->base
);
678 save
->limit
= vmcs_read32(sf
->limit
);
679 save
->ar
= vmcs_read32(sf
->ar_bytes
);
680 vmcs_write16(sf
->selector
, vmcs_readl(sf
->base
) >> 4);
681 vmcs_write32(sf
->limit
, 0xffff);
682 vmcs_write32(sf
->ar_bytes
, 0xf3);
685 static void enter_rmode(struct kvm_vcpu
*vcpu
)
689 vcpu
->rmode
.active
= 1;
691 vcpu
->rmode
.tr
.base
= vmcs_readl(GUEST_TR_BASE
);
692 vmcs_writel(GUEST_TR_BASE
, rmode_tss_base(vcpu
->kvm
));
694 vcpu
->rmode
.tr
.limit
= vmcs_read32(GUEST_TR_LIMIT
);
695 vmcs_write32(GUEST_TR_LIMIT
, RMODE_TSS_SIZE
- 1);
697 vcpu
->rmode
.tr
.ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
698 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
700 flags
= vmcs_readl(GUEST_RFLAGS
);
701 vcpu
->rmode
.save_iopl
= (flags
& IOPL_MASK
) >> IOPL_SHIFT
;
703 flags
|= IOPL_MASK
| X86_EFLAGS_VM
;
705 vmcs_writel(GUEST_RFLAGS
, flags
);
706 vmcs_writel(GUEST_CR4
, vmcs_readl(GUEST_CR4
) | CR4_VME_MASK
);
707 update_exception_bitmap(vcpu
);
709 vmcs_write16(GUEST_SS_SELECTOR
, vmcs_readl(GUEST_SS_BASE
) >> 4);
710 vmcs_write32(GUEST_SS_LIMIT
, 0xffff);
711 vmcs_write32(GUEST_SS_AR_BYTES
, 0xf3);
713 vmcs_write32(GUEST_CS_AR_BYTES
, 0xf3);
714 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
715 if (vmcs_readl(GUEST_CS_BASE
) == 0xffff0000)
716 vmcs_writel(GUEST_CS_BASE
, 0xf0000);
717 vmcs_write16(GUEST_CS_SELECTOR
, vmcs_readl(GUEST_CS_BASE
) >> 4);
719 fix_rmode_seg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
720 fix_rmode_seg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
721 fix_rmode_seg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
722 fix_rmode_seg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
727 static void enter_lmode(struct kvm_vcpu
*vcpu
)
731 guest_tr_ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
732 if ((guest_tr_ar
& AR_TYPE_MASK
) != AR_TYPE_BUSY_64_TSS
) {
733 printk(KERN_DEBUG
"%s: tss fixup for long mode. \n",
735 vmcs_write32(GUEST_TR_AR_BYTES
,
736 (guest_tr_ar
& ~AR_TYPE_MASK
)
737 | AR_TYPE_BUSY_64_TSS
);
740 vcpu
->shadow_efer
|= EFER_LMA
;
742 find_msr_entry(vcpu
, MSR_EFER
)->data
|= EFER_LMA
| EFER_LME
;
743 vmcs_write32(VM_ENTRY_CONTROLS
,
744 vmcs_read32(VM_ENTRY_CONTROLS
)
745 | VM_ENTRY_CONTROLS_IA32E_MASK
);
748 static void exit_lmode(struct kvm_vcpu
*vcpu
)
750 vcpu
->shadow_efer
&= ~EFER_LMA
;
752 vmcs_write32(VM_ENTRY_CONTROLS
,
753 vmcs_read32(VM_ENTRY_CONTROLS
)
754 & ~VM_ENTRY_CONTROLS_IA32E_MASK
);
759 static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
761 vcpu
->cr0
&= KVM_GUEST_CR0_MASK
;
762 vcpu
->cr0
|= vmcs_readl(GUEST_CR0
) & ~KVM_GUEST_CR0_MASK
;
764 vcpu
->cr4
&= KVM_GUEST_CR4_MASK
;
765 vcpu
->cr4
|= vmcs_readl(GUEST_CR4
) & ~KVM_GUEST_CR4_MASK
;
768 static void vmx_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
770 if (vcpu
->rmode
.active
&& (cr0
& CR0_PE_MASK
))
773 if (!vcpu
->rmode
.active
&& !(cr0
& CR0_PE_MASK
))
777 if (vcpu
->shadow_efer
& EFER_LME
) {
778 if (!is_paging(vcpu
) && (cr0
& CR0_PG_MASK
))
780 if (is_paging(vcpu
) && !(cr0
& CR0_PG_MASK
))
785 vmcs_writel(CR0_READ_SHADOW
, cr0
);
786 vmcs_writel(GUEST_CR0
,
787 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
791 static void vmx_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
793 vmcs_writel(GUEST_CR3
, cr3
);
796 static void vmx_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
798 vmcs_writel(CR4_READ_SHADOW
, cr4
);
799 vmcs_writel(GUEST_CR4
, cr4
| (vcpu
->rmode
.active
?
800 KVM_RMODE_VM_CR4_ALWAYS_ON
: KVM_PMODE_VM_CR4_ALWAYS_ON
));
806 static void vmx_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
808 struct vmx_msr_entry
*msr
= find_msr_entry(vcpu
, MSR_EFER
);
810 vcpu
->shadow_efer
= efer
;
811 if (efer
& EFER_LMA
) {
812 vmcs_write32(VM_ENTRY_CONTROLS
,
813 vmcs_read32(VM_ENTRY_CONTROLS
) |
814 VM_ENTRY_CONTROLS_IA32E_MASK
);
818 vmcs_write32(VM_ENTRY_CONTROLS
,
819 vmcs_read32(VM_ENTRY_CONTROLS
) &
820 ~VM_ENTRY_CONTROLS_IA32E_MASK
);
822 msr
->data
= efer
& ~EFER_LME
;
828 static u64
vmx_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
830 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
832 return vmcs_readl(sf
->base
);
835 static void vmx_get_segment(struct kvm_vcpu
*vcpu
,
836 struct kvm_segment
*var
, int seg
)
838 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
841 var
->base
= vmcs_readl(sf
->base
);
842 var
->limit
= vmcs_read32(sf
->limit
);
843 var
->selector
= vmcs_read16(sf
->selector
);
844 ar
= vmcs_read32(sf
->ar_bytes
);
845 if (ar
& AR_UNUSABLE_MASK
)
848 var
->s
= (ar
>> 4) & 1;
849 var
->dpl
= (ar
>> 5) & 3;
850 var
->present
= (ar
>> 7) & 1;
851 var
->avl
= (ar
>> 12) & 1;
852 var
->l
= (ar
>> 13) & 1;
853 var
->db
= (ar
>> 14) & 1;
854 var
->g
= (ar
>> 15) & 1;
855 var
->unusable
= (ar
>> 16) & 1;
858 static void vmx_set_segment(struct kvm_vcpu
*vcpu
,
859 struct kvm_segment
*var
, int seg
)
861 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
864 vmcs_writel(sf
->base
, var
->base
);
865 vmcs_write32(sf
->limit
, var
->limit
);
866 vmcs_write16(sf
->selector
, var
->selector
);
867 if (vcpu
->rmode
.active
&& var
->s
) {
869 * Hack real-mode segments into vm86 compatibility.
871 if (var
->base
== 0xffff0000 && var
->selector
== 0xf000)
872 vmcs_writel(sf
->base
, 0xf0000);
874 } else if (var
->unusable
)
878 ar
|= (var
->s
& 1) << 4;
879 ar
|= (var
->dpl
& 3) << 5;
880 ar
|= (var
->present
& 1) << 7;
881 ar
|= (var
->avl
& 1) << 12;
882 ar
|= (var
->l
& 1) << 13;
883 ar
|= (var
->db
& 1) << 14;
884 ar
|= (var
->g
& 1) << 15;
886 if (ar
== 0) /* a 0 value means unusable */
887 ar
= AR_UNUSABLE_MASK
;
888 vmcs_write32(sf
->ar_bytes
, ar
);
891 static void vmx_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
893 u32 ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
895 *db
= (ar
>> 14) & 1;
899 static void vmx_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
901 dt
->limit
= vmcs_read32(GUEST_IDTR_LIMIT
);
902 dt
->base
= vmcs_readl(GUEST_IDTR_BASE
);
905 static void vmx_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
907 vmcs_write32(GUEST_IDTR_LIMIT
, dt
->limit
);
908 vmcs_writel(GUEST_IDTR_BASE
, dt
->base
);
911 static void vmx_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
913 dt
->limit
= vmcs_read32(GUEST_GDTR_LIMIT
);
914 dt
->base
= vmcs_readl(GUEST_GDTR_BASE
);
917 static void vmx_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
919 vmcs_write32(GUEST_GDTR_LIMIT
, dt
->limit
);
920 vmcs_writel(GUEST_GDTR_BASE
, dt
->base
);
923 static int init_rmode_tss(struct kvm
* kvm
)
925 struct page
*p1
, *p2
, *p3
;
926 gfn_t fn
= rmode_tss_base(kvm
) >> PAGE_SHIFT
;
929 p1
= _gfn_to_page(kvm
, fn
++);
930 p2
= _gfn_to_page(kvm
, fn
++);
931 p3
= _gfn_to_page(kvm
, fn
);
933 if (!p1
|| !p2
|| !p3
) {
934 kvm_printf(kvm
,"%s: gfn_to_page failed\n", __FUNCTION__
);
938 page
= kmap_atomic(p1
, KM_USER0
);
939 memset(page
, 0, PAGE_SIZE
);
940 *(u16
*)(page
+ 0x66) = TSS_BASE_SIZE
+ TSS_REDIRECTION_SIZE
;
941 kunmap_atomic(page
, KM_USER0
);
943 page
= kmap_atomic(p2
, KM_USER0
);
944 memset(page
, 0, PAGE_SIZE
);
945 kunmap_atomic(page
, KM_USER0
);
947 page
= kmap_atomic(p3
, KM_USER0
);
948 memset(page
, 0, PAGE_SIZE
);
949 *(page
+ RMODE_TSS_SIZE
- 2 * PAGE_SIZE
- 1) = ~0;
950 kunmap_atomic(page
, KM_USER0
);
955 static void vmcs_write32_fixedbits(u32 msr
, u32 vmcs_field
, u32 val
)
957 u32 msr_high
, msr_low
;
959 rdmsr(msr
, msr_low
, msr_high
);
963 vmcs_write32(vmcs_field
, val
);
966 static void seg_setup(int seg
)
968 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
970 vmcs_write16(sf
->selector
, 0);
971 vmcs_writel(sf
->base
, 0);
972 vmcs_write32(sf
->limit
, 0xffff);
973 vmcs_write32(sf
->ar_bytes
, 0x93);
977 * Sets up the vmcs for emulated real mode.
979 static int vmx_vcpu_setup(struct kvm_vcpu
*vcpu
)
981 u32 host_sysenter_cs
;
984 struct descriptor_table dt
;
988 extern asmlinkage
void kvm_vmx_return(void);
990 if (!init_rmode_tss(vcpu
->kvm
)) {
995 memset(vcpu
->regs
, 0, sizeof(vcpu
->regs
));
996 vcpu
->regs
[VCPU_REGS_RDX
] = get_rdx_init_val();
998 vcpu
->apic_base
= 0xfee00000 |
999 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP
|
1000 MSR_IA32_APICBASE_ENABLE
;
1005 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1006 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1008 vmcs_write16(GUEST_CS_SELECTOR
, 0xf000);
1009 vmcs_writel(GUEST_CS_BASE
, 0x000f0000);
1010 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1011 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1013 seg_setup(VCPU_SREG_DS
);
1014 seg_setup(VCPU_SREG_ES
);
1015 seg_setup(VCPU_SREG_FS
);
1016 seg_setup(VCPU_SREG_GS
);
1017 seg_setup(VCPU_SREG_SS
);
1019 vmcs_write16(GUEST_TR_SELECTOR
, 0);
1020 vmcs_writel(GUEST_TR_BASE
, 0);
1021 vmcs_write32(GUEST_TR_LIMIT
, 0xffff);
1022 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1024 vmcs_write16(GUEST_LDTR_SELECTOR
, 0);
1025 vmcs_writel(GUEST_LDTR_BASE
, 0);
1026 vmcs_write32(GUEST_LDTR_LIMIT
, 0xffff);
1027 vmcs_write32(GUEST_LDTR_AR_BYTES
, 0x00082);
1029 vmcs_write32(GUEST_SYSENTER_CS
, 0);
1030 vmcs_writel(GUEST_SYSENTER_ESP
, 0);
1031 vmcs_writel(GUEST_SYSENTER_EIP
, 0);
1033 vmcs_writel(GUEST_RFLAGS
, 0x02);
1034 vmcs_writel(GUEST_RIP
, 0xfff0);
1035 vmcs_writel(GUEST_RSP
, 0);
1037 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1038 vmcs_writel(GUEST_DR7
, 0x400);
1040 vmcs_writel(GUEST_GDTR_BASE
, 0);
1041 vmcs_write32(GUEST_GDTR_LIMIT
, 0xffff);
1043 vmcs_writel(GUEST_IDTR_BASE
, 0);
1044 vmcs_write32(GUEST_IDTR_LIMIT
, 0xffff);
1046 vmcs_write32(GUEST_ACTIVITY_STATE
, 0);
1047 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
, 0);
1048 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS
, 0);
1051 vmcs_write64(IO_BITMAP_A
, 0);
1052 vmcs_write64(IO_BITMAP_B
, 0);
1056 vmcs_write64(VMCS_LINK_POINTER
, -1ull); /* 22.3.1.5 */
1058 /* Special registers */
1059 vmcs_write64(GUEST_IA32_DEBUGCTL
, 0);
1062 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS
,
1063 PIN_BASED_VM_EXEC_CONTROL
,
1064 PIN_BASED_EXT_INTR_MASK
/* 20.6.1 */
1065 | PIN_BASED_NMI_EXITING
/* 20.6.1 */
1067 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS
,
1068 CPU_BASED_VM_EXEC_CONTROL
,
1069 CPU_BASED_HLT_EXITING
/* 20.6.2 */
1070 | CPU_BASED_CR8_LOAD_EXITING
/* 20.6.2 */
1071 | CPU_BASED_CR8_STORE_EXITING
/* 20.6.2 */
1072 | CPU_BASED_UNCOND_IO_EXITING
/* 20.6.2 */
1073 | CPU_BASED_MOV_DR_EXITING
1074 | CPU_BASED_USE_TSC_OFFSETING
/* 21.3 */
1077 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
1078 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK
, 0);
1079 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH
, 0);
1080 vmcs_write32(CR3_TARGET_COUNT
, 0); /* 22.2.1 */
1082 vmcs_writel(HOST_CR0
, read_cr0()); /* 22.2.3 */
1083 vmcs_writel(HOST_CR4
, read_cr4()); /* 22.2.3, 22.2.5 */
1084 vmcs_writel(HOST_CR3
, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1086 vmcs_write16(HOST_CS_SELECTOR
, __KERNEL_CS
); /* 22.2.4 */
1087 vmcs_write16(HOST_DS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1088 vmcs_write16(HOST_ES_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1089 vmcs_write16(HOST_FS_SELECTOR
, read_fs()); /* 22.2.4 */
1090 vmcs_write16(HOST_GS_SELECTOR
, read_gs()); /* 22.2.4 */
1091 vmcs_write16(HOST_SS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1092 #ifdef CONFIG_X86_64
1093 rdmsrl(MSR_FS_BASE
, a
);
1094 vmcs_writel(HOST_FS_BASE
, a
); /* 22.2.4 */
1095 rdmsrl(MSR_GS_BASE
, a
);
1096 vmcs_writel(HOST_GS_BASE
, a
); /* 22.2.4 */
1098 vmcs_writel(HOST_FS_BASE
, 0); /* 22.2.4 */
1099 vmcs_writel(HOST_GS_BASE
, 0); /* 22.2.4 */
1102 vmcs_write16(HOST_TR_SELECTOR
, GDT_ENTRY_TSS
*8); /* 22.2.4 */
1105 vmcs_writel(HOST_IDTR_BASE
, dt
.base
); /* 22.2.4 */
1108 vmcs_writel(HOST_RIP
, (unsigned long)kvm_vmx_return
); /* 22.2.5 */
1110 rdmsr(MSR_IA32_SYSENTER_CS
, host_sysenter_cs
, junk
);
1111 vmcs_write32(HOST_IA32_SYSENTER_CS
, host_sysenter_cs
);
1112 rdmsrl(MSR_IA32_SYSENTER_ESP
, a
);
1113 vmcs_writel(HOST_IA32_SYSENTER_ESP
, a
); /* 22.2.3 */
1114 rdmsrl(MSR_IA32_SYSENTER_EIP
, a
);
1115 vmcs_writel(HOST_IA32_SYSENTER_EIP
, a
); /* 22.2.3 */
1117 for (i
= 0; i
< NR_VMX_MSR
; ++i
) {
1118 u32 index
= vmx_msr_index
[i
];
1119 u32 data_low
, data_high
;
1121 int j
= vcpu
->nmsrs
;
1123 if (rdmsr_safe(index
, &data_low
, &data_high
) < 0)
1125 if (wrmsr_safe(index
, data_low
, data_high
) < 0)
1127 data
= data_low
| ((u64
)data_high
<< 32);
1128 vcpu
->host_msrs
[j
].index
= index
;
1129 vcpu
->host_msrs
[j
].reserved
= 0;
1130 vcpu
->host_msrs
[j
].data
= data
;
1131 vcpu
->guest_msrs
[j
] = vcpu
->host_msrs
[j
];
1135 nr_good_msrs
= vcpu
->nmsrs
- NR_BAD_MSRS
;
1136 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR
,
1137 virt_to_phys(vcpu
->guest_msrs
+ NR_BAD_MSRS
));
1138 vmcs_writel(VM_EXIT_MSR_STORE_ADDR
,
1139 virt_to_phys(vcpu
->guest_msrs
+ NR_BAD_MSRS
));
1140 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR
,
1141 virt_to_phys(vcpu
->host_msrs
+ NR_BAD_MSRS
));
1142 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS
, VM_EXIT_CONTROLS
,
1143 (HOST_IS_64
<< 9)); /* 22.2,1, 20.7.1 */
1144 vmcs_write32(VM_EXIT_MSR_STORE_COUNT
, nr_good_msrs
); /* 22.2.2 */
1145 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
1146 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
1149 /* 22.2.1, 20.8.1 */
1150 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS
,
1151 VM_ENTRY_CONTROLS
, 0);
1152 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, 0); /* 22.2.1 */
1154 #ifdef CONFIG_X86_64
1155 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR
, 0);
1156 vmcs_writel(TPR_THRESHOLD
, 0);
1159 vmcs_writel(CR0_GUEST_HOST_MASK
, KVM_GUEST_CR0_MASK
);
1160 vmcs_writel(CR4_GUEST_HOST_MASK
, KVM_GUEST_CR4_MASK
);
1162 vcpu
->cr0
= 0x60000010;
1163 vmx_set_cr0(vcpu
, vcpu
->cr0
); // enter rmode
1164 vmx_set_cr4(vcpu
, 0);
1165 #ifdef CONFIG_X86_64
1166 vmx_set_efer(vcpu
, 0);
1175 static void inject_rmode_irq(struct kvm_vcpu
*vcpu
, int irq
)
1180 unsigned long flags
;
1181 unsigned long ss_base
= vmcs_readl(GUEST_SS_BASE
);
1182 u16 sp
= vmcs_readl(GUEST_RSP
);
1183 u32 ss_limit
= vmcs_read32(GUEST_SS_LIMIT
);
1185 if (sp
> ss_limit
|| sp
- 6 > sp
) {
1186 vcpu_printf(vcpu
, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1188 vmcs_readl(GUEST_RSP
),
1189 vmcs_readl(GUEST_SS_BASE
),
1190 vmcs_read32(GUEST_SS_LIMIT
));
1194 if (kvm_read_guest(vcpu
, irq
* sizeof(ent
), sizeof(ent
), &ent
) !=
1196 vcpu_printf(vcpu
, "%s: read guest err\n", __FUNCTION__
);
1200 flags
= vmcs_readl(GUEST_RFLAGS
);
1201 cs
= vmcs_readl(GUEST_CS_BASE
) >> 4;
1202 ip
= vmcs_readl(GUEST_RIP
);
1205 if (kvm_write_guest(vcpu
, ss_base
+ sp
- 2, 2, &flags
) != 2 ||
1206 kvm_write_guest(vcpu
, ss_base
+ sp
- 4, 2, &cs
) != 2 ||
1207 kvm_write_guest(vcpu
, ss_base
+ sp
- 6, 2, &ip
) != 2) {
1208 vcpu_printf(vcpu
, "%s: write guest err\n", __FUNCTION__
);
1212 vmcs_writel(GUEST_RFLAGS
, flags
&
1213 ~( X86_EFLAGS_IF
| X86_EFLAGS_AC
| X86_EFLAGS_TF
));
1214 vmcs_write16(GUEST_CS_SELECTOR
, ent
[1]) ;
1215 vmcs_writel(GUEST_CS_BASE
, ent
[1] << 4);
1216 vmcs_writel(GUEST_RIP
, ent
[0]);
1217 vmcs_writel(GUEST_RSP
, (vmcs_readl(GUEST_RSP
) & ~0xffff) | (sp
- 6));
1220 static void kvm_do_inject_irq(struct kvm_vcpu
*vcpu
)
1222 int word_index
= __ffs(vcpu
->irq_summary
);
1223 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
1224 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1226 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
1227 if (!vcpu
->irq_pending
[word_index
])
1228 clear_bit(word_index
, &vcpu
->irq_summary
);
1230 if (vcpu
->rmode
.active
) {
1231 inject_rmode_irq(vcpu
, irq
);
1234 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1235 irq
| INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
1239 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1240 struct kvm_run
*kvm_run
)
1242 u32 cpu_based_vm_exec_control
;
1244 vcpu
->interrupt_window_open
=
1245 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
1246 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
1248 if (vcpu
->interrupt_window_open
&&
1249 vcpu
->irq_summary
&&
1250 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
) & INTR_INFO_VALID_MASK
))
1252 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1254 kvm_do_inject_irq(vcpu
);
1256 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
1257 if (!vcpu
->interrupt_window_open
&&
1258 (vcpu
->irq_summary
|| kvm_run
->request_interrupt_window
))
1260 * Interrupts blocked. Wait for unblock.
1262 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
1264 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
1265 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
1268 static void kvm_guest_debug_pre(struct kvm_vcpu
*vcpu
)
1270 struct kvm_guest_debug
*dbg
= &vcpu
->guest_debug
;
1272 set_debugreg(dbg
->bp
[0], 0);
1273 set_debugreg(dbg
->bp
[1], 1);
1274 set_debugreg(dbg
->bp
[2], 2);
1275 set_debugreg(dbg
->bp
[3], 3);
1277 if (dbg
->singlestep
) {
1278 unsigned long flags
;
1280 flags
= vmcs_readl(GUEST_RFLAGS
);
1281 flags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
1282 vmcs_writel(GUEST_RFLAGS
, flags
);
1286 static int handle_rmode_exception(struct kvm_vcpu
*vcpu
,
1287 int vec
, u32 err_code
)
1289 if (!vcpu
->rmode
.active
)
1292 if (vec
== GP_VECTOR
&& err_code
== 0)
1293 if (emulate_instruction(vcpu
, NULL
, 0, 0) == EMULATE_DONE
)
1298 static int handle_exception(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1300 u32 intr_info
, error_code
;
1301 unsigned long cr2
, rip
;
1303 enum emulation_result er
;
1306 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1307 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
1309 if ((vect_info
& VECTORING_INFO_VALID_MASK
) &&
1310 !is_page_fault(intr_info
)) {
1311 printk(KERN_ERR
"%s: unexpected, vectoring info 0x%x "
1312 "intr info 0x%x\n", __FUNCTION__
, vect_info
, intr_info
);
1315 if (is_external_interrupt(vect_info
)) {
1316 int irq
= vect_info
& VECTORING_INFO_VECTOR_MASK
;
1317 set_bit(irq
, vcpu
->irq_pending
);
1318 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->irq_summary
);
1321 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) { /* nmi */
1326 rip
= vmcs_readl(GUEST_RIP
);
1327 if (intr_info
& INTR_INFO_DELIEVER_CODE_MASK
)
1328 error_code
= vmcs_read32(VM_EXIT_INTR_ERROR_CODE
);
1329 if (is_page_fault(intr_info
)) {
1330 cr2
= vmcs_readl(EXIT_QUALIFICATION
);
1332 spin_lock(&vcpu
->kvm
->lock
);
1333 r
= kvm_mmu_page_fault(vcpu
, cr2
, error_code
);
1335 spin_unlock(&vcpu
->kvm
->lock
);
1339 spin_unlock(&vcpu
->kvm
->lock
);
1343 er
= emulate_instruction(vcpu
, kvm_run
, cr2
, error_code
);
1344 spin_unlock(&vcpu
->kvm
->lock
);
1349 case EMULATE_DO_MMIO
:
1350 ++kvm_stat
.mmio_exits
;
1351 kvm_run
->exit_reason
= KVM_EXIT_MMIO
;
1354 vcpu_printf(vcpu
, "%s: emulate fail\n", __FUNCTION__
);
1361 if (vcpu
->rmode
.active
&&
1362 handle_rmode_exception(vcpu
, intr_info
& INTR_INFO_VECTOR_MASK
,
1366 if ((intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
)) == (INTR_TYPE_EXCEPTION
| 1)) {
1367 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
1370 kvm_run
->exit_reason
= KVM_EXIT_EXCEPTION
;
1371 kvm_run
->ex
.exception
= intr_info
& INTR_INFO_VECTOR_MASK
;
1372 kvm_run
->ex
.error_code
= error_code
;
1376 static int handle_external_interrupt(struct kvm_vcpu
*vcpu
,
1377 struct kvm_run
*kvm_run
)
1379 ++kvm_stat
.irq_exits
;
1383 static int handle_triple_fault(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1385 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
1389 static int get_io_count(struct kvm_vcpu
*vcpu
, unsigned long *count
)
1396 if ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_VM
)) {
1399 u32 cs_ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1401 countr_size
= (cs_ar
& AR_L_MASK
) ? 8:
1402 (cs_ar
& AR_DB_MASK
) ? 4: 2;
1405 rip
= vmcs_readl(GUEST_RIP
);
1406 if (countr_size
!= 8)
1407 rip
+= vmcs_readl(GUEST_CS_BASE
);
1409 n
= kvm_read_guest(vcpu
, rip
, sizeof(inst
), &inst
);
1411 for (i
= 0; i
< n
; i
++) {
1412 switch (((u8
*)&inst
)[i
]) {
1425 countr_size
= (countr_size
== 2) ? 4: (countr_size
>> 1);
1433 *count
= vcpu
->regs
[VCPU_REGS_RCX
] & (~0ULL >> (64 - countr_size
));
1434 //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1438 static int handle_io(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1440 u64 exit_qualification
;
1441 int size
, down
, in
, string
, rep
;
1443 unsigned long count
;
1446 ++kvm_stat
.io_exits
;
1447 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1448 in
= (exit_qualification
& 8) != 0;
1449 size
= (exit_qualification
& 7) + 1;
1450 string
= (exit_qualification
& 16) != 0;
1451 down
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_DF
) != 0;
1453 rep
= (exit_qualification
& 32) != 0;
1454 port
= exit_qualification
>> 16;
1457 if (rep
&& !get_io_count(vcpu
, &count
))
1459 address
= vmcs_readl(GUEST_LINEAR_ADDRESS
);
1461 return kvm_setup_pio(vcpu
, kvm_run
, in
, size
, count
, string
, down
,
1462 address
, rep
, port
);
1466 vmx_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1469 * Patch in the VMCALL instruction:
1471 hypercall
[0] = 0x0f;
1472 hypercall
[1] = 0x01;
1473 hypercall
[2] = 0xc1;
1474 hypercall
[3] = 0xc3;
1477 static int handle_cr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1479 u64 exit_qualification
;
1483 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1484 cr
= exit_qualification
& 15;
1485 reg
= (exit_qualification
>> 8) & 15;
1486 switch ((exit_qualification
>> 4) & 3) {
1487 case 0: /* mov to cr */
1490 vcpu_load_rsp_rip(vcpu
);
1491 set_cr0(vcpu
, vcpu
->regs
[reg
]);
1492 skip_emulated_instruction(vcpu
);
1495 vcpu_load_rsp_rip(vcpu
);
1496 set_cr3(vcpu
, vcpu
->regs
[reg
]);
1497 skip_emulated_instruction(vcpu
);
1500 vcpu_load_rsp_rip(vcpu
);
1501 set_cr4(vcpu
, vcpu
->regs
[reg
]);
1502 skip_emulated_instruction(vcpu
);
1505 vcpu_load_rsp_rip(vcpu
);
1506 set_cr8(vcpu
, vcpu
->regs
[reg
]);
1507 skip_emulated_instruction(vcpu
);
1511 case 1: /*mov from cr*/
1514 vcpu_load_rsp_rip(vcpu
);
1515 vcpu
->regs
[reg
] = vcpu
->cr3
;
1516 vcpu_put_rsp_rip(vcpu
);
1517 skip_emulated_instruction(vcpu
);
1520 printk(KERN_DEBUG
"handle_cr: read CR8 "
1521 "cpu erratum AA15\n");
1522 vcpu_load_rsp_rip(vcpu
);
1523 vcpu
->regs
[reg
] = vcpu
->cr8
;
1524 vcpu_put_rsp_rip(vcpu
);
1525 skip_emulated_instruction(vcpu
);
1530 lmsw(vcpu
, (exit_qualification
>> LMSW_SOURCE_DATA_SHIFT
) & 0x0f);
1532 skip_emulated_instruction(vcpu
);
1537 kvm_run
->exit_reason
= 0;
1538 printk(KERN_ERR
"kvm: unhandled control register: op %d cr %d\n",
1539 (int)(exit_qualification
>> 4) & 3, cr
);
1543 static int handle_dr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1545 u64 exit_qualification
;
1550 * FIXME: this code assumes the host is debugging the guest.
1551 * need to deal with guest debugging itself too.
1553 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1554 dr
= exit_qualification
& 7;
1555 reg
= (exit_qualification
>> 8) & 15;
1556 vcpu_load_rsp_rip(vcpu
);
1557 if (exit_qualification
& 16) {
1569 vcpu
->regs
[reg
] = val
;
1573 vcpu_put_rsp_rip(vcpu
);
1574 skip_emulated_instruction(vcpu
);
1578 static int handle_cpuid(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1580 kvm_emulate_cpuid(vcpu
);
1584 static int handle_rdmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1586 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1589 if (vmx_get_msr(vcpu
, ecx
, &data
)) {
1590 vmx_inject_gp(vcpu
, 0);
1594 /* FIXME: handling of bits 32:63 of rax, rdx */
1595 vcpu
->regs
[VCPU_REGS_RAX
] = data
& -1u;
1596 vcpu
->regs
[VCPU_REGS_RDX
] = (data
>> 32) & -1u;
1597 skip_emulated_instruction(vcpu
);
1601 static int handle_wrmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1603 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1604 u64 data
= (vcpu
->regs
[VCPU_REGS_RAX
] & -1u)
1605 | ((u64
)(vcpu
->regs
[VCPU_REGS_RDX
] & -1u) << 32);
1607 if (vmx_set_msr(vcpu
, ecx
, data
) != 0) {
1608 vmx_inject_gp(vcpu
, 0);
1612 skip_emulated_instruction(vcpu
);
1616 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
1617 struct kvm_run
*kvm_run
)
1619 kvm_run
->if_flag
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) != 0;
1620 kvm_run
->cr8
= vcpu
->cr8
;
1621 kvm_run
->apic_base
= vcpu
->apic_base
;
1622 kvm_run
->ready_for_interrupt_injection
= (vcpu
->interrupt_window_open
&&
1623 vcpu
->irq_summary
== 0);
1626 static int handle_interrupt_window(struct kvm_vcpu
*vcpu
,
1627 struct kvm_run
*kvm_run
)
1630 * If the user space waits to inject interrupts, exit as soon as
1633 if (kvm_run
->request_interrupt_window
&&
1634 !vcpu
->irq_summary
) {
1635 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
1636 ++kvm_stat
.irq_window_exits
;
1642 static int handle_halt(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1644 skip_emulated_instruction(vcpu
);
1645 if (vcpu
->irq_summary
)
1648 kvm_run
->exit_reason
= KVM_EXIT_HLT
;
1649 ++kvm_stat
.halt_exits
;
1653 static int handle_vmcall(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1655 skip_emulated_instruction(vcpu
);
1656 return kvm_hypercall(vcpu
, kvm_run
);
1660 * The exit handlers return 1 if the exit was handled fully and guest execution
1661 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1662 * to be done to userspace and return 0.
1664 static int (*kvm_vmx_exit_handlers
[])(struct kvm_vcpu
*vcpu
,
1665 struct kvm_run
*kvm_run
) = {
1666 [EXIT_REASON_EXCEPTION_NMI
] = handle_exception
,
1667 [EXIT_REASON_EXTERNAL_INTERRUPT
] = handle_external_interrupt
,
1668 [EXIT_REASON_TRIPLE_FAULT
] = handle_triple_fault
,
1669 [EXIT_REASON_IO_INSTRUCTION
] = handle_io
,
1670 [EXIT_REASON_CR_ACCESS
] = handle_cr
,
1671 [EXIT_REASON_DR_ACCESS
] = handle_dr
,
1672 [EXIT_REASON_CPUID
] = handle_cpuid
,
1673 [EXIT_REASON_MSR_READ
] = handle_rdmsr
,
1674 [EXIT_REASON_MSR_WRITE
] = handle_wrmsr
,
1675 [EXIT_REASON_PENDING_INTERRUPT
] = handle_interrupt_window
,
1676 [EXIT_REASON_HLT
] = handle_halt
,
1677 [EXIT_REASON_VMCALL
] = handle_vmcall
,
1680 static const int kvm_vmx_max_exit_handlers
=
1681 sizeof(kvm_vmx_exit_handlers
) / sizeof(*kvm_vmx_exit_handlers
);
1684 * The guest has exited. See if we can fix it or if we need userspace
1687 static int kvm_handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
1689 u32 vectoring_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1690 u32 exit_reason
= vmcs_read32(VM_EXIT_REASON
);
1692 if ( (vectoring_info
& VECTORING_INFO_VALID_MASK
) &&
1693 exit_reason
!= EXIT_REASON_EXCEPTION_NMI
)
1694 printk(KERN_WARNING
"%s: unexpected, valid vectoring info and "
1695 "exit reason is 0x%x\n", __FUNCTION__
, exit_reason
);
1696 kvm_run
->instruction_length
= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
1697 if (exit_reason
< kvm_vmx_max_exit_handlers
1698 && kvm_vmx_exit_handlers
[exit_reason
])
1699 return kvm_vmx_exit_handlers
[exit_reason
](vcpu
, kvm_run
);
1701 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1702 kvm_run
->hw
.hardware_exit_reason
= exit_reason
;
1708 * Check if userspace requested an interrupt window, and that the
1709 * interrupt window is open.
1711 * No need to exit to userspace if we already have an interrupt queued.
1713 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
1714 struct kvm_run
*kvm_run
)
1716 return (!vcpu
->irq_summary
&&
1717 kvm_run
->request_interrupt_window
&&
1718 vcpu
->interrupt_window_open
&&
1719 (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
));
1722 static int vmx_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1725 u16 fs_sel
, gs_sel
, ldt_sel
;
1726 int fs_gs_ldt_reload_needed
;
1731 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1732 * allow segment selectors with cpl > 0 or ti == 1.
1736 ldt_sel
= read_ldt();
1737 fs_gs_ldt_reload_needed
= (fs_sel
& 7) | (gs_sel
& 7) | ldt_sel
;
1738 if (!fs_gs_ldt_reload_needed
) {
1739 vmcs_write16(HOST_FS_SELECTOR
, fs_sel
);
1740 vmcs_write16(HOST_GS_SELECTOR
, gs_sel
);
1742 vmcs_write16(HOST_FS_SELECTOR
, 0);
1743 vmcs_write16(HOST_GS_SELECTOR
, 0);
1746 #ifdef CONFIG_X86_64
1747 vmcs_writel(HOST_FS_BASE
, read_msr(MSR_FS_BASE
));
1748 vmcs_writel(HOST_GS_BASE
, read_msr(MSR_GS_BASE
));
1750 vmcs_writel(HOST_FS_BASE
, segment_base(fs_sel
));
1751 vmcs_writel(HOST_GS_BASE
, segment_base(gs_sel
));
1754 if (!vcpu
->mmio_read_completed
)
1755 do_interrupt_requests(vcpu
, kvm_run
);
1757 if (vcpu
->guest_debug
.enabled
)
1758 kvm_guest_debug_pre(vcpu
);
1760 fx_save(vcpu
->host_fx_image
);
1761 fx_restore(vcpu
->guest_fx_image
);
1763 save_msrs(vcpu
->host_msrs
, vcpu
->nmsrs
);
1764 load_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1767 /* Store host registers */
1769 #ifdef CONFIG_X86_64
1770 "push %%rax; push %%rbx; push %%rdx;"
1771 "push %%rsi; push %%rdi; push %%rbp;"
1772 "push %%r8; push %%r9; push %%r10; push %%r11;"
1773 "push %%r12; push %%r13; push %%r14; push %%r15;"
1775 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1777 "pusha; push %%ecx \n\t"
1778 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1780 /* Check if vmlaunch of vmresume is needed */
1782 /* Load guest registers. Don't clobber flags. */
1783 #ifdef CONFIG_X86_64
1784 "mov %c[cr2](%3), %%rax \n\t"
1785 "mov %%rax, %%cr2 \n\t"
1786 "mov %c[rax](%3), %%rax \n\t"
1787 "mov %c[rbx](%3), %%rbx \n\t"
1788 "mov %c[rdx](%3), %%rdx \n\t"
1789 "mov %c[rsi](%3), %%rsi \n\t"
1790 "mov %c[rdi](%3), %%rdi \n\t"
1791 "mov %c[rbp](%3), %%rbp \n\t"
1792 "mov %c[r8](%3), %%r8 \n\t"
1793 "mov %c[r9](%3), %%r9 \n\t"
1794 "mov %c[r10](%3), %%r10 \n\t"
1795 "mov %c[r11](%3), %%r11 \n\t"
1796 "mov %c[r12](%3), %%r12 \n\t"
1797 "mov %c[r13](%3), %%r13 \n\t"
1798 "mov %c[r14](%3), %%r14 \n\t"
1799 "mov %c[r15](%3), %%r15 \n\t"
1800 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1802 "mov %c[cr2](%3), %%eax \n\t"
1803 "mov %%eax, %%cr2 \n\t"
1804 "mov %c[rax](%3), %%eax \n\t"
1805 "mov %c[rbx](%3), %%ebx \n\t"
1806 "mov %c[rdx](%3), %%edx \n\t"
1807 "mov %c[rsi](%3), %%esi \n\t"
1808 "mov %c[rdi](%3), %%edi \n\t"
1809 "mov %c[rbp](%3), %%ebp \n\t"
1810 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1812 /* Enter guest mode */
1814 ASM_VMX_VMLAUNCH
"\n\t"
1815 "jmp kvm_vmx_return \n\t"
1816 "launched: " ASM_VMX_VMRESUME
"\n\t"
1817 ".globl kvm_vmx_return \n\t"
1819 /* Save guest registers, load host registers, keep flags */
1820 #ifdef CONFIG_X86_64
1821 "xchg %3, (%%rsp) \n\t"
1822 "mov %%rax, %c[rax](%3) \n\t"
1823 "mov %%rbx, %c[rbx](%3) \n\t"
1824 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1825 "mov %%rdx, %c[rdx](%3) \n\t"
1826 "mov %%rsi, %c[rsi](%3) \n\t"
1827 "mov %%rdi, %c[rdi](%3) \n\t"
1828 "mov %%rbp, %c[rbp](%3) \n\t"
1829 "mov %%r8, %c[r8](%3) \n\t"
1830 "mov %%r9, %c[r9](%3) \n\t"
1831 "mov %%r10, %c[r10](%3) \n\t"
1832 "mov %%r11, %c[r11](%3) \n\t"
1833 "mov %%r12, %c[r12](%3) \n\t"
1834 "mov %%r13, %c[r13](%3) \n\t"
1835 "mov %%r14, %c[r14](%3) \n\t"
1836 "mov %%r15, %c[r15](%3) \n\t"
1837 "mov %%cr2, %%rax \n\t"
1838 "mov %%rax, %c[cr2](%3) \n\t"
1839 "mov (%%rsp), %3 \n\t"
1841 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1842 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1843 "pop %%rbp; pop %%rdi; pop %%rsi;"
1844 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
1846 "xchg %3, (%%esp) \n\t"
1847 "mov %%eax, %c[rax](%3) \n\t"
1848 "mov %%ebx, %c[rbx](%3) \n\t"
1849 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1850 "mov %%edx, %c[rdx](%3) \n\t"
1851 "mov %%esi, %c[rsi](%3) \n\t"
1852 "mov %%edi, %c[rdi](%3) \n\t"
1853 "mov %%ebp, %c[rbp](%3) \n\t"
1854 "mov %%cr2, %%eax \n\t"
1855 "mov %%eax, %c[cr2](%3) \n\t"
1856 "mov (%%esp), %3 \n\t"
1858 "pop %%ecx; popa \n\t"
1863 : "r"(vcpu
->launched
), "d"((unsigned long)HOST_RSP
),
1865 [rax
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RAX
])),
1866 [rbx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBX
])),
1867 [rcx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RCX
])),
1868 [rdx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDX
])),
1869 [rsi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RSI
])),
1870 [rdi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDI
])),
1871 [rbp
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBP
])),
1872 #ifdef CONFIG_X86_64
1873 [r8
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R8
])),
1874 [r9
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R9
])),
1875 [r10
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R10
])),
1876 [r11
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R11
])),
1877 [r12
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R12
])),
1878 [r13
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R13
])),
1879 [r14
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R14
])),
1880 [r15
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R15
])),
1882 [cr2
]"i"(offsetof(struct kvm_vcpu
, cr2
))
1886 * Reload segment selectors ASAP. (it's needed for a functional
1887 * kernel: x86 relies on having __KERNEL_PDA in %fs and x86_64
1888 * relies on having 0 in %gs for the CPU PDA to work.)
1890 if (fs_gs_ldt_reload_needed
) {
1894 * If we have to reload gs, we must take care to
1895 * preserve our gs base.
1897 local_irq_disable();
1899 #ifdef CONFIG_X86_64
1900 wrmsrl(MSR_GS_BASE
, vmcs_readl(HOST_GS_BASE
));
1908 save_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1909 load_msrs(vcpu
->host_msrs
, NR_BAD_MSRS
);
1911 fx_save(vcpu
->guest_fx_image
);
1912 fx_restore(vcpu
->host_fx_image
);
1913 vcpu
->interrupt_window_open
= (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0;
1915 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS
));
1918 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
1919 kvm_run
->fail_entry
.hardware_entry_failure_reason
1920 = vmcs_read32(VM_INSTRUCTION_ERROR
);
1924 * Profile KVM exit RIPs:
1926 if (unlikely(prof_on
== KVM_PROFILING
))
1927 profile_hit(KVM_PROFILING
, (void *)vmcs_readl(GUEST_RIP
));
1930 r
= kvm_handle_exit(kvm_run
, vcpu
);
1932 /* Give scheduler a change to reschedule. */
1933 if (signal_pending(current
)) {
1934 ++kvm_stat
.signal_exits
;
1935 post_kvm_run_save(vcpu
, kvm_run
);
1936 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
1940 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
1941 ++kvm_stat
.request_irq_exits
;
1942 post_kvm_run_save(vcpu
, kvm_run
);
1943 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
1952 post_kvm_run_save(vcpu
, kvm_run
);
1956 static void vmx_flush_tlb(struct kvm_vcpu
*vcpu
)
1958 vmcs_writel(GUEST_CR3
, vmcs_readl(GUEST_CR3
));
1961 static void vmx_inject_page_fault(struct kvm_vcpu
*vcpu
,
1965 u32 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1967 ++kvm_stat
.pf_guest
;
1969 if (is_page_fault(vect_info
)) {
1970 printk(KERN_DEBUG
"inject_page_fault: "
1971 "double fault 0x%lx @ 0x%lx\n",
1972 addr
, vmcs_readl(GUEST_RIP
));
1973 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, 0);
1974 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1976 INTR_TYPE_EXCEPTION
|
1977 INTR_INFO_DELIEVER_CODE_MASK
|
1978 INTR_INFO_VALID_MASK
);
1982 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, err_code
);
1983 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1985 INTR_TYPE_EXCEPTION
|
1986 INTR_INFO_DELIEVER_CODE_MASK
|
1987 INTR_INFO_VALID_MASK
);
1991 static void vmx_free_vmcs(struct kvm_vcpu
*vcpu
)
1994 on_each_cpu(__vcpu_clear
, vcpu
, 0, 1);
1995 free_vmcs(vcpu
->vmcs
);
2000 static void vmx_free_vcpu(struct kvm_vcpu
*vcpu
)
2002 vmx_free_vmcs(vcpu
);
2005 static int vmx_create_vcpu(struct kvm_vcpu
*vcpu
)
2009 vcpu
->guest_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2010 if (!vcpu
->guest_msrs
)
2013 vcpu
->host_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2014 if (!vcpu
->host_msrs
)
2015 goto out_free_guest_msrs
;
2017 vmcs
= alloc_vmcs();
2028 kfree(vcpu
->host_msrs
);
2029 vcpu
->host_msrs
= NULL
;
2031 out_free_guest_msrs
:
2032 kfree(vcpu
->guest_msrs
);
2033 vcpu
->guest_msrs
= NULL
;
2038 static struct kvm_arch_ops vmx_arch_ops
= {
2039 .cpu_has_kvm_support
= cpu_has_kvm_support
,
2040 .disabled_by_bios
= vmx_disabled_by_bios
,
2041 .hardware_setup
= hardware_setup
,
2042 .hardware_unsetup
= hardware_unsetup
,
2043 .hardware_enable
= hardware_enable
,
2044 .hardware_disable
= hardware_disable
,
2046 .vcpu_create
= vmx_create_vcpu
,
2047 .vcpu_free
= vmx_free_vcpu
,
2049 .vcpu_load
= vmx_vcpu_load
,
2050 .vcpu_put
= vmx_vcpu_put
,
2051 .vcpu_decache
= vmx_vcpu_decache
,
2053 .set_guest_debug
= set_guest_debug
,
2054 .get_msr
= vmx_get_msr
,
2055 .set_msr
= vmx_set_msr
,
2056 .get_segment_base
= vmx_get_segment_base
,
2057 .get_segment
= vmx_get_segment
,
2058 .set_segment
= vmx_set_segment
,
2059 .get_cs_db_l_bits
= vmx_get_cs_db_l_bits
,
2060 .decache_cr0_cr4_guest_bits
= vmx_decache_cr0_cr4_guest_bits
,
2061 .set_cr0
= vmx_set_cr0
,
2062 .set_cr3
= vmx_set_cr3
,
2063 .set_cr4
= vmx_set_cr4
,
2064 #ifdef CONFIG_X86_64
2065 .set_efer
= vmx_set_efer
,
2067 .get_idt
= vmx_get_idt
,
2068 .set_idt
= vmx_set_idt
,
2069 .get_gdt
= vmx_get_gdt
,
2070 .set_gdt
= vmx_set_gdt
,
2071 .cache_regs
= vcpu_load_rsp_rip
,
2072 .decache_regs
= vcpu_put_rsp_rip
,
2073 .get_rflags
= vmx_get_rflags
,
2074 .set_rflags
= vmx_set_rflags
,
2076 .tlb_flush
= vmx_flush_tlb
,
2077 .inject_page_fault
= vmx_inject_page_fault
,
2079 .inject_gp
= vmx_inject_gp
,
2081 .run
= vmx_vcpu_run
,
2082 .skip_emulated_instruction
= skip_emulated_instruction
,
2083 .vcpu_setup
= vmx_vcpu_setup
,
2084 .patch_hypercall
= vmx_patch_hypercall
,
2087 static int __init
vmx_init(void)
2089 return kvm_init_arch(&vmx_arch_ops
, THIS_MODULE
);
2092 static void __exit
vmx_exit(void)
2097 module_init(vmx_init
)
2098 module_exit(vmx_exit
)