2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
20 #include <linux/module.h>
21 #include <linux/kernel.h>
23 #include <linux/highmem.h>
24 #include <linux/profile.h>
25 #include <linux/sched.h>
29 #include "segment_descriptor.h"
31 MODULE_AUTHOR("Qumranet");
32 MODULE_LICENSE("GPL");
34 static DEFINE_PER_CPU(struct vmcs
*, vmxarea
);
35 static DEFINE_PER_CPU(struct vmcs
*, current_vmcs
);
37 static struct page
*vmx_io_bitmap_a
;
38 static struct page
*vmx_io_bitmap_b
;
46 static struct vmcs_descriptor
{
52 #define VMX_SEGMENT_FIELD(seg) \
53 [VCPU_SREG_##seg] = { \
54 .selector = GUEST_##seg##_SELECTOR, \
55 .base = GUEST_##seg##_BASE, \
56 .limit = GUEST_##seg##_LIMIT, \
57 .ar_bytes = GUEST_##seg##_AR_BYTES, \
60 static struct kvm_vmx_segment_field
{
65 } kvm_vmx_segment_fields
[] = {
66 VMX_SEGMENT_FIELD(CS
),
67 VMX_SEGMENT_FIELD(DS
),
68 VMX_SEGMENT_FIELD(ES
),
69 VMX_SEGMENT_FIELD(FS
),
70 VMX_SEGMENT_FIELD(GS
),
71 VMX_SEGMENT_FIELD(SS
),
72 VMX_SEGMENT_FIELD(TR
),
73 VMX_SEGMENT_FIELD(LDTR
),
77 * Keep MSR_K6_STAR at the end, as setup_msrs() will try to optimize it
78 * away by decrementing the array size.
80 static const u32 vmx_msr_index
[] = {
82 MSR_SYSCALL_MASK
, MSR_LSTAR
, MSR_CSTAR
, MSR_KERNEL_GS_BASE
,
84 MSR_EFER
, MSR_K6_STAR
,
86 #define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
88 static inline int is_page_fault(u32 intr_info
)
90 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
91 INTR_INFO_VALID_MASK
)) ==
92 (INTR_TYPE_EXCEPTION
| PF_VECTOR
| INTR_INFO_VALID_MASK
);
95 static inline int is_no_device(u32 intr_info
)
97 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
98 INTR_INFO_VALID_MASK
)) ==
99 (INTR_TYPE_EXCEPTION
| NM_VECTOR
| INTR_INFO_VALID_MASK
);
102 static inline int is_external_interrupt(u32 intr_info
)
104 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VALID_MASK
))
105 == (INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
108 static int __find_msr_index(struct kvm_vcpu
*vcpu
, u32 msr
)
112 for (i
= 0; i
< vcpu
->nmsrs
; ++i
)
113 if (vcpu
->guest_msrs
[i
].index
== msr
)
118 static struct vmx_msr_entry
*find_msr_entry(struct kvm_vcpu
*vcpu
, u32 msr
)
122 i
= __find_msr_index(vcpu
, msr
);
124 return &vcpu
->guest_msrs
[i
];
128 static void vmcs_clear(struct vmcs
*vmcs
)
130 u64 phys_addr
= __pa(vmcs
);
133 asm volatile (ASM_VMX_VMCLEAR_RAX
"; setna %0"
134 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
137 printk(KERN_ERR
"kvm: vmclear fail: %p/%llx\n",
141 static void __vcpu_clear(void *arg
)
143 struct kvm_vcpu
*vcpu
= arg
;
144 int cpu
= raw_smp_processor_id();
146 if (vcpu
->cpu
== cpu
)
147 vmcs_clear(vcpu
->vmcs
);
148 if (per_cpu(current_vmcs
, cpu
) == vcpu
->vmcs
)
149 per_cpu(current_vmcs
, cpu
) = NULL
;
152 static void vcpu_clear(struct kvm_vcpu
*vcpu
)
154 if (vcpu
->cpu
!= raw_smp_processor_id() && vcpu
->cpu
!= -1)
155 smp_call_function_single(vcpu
->cpu
, __vcpu_clear
, vcpu
, 0, 1);
161 static unsigned long vmcs_readl(unsigned long field
)
165 asm volatile (ASM_VMX_VMREAD_RDX_RAX
166 : "=a"(value
) : "d"(field
) : "cc");
170 static u16
vmcs_read16(unsigned long field
)
172 return vmcs_readl(field
);
175 static u32
vmcs_read32(unsigned long field
)
177 return vmcs_readl(field
);
180 static u64
vmcs_read64(unsigned long field
)
183 return vmcs_readl(field
);
185 return vmcs_readl(field
) | ((u64
)vmcs_readl(field
+1) << 32);
189 static noinline
void vmwrite_error(unsigned long field
, unsigned long value
)
191 printk(KERN_ERR
"vmwrite error: reg %lx value %lx (err %d)\n",
192 field
, value
, vmcs_read32(VM_INSTRUCTION_ERROR
));
196 static void vmcs_writel(unsigned long field
, unsigned long value
)
200 asm volatile (ASM_VMX_VMWRITE_RAX_RDX
"; setna %0"
201 : "=q"(error
) : "a"(value
), "d"(field
) : "cc" );
203 vmwrite_error(field
, value
);
206 static void vmcs_write16(unsigned long field
, u16 value
)
208 vmcs_writel(field
, value
);
211 static void vmcs_write32(unsigned long field
, u32 value
)
213 vmcs_writel(field
, value
);
216 static void vmcs_write64(unsigned long field
, u64 value
)
219 vmcs_writel(field
, value
);
221 vmcs_writel(field
, value
);
223 vmcs_writel(field
+1, value
>> 32);
227 static void vmcs_clear_bits(unsigned long field
, u32 mask
)
229 vmcs_writel(field
, vmcs_readl(field
) & ~mask
);
232 static void vmcs_set_bits(unsigned long field
, u32 mask
)
234 vmcs_writel(field
, vmcs_readl(field
) | mask
);
237 static void update_exception_bitmap(struct kvm_vcpu
*vcpu
)
241 eb
= 1u << PF_VECTOR
;
242 if (!vcpu
->fpu_active
)
243 eb
|= 1u << NM_VECTOR
;
244 if (vcpu
->guest_debug
.enabled
)
246 if (vcpu
->rmode
.active
)
248 vmcs_write32(EXCEPTION_BITMAP
, eb
);
251 static void reload_tss(void)
253 #ifndef CONFIG_X86_64
256 * VT restores TR but not its size. Useless.
258 struct descriptor_table gdt
;
259 struct segment_descriptor
*descs
;
262 descs
= (void *)gdt
.base
;
263 descs
[GDT_ENTRY_TSS
].type
= 9; /* available TSS */
268 static void vmx_save_host_state(struct kvm_vcpu
*vcpu
)
270 struct vmx_host_state
*hs
= &vcpu
->vmx_host_state
;
277 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
278 * allow segment selectors with cpl > 0 or ti == 1.
280 hs
->ldt_sel
= read_ldt();
281 hs
->fs_gs_ldt_reload_needed
= hs
->ldt_sel
;
282 hs
->fs_sel
= read_fs();
283 if (!(hs
->fs_sel
& 7))
284 vmcs_write16(HOST_FS_SELECTOR
, hs
->fs_sel
);
286 vmcs_write16(HOST_FS_SELECTOR
, 0);
287 hs
->fs_gs_ldt_reload_needed
= 1;
289 hs
->gs_sel
= read_gs();
290 if (!(hs
->gs_sel
& 7))
291 vmcs_write16(HOST_GS_SELECTOR
, hs
->gs_sel
);
293 vmcs_write16(HOST_GS_SELECTOR
, 0);
294 hs
->fs_gs_ldt_reload_needed
= 1;
298 vmcs_writel(HOST_FS_BASE
, read_msr(MSR_FS_BASE
));
299 vmcs_writel(HOST_GS_BASE
, read_msr(MSR_GS_BASE
));
301 vmcs_writel(HOST_FS_BASE
, segment_base(hs
->fs_sel
));
302 vmcs_writel(HOST_GS_BASE
, segment_base(hs
->gs_sel
));
306 if (is_long_mode(vcpu
)) {
307 save_msrs(vcpu
->host_msrs
+ vcpu
->msr_offset_kernel_gs_base
, 1);
310 load_msrs(vcpu
->guest_msrs
, vcpu
->save_nmsrs
);
313 static void vmx_load_host_state(struct kvm_vcpu
*vcpu
)
315 struct vmx_host_state
*hs
= &vcpu
->vmx_host_state
;
321 if (hs
->fs_gs_ldt_reload_needed
) {
322 load_ldt(hs
->ldt_sel
);
325 * If we have to reload gs, we must take care to
326 * preserve our gs base.
331 wrmsrl(MSR_GS_BASE
, vmcs_readl(HOST_GS_BASE
));
337 save_msrs(vcpu
->guest_msrs
, vcpu
->save_nmsrs
);
338 load_msrs(vcpu
->host_msrs
, vcpu
->save_nmsrs
);
342 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
343 * vcpu mutex is already taken.
345 static void vmx_vcpu_load(struct kvm_vcpu
*vcpu
)
347 u64 phys_addr
= __pa(vcpu
->vmcs
);
352 if (vcpu
->cpu
!= cpu
)
355 if (per_cpu(current_vmcs
, cpu
) != vcpu
->vmcs
) {
358 per_cpu(current_vmcs
, cpu
) = vcpu
->vmcs
;
359 asm volatile (ASM_VMX_VMPTRLD_RAX
"; setna %0"
360 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
363 printk(KERN_ERR
"kvm: vmptrld %p/%llx fail\n",
364 vcpu
->vmcs
, phys_addr
);
367 if (vcpu
->cpu
!= cpu
) {
368 struct descriptor_table dt
;
369 unsigned long sysenter_esp
;
373 * Linux uses per-cpu TSS and GDT, so set these when switching
376 vmcs_writel(HOST_TR_BASE
, read_tr_base()); /* 22.2.4 */
378 vmcs_writel(HOST_GDTR_BASE
, dt
.base
); /* 22.2.4 */
380 rdmsrl(MSR_IA32_SYSENTER_ESP
, sysenter_esp
);
381 vmcs_writel(HOST_IA32_SYSENTER_ESP
, sysenter_esp
); /* 22.2.3 */
385 static void vmx_vcpu_put(struct kvm_vcpu
*vcpu
)
387 vmx_load_host_state(vcpu
);
388 kvm_put_guest_fpu(vcpu
);
392 static void vmx_fpu_activate(struct kvm_vcpu
*vcpu
)
394 if (vcpu
->fpu_active
)
396 vcpu
->fpu_active
= 1;
397 vmcs_clear_bits(GUEST_CR0
, CR0_TS_MASK
);
398 if (vcpu
->cr0
& CR0_TS_MASK
)
399 vmcs_set_bits(GUEST_CR0
, CR0_TS_MASK
);
400 update_exception_bitmap(vcpu
);
403 static void vmx_fpu_deactivate(struct kvm_vcpu
*vcpu
)
405 if (!vcpu
->fpu_active
)
407 vcpu
->fpu_active
= 0;
408 vmcs_set_bits(GUEST_CR0
, CR0_TS_MASK
);
409 update_exception_bitmap(vcpu
);
412 static void vmx_vcpu_decache(struct kvm_vcpu
*vcpu
)
417 static unsigned long vmx_get_rflags(struct kvm_vcpu
*vcpu
)
419 return vmcs_readl(GUEST_RFLAGS
);
422 static void vmx_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
424 vmcs_writel(GUEST_RFLAGS
, rflags
);
427 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
430 u32 interruptibility
;
432 rip
= vmcs_readl(GUEST_RIP
);
433 rip
+= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
434 vmcs_writel(GUEST_RIP
, rip
);
437 * We emulated an instruction, so temporary interrupt blocking
438 * should be removed, if set.
440 interruptibility
= vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
);
441 if (interruptibility
& 3)
442 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
,
443 interruptibility
& ~3);
444 vcpu
->interrupt_window_open
= 1;
447 static void vmx_inject_gp(struct kvm_vcpu
*vcpu
, unsigned error_code
)
449 printk(KERN_DEBUG
"inject_general_protection: rip 0x%lx\n",
450 vmcs_readl(GUEST_RIP
));
451 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, error_code
);
452 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
454 INTR_TYPE_EXCEPTION
|
455 INTR_INFO_DELIEVER_CODE_MASK
|
456 INTR_INFO_VALID_MASK
);
460 * Swap MSR entry in host/guest MSR entry array.
462 void move_msr_up(struct kvm_vcpu
*vcpu
, int from
, int to
)
464 struct vmx_msr_entry tmp
;
465 tmp
= vcpu
->guest_msrs
[to
];
466 vcpu
->guest_msrs
[to
] = vcpu
->guest_msrs
[from
];
467 vcpu
->guest_msrs
[from
] = tmp
;
468 tmp
= vcpu
->host_msrs
[to
];
469 vcpu
->host_msrs
[to
] = vcpu
->host_msrs
[from
];
470 vcpu
->host_msrs
[from
] = tmp
;
474 * Set up the vmcs to automatically save and restore system
475 * msrs. Don't touch the 64-bit msrs if the guest is in legacy
476 * mode, as fiddling with msrs is very expensive.
478 static void setup_msrs(struct kvm_vcpu
*vcpu
)
480 int index
, save_nmsrs
;
484 if (is_long_mode(vcpu
)) {
485 index
= __find_msr_index(vcpu
, MSR_SYSCALL_MASK
);
487 move_msr_up(vcpu
, index
, save_nmsrs
++);
488 index
= __find_msr_index(vcpu
, MSR_LSTAR
);
490 move_msr_up(vcpu
, index
, save_nmsrs
++);
491 index
= __find_msr_index(vcpu
, MSR_CSTAR
);
493 move_msr_up(vcpu
, index
, save_nmsrs
++);
494 index
= __find_msr_index(vcpu
, MSR_KERNEL_GS_BASE
);
496 move_msr_up(vcpu
, index
, save_nmsrs
++);
498 * MSR_K6_STAR is only needed on long mode guests, and only
499 * if efer.sce is enabled.
501 index
= __find_msr_index(vcpu
, MSR_K6_STAR
);
502 if ((index
>= 0) && (vcpu
->shadow_efer
& EFER_SCE
))
503 move_msr_up(vcpu
, index
, save_nmsrs
++);
506 vcpu
->save_nmsrs
= save_nmsrs
;
509 vcpu
->msr_offset_kernel_gs_base
=
510 __find_msr_index(vcpu
, MSR_KERNEL_GS_BASE
);
512 index
= __find_msr_index(vcpu
, MSR_EFER
);
519 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR
,
520 virt_to_phys(vcpu
->guest_msrs
+ index
));
521 vmcs_writel(VM_EXIT_MSR_STORE_ADDR
,
522 virt_to_phys(vcpu
->guest_msrs
+ index
));
523 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR
,
524 virt_to_phys(vcpu
->host_msrs
+ index
));
525 vmcs_write32(VM_EXIT_MSR_STORE_COUNT
, save_nmsrs
);
526 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT
, save_nmsrs
);
527 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT
, save_nmsrs
);
531 * reads and returns guest's timestamp counter "register"
532 * guest_tsc = host_tsc + tsc_offset -- 21.3
534 static u64
guest_read_tsc(void)
536 u64 host_tsc
, tsc_offset
;
539 tsc_offset
= vmcs_read64(TSC_OFFSET
);
540 return host_tsc
+ tsc_offset
;
544 * writes 'guest_tsc' into guest's timestamp counter "register"
545 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
547 static void guest_write_tsc(u64 guest_tsc
)
552 vmcs_write64(TSC_OFFSET
, guest_tsc
- host_tsc
);
556 * Reads an msr value (of 'msr_index') into 'pdata'.
557 * Returns 0 on success, non-0 otherwise.
558 * Assumes vcpu_load() was already called.
560 static int vmx_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
563 struct vmx_msr_entry
*msr
;
566 printk(KERN_ERR
"BUG: get_msr called with NULL pdata\n");
573 data
= vmcs_readl(GUEST_FS_BASE
);
576 data
= vmcs_readl(GUEST_GS_BASE
);
579 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
581 case MSR_IA32_TIME_STAMP_COUNTER
:
582 data
= guest_read_tsc();
584 case MSR_IA32_SYSENTER_CS
:
585 data
= vmcs_read32(GUEST_SYSENTER_CS
);
587 case MSR_IA32_SYSENTER_EIP
:
588 data
= vmcs_readl(GUEST_SYSENTER_EIP
);
590 case MSR_IA32_SYSENTER_ESP
:
591 data
= vmcs_readl(GUEST_SYSENTER_ESP
);
594 msr
= find_msr_entry(vcpu
, msr_index
);
599 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
607 * Writes msr value into into the appropriate "register".
608 * Returns 0 on success, non-0 otherwise.
609 * Assumes vcpu_load() was already called.
611 static int vmx_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
613 struct vmx_msr_entry
*msr
;
617 return kvm_set_msr_common(vcpu
, msr_index
, data
);
619 vmcs_writel(GUEST_FS_BASE
, data
);
622 vmcs_writel(GUEST_GS_BASE
, data
);
625 case MSR_IA32_SYSENTER_CS
:
626 vmcs_write32(GUEST_SYSENTER_CS
, data
);
628 case MSR_IA32_SYSENTER_EIP
:
629 vmcs_writel(GUEST_SYSENTER_EIP
, data
);
631 case MSR_IA32_SYSENTER_ESP
:
632 vmcs_writel(GUEST_SYSENTER_ESP
, data
);
634 case MSR_IA32_TIME_STAMP_COUNTER
:
635 guest_write_tsc(data
);
638 msr
= find_msr_entry(vcpu
, msr_index
);
641 if (vcpu
->vmx_host_state
.loaded
)
642 load_msrs(vcpu
->guest_msrs
,vcpu
->save_nmsrs
);
645 return kvm_set_msr_common(vcpu
, msr_index
, data
);
652 * Sync the rsp and rip registers into the vcpu structure. This allows
653 * registers to be accessed by indexing vcpu->regs.
655 static void vcpu_load_rsp_rip(struct kvm_vcpu
*vcpu
)
657 vcpu
->regs
[VCPU_REGS_RSP
] = vmcs_readl(GUEST_RSP
);
658 vcpu
->rip
= vmcs_readl(GUEST_RIP
);
662 * Syncs rsp and rip back into the vmcs. Should be called after possible
665 static void vcpu_put_rsp_rip(struct kvm_vcpu
*vcpu
)
667 vmcs_writel(GUEST_RSP
, vcpu
->regs
[VCPU_REGS_RSP
]);
668 vmcs_writel(GUEST_RIP
, vcpu
->rip
);
671 static int set_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
673 unsigned long dr7
= 0x400;
676 old_singlestep
= vcpu
->guest_debug
.singlestep
;
678 vcpu
->guest_debug
.enabled
= dbg
->enabled
;
679 if (vcpu
->guest_debug
.enabled
) {
682 dr7
|= 0x200; /* exact */
683 for (i
= 0; i
< 4; ++i
) {
684 if (!dbg
->breakpoints
[i
].enabled
)
686 vcpu
->guest_debug
.bp
[i
] = dbg
->breakpoints
[i
].address
;
687 dr7
|= 2 << (i
*2); /* global enable */
688 dr7
|= 0 << (i
*4+16); /* execution breakpoint */
691 vcpu
->guest_debug
.singlestep
= dbg
->singlestep
;
693 vcpu
->guest_debug
.singlestep
= 0;
695 if (old_singlestep
&& !vcpu
->guest_debug
.singlestep
) {
698 flags
= vmcs_readl(GUEST_RFLAGS
);
699 flags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
700 vmcs_writel(GUEST_RFLAGS
, flags
);
703 update_exception_bitmap(vcpu
);
704 vmcs_writel(GUEST_DR7
, dr7
);
709 static __init
int cpu_has_kvm_support(void)
711 unsigned long ecx
= cpuid_ecx(1);
712 return test_bit(5, &ecx
); /* CPUID.1:ECX.VMX[bit 5] -> VT */
715 static __init
int vmx_disabled_by_bios(void)
719 rdmsrl(MSR_IA32_FEATURE_CONTROL
, msr
);
720 return (msr
& 5) == 1; /* locked but not enabled */
723 static void hardware_enable(void *garbage
)
725 int cpu
= raw_smp_processor_id();
726 u64 phys_addr
= __pa(per_cpu(vmxarea
, cpu
));
729 rdmsrl(MSR_IA32_FEATURE_CONTROL
, old
);
731 /* enable and lock */
732 wrmsrl(MSR_IA32_FEATURE_CONTROL
, old
| 5);
733 write_cr4(read_cr4() | CR4_VMXE
); /* FIXME: not cpu hotplug safe */
734 asm volatile (ASM_VMX_VMXON_RAX
: : "a"(&phys_addr
), "m"(phys_addr
)
738 static void hardware_disable(void *garbage
)
740 asm volatile (ASM_VMX_VMXOFF
: : : "cc");
743 static __init
void setup_vmcs_descriptor(void)
745 u32 vmx_msr_low
, vmx_msr_high
;
747 rdmsr(MSR_IA32_VMX_BASIC
, vmx_msr_low
, vmx_msr_high
);
748 vmcs_descriptor
.size
= vmx_msr_high
& 0x1fff;
749 vmcs_descriptor
.order
= get_order(vmcs_descriptor
.size
);
750 vmcs_descriptor
.revision_id
= vmx_msr_low
;
753 static struct vmcs
*alloc_vmcs_cpu(int cpu
)
755 int node
= cpu_to_node(cpu
);
759 pages
= alloc_pages_node(node
, GFP_KERNEL
, vmcs_descriptor
.order
);
762 vmcs
= page_address(pages
);
763 memset(vmcs
, 0, vmcs_descriptor
.size
);
764 vmcs
->revision_id
= vmcs_descriptor
.revision_id
; /* vmcs revision id */
768 static struct vmcs
*alloc_vmcs(void)
770 return alloc_vmcs_cpu(raw_smp_processor_id());
773 static void free_vmcs(struct vmcs
*vmcs
)
775 free_pages((unsigned long)vmcs
, vmcs_descriptor
.order
);
778 static void free_kvm_area(void)
782 for_each_online_cpu(cpu
)
783 free_vmcs(per_cpu(vmxarea
, cpu
));
786 extern struct vmcs
*alloc_vmcs_cpu(int cpu
);
788 static __init
int alloc_kvm_area(void)
792 for_each_online_cpu(cpu
) {
795 vmcs
= alloc_vmcs_cpu(cpu
);
801 per_cpu(vmxarea
, cpu
) = vmcs
;
806 static __init
int hardware_setup(void)
808 setup_vmcs_descriptor();
809 return alloc_kvm_area();
812 static __exit
void hardware_unsetup(void)
817 static void fix_pmode_dataseg(int seg
, struct kvm_save_segment
*save
)
819 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
821 if (vmcs_readl(sf
->base
) == save
->base
&& (save
->base
& AR_S_MASK
)) {
822 vmcs_write16(sf
->selector
, save
->selector
);
823 vmcs_writel(sf
->base
, save
->base
);
824 vmcs_write32(sf
->limit
, save
->limit
);
825 vmcs_write32(sf
->ar_bytes
, save
->ar
);
827 u32 dpl
= (vmcs_read16(sf
->selector
) & SELECTOR_RPL_MASK
)
829 vmcs_write32(sf
->ar_bytes
, 0x93 | dpl
);
833 static void enter_pmode(struct kvm_vcpu
*vcpu
)
837 vcpu
->rmode
.active
= 0;
839 vmcs_writel(GUEST_TR_BASE
, vcpu
->rmode
.tr
.base
);
840 vmcs_write32(GUEST_TR_LIMIT
, vcpu
->rmode
.tr
.limit
);
841 vmcs_write32(GUEST_TR_AR_BYTES
, vcpu
->rmode
.tr
.ar
);
843 flags
= vmcs_readl(GUEST_RFLAGS
);
844 flags
&= ~(IOPL_MASK
| X86_EFLAGS_VM
);
845 flags
|= (vcpu
->rmode
.save_iopl
<< IOPL_SHIFT
);
846 vmcs_writel(GUEST_RFLAGS
, flags
);
848 vmcs_writel(GUEST_CR4
, (vmcs_readl(GUEST_CR4
) & ~CR4_VME_MASK
) |
849 (vmcs_readl(CR4_READ_SHADOW
) & CR4_VME_MASK
));
851 update_exception_bitmap(vcpu
);
853 fix_pmode_dataseg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
854 fix_pmode_dataseg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
855 fix_pmode_dataseg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
856 fix_pmode_dataseg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
858 vmcs_write16(GUEST_SS_SELECTOR
, 0);
859 vmcs_write32(GUEST_SS_AR_BYTES
, 0x93);
861 vmcs_write16(GUEST_CS_SELECTOR
,
862 vmcs_read16(GUEST_CS_SELECTOR
) & ~SELECTOR_RPL_MASK
);
863 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
866 static int rmode_tss_base(struct kvm
* kvm
)
868 gfn_t base_gfn
= kvm
->memslots
[0].base_gfn
+ kvm
->memslots
[0].npages
- 3;
869 return base_gfn
<< PAGE_SHIFT
;
872 static void fix_rmode_seg(int seg
, struct kvm_save_segment
*save
)
874 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
876 save
->selector
= vmcs_read16(sf
->selector
);
877 save
->base
= vmcs_readl(sf
->base
);
878 save
->limit
= vmcs_read32(sf
->limit
);
879 save
->ar
= vmcs_read32(sf
->ar_bytes
);
880 vmcs_write16(sf
->selector
, vmcs_readl(sf
->base
) >> 4);
881 vmcs_write32(sf
->limit
, 0xffff);
882 vmcs_write32(sf
->ar_bytes
, 0xf3);
885 static void enter_rmode(struct kvm_vcpu
*vcpu
)
889 vcpu
->rmode
.active
= 1;
891 vcpu
->rmode
.tr
.base
= vmcs_readl(GUEST_TR_BASE
);
892 vmcs_writel(GUEST_TR_BASE
, rmode_tss_base(vcpu
->kvm
));
894 vcpu
->rmode
.tr
.limit
= vmcs_read32(GUEST_TR_LIMIT
);
895 vmcs_write32(GUEST_TR_LIMIT
, RMODE_TSS_SIZE
- 1);
897 vcpu
->rmode
.tr
.ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
898 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
900 flags
= vmcs_readl(GUEST_RFLAGS
);
901 vcpu
->rmode
.save_iopl
= (flags
& IOPL_MASK
) >> IOPL_SHIFT
;
903 flags
|= IOPL_MASK
| X86_EFLAGS_VM
;
905 vmcs_writel(GUEST_RFLAGS
, flags
);
906 vmcs_writel(GUEST_CR4
, vmcs_readl(GUEST_CR4
) | CR4_VME_MASK
);
907 update_exception_bitmap(vcpu
);
909 vmcs_write16(GUEST_SS_SELECTOR
, vmcs_readl(GUEST_SS_BASE
) >> 4);
910 vmcs_write32(GUEST_SS_LIMIT
, 0xffff);
911 vmcs_write32(GUEST_SS_AR_BYTES
, 0xf3);
913 vmcs_write32(GUEST_CS_AR_BYTES
, 0xf3);
914 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
915 if (vmcs_readl(GUEST_CS_BASE
) == 0xffff0000)
916 vmcs_writel(GUEST_CS_BASE
, 0xf0000);
917 vmcs_write16(GUEST_CS_SELECTOR
, vmcs_readl(GUEST_CS_BASE
) >> 4);
919 fix_rmode_seg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
920 fix_rmode_seg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
921 fix_rmode_seg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
922 fix_rmode_seg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
927 static void enter_lmode(struct kvm_vcpu
*vcpu
)
931 guest_tr_ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
932 if ((guest_tr_ar
& AR_TYPE_MASK
) != AR_TYPE_BUSY_64_TSS
) {
933 printk(KERN_DEBUG
"%s: tss fixup for long mode. \n",
935 vmcs_write32(GUEST_TR_AR_BYTES
,
936 (guest_tr_ar
& ~AR_TYPE_MASK
)
937 | AR_TYPE_BUSY_64_TSS
);
940 vcpu
->shadow_efer
|= EFER_LMA
;
942 find_msr_entry(vcpu
, MSR_EFER
)->data
|= EFER_LMA
| EFER_LME
;
943 vmcs_write32(VM_ENTRY_CONTROLS
,
944 vmcs_read32(VM_ENTRY_CONTROLS
)
945 | VM_ENTRY_CONTROLS_IA32E_MASK
);
948 static void exit_lmode(struct kvm_vcpu
*vcpu
)
950 vcpu
->shadow_efer
&= ~EFER_LMA
;
952 vmcs_write32(VM_ENTRY_CONTROLS
,
953 vmcs_read32(VM_ENTRY_CONTROLS
)
954 & ~VM_ENTRY_CONTROLS_IA32E_MASK
);
959 static void vmx_decache_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
961 vcpu
->cr4
&= KVM_GUEST_CR4_MASK
;
962 vcpu
->cr4
|= vmcs_readl(GUEST_CR4
) & ~KVM_GUEST_CR4_MASK
;
965 static void vmx_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
967 vmx_fpu_deactivate(vcpu
);
969 if (vcpu
->rmode
.active
&& (cr0
& CR0_PE_MASK
))
972 if (!vcpu
->rmode
.active
&& !(cr0
& CR0_PE_MASK
))
976 if (vcpu
->shadow_efer
& EFER_LME
) {
977 if (!is_paging(vcpu
) && (cr0
& CR0_PG_MASK
))
979 if (is_paging(vcpu
) && !(cr0
& CR0_PG_MASK
))
984 vmcs_writel(CR0_READ_SHADOW
, cr0
);
985 vmcs_writel(GUEST_CR0
,
986 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
989 if (!(cr0
& CR0_TS_MASK
) || !(cr0
& CR0_PE_MASK
))
990 vmx_fpu_activate(vcpu
);
993 static void vmx_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
995 vmcs_writel(GUEST_CR3
, cr3
);
996 if (vcpu
->cr0
& CR0_PE_MASK
)
997 vmx_fpu_deactivate(vcpu
);
1000 static void vmx_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
1002 vmcs_writel(CR4_READ_SHADOW
, cr4
);
1003 vmcs_writel(GUEST_CR4
, cr4
| (vcpu
->rmode
.active
?
1004 KVM_RMODE_VM_CR4_ALWAYS_ON
: KVM_PMODE_VM_CR4_ALWAYS_ON
));
1008 #ifdef CONFIG_X86_64
1010 static void vmx_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
1012 struct vmx_msr_entry
*msr
= find_msr_entry(vcpu
, MSR_EFER
);
1014 vcpu
->shadow_efer
= efer
;
1015 if (efer
& EFER_LMA
) {
1016 vmcs_write32(VM_ENTRY_CONTROLS
,
1017 vmcs_read32(VM_ENTRY_CONTROLS
) |
1018 VM_ENTRY_CONTROLS_IA32E_MASK
);
1022 vmcs_write32(VM_ENTRY_CONTROLS
,
1023 vmcs_read32(VM_ENTRY_CONTROLS
) &
1024 ~VM_ENTRY_CONTROLS_IA32E_MASK
);
1026 msr
->data
= efer
& ~EFER_LME
;
1033 static u64
vmx_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
1035 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1037 return vmcs_readl(sf
->base
);
1040 static void vmx_get_segment(struct kvm_vcpu
*vcpu
,
1041 struct kvm_segment
*var
, int seg
)
1043 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1046 var
->base
= vmcs_readl(sf
->base
);
1047 var
->limit
= vmcs_read32(sf
->limit
);
1048 var
->selector
= vmcs_read16(sf
->selector
);
1049 ar
= vmcs_read32(sf
->ar_bytes
);
1050 if (ar
& AR_UNUSABLE_MASK
)
1052 var
->type
= ar
& 15;
1053 var
->s
= (ar
>> 4) & 1;
1054 var
->dpl
= (ar
>> 5) & 3;
1055 var
->present
= (ar
>> 7) & 1;
1056 var
->avl
= (ar
>> 12) & 1;
1057 var
->l
= (ar
>> 13) & 1;
1058 var
->db
= (ar
>> 14) & 1;
1059 var
->g
= (ar
>> 15) & 1;
1060 var
->unusable
= (ar
>> 16) & 1;
1063 static u32
vmx_segment_access_rights(struct kvm_segment
*var
)
1070 ar
= var
->type
& 15;
1071 ar
|= (var
->s
& 1) << 4;
1072 ar
|= (var
->dpl
& 3) << 5;
1073 ar
|= (var
->present
& 1) << 7;
1074 ar
|= (var
->avl
& 1) << 12;
1075 ar
|= (var
->l
& 1) << 13;
1076 ar
|= (var
->db
& 1) << 14;
1077 ar
|= (var
->g
& 1) << 15;
1079 if (ar
== 0) /* a 0 value means unusable */
1080 ar
= AR_UNUSABLE_MASK
;
1085 static void vmx_set_segment(struct kvm_vcpu
*vcpu
,
1086 struct kvm_segment
*var
, int seg
)
1088 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1091 if (vcpu
->rmode
.active
&& seg
== VCPU_SREG_TR
) {
1092 vcpu
->rmode
.tr
.selector
= var
->selector
;
1093 vcpu
->rmode
.tr
.base
= var
->base
;
1094 vcpu
->rmode
.tr
.limit
= var
->limit
;
1095 vcpu
->rmode
.tr
.ar
= vmx_segment_access_rights(var
);
1098 vmcs_writel(sf
->base
, var
->base
);
1099 vmcs_write32(sf
->limit
, var
->limit
);
1100 vmcs_write16(sf
->selector
, var
->selector
);
1101 if (vcpu
->rmode
.active
&& var
->s
) {
1103 * Hack real-mode segments into vm86 compatibility.
1105 if (var
->base
== 0xffff0000 && var
->selector
== 0xf000)
1106 vmcs_writel(sf
->base
, 0xf0000);
1109 ar
= vmx_segment_access_rights(var
);
1110 vmcs_write32(sf
->ar_bytes
, ar
);
1113 static void vmx_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
1115 u32 ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1117 *db
= (ar
>> 14) & 1;
1118 *l
= (ar
>> 13) & 1;
1121 static void vmx_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1123 dt
->limit
= vmcs_read32(GUEST_IDTR_LIMIT
);
1124 dt
->base
= vmcs_readl(GUEST_IDTR_BASE
);
1127 static void vmx_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1129 vmcs_write32(GUEST_IDTR_LIMIT
, dt
->limit
);
1130 vmcs_writel(GUEST_IDTR_BASE
, dt
->base
);
1133 static void vmx_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1135 dt
->limit
= vmcs_read32(GUEST_GDTR_LIMIT
);
1136 dt
->base
= vmcs_readl(GUEST_GDTR_BASE
);
1139 static void vmx_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
1141 vmcs_write32(GUEST_GDTR_LIMIT
, dt
->limit
);
1142 vmcs_writel(GUEST_GDTR_BASE
, dt
->base
);
1145 static int init_rmode_tss(struct kvm
* kvm
)
1147 struct page
*p1
, *p2
, *p3
;
1148 gfn_t fn
= rmode_tss_base(kvm
) >> PAGE_SHIFT
;
1151 p1
= gfn_to_page(kvm
, fn
++);
1152 p2
= gfn_to_page(kvm
, fn
++);
1153 p3
= gfn_to_page(kvm
, fn
);
1155 if (!p1
|| !p2
|| !p3
) {
1156 kvm_printf(kvm
,"%s: gfn_to_page failed\n", __FUNCTION__
);
1160 page
= kmap_atomic(p1
, KM_USER0
);
1161 memset(page
, 0, PAGE_SIZE
);
1162 *(u16
*)(page
+ 0x66) = TSS_BASE_SIZE
+ TSS_REDIRECTION_SIZE
;
1163 kunmap_atomic(page
, KM_USER0
);
1165 page
= kmap_atomic(p2
, KM_USER0
);
1166 memset(page
, 0, PAGE_SIZE
);
1167 kunmap_atomic(page
, KM_USER0
);
1169 page
= kmap_atomic(p3
, KM_USER0
);
1170 memset(page
, 0, PAGE_SIZE
);
1171 *(page
+ RMODE_TSS_SIZE
- 2 * PAGE_SIZE
- 1) = ~0;
1172 kunmap_atomic(page
, KM_USER0
);
1177 static void vmcs_write32_fixedbits(u32 msr
, u32 vmcs_field
, u32 val
)
1179 u32 msr_high
, msr_low
;
1181 rdmsr(msr
, msr_low
, msr_high
);
1185 vmcs_write32(vmcs_field
, val
);
1188 static void seg_setup(int seg
)
1190 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
1192 vmcs_write16(sf
->selector
, 0);
1193 vmcs_writel(sf
->base
, 0);
1194 vmcs_write32(sf
->limit
, 0xffff);
1195 vmcs_write32(sf
->ar_bytes
, 0x93);
1199 * Sets up the vmcs for emulated real mode.
1201 static int vmx_vcpu_setup(struct kvm_vcpu
*vcpu
)
1203 u32 host_sysenter_cs
;
1206 struct descriptor_table dt
;
1209 unsigned long kvm_vmx_return
;
1211 if (!init_rmode_tss(vcpu
->kvm
)) {
1216 memset(vcpu
->regs
, 0, sizeof(vcpu
->regs
));
1217 vcpu
->regs
[VCPU_REGS_RDX
] = get_rdx_init_val();
1219 vcpu
->apic_base
= 0xfee00000 |
1220 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP
|
1221 MSR_IA32_APICBASE_ENABLE
;
1226 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1227 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1229 vmcs_write16(GUEST_CS_SELECTOR
, 0xf000);
1230 vmcs_writel(GUEST_CS_BASE
, 0x000f0000);
1231 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1232 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1234 seg_setup(VCPU_SREG_DS
);
1235 seg_setup(VCPU_SREG_ES
);
1236 seg_setup(VCPU_SREG_FS
);
1237 seg_setup(VCPU_SREG_GS
);
1238 seg_setup(VCPU_SREG_SS
);
1240 vmcs_write16(GUEST_TR_SELECTOR
, 0);
1241 vmcs_writel(GUEST_TR_BASE
, 0);
1242 vmcs_write32(GUEST_TR_LIMIT
, 0xffff);
1243 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1245 vmcs_write16(GUEST_LDTR_SELECTOR
, 0);
1246 vmcs_writel(GUEST_LDTR_BASE
, 0);
1247 vmcs_write32(GUEST_LDTR_LIMIT
, 0xffff);
1248 vmcs_write32(GUEST_LDTR_AR_BYTES
, 0x00082);
1250 vmcs_write32(GUEST_SYSENTER_CS
, 0);
1251 vmcs_writel(GUEST_SYSENTER_ESP
, 0);
1252 vmcs_writel(GUEST_SYSENTER_EIP
, 0);
1254 vmcs_writel(GUEST_RFLAGS
, 0x02);
1255 vmcs_writel(GUEST_RIP
, 0xfff0);
1256 vmcs_writel(GUEST_RSP
, 0);
1258 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1259 vmcs_writel(GUEST_DR7
, 0x400);
1261 vmcs_writel(GUEST_GDTR_BASE
, 0);
1262 vmcs_write32(GUEST_GDTR_LIMIT
, 0xffff);
1264 vmcs_writel(GUEST_IDTR_BASE
, 0);
1265 vmcs_write32(GUEST_IDTR_LIMIT
, 0xffff);
1267 vmcs_write32(GUEST_ACTIVITY_STATE
, 0);
1268 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
, 0);
1269 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS
, 0);
1272 vmcs_write64(IO_BITMAP_A
, page_to_phys(vmx_io_bitmap_a
));
1273 vmcs_write64(IO_BITMAP_B
, page_to_phys(vmx_io_bitmap_b
));
1277 vmcs_write64(VMCS_LINK_POINTER
, -1ull); /* 22.3.1.5 */
1279 /* Special registers */
1280 vmcs_write64(GUEST_IA32_DEBUGCTL
, 0);
1283 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS
,
1284 PIN_BASED_VM_EXEC_CONTROL
,
1285 PIN_BASED_EXT_INTR_MASK
/* 20.6.1 */
1286 | PIN_BASED_NMI_EXITING
/* 20.6.1 */
1288 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS
,
1289 CPU_BASED_VM_EXEC_CONTROL
,
1290 CPU_BASED_HLT_EXITING
/* 20.6.2 */
1291 | CPU_BASED_CR8_LOAD_EXITING
/* 20.6.2 */
1292 | CPU_BASED_CR8_STORE_EXITING
/* 20.6.2 */
1293 | CPU_BASED_ACTIVATE_IO_BITMAP
/* 20.6.2 */
1294 | CPU_BASED_MOV_DR_EXITING
1295 | CPU_BASED_USE_TSC_OFFSETING
/* 21.3 */
1298 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK
, 0);
1299 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH
, 0);
1300 vmcs_write32(CR3_TARGET_COUNT
, 0); /* 22.2.1 */
1302 vmcs_writel(HOST_CR0
, read_cr0()); /* 22.2.3 */
1303 vmcs_writel(HOST_CR4
, read_cr4()); /* 22.2.3, 22.2.5 */
1304 vmcs_writel(HOST_CR3
, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1306 vmcs_write16(HOST_CS_SELECTOR
, __KERNEL_CS
); /* 22.2.4 */
1307 vmcs_write16(HOST_DS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1308 vmcs_write16(HOST_ES_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1309 vmcs_write16(HOST_FS_SELECTOR
, read_fs()); /* 22.2.4 */
1310 vmcs_write16(HOST_GS_SELECTOR
, read_gs()); /* 22.2.4 */
1311 vmcs_write16(HOST_SS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1312 #ifdef CONFIG_X86_64
1313 rdmsrl(MSR_FS_BASE
, a
);
1314 vmcs_writel(HOST_FS_BASE
, a
); /* 22.2.4 */
1315 rdmsrl(MSR_GS_BASE
, a
);
1316 vmcs_writel(HOST_GS_BASE
, a
); /* 22.2.4 */
1318 vmcs_writel(HOST_FS_BASE
, 0); /* 22.2.4 */
1319 vmcs_writel(HOST_GS_BASE
, 0); /* 22.2.4 */
1322 vmcs_write16(HOST_TR_SELECTOR
, GDT_ENTRY_TSS
*8); /* 22.2.4 */
1325 vmcs_writel(HOST_IDTR_BASE
, dt
.base
); /* 22.2.4 */
1327 asm ("mov $.Lkvm_vmx_return, %0" : "=r"(kvm_vmx_return
));
1328 vmcs_writel(HOST_RIP
, kvm_vmx_return
); /* 22.2.5 */
1330 rdmsr(MSR_IA32_SYSENTER_CS
, host_sysenter_cs
, junk
);
1331 vmcs_write32(HOST_IA32_SYSENTER_CS
, host_sysenter_cs
);
1332 rdmsrl(MSR_IA32_SYSENTER_ESP
, a
);
1333 vmcs_writel(HOST_IA32_SYSENTER_ESP
, a
); /* 22.2.3 */
1334 rdmsrl(MSR_IA32_SYSENTER_EIP
, a
);
1335 vmcs_writel(HOST_IA32_SYSENTER_EIP
, a
); /* 22.2.3 */
1337 for (i
= 0; i
< NR_VMX_MSR
; ++i
) {
1338 u32 index
= vmx_msr_index
[i
];
1339 u32 data_low
, data_high
;
1341 int j
= vcpu
->nmsrs
;
1343 if (rdmsr_safe(index
, &data_low
, &data_high
) < 0)
1345 if (wrmsr_safe(index
, data_low
, data_high
) < 0)
1347 data
= data_low
| ((u64
)data_high
<< 32);
1348 vcpu
->host_msrs
[j
].index
= index
;
1349 vcpu
->host_msrs
[j
].reserved
= 0;
1350 vcpu
->host_msrs
[j
].data
= data
;
1351 vcpu
->guest_msrs
[j
] = vcpu
->host_msrs
[j
];
1357 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS
, VM_EXIT_CONTROLS
,
1358 (HOST_IS_64
<< 9)); /* 22.2,1, 20.7.1 */
1360 /* 22.2.1, 20.8.1 */
1361 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS
,
1362 VM_ENTRY_CONTROLS
, 0);
1363 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, 0); /* 22.2.1 */
1365 #ifdef CONFIG_X86_64
1366 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR
, 0);
1367 vmcs_writel(TPR_THRESHOLD
, 0);
1370 vmcs_writel(CR0_GUEST_HOST_MASK
, ~0UL);
1371 vmcs_writel(CR4_GUEST_HOST_MASK
, KVM_GUEST_CR4_MASK
);
1373 vcpu
->cr0
= 0x60000010;
1374 vmx_set_cr0(vcpu
, vcpu
->cr0
); // enter rmode
1375 vmx_set_cr4(vcpu
, 0);
1376 #ifdef CONFIG_X86_64
1377 vmx_set_efer(vcpu
, 0);
1379 vmx_fpu_activate(vcpu
);
1380 update_exception_bitmap(vcpu
);
1388 static void inject_rmode_irq(struct kvm_vcpu
*vcpu
, int irq
)
1393 unsigned long flags
;
1394 unsigned long ss_base
= vmcs_readl(GUEST_SS_BASE
);
1395 u16 sp
= vmcs_readl(GUEST_RSP
);
1396 u32 ss_limit
= vmcs_read32(GUEST_SS_LIMIT
);
1398 if (sp
> ss_limit
|| sp
< 6 ) {
1399 vcpu_printf(vcpu
, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1401 vmcs_readl(GUEST_RSP
),
1402 vmcs_readl(GUEST_SS_BASE
),
1403 vmcs_read32(GUEST_SS_LIMIT
));
1407 if (kvm_read_guest(vcpu
, irq
* sizeof(ent
), sizeof(ent
), &ent
) !=
1409 vcpu_printf(vcpu
, "%s: read guest err\n", __FUNCTION__
);
1413 flags
= vmcs_readl(GUEST_RFLAGS
);
1414 cs
= vmcs_readl(GUEST_CS_BASE
) >> 4;
1415 ip
= vmcs_readl(GUEST_RIP
);
1418 if (kvm_write_guest(vcpu
, ss_base
+ sp
- 2, 2, &flags
) != 2 ||
1419 kvm_write_guest(vcpu
, ss_base
+ sp
- 4, 2, &cs
) != 2 ||
1420 kvm_write_guest(vcpu
, ss_base
+ sp
- 6, 2, &ip
) != 2) {
1421 vcpu_printf(vcpu
, "%s: write guest err\n", __FUNCTION__
);
1425 vmcs_writel(GUEST_RFLAGS
, flags
&
1426 ~( X86_EFLAGS_IF
| X86_EFLAGS_AC
| X86_EFLAGS_TF
));
1427 vmcs_write16(GUEST_CS_SELECTOR
, ent
[1]) ;
1428 vmcs_writel(GUEST_CS_BASE
, ent
[1] << 4);
1429 vmcs_writel(GUEST_RIP
, ent
[0]);
1430 vmcs_writel(GUEST_RSP
, (vmcs_readl(GUEST_RSP
) & ~0xffff) | (sp
- 6));
1433 static void kvm_do_inject_irq(struct kvm_vcpu
*vcpu
)
1435 int word_index
= __ffs(vcpu
->irq_summary
);
1436 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
1437 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1439 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
1440 if (!vcpu
->irq_pending
[word_index
])
1441 clear_bit(word_index
, &vcpu
->irq_summary
);
1443 if (vcpu
->rmode
.active
) {
1444 inject_rmode_irq(vcpu
, irq
);
1447 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1448 irq
| INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
1452 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1453 struct kvm_run
*kvm_run
)
1455 u32 cpu_based_vm_exec_control
;
1457 vcpu
->interrupt_window_open
=
1458 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
1459 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
1461 if (vcpu
->interrupt_window_open
&&
1462 vcpu
->irq_summary
&&
1463 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
) & INTR_INFO_VALID_MASK
))
1465 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1467 kvm_do_inject_irq(vcpu
);
1469 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
1470 if (!vcpu
->interrupt_window_open
&&
1471 (vcpu
->irq_summary
|| kvm_run
->request_interrupt_window
))
1473 * Interrupts blocked. Wait for unblock.
1475 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
1477 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
1478 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
1481 static void kvm_guest_debug_pre(struct kvm_vcpu
*vcpu
)
1483 struct kvm_guest_debug
*dbg
= &vcpu
->guest_debug
;
1485 set_debugreg(dbg
->bp
[0], 0);
1486 set_debugreg(dbg
->bp
[1], 1);
1487 set_debugreg(dbg
->bp
[2], 2);
1488 set_debugreg(dbg
->bp
[3], 3);
1490 if (dbg
->singlestep
) {
1491 unsigned long flags
;
1493 flags
= vmcs_readl(GUEST_RFLAGS
);
1494 flags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
1495 vmcs_writel(GUEST_RFLAGS
, flags
);
1499 static int handle_rmode_exception(struct kvm_vcpu
*vcpu
,
1500 int vec
, u32 err_code
)
1502 if (!vcpu
->rmode
.active
)
1506 * Instruction with address size override prefix opcode 0x67
1507 * Cause the #SS fault with 0 error code in VM86 mode.
1509 if (((vec
== GP_VECTOR
) || (vec
== SS_VECTOR
)) && err_code
== 0)
1510 if (emulate_instruction(vcpu
, NULL
, 0, 0) == EMULATE_DONE
)
1515 static int handle_exception(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1517 u32 intr_info
, error_code
;
1518 unsigned long cr2
, rip
;
1520 enum emulation_result er
;
1523 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1524 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
1526 if ((vect_info
& VECTORING_INFO_VALID_MASK
) &&
1527 !is_page_fault(intr_info
)) {
1528 printk(KERN_ERR
"%s: unexpected, vectoring info 0x%x "
1529 "intr info 0x%x\n", __FUNCTION__
, vect_info
, intr_info
);
1532 if (is_external_interrupt(vect_info
)) {
1533 int irq
= vect_info
& VECTORING_INFO_VECTOR_MASK
;
1534 set_bit(irq
, vcpu
->irq_pending
);
1535 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->irq_summary
);
1538 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) { /* nmi */
1543 if (is_no_device(intr_info
)) {
1544 vmx_fpu_activate(vcpu
);
1549 rip
= vmcs_readl(GUEST_RIP
);
1550 if (intr_info
& INTR_INFO_DELIEVER_CODE_MASK
)
1551 error_code
= vmcs_read32(VM_EXIT_INTR_ERROR_CODE
);
1552 if (is_page_fault(intr_info
)) {
1553 cr2
= vmcs_readl(EXIT_QUALIFICATION
);
1555 spin_lock(&vcpu
->kvm
->lock
);
1556 r
= kvm_mmu_page_fault(vcpu
, cr2
, error_code
);
1558 spin_unlock(&vcpu
->kvm
->lock
);
1562 spin_unlock(&vcpu
->kvm
->lock
);
1566 er
= emulate_instruction(vcpu
, kvm_run
, cr2
, error_code
);
1567 spin_unlock(&vcpu
->kvm
->lock
);
1572 case EMULATE_DO_MMIO
:
1573 ++vcpu
->stat
.mmio_exits
;
1574 kvm_run
->exit_reason
= KVM_EXIT_MMIO
;
1577 vcpu_printf(vcpu
, "%s: emulate fail\n", __FUNCTION__
);
1584 if (vcpu
->rmode
.active
&&
1585 handle_rmode_exception(vcpu
, intr_info
& INTR_INFO_VECTOR_MASK
,
1589 if ((intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
)) == (INTR_TYPE_EXCEPTION
| 1)) {
1590 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
1593 kvm_run
->exit_reason
= KVM_EXIT_EXCEPTION
;
1594 kvm_run
->ex
.exception
= intr_info
& INTR_INFO_VECTOR_MASK
;
1595 kvm_run
->ex
.error_code
= error_code
;
1599 static int handle_external_interrupt(struct kvm_vcpu
*vcpu
,
1600 struct kvm_run
*kvm_run
)
1602 ++vcpu
->stat
.irq_exits
;
1606 static int handle_triple_fault(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1608 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
1612 static int get_io_count(struct kvm_vcpu
*vcpu
, unsigned long *count
)
1619 if ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_VM
)) {
1622 u32 cs_ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1624 countr_size
= (cs_ar
& AR_L_MASK
) ? 8:
1625 (cs_ar
& AR_DB_MASK
) ? 4: 2;
1628 rip
= vmcs_readl(GUEST_RIP
);
1629 if (countr_size
!= 8)
1630 rip
+= vmcs_readl(GUEST_CS_BASE
);
1632 n
= kvm_read_guest(vcpu
, rip
, sizeof(inst
), &inst
);
1634 for (i
= 0; i
< n
; i
++) {
1635 switch (((u8
*)&inst
)[i
]) {
1648 countr_size
= (countr_size
== 2) ? 4: (countr_size
>> 1);
1656 *count
= vcpu
->regs
[VCPU_REGS_RCX
] & (~0ULL >> (64 - countr_size
));
1657 //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
1661 static int handle_io(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1663 u64 exit_qualification
;
1664 int size
, down
, in
, string
, rep
;
1666 unsigned long count
;
1669 ++vcpu
->stat
.io_exits
;
1670 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1671 in
= (exit_qualification
& 8) != 0;
1672 size
= (exit_qualification
& 7) + 1;
1673 string
= (exit_qualification
& 16) != 0;
1674 down
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_DF
) != 0;
1676 rep
= (exit_qualification
& 32) != 0;
1677 port
= exit_qualification
>> 16;
1680 if (rep
&& !get_io_count(vcpu
, &count
))
1682 address
= vmcs_readl(GUEST_LINEAR_ADDRESS
);
1684 return kvm_setup_pio(vcpu
, kvm_run
, in
, size
, count
, string
, down
,
1685 address
, rep
, port
);
1689 vmx_patch_hypercall(struct kvm_vcpu
*vcpu
, unsigned char *hypercall
)
1692 * Patch in the VMCALL instruction:
1694 hypercall
[0] = 0x0f;
1695 hypercall
[1] = 0x01;
1696 hypercall
[2] = 0xc1;
1697 hypercall
[3] = 0xc3;
1700 static int handle_cr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1702 u64 exit_qualification
;
1706 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1707 cr
= exit_qualification
& 15;
1708 reg
= (exit_qualification
>> 8) & 15;
1709 switch ((exit_qualification
>> 4) & 3) {
1710 case 0: /* mov to cr */
1713 vcpu_load_rsp_rip(vcpu
);
1714 set_cr0(vcpu
, vcpu
->regs
[reg
]);
1715 skip_emulated_instruction(vcpu
);
1718 vcpu_load_rsp_rip(vcpu
);
1719 set_cr3(vcpu
, vcpu
->regs
[reg
]);
1720 skip_emulated_instruction(vcpu
);
1723 vcpu_load_rsp_rip(vcpu
);
1724 set_cr4(vcpu
, vcpu
->regs
[reg
]);
1725 skip_emulated_instruction(vcpu
);
1728 vcpu_load_rsp_rip(vcpu
);
1729 set_cr8(vcpu
, vcpu
->regs
[reg
]);
1730 skip_emulated_instruction(vcpu
);
1735 vcpu_load_rsp_rip(vcpu
);
1736 vmx_fpu_deactivate(vcpu
);
1737 vcpu
->cr0
&= ~CR0_TS_MASK
;
1738 vmcs_writel(CR0_READ_SHADOW
, vcpu
->cr0
);
1739 vmx_fpu_activate(vcpu
);
1740 skip_emulated_instruction(vcpu
);
1742 case 1: /*mov from cr*/
1745 vcpu_load_rsp_rip(vcpu
);
1746 vcpu
->regs
[reg
] = vcpu
->cr3
;
1747 vcpu_put_rsp_rip(vcpu
);
1748 skip_emulated_instruction(vcpu
);
1751 vcpu_load_rsp_rip(vcpu
);
1752 vcpu
->regs
[reg
] = vcpu
->cr8
;
1753 vcpu_put_rsp_rip(vcpu
);
1754 skip_emulated_instruction(vcpu
);
1759 lmsw(vcpu
, (exit_qualification
>> LMSW_SOURCE_DATA_SHIFT
) & 0x0f);
1761 skip_emulated_instruction(vcpu
);
1766 kvm_run
->exit_reason
= 0;
1767 printk(KERN_ERR
"kvm: unhandled control register: op %d cr %d\n",
1768 (int)(exit_qualification
>> 4) & 3, cr
);
1772 static int handle_dr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1774 u64 exit_qualification
;
1779 * FIXME: this code assumes the host is debugging the guest.
1780 * need to deal with guest debugging itself too.
1782 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1783 dr
= exit_qualification
& 7;
1784 reg
= (exit_qualification
>> 8) & 15;
1785 vcpu_load_rsp_rip(vcpu
);
1786 if (exit_qualification
& 16) {
1798 vcpu
->regs
[reg
] = val
;
1802 vcpu_put_rsp_rip(vcpu
);
1803 skip_emulated_instruction(vcpu
);
1807 static int handle_cpuid(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1809 kvm_emulate_cpuid(vcpu
);
1813 static int handle_rdmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1815 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1818 if (vmx_get_msr(vcpu
, ecx
, &data
)) {
1819 vmx_inject_gp(vcpu
, 0);
1823 /* FIXME: handling of bits 32:63 of rax, rdx */
1824 vcpu
->regs
[VCPU_REGS_RAX
] = data
& -1u;
1825 vcpu
->regs
[VCPU_REGS_RDX
] = (data
>> 32) & -1u;
1826 skip_emulated_instruction(vcpu
);
1830 static int handle_wrmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1832 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1833 u64 data
= (vcpu
->regs
[VCPU_REGS_RAX
] & -1u)
1834 | ((u64
)(vcpu
->regs
[VCPU_REGS_RDX
] & -1u) << 32);
1836 if (vmx_set_msr(vcpu
, ecx
, data
) != 0) {
1837 vmx_inject_gp(vcpu
, 0);
1841 skip_emulated_instruction(vcpu
);
1845 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
1846 struct kvm_run
*kvm_run
)
1848 kvm_run
->if_flag
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) != 0;
1849 kvm_run
->cr8
= vcpu
->cr8
;
1850 kvm_run
->apic_base
= vcpu
->apic_base
;
1851 kvm_run
->ready_for_interrupt_injection
= (vcpu
->interrupt_window_open
&&
1852 vcpu
->irq_summary
== 0);
1855 static int handle_interrupt_window(struct kvm_vcpu
*vcpu
,
1856 struct kvm_run
*kvm_run
)
1859 * If the user space waits to inject interrupts, exit as soon as
1862 if (kvm_run
->request_interrupt_window
&&
1863 !vcpu
->irq_summary
) {
1864 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
1865 ++vcpu
->stat
.irq_window_exits
;
1871 static int handle_halt(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1873 skip_emulated_instruction(vcpu
);
1874 if (vcpu
->irq_summary
)
1877 kvm_run
->exit_reason
= KVM_EXIT_HLT
;
1878 ++vcpu
->stat
.halt_exits
;
1882 static int handle_vmcall(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1884 skip_emulated_instruction(vcpu
);
1885 return kvm_hypercall(vcpu
, kvm_run
);
1889 * The exit handlers return 1 if the exit was handled fully and guest execution
1890 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1891 * to be done to userspace and return 0.
1893 static int (*kvm_vmx_exit_handlers
[])(struct kvm_vcpu
*vcpu
,
1894 struct kvm_run
*kvm_run
) = {
1895 [EXIT_REASON_EXCEPTION_NMI
] = handle_exception
,
1896 [EXIT_REASON_EXTERNAL_INTERRUPT
] = handle_external_interrupt
,
1897 [EXIT_REASON_TRIPLE_FAULT
] = handle_triple_fault
,
1898 [EXIT_REASON_IO_INSTRUCTION
] = handle_io
,
1899 [EXIT_REASON_CR_ACCESS
] = handle_cr
,
1900 [EXIT_REASON_DR_ACCESS
] = handle_dr
,
1901 [EXIT_REASON_CPUID
] = handle_cpuid
,
1902 [EXIT_REASON_MSR_READ
] = handle_rdmsr
,
1903 [EXIT_REASON_MSR_WRITE
] = handle_wrmsr
,
1904 [EXIT_REASON_PENDING_INTERRUPT
] = handle_interrupt_window
,
1905 [EXIT_REASON_HLT
] = handle_halt
,
1906 [EXIT_REASON_VMCALL
] = handle_vmcall
,
1909 static const int kvm_vmx_max_exit_handlers
=
1910 sizeof(kvm_vmx_exit_handlers
) / sizeof(*kvm_vmx_exit_handlers
);
1913 * The guest has exited. See if we can fix it or if we need userspace
1916 static int kvm_handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
1918 u32 vectoring_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1919 u32 exit_reason
= vmcs_read32(VM_EXIT_REASON
);
1921 if ( (vectoring_info
& VECTORING_INFO_VALID_MASK
) &&
1922 exit_reason
!= EXIT_REASON_EXCEPTION_NMI
)
1923 printk(KERN_WARNING
"%s: unexpected, valid vectoring info and "
1924 "exit reason is 0x%x\n", __FUNCTION__
, exit_reason
);
1925 if (exit_reason
< kvm_vmx_max_exit_handlers
1926 && kvm_vmx_exit_handlers
[exit_reason
])
1927 return kvm_vmx_exit_handlers
[exit_reason
](vcpu
, kvm_run
);
1929 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1930 kvm_run
->hw
.hardware_exit_reason
= exit_reason
;
1936 * Check if userspace requested an interrupt window, and that the
1937 * interrupt window is open.
1939 * No need to exit to userspace if we already have an interrupt queued.
1941 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
1942 struct kvm_run
*kvm_run
)
1944 return (!vcpu
->irq_summary
&&
1945 kvm_run
->request_interrupt_window
&&
1946 vcpu
->interrupt_window_open
&&
1947 (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
));
1950 static int vmx_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1956 if (!vcpu
->mmio_read_completed
)
1957 do_interrupt_requests(vcpu
, kvm_run
);
1959 if (vcpu
->guest_debug
.enabled
)
1960 kvm_guest_debug_pre(vcpu
);
1963 vmx_save_host_state(vcpu
);
1964 kvm_load_guest_fpu(vcpu
);
1967 * Loading guest fpu may have cleared host cr0.ts
1969 vmcs_writel(HOST_CR0
, read_cr0());
1972 /* Store host registers */
1974 #ifdef CONFIG_X86_64
1975 "push %%rax; push %%rbx; push %%rdx;"
1976 "push %%rsi; push %%rdi; push %%rbp;"
1977 "push %%r8; push %%r9; push %%r10; push %%r11;"
1978 "push %%r12; push %%r13; push %%r14; push %%r15;"
1980 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1982 "pusha; push %%ecx \n\t"
1983 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1985 /* Check if vmlaunch of vmresume is needed */
1987 /* Load guest registers. Don't clobber flags. */
1988 #ifdef CONFIG_X86_64
1989 "mov %c[cr2](%3), %%rax \n\t"
1990 "mov %%rax, %%cr2 \n\t"
1991 "mov %c[rax](%3), %%rax \n\t"
1992 "mov %c[rbx](%3), %%rbx \n\t"
1993 "mov %c[rdx](%3), %%rdx \n\t"
1994 "mov %c[rsi](%3), %%rsi \n\t"
1995 "mov %c[rdi](%3), %%rdi \n\t"
1996 "mov %c[rbp](%3), %%rbp \n\t"
1997 "mov %c[r8](%3), %%r8 \n\t"
1998 "mov %c[r9](%3), %%r9 \n\t"
1999 "mov %c[r10](%3), %%r10 \n\t"
2000 "mov %c[r11](%3), %%r11 \n\t"
2001 "mov %c[r12](%3), %%r12 \n\t"
2002 "mov %c[r13](%3), %%r13 \n\t"
2003 "mov %c[r14](%3), %%r14 \n\t"
2004 "mov %c[r15](%3), %%r15 \n\t"
2005 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
2007 "mov %c[cr2](%3), %%eax \n\t"
2008 "mov %%eax, %%cr2 \n\t"
2009 "mov %c[rax](%3), %%eax \n\t"
2010 "mov %c[rbx](%3), %%ebx \n\t"
2011 "mov %c[rdx](%3), %%edx \n\t"
2012 "mov %c[rsi](%3), %%esi \n\t"
2013 "mov %c[rdi](%3), %%edi \n\t"
2014 "mov %c[rbp](%3), %%ebp \n\t"
2015 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
2017 /* Enter guest mode */
2018 "jne .Llaunched \n\t"
2019 ASM_VMX_VMLAUNCH
"\n\t"
2020 "jmp .Lkvm_vmx_return \n\t"
2021 ".Llaunched: " ASM_VMX_VMRESUME
"\n\t"
2022 ".Lkvm_vmx_return: "
2023 /* Save guest registers, load host registers, keep flags */
2024 #ifdef CONFIG_X86_64
2025 "xchg %3, (%%rsp) \n\t"
2026 "mov %%rax, %c[rax](%3) \n\t"
2027 "mov %%rbx, %c[rbx](%3) \n\t"
2028 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
2029 "mov %%rdx, %c[rdx](%3) \n\t"
2030 "mov %%rsi, %c[rsi](%3) \n\t"
2031 "mov %%rdi, %c[rdi](%3) \n\t"
2032 "mov %%rbp, %c[rbp](%3) \n\t"
2033 "mov %%r8, %c[r8](%3) \n\t"
2034 "mov %%r9, %c[r9](%3) \n\t"
2035 "mov %%r10, %c[r10](%3) \n\t"
2036 "mov %%r11, %c[r11](%3) \n\t"
2037 "mov %%r12, %c[r12](%3) \n\t"
2038 "mov %%r13, %c[r13](%3) \n\t"
2039 "mov %%r14, %c[r14](%3) \n\t"
2040 "mov %%r15, %c[r15](%3) \n\t"
2041 "mov %%cr2, %%rax \n\t"
2042 "mov %%rax, %c[cr2](%3) \n\t"
2043 "mov (%%rsp), %3 \n\t"
2045 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
2046 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
2047 "pop %%rbp; pop %%rdi; pop %%rsi;"
2048 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
2050 "xchg %3, (%%esp) \n\t"
2051 "mov %%eax, %c[rax](%3) \n\t"
2052 "mov %%ebx, %c[rbx](%3) \n\t"
2053 "pushl (%%esp); popl %c[rcx](%3) \n\t"
2054 "mov %%edx, %c[rdx](%3) \n\t"
2055 "mov %%esi, %c[rsi](%3) \n\t"
2056 "mov %%edi, %c[rdi](%3) \n\t"
2057 "mov %%ebp, %c[rbp](%3) \n\t"
2058 "mov %%cr2, %%eax \n\t"
2059 "mov %%eax, %c[cr2](%3) \n\t"
2060 "mov (%%esp), %3 \n\t"
2062 "pop %%ecx; popa \n\t"
2067 : "r"(vcpu
->launched
), "d"((unsigned long)HOST_RSP
),
2069 [rax
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RAX
])),
2070 [rbx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBX
])),
2071 [rcx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RCX
])),
2072 [rdx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDX
])),
2073 [rsi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RSI
])),
2074 [rdi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDI
])),
2075 [rbp
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBP
])),
2076 #ifdef CONFIG_X86_64
2077 [r8
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R8
])),
2078 [r9
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R9
])),
2079 [r10
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R10
])),
2080 [r11
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R11
])),
2081 [r12
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R12
])),
2082 [r13
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R13
])),
2083 [r14
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R14
])),
2084 [r15
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R15
])),
2086 [cr2
]"i"(offsetof(struct kvm_vcpu
, cr2
))
2091 vcpu
->interrupt_window_open
= (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0;
2093 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS
));
2095 if (unlikely(fail
)) {
2096 kvm_run
->exit_reason
= KVM_EXIT_FAIL_ENTRY
;
2097 kvm_run
->fail_entry
.hardware_entry_failure_reason
2098 = vmcs_read32(VM_INSTRUCTION_ERROR
);
2103 * Profile KVM exit RIPs:
2105 if (unlikely(prof_on
== KVM_PROFILING
))
2106 profile_hit(KVM_PROFILING
, (void *)vmcs_readl(GUEST_RIP
));
2109 r
= kvm_handle_exit(kvm_run
, vcpu
);
2111 /* Give scheduler a change to reschedule. */
2112 if (signal_pending(current
)) {
2114 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
2115 ++vcpu
->stat
.signal_exits
;
2119 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
2121 kvm_run
->exit_reason
= KVM_EXIT_INTR
;
2122 ++vcpu
->stat
.request_irq_exits
;
2125 if (!need_resched()) {
2126 ++vcpu
->stat
.light_exits
;
2137 post_kvm_run_save(vcpu
, kvm_run
);
2141 static void vmx_flush_tlb(struct kvm_vcpu
*vcpu
)
2143 vmcs_writel(GUEST_CR3
, vmcs_readl(GUEST_CR3
));
2146 static void vmx_inject_page_fault(struct kvm_vcpu
*vcpu
,
2150 u32 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
2152 ++vcpu
->stat
.pf_guest
;
2154 if (is_page_fault(vect_info
)) {
2155 printk(KERN_DEBUG
"inject_page_fault: "
2156 "double fault 0x%lx @ 0x%lx\n",
2157 addr
, vmcs_readl(GUEST_RIP
));
2158 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, 0);
2159 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2161 INTR_TYPE_EXCEPTION
|
2162 INTR_INFO_DELIEVER_CODE_MASK
|
2163 INTR_INFO_VALID_MASK
);
2167 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, err_code
);
2168 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
2170 INTR_TYPE_EXCEPTION
|
2171 INTR_INFO_DELIEVER_CODE_MASK
|
2172 INTR_INFO_VALID_MASK
);
2176 static void vmx_free_vmcs(struct kvm_vcpu
*vcpu
)
2179 on_each_cpu(__vcpu_clear
, vcpu
, 0, 1);
2180 free_vmcs(vcpu
->vmcs
);
2185 static void vmx_free_vcpu(struct kvm_vcpu
*vcpu
)
2187 vmx_free_vmcs(vcpu
);
2190 static int vmx_create_vcpu(struct kvm_vcpu
*vcpu
)
2194 vcpu
->guest_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2195 if (!vcpu
->guest_msrs
)
2198 vcpu
->host_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
2199 if (!vcpu
->host_msrs
)
2200 goto out_free_guest_msrs
;
2202 vmcs
= alloc_vmcs();
2213 kfree(vcpu
->host_msrs
);
2214 vcpu
->host_msrs
= NULL
;
2216 out_free_guest_msrs
:
2217 kfree(vcpu
->guest_msrs
);
2218 vcpu
->guest_msrs
= NULL
;
2223 static struct kvm_arch_ops vmx_arch_ops
= {
2224 .cpu_has_kvm_support
= cpu_has_kvm_support
,
2225 .disabled_by_bios
= vmx_disabled_by_bios
,
2226 .hardware_setup
= hardware_setup
,
2227 .hardware_unsetup
= hardware_unsetup
,
2228 .hardware_enable
= hardware_enable
,
2229 .hardware_disable
= hardware_disable
,
2231 .vcpu_create
= vmx_create_vcpu
,
2232 .vcpu_free
= vmx_free_vcpu
,
2234 .vcpu_load
= vmx_vcpu_load
,
2235 .vcpu_put
= vmx_vcpu_put
,
2236 .vcpu_decache
= vmx_vcpu_decache
,
2238 .set_guest_debug
= set_guest_debug
,
2239 .get_msr
= vmx_get_msr
,
2240 .set_msr
= vmx_set_msr
,
2241 .get_segment_base
= vmx_get_segment_base
,
2242 .get_segment
= vmx_get_segment
,
2243 .set_segment
= vmx_set_segment
,
2244 .get_cs_db_l_bits
= vmx_get_cs_db_l_bits
,
2245 .decache_cr4_guest_bits
= vmx_decache_cr4_guest_bits
,
2246 .set_cr0
= vmx_set_cr0
,
2247 .set_cr3
= vmx_set_cr3
,
2248 .set_cr4
= vmx_set_cr4
,
2249 #ifdef CONFIG_X86_64
2250 .set_efer
= vmx_set_efer
,
2252 .get_idt
= vmx_get_idt
,
2253 .set_idt
= vmx_set_idt
,
2254 .get_gdt
= vmx_get_gdt
,
2255 .set_gdt
= vmx_set_gdt
,
2256 .cache_regs
= vcpu_load_rsp_rip
,
2257 .decache_regs
= vcpu_put_rsp_rip
,
2258 .get_rflags
= vmx_get_rflags
,
2259 .set_rflags
= vmx_set_rflags
,
2261 .tlb_flush
= vmx_flush_tlb
,
2262 .inject_page_fault
= vmx_inject_page_fault
,
2264 .inject_gp
= vmx_inject_gp
,
2266 .run
= vmx_vcpu_run
,
2267 .skip_emulated_instruction
= skip_emulated_instruction
,
2268 .vcpu_setup
= vmx_vcpu_setup
,
2269 .patch_hypercall
= vmx_patch_hypercall
,
2272 static int __init
vmx_init(void)
2277 vmx_io_bitmap_a
= alloc_page(GFP_KERNEL
| __GFP_HIGHMEM
);
2278 if (!vmx_io_bitmap_a
)
2281 vmx_io_bitmap_b
= alloc_page(GFP_KERNEL
| __GFP_HIGHMEM
);
2282 if (!vmx_io_bitmap_b
) {
2288 * Allow direct access to the PC debug port (it is often used for I/O
2289 * delays, but the vmexits simply slow things down).
2291 iova
= kmap(vmx_io_bitmap_a
);
2292 memset(iova
, 0xff, PAGE_SIZE
);
2293 clear_bit(0x80, iova
);
2294 kunmap(vmx_io_bitmap_a
);
2296 iova
= kmap(vmx_io_bitmap_b
);
2297 memset(iova
, 0xff, PAGE_SIZE
);
2298 kunmap(vmx_io_bitmap_b
);
2300 r
= kvm_init_arch(&vmx_arch_ops
, THIS_MODULE
);
2307 __free_page(vmx_io_bitmap_b
);
2309 __free_page(vmx_io_bitmap_a
);
2313 static void __exit
vmx_exit(void)
2315 __free_page(vmx_io_bitmap_b
);
2316 __free_page(vmx_io_bitmap_a
);
2321 module_init(vmx_init
)
2322 module_exit(vmx_exit
)