lguest: get rid of lg variable assignments
[deliverable/linux.git] / drivers / lguest / x86 / core.c
1 /*
2 * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
3 * Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20 #include <linux/kernel.h>
21 #include <linux/start_kernel.h>
22 #include <linux/string.h>
23 #include <linux/console.h>
24 #include <linux/screen_info.h>
25 #include <linux/irq.h>
26 #include <linux/interrupt.h>
27 #include <linux/clocksource.h>
28 #include <linux/clockchips.h>
29 #include <linux/cpu.h>
30 #include <linux/lguest.h>
31 #include <linux/lguest_launcher.h>
32 #include <asm/paravirt.h>
33 #include <asm/param.h>
34 #include <asm/page.h>
35 #include <asm/pgtable.h>
36 #include <asm/desc.h>
37 #include <asm/setup.h>
38 #include <asm/lguest.h>
39 #include <asm/uaccess.h>
40 #include <asm/i387.h>
41 #include "../lg.h"
42
43 static int cpu_had_pge;
44
45 static struct {
46 unsigned long offset;
47 unsigned short segment;
48 } lguest_entry;
49
50 /* Offset from where switcher.S was compiled to where we've copied it */
51 static unsigned long switcher_offset(void)
52 {
53 return SWITCHER_ADDR - (unsigned long)start_switcher_text;
54 }
55
56 /* This cpu's struct lguest_pages. */
57 static struct lguest_pages *lguest_pages(unsigned int cpu)
58 {
59 return &(((struct lguest_pages *)
60 (SWITCHER_ADDR + SHARED_SWITCHER_PAGES*PAGE_SIZE))[cpu]);
61 }
62
63 static DEFINE_PER_CPU(struct lg_cpu *, last_cpu);
64
65 /*S:010
66 * We approach the Switcher.
67 *
68 * Remember that each CPU has two pages which are visible to the Guest when it
69 * runs on that CPU. This has to contain the state for that Guest: we copy the
70 * state in just before we run the Guest.
71 *
72 * Each Guest has "changed" flags which indicate what has changed in the Guest
73 * since it last ran. We saw this set in interrupts_and_traps.c and
74 * segments.c.
75 */
76 static void copy_in_guest_info(struct lg_cpu *cpu, struct lguest_pages *pages)
77 {
78 /* Copying all this data can be quite expensive. We usually run the
79 * same Guest we ran last time (and that Guest hasn't run anywhere else
80 * meanwhile). If that's not the case, we pretend everything in the
81 * Guest has changed. */
82 if (__get_cpu_var(last_cpu) != cpu || cpu->last_pages != pages) {
83 __get_cpu_var(last_cpu) = cpu;
84 cpu->last_pages = pages;
85 cpu->changed = CHANGED_ALL;
86 }
87
88 /* These copies are pretty cheap, so we do them unconditionally: */
89 /* Save the current Host top-level page directory. */
90 pages->state.host_cr3 = __pa(current->mm->pgd);
91 /* Set up the Guest's page tables to see this CPU's pages (and no
92 * other CPU's pages). */
93 map_switcher_in_guest(cpu, pages);
94 /* Set up the two "TSS" members which tell the CPU what stack to use
95 * for traps which do directly into the Guest (ie. traps at privilege
96 * level 1). */
97 pages->state.guest_tss.esp1 = cpu->esp1;
98 pages->state.guest_tss.ss1 = cpu->ss1;
99
100 /* Copy direct-to-Guest trap entries. */
101 if (cpu->changed & CHANGED_IDT)
102 copy_traps(cpu, pages->state.guest_idt, default_idt_entries);
103
104 /* Copy all GDT entries which the Guest can change. */
105 if (cpu->changed & CHANGED_GDT)
106 copy_gdt(cpu, pages->state.guest_gdt);
107 /* If only the TLS entries have changed, copy them. */
108 else if (cpu->changed & CHANGED_GDT_TLS)
109 copy_gdt_tls(cpu, pages->state.guest_gdt);
110
111 /* Mark the Guest as unchanged for next time. */
112 cpu->changed = 0;
113 }
114
115 /* Finally: the code to actually call into the Switcher to run the Guest. */
116 static void run_guest_once(struct lg_cpu *cpu, struct lguest_pages *pages)
117 {
118 /* This is a dummy value we need for GCC's sake. */
119 unsigned int clobber;
120
121 /* Copy the guest-specific information into this CPU's "struct
122 * lguest_pages". */
123 copy_in_guest_info(cpu, pages);
124
125 /* Set the trap number to 256 (impossible value). If we fault while
126 * switching to the Guest (bad segment registers or bug), this will
127 * cause us to abort the Guest. */
128 cpu->regs->trapnum = 256;
129
130 /* Now: we push the "eflags" register on the stack, then do an "lcall".
131 * This is how we change from using the kernel code segment to using
132 * the dedicated lguest code segment, as well as jumping into the
133 * Switcher.
134 *
135 * The lcall also pushes the old code segment (KERNEL_CS) onto the
136 * stack, then the address of this call. This stack layout happens to
137 * exactly match the stack layout created by an interrupt... */
138 asm volatile("pushf; lcall *lguest_entry"
139 /* This is how we tell GCC that %eax ("a") and %ebx ("b")
140 * are changed by this routine. The "=" means output. */
141 : "=a"(clobber), "=b"(clobber)
142 /* %eax contains the pages pointer. ("0" refers to the
143 * 0-th argument above, ie "a"). %ebx contains the
144 * physical address of the Guest's top-level page
145 * directory. */
146 : "0"(pages), "1"(__pa(cpu->lg->pgdirs[cpu->cpu_pgd].pgdir))
147 /* We tell gcc that all these registers could change,
148 * which means we don't have to save and restore them in
149 * the Switcher. */
150 : "memory", "%edx", "%ecx", "%edi", "%esi");
151 }
152 /*:*/
153
154 /*M:002 There are hooks in the scheduler which we can register to tell when we
155 * get kicked off the CPU (preempt_notifier_register()). This would allow us
156 * to lazily disable SYSENTER which would regain some performance, and should
157 * also simplify copy_in_guest_info(). Note that we'd still need to restore
158 * things when we exit to Launcher userspace, but that's fairly easy.
159 *
160 * The hooks were designed for KVM, but we can also put them to good use. :*/
161
162 /*H:040 This is the i386-specific code to setup and run the Guest. Interrupts
163 * are disabled: we own the CPU. */
164 void lguest_arch_run_guest(struct lg_cpu *cpu)
165 {
166 /* Remember the awfully-named TS bit? If the Guest has asked to set it
167 * we set it now, so we can trap and pass that trap to the Guest if it
168 * uses the FPU. */
169 if (cpu->ts)
170 lguest_set_ts();
171
172 /* SYSENTER is an optimized way of doing system calls. We can't allow
173 * it because it always jumps to privilege level 0. A normal Guest
174 * won't try it because we don't advertise it in CPUID, but a malicious
175 * Guest (or malicious Guest userspace program) could, so we tell the
176 * CPU to disable it before running the Guest. */
177 if (boot_cpu_has(X86_FEATURE_SEP))
178 wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
179
180 /* Now we actually run the Guest. It will return when something
181 * interesting happens, and we can examine its registers to see what it
182 * was doing. */
183 run_guest_once(cpu, lguest_pages(raw_smp_processor_id()));
184
185 /* Note that the "regs" pointer contains two extra entries which are
186 * not really registers: a trap number which says what interrupt or
187 * trap made the switcher code come back, and an error code which some
188 * traps set. */
189
190 /* If the Guest page faulted, then the cr2 register will tell us the
191 * bad virtual address. We have to grab this now, because once we
192 * re-enable interrupts an interrupt could fault and thus overwrite
193 * cr2, or we could even move off to a different CPU. */
194 if (cpu->regs->trapnum == 14)
195 cpu->arch.last_pagefault = read_cr2();
196 /* Similarly, if we took a trap because the Guest used the FPU,
197 * we have to restore the FPU it expects to see. */
198 else if (cpu->regs->trapnum == 7)
199 math_state_restore();
200
201 /* Restore SYSENTER if it's supposed to be on. */
202 if (boot_cpu_has(X86_FEATURE_SEP))
203 wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
204 }
205
206 /*H:130 Now we've examined the hypercall code; our Guest can make requests.
207 * Our Guest is usually so well behaved; it never tries to do things it isn't
208 * allowed to, and uses hypercalls instead. Unfortunately, Linux's paravirtual
209 * infrastructure isn't quite complete, because it doesn't contain replacements
210 * for the Intel I/O instructions. As a result, the Guest sometimes fumbles
211 * across one during the boot process as it probes for various things which are
212 * usually attached to a PC.
213 *
214 * When the Guest uses one of these instructions, we get a trap (General
215 * Protection Fault) and come here. We see if it's one of those troublesome
216 * instructions and skip over it. We return true if we did. */
217 static int emulate_insn(struct lg_cpu *cpu)
218 {
219 u8 insn;
220 unsigned int insnlen = 0, in = 0, shift = 0;
221 /* The eip contains the *virtual* address of the Guest's instruction:
222 * guest_pa just subtracts the Guest's page_offset. */
223 unsigned long physaddr = guest_pa(cpu, cpu->regs->eip);
224
225 /* This must be the Guest kernel trying to do something, not userspace!
226 * The bottom two bits of the CS segment register are the privilege
227 * level. */
228 if ((cpu->regs->cs & 3) != GUEST_PL)
229 return 0;
230
231 /* Decoding x86 instructions is icky. */
232 insn = lgread(cpu, physaddr, u8);
233
234 /* 0x66 is an "operand prefix". It means it's using the upper 16 bits
235 of the eax register. */
236 if (insn == 0x66) {
237 shift = 16;
238 /* The instruction is 1 byte so far, read the next byte. */
239 insnlen = 1;
240 insn = lgread(cpu, physaddr + insnlen, u8);
241 }
242
243 /* We can ignore the lower bit for the moment and decode the 4 opcodes
244 * we need to emulate. */
245 switch (insn & 0xFE) {
246 case 0xE4: /* in <next byte>,%al */
247 insnlen += 2;
248 in = 1;
249 break;
250 case 0xEC: /* in (%dx),%al */
251 insnlen += 1;
252 in = 1;
253 break;
254 case 0xE6: /* out %al,<next byte> */
255 insnlen += 2;
256 break;
257 case 0xEE: /* out %al,(%dx) */
258 insnlen += 1;
259 break;
260 default:
261 /* OK, we don't know what this is, can't emulate. */
262 return 0;
263 }
264
265 /* If it was an "IN" instruction, they expect the result to be read
266 * into %eax, so we change %eax. We always return all-ones, which
267 * traditionally means "there's nothing there". */
268 if (in) {
269 /* Lower bit tells is whether it's a 16 or 32 bit access */
270 if (insn & 0x1)
271 cpu->regs->eax = 0xFFFFFFFF;
272 else
273 cpu->regs->eax |= (0xFFFF << shift);
274 }
275 /* Finally, we've "done" the instruction, so move past it. */
276 cpu->regs->eip += insnlen;
277 /* Success! */
278 return 1;
279 }
280
281 /*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
282 void lguest_arch_handle_trap(struct lg_cpu *cpu)
283 {
284 switch (cpu->regs->trapnum) {
285 case 13: /* We've intercepted a General Protection Fault. */
286 /* Check if this was one of those annoying IN or OUT
287 * instructions which we need to emulate. If so, we just go
288 * back into the Guest after we've done it. */
289 if (cpu->regs->errcode == 0) {
290 if (emulate_insn(cpu))
291 return;
292 }
293 break;
294 case 14: /* We've intercepted a Page Fault. */
295 /* The Guest accessed a virtual address that wasn't mapped.
296 * This happens a lot: we don't actually set up most of the
297 * page tables for the Guest at all when we start: as it runs
298 * it asks for more and more, and we set them up as
299 * required. In this case, we don't even tell the Guest that
300 * the fault happened.
301 *
302 * The errcode tells whether this was a read or a write, and
303 * whether kernel or userspace code. */
304 if (demand_page(cpu, cpu->arch.last_pagefault,
305 cpu->regs->errcode))
306 return;
307
308 /* OK, it's really not there (or not OK): the Guest needs to
309 * know. We write out the cr2 value so it knows where the
310 * fault occurred.
311 *
312 * Note that if the Guest were really messed up, this could
313 * happen before it's done the LHCALL_LGUEST_INIT hypercall, so
314 * lg->lguest_data could be NULL */
315 if (cpu->lg->lguest_data &&
316 put_user(cpu->arch.last_pagefault,
317 &cpu->lg->lguest_data->cr2))
318 kill_guest(cpu, "Writing cr2");
319 break;
320 case 7: /* We've intercepted a Device Not Available fault. */
321 /* If the Guest doesn't want to know, we already restored the
322 * Floating Point Unit, so we just continue without telling
323 * it. */
324 if (!cpu->ts)
325 return;
326 break;
327 case 32 ... 255:
328 /* These values mean a real interrupt occurred, in which case
329 * the Host handler has already been run. We just do a
330 * friendly check if another process should now be run, then
331 * return to run the Guest again */
332 cond_resched();
333 return;
334 case LGUEST_TRAP_ENTRY:
335 /* Our 'struct hcall_args' maps directly over our regs: we set
336 * up the pointer now to indicate a hypercall is pending. */
337 cpu->hcall = (struct hcall_args *)cpu->regs;
338 return;
339 }
340
341 /* We didn't handle the trap, so it needs to go to the Guest. */
342 if (!deliver_trap(cpu, cpu->regs->trapnum))
343 /* If the Guest doesn't have a handler (either it hasn't
344 * registered any yet, or it's one of the faults we don't let
345 * it handle), it dies with a cryptic error message. */
346 kill_guest(cpu, "unhandled trap %li at %#lx (%#lx)",
347 cpu->regs->trapnum, cpu->regs->eip,
348 cpu->regs->trapnum == 14 ? cpu->arch.last_pagefault
349 : cpu->regs->errcode);
350 }
351
352 /* Now we can look at each of the routines this calls, in increasing order of
353 * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
354 * deliver_trap() and demand_page(). After all those, we'll be ready to
355 * examine the Switcher, and our philosophical understanding of the Host/Guest
356 * duality will be complete. :*/
357 static void adjust_pge(void *on)
358 {
359 if (on)
360 write_cr4(read_cr4() | X86_CR4_PGE);
361 else
362 write_cr4(read_cr4() & ~X86_CR4_PGE);
363 }
364
365 /*H:020 Now the Switcher is mapped and every thing else is ready, we need to do
366 * some more i386-specific initialization. */
367 void __init lguest_arch_host_init(void)
368 {
369 int i;
370
371 /* Most of the i386/switcher.S doesn't care that it's been moved; on
372 * Intel, jumps are relative, and it doesn't access any references to
373 * external code or data.
374 *
375 * The only exception is the interrupt handlers in switcher.S: their
376 * addresses are placed in a table (default_idt_entries), so we need to
377 * update the table with the new addresses. switcher_offset() is a
378 * convenience function which returns the distance between the builtin
379 * switcher code and the high-mapped copy we just made. */
380 for (i = 0; i < IDT_ENTRIES; i++)
381 default_idt_entries[i] += switcher_offset();
382
383 /*
384 * Set up the Switcher's per-cpu areas.
385 *
386 * Each CPU gets two pages of its own within the high-mapped region
387 * (aka. "struct lguest_pages"). Much of this can be initialized now,
388 * but some depends on what Guest we are running (which is set up in
389 * copy_in_guest_info()).
390 */
391 for_each_possible_cpu(i) {
392 /* lguest_pages() returns this CPU's two pages. */
393 struct lguest_pages *pages = lguest_pages(i);
394 /* This is a convenience pointer to make the code fit one
395 * statement to a line. */
396 struct lguest_ro_state *state = &pages->state;
397
398 /* The Global Descriptor Table: the Host has a different one
399 * for each CPU. We keep a descriptor for the GDT which says
400 * where it is and how big it is (the size is actually the last
401 * byte, not the size, hence the "-1"). */
402 state->host_gdt_desc.size = GDT_SIZE-1;
403 state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
404
405 /* All CPUs on the Host use the same Interrupt Descriptor
406 * Table, so we just use store_idt(), which gets this CPU's IDT
407 * descriptor. */
408 store_idt(&state->host_idt_desc);
409
410 /* The descriptors for the Guest's GDT and IDT can be filled
411 * out now, too. We copy the GDT & IDT into ->guest_gdt and
412 * ->guest_idt before actually running the Guest. */
413 state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
414 state->guest_idt_desc.address = (long)&state->guest_idt;
415 state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
416 state->guest_gdt_desc.address = (long)&state->guest_gdt;
417
418 /* We know where we want the stack to be when the Guest enters
419 * the switcher: in pages->regs. The stack grows upwards, so
420 * we start it at the end of that structure. */
421 state->guest_tss.esp0 = (long)(&pages->regs + 1);
422 /* And this is the GDT entry to use for the stack: we keep a
423 * couple of special LGUEST entries. */
424 state->guest_tss.ss0 = LGUEST_DS;
425
426 /* x86 can have a finegrained bitmap which indicates what I/O
427 * ports the process can use. We set it to the end of our
428 * structure, meaning "none". */
429 state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
430
431 /* Some GDT entries are the same across all Guests, so we can
432 * set them up now. */
433 setup_default_gdt_entries(state);
434 /* Most IDT entries are the same for all Guests, too.*/
435 setup_default_idt_entries(state, default_idt_entries);
436
437 /* The Host needs to be able to use the LGUEST segments on this
438 * CPU, too, so put them in the Host GDT. */
439 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
440 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
441 }
442
443 /* In the Switcher, we want the %cs segment register to use the
444 * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
445 * it will be undisturbed when we switch. To change %cs and jump we
446 * need this structure to feed to Intel's "lcall" instruction. */
447 lguest_entry.offset = (long)switch_to_guest + switcher_offset();
448 lguest_entry.segment = LGUEST_CS;
449
450 /* Finally, we need to turn off "Page Global Enable". PGE is an
451 * optimization where page table entries are specially marked to show
452 * they never change. The Host kernel marks all the kernel pages this
453 * way because it's always present, even when userspace is running.
454 *
455 * Lguest breaks this: unbeknownst to the rest of the Host kernel, we
456 * switch to the Guest kernel. If you don't disable this on all CPUs,
457 * you'll get really weird bugs that you'll chase for two days.
458 *
459 * I used to turn PGE off every time we switched to the Guest and back
460 * on when we return, but that slowed the Switcher down noticibly. */
461
462 /* We don't need the complexity of CPUs coming and going while we're
463 * doing this. */
464 get_online_cpus();
465 if (cpu_has_pge) { /* We have a broader idea of "global". */
466 /* Remember that this was originally set (for cleanup). */
467 cpu_had_pge = 1;
468 /* adjust_pge is a helper function which sets or unsets the PGE
469 * bit on its CPU, depending on the argument (0 == unset). */
470 on_each_cpu(adjust_pge, (void *)0, 0, 1);
471 /* Turn off the feature in the global feature set. */
472 clear_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
473 }
474 put_online_cpus();
475 };
476 /*:*/
477
478 void __exit lguest_arch_host_fini(void)
479 {
480 /* If we had PGE before we started, turn it back on now. */
481 get_online_cpus();
482 if (cpu_had_pge) {
483 set_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
484 /* adjust_pge's argument "1" means set PGE. */
485 on_each_cpu(adjust_pge, (void *)1, 0, 1);
486 }
487 put_online_cpus();
488 }
489
490
491 /*H:122 The i386-specific hypercalls simply farm out to the right functions. */
492 int lguest_arch_do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
493 {
494 switch (args->arg0) {
495 case LHCALL_LOAD_GDT:
496 load_guest_gdt(cpu, args->arg1, args->arg2);
497 break;
498 case LHCALL_LOAD_IDT_ENTRY:
499 load_guest_idt_entry(cpu, args->arg1, args->arg2, args->arg3);
500 break;
501 case LHCALL_LOAD_TLS:
502 guest_load_tls(cpu, args->arg1);
503 break;
504 default:
505 /* Bad Guest. Bad! */
506 return -EIO;
507 }
508 return 0;
509 }
510
511 /*H:126 i386-specific hypercall initialization: */
512 int lguest_arch_init_hypercalls(struct lg_cpu *cpu)
513 {
514 u32 tsc_speed;
515
516 /* The pointer to the Guest's "struct lguest_data" is the only
517 * argument. We check that address now. */
518 if (!lguest_address_ok(cpu->lg, cpu->hcall->arg1,
519 sizeof(*cpu->lg->lguest_data)))
520 return -EFAULT;
521
522 /* Having checked it, we simply set lg->lguest_data to point straight
523 * into the Launcher's memory at the right place and then use
524 * copy_to_user/from_user from now on, instead of lgread/write. I put
525 * this in to show that I'm not immune to writing stupid
526 * optimizations. */
527 cpu->lg->lguest_data = cpu->lg->mem_base + cpu->hcall->arg1;
528
529 /* We insist that the Time Stamp Counter exist and doesn't change with
530 * cpu frequency. Some devious chip manufacturers decided that TSC
531 * changes could be handled in software. I decided that time going
532 * backwards might be good for benchmarks, but it's bad for users.
533 *
534 * We also insist that the TSC be stable: the kernel detects unreliable
535 * TSCs for its own purposes, and we use that here. */
536 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
537 tsc_speed = tsc_khz;
538 else
539 tsc_speed = 0;
540 if (put_user(tsc_speed, &cpu->lg->lguest_data->tsc_khz))
541 return -EFAULT;
542
543 /* The interrupt code might not like the system call vector. */
544 if (!check_syscall_vector(cpu->lg))
545 kill_guest(cpu, "bad syscall vector");
546
547 return 0;
548 }
549
550 /*L:030 lguest_arch_setup_regs()
551 *
552 * Most of the Guest's registers are left alone: we used get_zeroed_page() to
553 * allocate the structure, so they will be 0. */
554 void lguest_arch_setup_regs(struct lg_cpu *cpu, unsigned long start)
555 {
556 struct lguest_regs *regs = cpu->regs;
557
558 /* There are four "segment" registers which the Guest needs to boot:
559 * The "code segment" register (cs) refers to the kernel code segment
560 * __KERNEL_CS, and the "data", "extra" and "stack" segment registers
561 * refer to the kernel data segment __KERNEL_DS.
562 *
563 * The privilege level is packed into the lower bits. The Guest runs
564 * at privilege level 1 (GUEST_PL).*/
565 regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
566 regs->cs = __KERNEL_CS|GUEST_PL;
567
568 /* The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
569 * is supposed to always be "1". Bit 9 (0x200) controls whether
570 * interrupts are enabled. We always leave interrupts enabled while
571 * running the Guest. */
572 regs->eflags = X86_EFLAGS_IF | 0x2;
573
574 /* The "Extended Instruction Pointer" register says where the Guest is
575 * running. */
576 regs->eip = start;
577
578 /* %esi points to our boot information, at physical address 0, so don't
579 * touch it. */
580
581 /* There are a couple of GDT entries the Guest expects when first
582 * booting. */
583 setup_guest_gdt(cpu);
584 }
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